195584Sanholt/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
2152909Sanholt * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com
3152909Sanholt */
4139749Simp/*-
595584Sanholt * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
695584Sanholt * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
795584Sanholt * All rights reserved.
895584Sanholt *
995584Sanholt * Permission is hereby granted, free of charge, to any person obtaining a
1095584Sanholt * copy of this software and associated documentation files (the "Software"),
1195584Sanholt * to deal in the Software without restriction, including without limitation
1295584Sanholt * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1395584Sanholt * and/or sell copies of the Software, and to permit persons to whom the
1495584Sanholt * Software is furnished to do so, subject to the following conditions:
1595584Sanholt *
1695584Sanholt * The above copyright notice and this permission notice (including the next
1795584Sanholt * paragraph) shall be included in all copies or substantial portions of the
1895584Sanholt * Software.
1995584Sanholt *
2095584Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
2195584Sanholt * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2295584Sanholt * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
2395584Sanholt * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
2495584Sanholt * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
2595584Sanholt * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
2695584Sanholt * DEALINGS IN THE SOFTWARE.
2795584Sanholt *
2895584Sanholt * Authors:
2995584Sanholt *    Gareth Hughes <gareth@valinux.com>
3095584Sanholt *    Kevin E. Martin <martin@valinux.com>
3195584Sanholt */
3295584Sanholt
33152909Sanholt#include <sys/cdefs.h>
34152909Sanholt__FBSDID("$FreeBSD$");
35152909Sanholt
3695584Sanholt#ifndef __R128_DRM_H__
3795584Sanholt#define __R128_DRM_H__
3895584Sanholt
3995584Sanholt/* WARNING: If you change any of these defines, make sure to change the
4095584Sanholt * defines in the X server file (r128_sarea.h)
4195584Sanholt */
4295584Sanholt#ifndef __R128_SAREA_DEFINES__
4395584Sanholt#define __R128_SAREA_DEFINES__
4495584Sanholt
4595584Sanholt/* What needs to be changed for the current vertex buffer?
4695584Sanholt */
4795584Sanholt#define R128_UPLOAD_CONTEXT		0x001
4895584Sanholt#define R128_UPLOAD_SETUP		0x002
4995584Sanholt#define R128_UPLOAD_TEX0		0x004
5095584Sanholt#define R128_UPLOAD_TEX1		0x008
5195584Sanholt#define R128_UPLOAD_TEX0IMAGES		0x010
5295584Sanholt#define R128_UPLOAD_TEX1IMAGES		0x020
5395584Sanholt#define R128_UPLOAD_CORE		0x040
5495584Sanholt#define R128_UPLOAD_MASKS		0x080
5595584Sanholt#define R128_UPLOAD_WINDOW		0x100
5695584Sanholt#define R128_UPLOAD_CLIPRECTS		0x200	/* handled client-side */
5795584Sanholt#define R128_REQUIRE_QUIESCENCE		0x400
5895584Sanholt#define R128_UPLOAD_ALL			0x7ff
5995584Sanholt
6095584Sanholt#define R128_FRONT			0x1
6195584Sanholt#define R128_BACK			0x2
6295584Sanholt#define R128_DEPTH			0x4
6395584Sanholt
6495584Sanholt/* Primitive types
6595584Sanholt */
6695584Sanholt#define R128_POINTS			0x1
6795584Sanholt#define R128_LINES			0x2
6895584Sanholt#define R128_LINE_STRIP			0x3
6995584Sanholt#define R128_TRIANGLES			0x4
7095584Sanholt#define R128_TRIANGLE_FAN		0x5
7195584Sanholt#define R128_TRIANGLE_STRIP		0x6
7295584Sanholt
7395584Sanholt/* Vertex/indirect buffer size
7495584Sanholt */
7595584Sanholt#define R128_BUFFER_SIZE		16384
7695584Sanholt
7795584Sanholt/* Byte offsets for indirect buffer data
7895584Sanholt */
7995584Sanholt#define R128_INDEX_PRIM_OFFSET		20
8095584Sanholt#define R128_HOSTDATA_BLIT_OFFSET	32
8195584Sanholt
8295584Sanholt/* Keep these small for testing.
8395584Sanholt */
8495584Sanholt#define R128_NR_SAREA_CLIPRECTS		12
8595584Sanholt
8695584Sanholt/* There are 2 heaps (local/AGP).  Each region within a heap is a
8795584Sanholt *  minimum of 64k, and there are at most 64 of them per heap.
8895584Sanholt */
8995584Sanholt#define R128_LOCAL_TEX_HEAP		0
9095584Sanholt#define R128_AGP_TEX_HEAP		1
9195584Sanholt#define R128_NR_TEX_HEAPS		2
9295584Sanholt#define R128_NR_TEX_REGIONS		64
9395584Sanholt#define R128_LOG_TEX_GRANULARITY	16
9495584Sanholt
9595584Sanholt#define R128_NR_CONTEXT_REGS		12
9695584Sanholt
9795584Sanholt#define R128_MAX_TEXTURE_LEVELS		11
9895584Sanholt#define R128_MAX_TEXTURE_UNITS		2
9995584Sanholt
100145132Sanholt#endif				/* __R128_SAREA_DEFINES__ */
10195584Sanholt
10295584Sanholttypedef struct {
10395584Sanholt	/* Context state - can be written in one large chunk */
10495584Sanholt	unsigned int dst_pitch_offset_c;
10595584Sanholt	unsigned int dp_gui_master_cntl_c;
10695584Sanholt	unsigned int sc_top_left_c;
10795584Sanholt	unsigned int sc_bottom_right_c;
10895584Sanholt	unsigned int z_offset_c;
10995584Sanholt	unsigned int z_pitch_c;
11095584Sanholt	unsigned int z_sten_cntl_c;
11195584Sanholt	unsigned int tex_cntl_c;
11295584Sanholt	unsigned int misc_3d_state_cntl_reg;
11395584Sanholt	unsigned int texture_clr_cmp_clr_c;
11495584Sanholt	unsigned int texture_clr_cmp_msk_c;
11595584Sanholt	unsigned int fog_color_c;
11695584Sanholt
11795584Sanholt	/* Texture state */
11895584Sanholt	unsigned int tex_size_pitch_c;
11995584Sanholt	unsigned int constant_color_c;
12095584Sanholt
12195584Sanholt	/* Setup state */
12295584Sanholt	unsigned int pm4_vc_fpu_setup;
12395584Sanholt	unsigned int setup_cntl;
12495584Sanholt
12595584Sanholt	/* Mask state */
12695584Sanholt	unsigned int dp_write_mask;
12795584Sanholt	unsigned int sten_ref_mask_c;
12895584Sanholt	unsigned int plane_3d_mask_c;
12995584Sanholt
13095584Sanholt	/* Window state */
13195584Sanholt	unsigned int window_xy_offset;
13295584Sanholt
13395584Sanholt	/* Core state */
13495584Sanholt	unsigned int scale_3d_cntl;
13595584Sanholt} drm_r128_context_regs_t;
13695584Sanholt
13795584Sanholt/* Setup registers for each texture unit
13895584Sanholt */
13995584Sanholttypedef struct {
14095584Sanholt	unsigned int tex_cntl;
14195584Sanholt	unsigned int tex_combine_cntl;
14295584Sanholt	unsigned int tex_size_pitch;
14395584Sanholt	unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
14495584Sanholt	unsigned int tex_border_color;
14595584Sanholt} drm_r128_texture_regs_t;
14695584Sanholt
14795584Sanholttypedef struct drm_r128_sarea {
14895584Sanholt	/* The channel for communication of state information to the kernel
14995584Sanholt	 * on firing a vertex buffer.
15095584Sanholt	 */
15195584Sanholt	drm_r128_context_regs_t context_state;
15295584Sanholt	drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
15395584Sanholt	unsigned int dirty;
15495584Sanholt	unsigned int vertsize;
15595584Sanholt	unsigned int vc_format;
15695584Sanholt
15795584Sanholt	/* The current cliprects, or a subset thereof.
15895584Sanholt	 */
159182080Srnoland	struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
16095584Sanholt	unsigned int nbox;
16195584Sanholt
16295584Sanholt	/* Counters for client-side throttling of rendering clients.
16395584Sanholt	 */
16495584Sanholt	unsigned int last_frame;
16595584Sanholt	unsigned int last_dispatch;
16695584Sanholt
167182080Srnoland	struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
168119098Sanholt	unsigned int tex_age[R128_NR_TEX_HEAPS];
16995584Sanholt	int ctx_owner;
170145132Sanholt	int pfAllowPageFlip;	/* number of 3d windows (0,1,2 or more) */
171145132Sanholt	int pfCurrentPage;	/* which buffer is being displayed? */
17295584Sanholt} drm_r128_sarea_t;
17395584Sanholt
17495584Sanholt/* WARNING: If you change any of these defines, make sure to change the
17595584Sanholt * defines in the Xserver file (xf86drmR128.h)
17695584Sanholt */
17795746Sanholt
178112015Sanholt/* Rage 128 specific ioctls
179112015Sanholt * The device specific ioctl range is 0x40 to 0x79.
180112015Sanholt */
181130331Sanholt#define DRM_R128_INIT       0x00
182130331Sanholt#define DRM_R128_CCE_START  0x01
183130331Sanholt#define DRM_R128_CCE_STOP   0x02
184130331Sanholt#define DRM_R128_CCE_RESET  0x03
185130331Sanholt#define DRM_R128_CCE_IDLE   0x04
186130331Sanholt/* 0x05 not used */
187130331Sanholt#define DRM_R128_RESET      0x06
188130331Sanholt#define DRM_R128_SWAP       0x07
189130331Sanholt#define DRM_R128_CLEAR      0x08
190130331Sanholt#define DRM_R128_VERTEX     0x09
191130331Sanholt#define DRM_R128_INDICES    0x0a
192130331Sanholt#define DRM_R128_BLIT       0x0b
193130331Sanholt#define DRM_R128_DEPTH      0x0c
194130331Sanholt#define DRM_R128_STIPPLE    0x0d
195130331Sanholt/* 0x0e not used */
196130331Sanholt#define DRM_R128_INDIRECT   0x0f
197130331Sanholt#define DRM_R128_FULLSCREEN 0x10
198130331Sanholt#define DRM_R128_CLEAR2     0x11
199130331Sanholt#define DRM_R128_GETPARAM   0x12
200130331Sanholt#define DRM_R128_FLIP       0x13
20195746Sanholt
202130331Sanholt#define DRM_IOCTL_R128_INIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
203130331Sanholt#define DRM_IOCTL_R128_CCE_START  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_START)
204130331Sanholt#define DRM_IOCTL_R128_CCE_STOP   DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
205130331Sanholt#define DRM_IOCTL_R128_CCE_RESET  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
206130331Sanholt#define DRM_IOCTL_R128_CCE_IDLE   DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
207130331Sanholt/* 0x05 not used */
208130331Sanholt#define DRM_IOCTL_R128_RESET      DRM_IO(  DRM_COMMAND_BASE + DRM_R128_RESET)
209130331Sanholt#define DRM_IOCTL_R128_SWAP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_SWAP)
210130331Sanholt#define DRM_IOCTL_R128_CLEAR      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
211130331Sanholt#define DRM_IOCTL_R128_VERTEX     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
212130331Sanholt#define DRM_IOCTL_R128_INDICES    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
213130331Sanholt#define DRM_IOCTL_R128_BLIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
214130331Sanholt#define DRM_IOCTL_R128_DEPTH      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
215130331Sanholt#define DRM_IOCTL_R128_STIPPLE    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
216130331Sanholt/* 0x0e not used */
217130331Sanholt#define DRM_IOCTL_R128_INDIRECT   DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
218130331Sanholt#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
219130331Sanholt#define DRM_IOCTL_R128_CLEAR2     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
220152909Sanholt#define DRM_IOCTL_R128_GETPARAM   DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
221130331Sanholt#define DRM_IOCTL_R128_FLIP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_FLIP)
222130331Sanholt
22395584Sanholttypedef struct drm_r128_init {
22495584Sanholt	enum {
225145132Sanholt		R128_INIT_CCE = 0x01,
22695584Sanholt		R128_CLEANUP_CCE = 0x02
22795584Sanholt	} func;
22895584Sanholt	unsigned long sarea_priv_offset;
22995584Sanholt	int is_pci;
23095584Sanholt	int cce_mode;
23195584Sanholt	int cce_secure;
23295584Sanholt	int ring_size;
23395584Sanholt	int usec_timeout;
23495584Sanholt
23595584Sanholt	unsigned int fb_bpp;
23695584Sanholt	unsigned int front_offset, front_pitch;
23795584Sanholt	unsigned int back_offset, back_pitch;
23895584Sanholt	unsigned int depth_bpp;
23995584Sanholt	unsigned int depth_offset, depth_pitch;
24095584Sanholt	unsigned int span_offset;
24195584Sanholt
24295584Sanholt	unsigned long fb_offset;
24395584Sanholt	unsigned long mmio_offset;
24495584Sanholt	unsigned long ring_offset;
24595584Sanholt	unsigned long ring_rptr_offset;
24695584Sanholt	unsigned long buffers_offset;
24795584Sanholt	unsigned long agp_textures_offset;
24895584Sanholt} drm_r128_init_t;
24995584Sanholt
25095584Sanholttypedef struct drm_r128_cce_stop {
25195584Sanholt	int flush;
25295584Sanholt	int idle;
25395584Sanholt} drm_r128_cce_stop_t;
25495584Sanholt
25595584Sanholttypedef struct drm_r128_clear {
25695584Sanholt	unsigned int flags;
25795584Sanholt	unsigned int clear_color;
25895584Sanholt	unsigned int clear_depth;
25995584Sanholt	unsigned int color_mask;
26095584Sanholt	unsigned int depth_mask;
26195584Sanholt} drm_r128_clear_t;
26295584Sanholt
26395584Sanholttypedef struct drm_r128_vertex {
26495584Sanholt	int prim;
265145132Sanholt	int idx;		/* Index of vertex buffer */
266145132Sanholt	int count;		/* Number of vertices in buffer */
267145132Sanholt	int discard;		/* Client finished with buffer? */
26895584Sanholt} drm_r128_vertex_t;
26995584Sanholt
27095584Sanholttypedef struct drm_r128_indices {
27195584Sanholt	int prim;
27295584Sanholt	int idx;
27395584Sanholt	int start;
27495584Sanholt	int end;
275145132Sanholt	int discard;		/* Client finished with buffer? */
27695584Sanholt} drm_r128_indices_t;
27795584Sanholt
27895584Sanholttypedef struct drm_r128_blit {
27995584Sanholt	int idx;
28095584Sanholt	int pitch;
28195584Sanholt	int offset;
28295584Sanholt	int format;
28395584Sanholt	unsigned short x, y;
28495584Sanholt	unsigned short width, height;
28595584Sanholt} drm_r128_blit_t;
28695584Sanholt
28795584Sanholttypedef struct drm_r128_depth {
28895584Sanholt	enum {
289145132Sanholt		R128_WRITE_SPAN = 0x01,
290145132Sanholt		R128_WRITE_PIXELS = 0x02,
291145132Sanholt		R128_READ_SPAN = 0x03,
292145132Sanholt		R128_READ_PIXELS = 0x04
29395584Sanholt	} func;
29495584Sanholt	int n;
295145132Sanholt	int __user *x;
296145132Sanholt	int __user *y;
297145132Sanholt	unsigned int __user *buffer;
298145132Sanholt	unsigned char __user *mask;
29995584Sanholt} drm_r128_depth_t;
30095584Sanholt
30195584Sanholttypedef struct drm_r128_stipple {
302145132Sanholt	unsigned int __user *mask;
30395584Sanholt} drm_r128_stipple_t;
30495584Sanholt
30595584Sanholttypedef struct drm_r128_indirect {
30695584Sanholt	int idx;
30795584Sanholt	int start;
30895584Sanholt	int end;
30995584Sanholt	int discard;
31095584Sanholt} drm_r128_indirect_t;
31195584Sanholt
31295584Sanholttypedef struct drm_r128_fullscreen {
31395584Sanholt	enum {
314145132Sanholt		R128_INIT_FULLSCREEN = 0x01,
31595584Sanholt		R128_CLEANUP_FULLSCREEN = 0x02
31695584Sanholt	} func;
31795584Sanholt} drm_r128_fullscreen_t;
31895584Sanholt
319112015Sanholt/* 2.3: An ioctl to get parameters that aren't available to the 3d
320145132Sanholt * client any other way.
321112015Sanholt */
322112015Sanholt#define R128_PARAM_IRQ_NR            1
323112015Sanholt
324112015Sanholttypedef struct drm_r128_getparam {
325112015Sanholt	int param;
326145132Sanholt	void __user *value;
327112015Sanholt} drm_r128_getparam_t;
328112015Sanholt
32995584Sanholt#endif
330