drm.h revision 121447
195584Sanholt/* drm.h -- Header for Direct Rendering Manager -*- linux-c -*- 295584Sanholt * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com 395584Sanholt * 495584Sanholt * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 595584Sanholt * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 695584Sanholt * All rights reserved. 795584Sanholt * 895584Sanholt * Permission is hereby granted, free of charge, to any person obtaining a 995584Sanholt * copy of this software and associated documentation files (the "Software"), 1095584Sanholt * to deal in the Software without restriction, including without limitation 1195584Sanholt * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1295584Sanholt * and/or sell copies of the Software, and to permit persons to whom the 1395584Sanholt * Software is furnished to do so, subject to the following conditions: 1495584Sanholt * 1595584Sanholt * The above copyright notice and this permission notice (including the next 1695584Sanholt * paragraph) shall be included in all copies or substantial portions of the 1795584Sanholt * Software. 1895584Sanholt * 1995584Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 2095584Sanholt * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 2195584Sanholt * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2295584Sanholt * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 2395584Sanholt * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2495584Sanholt * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2595584Sanholt * OTHER DEALINGS IN THE SOFTWARE. 2695584Sanholt * 2795584Sanholt * Authors: 2895584Sanholt * Rickard E. (Rik) Faith <faith@valinux.com> 2995584Sanholt * 3095584Sanholt * Acknowledgements: 3195584Sanholt * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg. 3295584Sanholt * 3395584Sanholt * $FreeBSD: head/sys/dev/drm/drm.h 121447 2003-10-24 01:48:17Z anholt $ 3495584Sanholt */ 3595584Sanholt 3695584Sanholt#ifndef _DRM_H_ 3795584Sanholt#define _DRM_H_ 3895584Sanholt 39112015Sanholt#if defined(__linux__) 4095584Sanholt#include <linux/config.h> 4195584Sanholt#include <asm/ioctl.h> /* For _IO* macros */ 42112015Sanholt#define DRM_IOCTL_NR(n) _IOC_NR(n) 43112015Sanholt#define DRM_IOC_VOID _IOC_NONE 44112015Sanholt#define DRM_IOC_READ _IOC_READ 45112015Sanholt#define DRM_IOC_WRITE _IOC_WRITE 46112015Sanholt#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 47112015Sanholt#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 48119098Sanholt#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) 49121447Sanholt#if defined(__FreeBSD__) && defined(IN_MODULE) 50112015Sanholt/* Prevent name collision when including sys/ioccom.h */ 51112015Sanholt#undef ioctl 5295584Sanholt#include <sys/ioccom.h> 53112015Sanholt#define ioctl(a,b,c) xf86ioctl(a,b,c) 54112015Sanholt#else 55112015Sanholt#include <sys/ioccom.h> 56112015Sanholt#endif /* __FreeBSD__ && xf86ioctl */ 57112015Sanholt#define DRM_IOCTL_NR(n) ((n) & 0xff) 58112015Sanholt#define DRM_IOC_VOID IOC_VOID 59112015Sanholt#define DRM_IOC_READ IOC_OUT 60112015Sanholt#define DRM_IOC_WRITE IOC_IN 61112015Sanholt#define DRM_IOC_READWRITE IOC_INOUT 62112015Sanholt#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 63112015Sanholt#endif 6495584Sanholt 6595584Sanholt#define XFREE86_VERSION(major,minor,patch,snap) \ 6695584Sanholt ((major << 16) | (minor << 8) | patch) 6795584Sanholt 6895584Sanholt#ifndef CONFIG_XFREE86_VERSION 6995584Sanholt#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 7095584Sanholt#endif 7195584Sanholt 7295584Sanholt#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 7395584Sanholt#define DRM_PROC_DEVICES "/proc/devices" 7495584Sanholt#define DRM_PROC_MISC "/proc/misc" 7595584Sanholt#define DRM_PROC_DRM "/proc/drm" 7695584Sanholt#define DRM_DEV_DRM "/dev/drm" 7795584Sanholt#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 7895584Sanholt#define DRM_DEV_UID 0 7995584Sanholt#define DRM_DEV_GID 0 8095584Sanholt#endif 8195584Sanholt 8295584Sanholt#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */ 8395584Sanholt#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */ 8495584Sanholt#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */ 85112015Sanholt#define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */ 8695584Sanholt 8795584Sanholt#define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */ 8895584Sanholt#define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */ 8995584Sanholt#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 9095584Sanholt#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 9195584Sanholt#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 9295584Sanholt 9395584Sanholttypedef unsigned long drm_handle_t; 9495584Sanholttypedef unsigned int drm_context_t; 9595584Sanholttypedef unsigned int drm_drawable_t; 9695584Sanholttypedef unsigned int drm_magic_t; 9795584Sanholt 9895584Sanholt/* Warning: If you change this structure, make sure you change 9995584Sanholt * XF86DRIClipRectRec in the server as well */ 10095584Sanholt 101112015Sanholt/* KW: Actually it's illegal to change either for 102112015Sanholt * backwards-compatibility reasons. 103112015Sanholt */ 104112015Sanholt 10595584Sanholttypedef struct drm_clip_rect { 10695584Sanholt unsigned short x1; 10795584Sanholt unsigned short y1; 10895584Sanholt unsigned short x2; 10995584Sanholt unsigned short y2; 11095584Sanholt} drm_clip_rect_t; 11195584Sanholt 11295584Sanholttypedef struct drm_tex_region { 11395584Sanholt unsigned char next; 11495584Sanholt unsigned char prev; 11595584Sanholt unsigned char in_use; 11695584Sanholt unsigned char padding; 11795584Sanholt unsigned int age; 11895584Sanholt} drm_tex_region_t; 11995584Sanholt 12095584Sanholttypedef struct drm_version { 12195584Sanholt int version_major; /* Major version */ 12295584Sanholt int version_minor; /* Minor version */ 12395584Sanholt int version_patchlevel;/* Patch level */ 12495584Sanholt size_t name_len; /* Length of name buffer */ 12595584Sanholt char *name; /* Name of driver */ 12695584Sanholt size_t date_len; /* Length of date buffer */ 12795584Sanholt char *date; /* User-space buffer to hold date */ 12895584Sanholt size_t desc_len; /* Length of desc buffer */ 12995584Sanholt char *desc; /* User-space buffer to hold desc */ 13095584Sanholt} drm_version_t; 13195584Sanholt 13295584Sanholttypedef struct drm_unique { 13395584Sanholt size_t unique_len; /* Length of unique */ 13495584Sanholt char *unique; /* Unique name for driver instantiation */ 13595584Sanholt} drm_unique_t; 13695584Sanholt 13795584Sanholttypedef struct drm_list { 13895584Sanholt int count; /* Length of user-space structures */ 13995584Sanholt drm_version_t *version; 14095584Sanholt} drm_list_t; 14195584Sanholt 14295584Sanholttypedef struct drm_block { 14395584Sanholt int unused; 14495584Sanholt} drm_block_t; 14595584Sanholt 14695584Sanholttypedef struct drm_control { 14795584Sanholt enum { 14895584Sanholt DRM_ADD_COMMAND, 14995584Sanholt DRM_RM_COMMAND, 15095584Sanholt DRM_INST_HANDLER, 15195584Sanholt DRM_UNINST_HANDLER 15295584Sanholt } func; 15395584Sanholt int irq; 15495584Sanholt} drm_control_t; 15595584Sanholt 15695584Sanholttypedef enum drm_map_type { 15795584Sanholt _DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */ 15895584Sanholt _DRM_REGISTERS = 1, /* no caching, no core dump */ 15995584Sanholt _DRM_SHM = 2, /* shared, cached */ 16095584Sanholt _DRM_AGP = 3, /* AGP/GART */ 16195584Sanholt _DRM_SCATTER_GATHER = 4 /* Scatter/gather memory for PCI DMA */ 16295584Sanholt} drm_map_type_t; 16395584Sanholt 16495584Sanholttypedef enum drm_map_flags { 16595584Sanholt _DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */ 16695584Sanholt _DRM_READ_ONLY = 0x02, 16795584Sanholt _DRM_LOCKED = 0x04, /* shared, cached, locked */ 16895584Sanholt _DRM_KERNEL = 0x08, /* kernel requires access */ 16995584Sanholt _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */ 17095584Sanholt _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */ 17195584Sanholt _DRM_REMOVABLE = 0x40 /* Removable mapping */ 17295584Sanholt} drm_map_flags_t; 17395584Sanholt 17495584Sanholttypedef struct drm_ctx_priv_map { 17595584Sanholt unsigned int ctx_id; /* Context requesting private mapping */ 17695584Sanholt void *handle; /* Handle of map */ 17795584Sanholt} drm_ctx_priv_map_t; 17895584Sanholt 17995584Sanholttypedef struct drm_map { 18095584Sanholt unsigned long offset; /* Requested physical address (0 for SAREA)*/ 18195584Sanholt unsigned long size; /* Requested physical size (bytes) */ 18295584Sanholt drm_map_type_t type; /* Type of memory to map */ 18395584Sanholt drm_map_flags_t flags; /* Flags */ 18495584Sanholt void *handle; /* User-space: "Handle" to pass to mmap */ 18595584Sanholt /* Kernel-space: kernel-virtual address */ 18695584Sanholt int mtrr; /* MTRR slot used */ 18795584Sanholt /* Private data */ 18895584Sanholt} drm_map_t; 18995584Sanholt 19095584Sanholttypedef struct drm_client { 19195584Sanholt int idx; /* Which client desired? */ 19295584Sanholt int auth; /* Is client authenticated? */ 19395584Sanholt unsigned long pid; /* Process id */ 19495584Sanholt unsigned long uid; /* User id */ 19595584Sanholt unsigned long magic; /* Magic */ 19695584Sanholt unsigned long iocs; /* Ioctl count */ 19795584Sanholt} drm_client_t; 19895584Sanholt 19995584Sanholttypedef enum { 20095584Sanholt _DRM_STAT_LOCK, 20195584Sanholt _DRM_STAT_OPENS, 20295584Sanholt _DRM_STAT_CLOSES, 20395584Sanholt _DRM_STAT_IOCTLS, 20495584Sanholt _DRM_STAT_LOCKS, 20595584Sanholt _DRM_STAT_UNLOCKS, 20695584Sanholt _DRM_STAT_VALUE, /* Generic value */ 20795584Sanholt _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */ 20895584Sanholt _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */ 20995584Sanholt 21095584Sanholt _DRM_STAT_IRQ, /* IRQ */ 21195584Sanholt _DRM_STAT_PRIMARY, /* Primary DMA bytes */ 21295584Sanholt _DRM_STAT_SECONDARY, /* Secondary DMA bytes */ 21395584Sanholt _DRM_STAT_DMA, /* DMA */ 21495584Sanholt _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */ 21595584Sanholt _DRM_STAT_MISSED /* Missed DMA opportunity */ 21695584Sanholt 21795584Sanholt /* Add to the *END* of the list */ 21895584Sanholt} drm_stat_type_t; 21995584Sanholt 22095584Sanholttypedef struct drm_stats { 22195584Sanholt unsigned long count; 22295584Sanholt struct { 22395584Sanholt unsigned long value; 22495584Sanholt drm_stat_type_t type; 22595584Sanholt } data[15]; 22695584Sanholt} drm_stats_t; 22795584Sanholt 22895584Sanholttypedef enum drm_lock_flags { 22995584Sanholt _DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */ 23095584Sanholt _DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */ 23195584Sanholt _DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */ 23295584Sanholt _DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */ 23395584Sanholt /* These *HALT* flags aren't supported yet 23495584Sanholt -- they will be used to support the 23595584Sanholt full-screen DGA-like mode. */ 23695584Sanholt _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */ 23795584Sanholt _DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */ 23895584Sanholt} drm_lock_flags_t; 23995584Sanholt 24095584Sanholttypedef struct drm_lock { 24195584Sanholt int context; 24295584Sanholt drm_lock_flags_t flags; 24395584Sanholt} drm_lock_t; 24495584Sanholt 24595584Sanholttypedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */ 24695584Sanholt /* Flags for DMA buffer dispatch */ 24795584Sanholt _DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched. 24895584Sanholt Note, the buffer may not yet have 24995584Sanholt been processed by the hardware -- 25095584Sanholt getting a hardware lock with the 25195584Sanholt hardware quiescent will ensure 25295584Sanholt that the buffer has been 25395584Sanholt processed. */ 25495584Sanholt _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */ 25595584Sanholt _DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */ 25695584Sanholt 25795584Sanholt /* Flags for DMA buffer request */ 25895584Sanholt _DRM_DMA_WAIT = 0x10, /* Wait for free buffers */ 25995584Sanholt _DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */ 26095584Sanholt _DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */ 26195584Sanholt} drm_dma_flags_t; 26295584Sanholt 26395584Sanholttypedef struct drm_buf_desc { 26495584Sanholt int count; /* Number of buffers of this size */ 26595584Sanholt int size; /* Size in bytes */ 26695584Sanholt int low_mark; /* Low water mark */ 26795584Sanholt int high_mark; /* High water mark */ 26895584Sanholt enum { 26995584Sanholt _DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA */ 27095584Sanholt _DRM_AGP_BUFFER = 0x02, /* Buffer is in agp space */ 27195584Sanholt _DRM_SG_BUFFER = 0x04 /* Scatter/gather memory buffer */ 27295584Sanholt } flags; 27395584Sanholt unsigned long agp_start; /* Start address of where the agp buffers 27495584Sanholt * are in the agp aperture */ 27595584Sanholt} drm_buf_desc_t; 27695584Sanholt 27795584Sanholttypedef struct drm_buf_info { 27895584Sanholt int count; /* Entries in list */ 27995584Sanholt drm_buf_desc_t *list; 28095584Sanholt} drm_buf_info_t; 28195584Sanholt 28295584Sanholttypedef struct drm_buf_free { 28395584Sanholt int count; 28495584Sanholt int *list; 28595584Sanholt} drm_buf_free_t; 28695584Sanholt 28795584Sanholttypedef struct drm_buf_pub { 28895584Sanholt int idx; /* Index into master buflist */ 28995584Sanholt int total; /* Buffer size */ 29095584Sanholt int used; /* Amount of buffer in use (for DMA) */ 29195584Sanholt void *address; /* Address of buffer */ 29295584Sanholt} drm_buf_pub_t; 29395584Sanholt 29495584Sanholttypedef struct drm_buf_map { 29595584Sanholt int count; /* Length of buflist */ 29695584Sanholt void *virtual; /* Mmaped area in user-virtual */ 29795584Sanholt drm_buf_pub_t *list; /* Buffer information */ 29895584Sanholt} drm_buf_map_t; 29995584Sanholt 30095584Sanholttypedef struct drm_dma { 30195584Sanholt /* Indices here refer to the offset into 30295584Sanholt buflist in drm_buf_get_t. */ 30395584Sanholt int context; /* Context handle */ 30495584Sanholt int send_count; /* Number of buffers to send */ 30595584Sanholt int *send_indices; /* List of handles to buffers */ 30695584Sanholt int *send_sizes; /* Lengths of data to send */ 30795584Sanholt drm_dma_flags_t flags; /* Flags */ 30895584Sanholt int request_count; /* Number of buffers requested */ 30995584Sanholt int request_size; /* Desired size for buffers */ 31095584Sanholt int *request_indices; /* Buffer information */ 31195584Sanholt int *request_sizes; 31295584Sanholt int granted_count; /* Number of buffers granted */ 31395584Sanholt} drm_dma_t; 31495584Sanholt 31595584Sanholttypedef enum { 31695584Sanholt _DRM_CONTEXT_PRESERVED = 0x01, 31795584Sanholt _DRM_CONTEXT_2DONLY = 0x02 31895584Sanholt} drm_ctx_flags_t; 31995584Sanholt 32095584Sanholttypedef struct drm_ctx { 32195584Sanholt drm_context_t handle; 32295584Sanholt drm_ctx_flags_t flags; 32395584Sanholt} drm_ctx_t; 32495584Sanholt 32595584Sanholttypedef struct drm_ctx_res { 32695584Sanholt int count; 32795584Sanholt drm_ctx_t *contexts; 32895584Sanholt} drm_ctx_res_t; 32995584Sanholt 33095584Sanholttypedef struct drm_draw { 33195584Sanholt drm_drawable_t handle; 33295584Sanholt} drm_draw_t; 33395584Sanholt 33495584Sanholttypedef struct drm_auth { 33595584Sanholt drm_magic_t magic; 33695584Sanholt} drm_auth_t; 33795584Sanholt 33895584Sanholttypedef struct drm_irq_busid { 33995584Sanholt int irq; 34095584Sanholt int busnum; 34195584Sanholt int devnum; 34295584Sanholt int funcnum; 34395584Sanholt} drm_irq_busid_t; 34495584Sanholt 345112015Sanholttypedef enum { 346112015Sanholt _DRM_VBLANK_ABSOLUTE = 0x0, /* Wait for specific vblank sequence number */ 347112015Sanholt _DRM_VBLANK_RELATIVE = 0x1, /* Wait for given number of vblanks */ 348112015Sanholt _DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */ 349112015Sanholt} drm_vblank_seq_type_t; 350112015Sanholt 351112015Sanholt#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL 352112015Sanholt 353112015Sanholtstruct drm_wait_vblank_request { 354112015Sanholt drm_vblank_seq_type_t type; 355112015Sanholt unsigned int sequence; 356112015Sanholt unsigned long signal; 357112015Sanholt}; 358112015Sanholt 359112015Sanholtstruct drm_wait_vblank_reply { 360112015Sanholt drm_vblank_seq_type_t type; 361112015Sanholt unsigned int sequence; 362112015Sanholt long tval_sec; 363112015Sanholt long tval_usec; 364112015Sanholt}; 365112015Sanholt 366112015Sanholttypedef union drm_wait_vblank { 367112015Sanholt struct drm_wait_vblank_request request; 368112015Sanholt struct drm_wait_vblank_reply reply; 369112015Sanholt} drm_wait_vblank_t; 370112015Sanholt 37195584Sanholttypedef struct drm_agp_mode { 37295584Sanholt unsigned long mode; 37395584Sanholt} drm_agp_mode_t; 37495584Sanholt 37595584Sanholt /* For drm_agp_alloc -- allocated a buffer */ 37695584Sanholttypedef struct drm_agp_buffer { 37795584Sanholt unsigned long size; /* In bytes -- will round to page boundary */ 37895584Sanholt unsigned long handle; /* Used for BIND/UNBIND ioctls */ 37995584Sanholt unsigned long type; /* Type of memory to allocate */ 38095584Sanholt unsigned long physical; /* Physical used by i810 */ 38195584Sanholt} drm_agp_buffer_t; 38295584Sanholt 38395584Sanholt /* For drm_agp_bind */ 38495584Sanholttypedef struct drm_agp_binding { 38595584Sanholt unsigned long handle; /* From drm_agp_buffer */ 38695584Sanholt unsigned long offset; /* In bytes -- will round to page boundary */ 38795584Sanholt} drm_agp_binding_t; 38895584Sanholt 38995584Sanholttypedef struct drm_agp_info { 39095584Sanholt int agp_version_major; 39195584Sanholt int agp_version_minor; 39295584Sanholt unsigned long mode; 39395584Sanholt unsigned long aperture_base; /* physical address */ 39495584Sanholt unsigned long aperture_size; /* bytes */ 39595584Sanholt unsigned long memory_allowed; /* bytes */ 39695584Sanholt unsigned long memory_used; 39795584Sanholt 39895584Sanholt /* PCI information */ 39995584Sanholt unsigned short id_vendor; 40095584Sanholt unsigned short id_device; 40195584Sanholt} drm_agp_info_t; 40295584Sanholt 40395584Sanholttypedef struct drm_scatter_gather { 40495584Sanholt unsigned long size; /* In bytes -- will round to page boundary */ 40595584Sanholt unsigned long handle; /* Used for mapping / unmapping */ 40695584Sanholt} drm_scatter_gather_t; 40795584Sanholt 408121447Sanholttypedef struct drm_set_version { 409121447Sanholt int drm_di_major; 410121447Sanholt int drm_di_minor; 411121447Sanholt int drm_dd_major; 412121447Sanholt int drm_dd_minor; 413121447Sanholt} drm_set_version_t; 414121447Sanholt 41595584Sanholt#define DRM_IOCTL_BASE 'd' 41695584Sanholt#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 417112015Sanholt#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 418112015Sanholt#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 419112015Sanholt#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 42095584Sanholt 42195584Sanholt#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 42295584Sanholt#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 42395584Sanholt#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 42495584Sanholt#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 42595584Sanholt#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 42695584Sanholt#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 42795584Sanholt#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 428121447Sanholt#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t) 42995584Sanholt 43095584Sanholt#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 43195584Sanholt#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 43295584Sanholt#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 43395584Sanholt#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 43495584Sanholt#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 43595584Sanholt#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 43695584Sanholt#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 43795584Sanholt#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 43895584Sanholt#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 43995584Sanholt#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 44095584Sanholt#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 44195584Sanholt 44295584Sanholt#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 44395584Sanholt 44495584Sanholt#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 44595584Sanholt#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 44695584Sanholt 44795584Sanholt#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 44895584Sanholt#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 44995584Sanholt#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 45095584Sanholt#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 45195584Sanholt#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 45295584Sanholt#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 45395584Sanholt#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 45495584Sanholt#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 45595584Sanholt#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 45695584Sanholt#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 45795584Sanholt#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 45895584Sanholt#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 45995584Sanholt#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 46095584Sanholt 46195584Sanholt#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 46295584Sanholt#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 46395584Sanholt#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 46495584Sanholt#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 46595584Sanholt#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 46695584Sanholt#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 46795584Sanholt#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 46895584Sanholt#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 46995584Sanholt 47095584Sanholt#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 47195584Sanholt#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 47295584Sanholt 473112015Sanholt#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) 474112015Sanholt 475112015Sanholt/* Device specfic ioctls should only be in their respective headers 476112015Sanholt * The device specific ioctl range is 0x40 to 0x79. */ 477112015Sanholt#define DRM_COMMAND_BASE 0x40 478112015Sanholt 47995584Sanholt#endif 480