1122580Sanholt/** 2145132Sanholt * \file drm.h 3122580Sanholt * Header for the Direct Rendering Manager 4145132Sanholt * 5122580Sanholt * \author Rickard E. (Rik) Faith <faith@valinux.com> 695584Sanholt * 7122580Sanholt * \par Acknowledgments: 8122580Sanholt * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 9122580Sanholt */ 10122580Sanholt 11139749Simp/*- 1295584Sanholt * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 1395584Sanholt * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 1495584Sanholt * All rights reserved. 1595584Sanholt * 1695584Sanholt * Permission is hereby granted, free of charge, to any person obtaining a 1795584Sanholt * copy of this software and associated documentation files (the "Software"), 1895584Sanholt * to deal in the Software without restriction, including without limitation 1995584Sanholt * the rights to use, copy, modify, merge, publish, distribute, sublicense, 2095584Sanholt * and/or sell copies of the Software, and to permit persons to whom the 2195584Sanholt * Software is furnished to do so, subject to the following conditions: 2295584Sanholt * 2395584Sanholt * The above copyright notice and this permission notice (including the next 2495584Sanholt * paragraph) shall be included in all copies or substantial portions of the 2595584Sanholt * Software. 2695584Sanholt * 2795584Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 2895584Sanholt * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 2995584Sanholt * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 3095584Sanholt * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 3195584Sanholt * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 3295584Sanholt * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 3395584Sanholt * OTHER DEALINGS IN THE SOFTWARE. 3495584Sanholt */ 3595584Sanholt 36152909Sanholt#include <sys/cdefs.h> 37152909Sanholt__FBSDID("$FreeBSD$"); 38152909Sanholt 39145132Sanholt/** 40145132Sanholt * \mainpage 41145132Sanholt * 42145132Sanholt * The Direct Rendering Manager (DRM) is a device-independent kernel-level 43145132Sanholt * device driver that provides support for the XFree86 Direct Rendering 44145132Sanholt * Infrastructure (DRI). 45145132Sanholt * 46145132Sanholt * The DRM supports the Direct Rendering Infrastructure (DRI) in four major 47145132Sanholt * ways: 48145132Sanholt * -# The DRM provides synchronized access to the graphics hardware via 49145132Sanholt * the use of an optimized two-tiered lock. 50145132Sanholt * -# The DRM enforces the DRI security policy for access to the graphics 51145132Sanholt * hardware by only allowing authenticated X11 clients access to 52145132Sanholt * restricted regions of memory. 53145132Sanholt * -# The DRM provides a generic DMA engine, complete with multiple 54145132Sanholt * queues and the ability to detect the need for an OpenGL context 55145132Sanholt * switch. 56145132Sanholt * -# The DRM is extensible via the use of small device-specific modules 57145132Sanholt * that rely extensively on the API exported by the DRM module. 58145132Sanholt * 59145132Sanholt */ 60122580Sanholt 6195584Sanholt#ifndef _DRM_H_ 6295584Sanholt#define _DRM_H_ 6395584Sanholt 64145132Sanholt#ifndef __user 65145132Sanholt#define __user 66145132Sanholt#endif 67182080Srnoland#ifndef __iomem 68182080Srnoland#define __iomem 69182080Srnoland#endif 70145132Sanholt 71152909Sanholt#ifdef __GNUC__ 72152909Sanholt# define DEPRECATED __attribute__ ((deprecated)) 73152909Sanholt#else 74152909Sanholt# define DEPRECATED 75152909Sanholt#endif 76152909Sanholt 77112015Sanholt#if defined(__linux__) 7895584Sanholt#include <asm/ioctl.h> /* For _IO* macros */ 79112015Sanholt#define DRM_IOCTL_NR(n) _IOC_NR(n) 80112015Sanholt#define DRM_IOC_VOID _IOC_NONE 81112015Sanholt#define DRM_IOC_READ _IOC_READ 82112015Sanholt#define DRM_IOC_WRITE _IOC_WRITE 83112015Sanholt#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 84112015Sanholt#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 85158683Sanholt#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) 8695584Sanholt#include <sys/ioccom.h> 87112015Sanholt#define DRM_IOCTL_NR(n) ((n) & 0xff) 88112015Sanholt#define DRM_IOC_VOID IOC_VOID 89112015Sanholt#define DRM_IOC_READ IOC_OUT 90112015Sanholt#define DRM_IOC_WRITE IOC_IN 91112015Sanholt#define DRM_IOC_READWRITE IOC_INOUT 92112015Sanholt#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 93112015Sanholt#endif 9495584Sanholt 95122580Sanholt#ifdef __OpenBSD__ 96122580Sanholt#define DRM_MAJOR 81 97122580Sanholt#endif 98122580Sanholt#if defined(__linux__) || defined(__NetBSD__) 99122580Sanholt#define DRM_MAJOR 226 100122580Sanholt#endif 101157617Sanholt#define DRM_MAX_MINOR 15 102182080Srnoland 103122580Sanholt#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 104122580Sanholt#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 105122580Sanholt#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 106122580Sanholt#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 10795584Sanholt 108145132Sanholt#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 109145132Sanholt#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 11095584Sanholt#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 11195584Sanholt#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 11295584Sanholt#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 11395584Sanholt 114152909Sanholt#if defined(__linux__) 115152909Sanholttypedef unsigned int drm_handle_t; 116152909Sanholt#else 117182080Srnoland#include <sys/types.h> 118145132Sanholttypedef unsigned long drm_handle_t; /**< To mapped regions */ 119152909Sanholt#endif 120145132Sanholttypedef unsigned int drm_context_t; /**< GLXContext handle */ 121145132Sanholttypedef unsigned int drm_drawable_t; 122145132Sanholttypedef unsigned int drm_magic_t; /**< Magic for authentication */ 123122580Sanholt 124122580Sanholt/** 125122580Sanholt * Cliprect. 126145132Sanholt * 127145132Sanholt * \warning If you change this structure, make sure you change 128122580Sanholt * XF86DRIClipRectRec in the server as well 129122580Sanholt * 130122580Sanholt * \note KW: Actually it's illegal to change either for 131112015Sanholt * backwards-compatibility reasons. 132112015Sanholt */ 133182080Srnolandstruct drm_clip_rect { 134145132Sanholt unsigned short x1; 135145132Sanholt unsigned short y1; 136145132Sanholt unsigned short x2; 137145132Sanholt unsigned short y2; 138182080Srnoland}; 13995584Sanholt 140122580Sanholt/** 141122580Sanholt * Texture region, 142122580Sanholt */ 143182080Srnolandstruct drm_tex_region { 144145132Sanholt unsigned char next; 145145132Sanholt unsigned char prev; 146145132Sanholt unsigned char in_use; 147145132Sanholt unsigned char padding; 148145132Sanholt unsigned int age; 149182080Srnoland}; 15095584Sanholt 151130331Sanholt/** 152130331Sanholt * Hardware lock. 153130331Sanholt * 154130331Sanholt * The lock structure is a simple cache-line aligned integer. To avoid 155130331Sanholt * processor bus contention on a multiprocessor system, there should not be any 156130331Sanholt * other data stored in the same cache line. 157130331Sanholt */ 158182080Srnolandstruct drm_hw_lock { 159130331Sanholt __volatile__ unsigned int lock; /**< lock variable */ 160145132Sanholt char padding[60]; /**< Pad to cache line */ 161182080Srnoland}; 162122580Sanholt 163145132Sanholt/* This is beyond ugly, and only works on GCC. However, it allows me to use 164145132Sanholt * drm.h in places (i.e., in the X-server) where I can't use size_t. The real 165145132Sanholt * fix is to use uint32_t instead of size_t, but that fix will break existing 166145132Sanholt * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will* 167145132Sanholt * eventually happen, though. I chose 'unsigned long' to be the fallback type 168145132Sanholt * because that works on all the platforms I know about. Hopefully, the 169145132Sanholt * real fix will happen before that bites us. 170145132Sanholt */ 171130331Sanholt 172145132Sanholt#ifdef __SIZE_TYPE__ 173145132Sanholt# define DRM_SIZE_T __SIZE_TYPE__ 174145132Sanholt#else 175145132Sanholt# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" 176145132Sanholt# define DRM_SIZE_T unsigned long 177145132Sanholt#endif 178145132Sanholt 179122580Sanholt/** 180122580Sanholt * DRM_IOCTL_VERSION ioctl argument type. 181145132Sanholt * 182122580Sanholt * \sa drmGetVersion(). 183122580Sanholt */ 184182080Srnolandstruct drm_version { 185145132Sanholt int version_major; /**< Major version */ 186145132Sanholt int version_minor; /**< Minor version */ 187145132Sanholt int version_patchlevel; /**< Patch level */ 188145132Sanholt DRM_SIZE_T name_len; /**< Length of name buffer */ 189145132Sanholt char __user *name; /**< Name of driver */ 190145132Sanholt DRM_SIZE_T date_len; /**< Length of date buffer */ 191145132Sanholt char __user *date; /**< User-space buffer to hold date */ 192145132Sanholt DRM_SIZE_T desc_len; /**< Length of desc buffer */ 193145132Sanholt char __user *desc; /**< User-space buffer to hold desc */ 194182080Srnoland}; 19595584Sanholt 196122580Sanholt/** 197122580Sanholt * DRM_IOCTL_GET_UNIQUE ioctl argument type. 198122580Sanholt * 199122580Sanholt * \sa drmGetBusid() and drmSetBusId(). 200122580Sanholt */ 201182080Srnolandstruct drm_unique { 202145132Sanholt DRM_SIZE_T unique_len; /**< Length of unique */ 203145132Sanholt char __user *unique; /**< Unique name for driver instantiation */ 204182080Srnoland}; 20595584Sanholt 206145132Sanholt#undef DRM_SIZE_T 207122580Sanholt 208182080Srnolandstruct drm_list { 209145132Sanholt int count; /**< Length of user-space structures */ 210182080Srnoland struct drm_version __user *version; 211182080Srnoland}; 21295584Sanholt 213182080Srnolandstruct drm_block { 214145132Sanholt int unused; 215182080Srnoland}; 21695584Sanholt 217122580Sanholt/** 218122580Sanholt * DRM_IOCTL_CONTROL ioctl argument type. 219122580Sanholt * 220122580Sanholt * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 221122580Sanholt */ 222182080Srnolandstruct drm_control { 22395584Sanholt enum { 22495584Sanholt DRM_ADD_COMMAND, 22595584Sanholt DRM_RM_COMMAND, 22695584Sanholt DRM_INST_HANDLER, 22795584Sanholt DRM_UNINST_HANDLER 228145132Sanholt } func; 229145132Sanholt int irq; 230182080Srnoland}; 23195584Sanholt 232122580Sanholt/** 233122580Sanholt * Type of memory to map. 234122580Sanholt */ 235182080Srnolandenum drm_map_type { 236145132Sanholt _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 237145132Sanholt _DRM_REGISTERS = 1, /**< no caching, no core dump */ 238145132Sanholt _DRM_SHM = 2, /**< shared, cached */ 239145132Sanholt _DRM_AGP = 3, /**< AGP/GART */ 240145132Sanholt _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 241182080Srnoland _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ 242182080Srnoland _DRM_TTM = 6 243182080Srnoland}; 24495584Sanholt 245122580Sanholt/** 246122580Sanholt * Memory mapping flags. 247122580Sanholt */ 248182080Srnolandenum drm_map_flags { 249145132Sanholt _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 250145132Sanholt _DRM_READ_ONLY = 0x02, 251145132Sanholt _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 252145132Sanholt _DRM_KERNEL = 0x08, /**< kernel requires access */ 253122580Sanholt _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 254145132Sanholt _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 255182080Srnoland _DRM_REMOVABLE = 0x40, /**< Removable mapping */ 256182080Srnoland _DRM_DRIVER = 0x80 /**< Managed by driver */ 257182080Srnoland}; 25895584Sanholt 259182080Srnolandstruct drm_ctx_priv_map { 260145132Sanholt unsigned int ctx_id; /**< Context requesting private mapping */ 261145132Sanholt void *handle; /**< Handle of map */ 262182080Srnoland}; 26395584Sanholt 264122580Sanholt/** 265122580Sanholt * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 266122580Sanholt * argument type. 267122580Sanholt * 268122580Sanholt * \sa drmAddMap(). 269122580Sanholt */ 270182080Srnolandstruct drm_map { 271145132Sanholt unsigned long offset; /**< Requested physical address (0 for SAREA)*/ 272145132Sanholt unsigned long size; /**< Requested physical size (bytes) */ 273182080Srnoland enum drm_map_type type; /**< Type of memory to map */ 274182080Srnoland enum drm_map_flags flags; /**< Flags */ 275145132Sanholt void *handle; /**< User-space: "Handle" to pass to mmap() */ 276122580Sanholt /**< Kernel-space: kernel-virtual address */ 277145132Sanholt int mtrr; /**< MTRR slot used */ 278145132Sanholt /* Private data */ 279182080Srnoland}; 28095584Sanholt 281122580Sanholt/** 282122580Sanholt * DRM_IOCTL_GET_CLIENT ioctl argument type. 283122580Sanholt */ 284182080Srnolandstruct drm_client { 285145132Sanholt int idx; /**< Which client desired? */ 286145132Sanholt int auth; /**< Is client authenticated? */ 287145132Sanholt unsigned long pid; /**< Process ID */ 288145132Sanholt unsigned long uid; /**< User ID */ 289145132Sanholt unsigned long magic; /**< Magic */ 290145132Sanholt unsigned long iocs; /**< Ioctl count */ 291182080Srnoland}; 29295584Sanholt 293182080Srnolandenum drm_stat_type { 29495584Sanholt _DRM_STAT_LOCK, 29595584Sanholt _DRM_STAT_OPENS, 29695584Sanholt _DRM_STAT_CLOSES, 29795584Sanholt _DRM_STAT_IOCTLS, 29895584Sanholt _DRM_STAT_LOCKS, 29995584Sanholt _DRM_STAT_UNLOCKS, 300122580Sanholt _DRM_STAT_VALUE, /**< Generic value */ 301122580Sanholt _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 302122580Sanholt _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 30395584Sanholt 304122580Sanholt _DRM_STAT_IRQ, /**< IRQ */ 305122580Sanholt _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 306122580Sanholt _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 307122580Sanholt _DRM_STAT_DMA, /**< DMA */ 308122580Sanholt _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 309122580Sanholt _DRM_STAT_MISSED /**< Missed DMA opportunity */ 310145132Sanholt /* Add to the *END* of the list */ 311182080Srnoland}; 31295584Sanholt 313122580Sanholt/** 314122580Sanholt * DRM_IOCTL_GET_STATS ioctl argument type. 315122580Sanholt */ 316182080Srnolandstruct drm_stats { 31795584Sanholt unsigned long count; 31895584Sanholt struct { 319145132Sanholt unsigned long value; 320182080Srnoland enum drm_stat_type type; 32195584Sanholt } data[15]; 322182080Srnoland}; 32395584Sanholt 324122580Sanholt/** 325122580Sanholt * Hardware locking flags. 326122580Sanholt */ 327182080Srnolandenum drm_lock_flags { 328145132Sanholt _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 329145132Sanholt _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 330145132Sanholt _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 331145132Sanholt _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 332145132Sanholt /* These *HALT* flags aren't supported yet 333145132Sanholt -- they will be used to support the 334145132Sanholt full-screen DGA-like mode. */ 335122580Sanholt _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 336122580Sanholt _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 337182080Srnoland}; 33895584Sanholt 339122580Sanholt/** 340122580Sanholt * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 341145132Sanholt * 342122580Sanholt * \sa drmGetLock() and drmUnlock(). 343122580Sanholt */ 344182080Srnolandstruct drm_lock { 345145132Sanholt int context; 346182080Srnoland enum drm_lock_flags flags; 347182080Srnoland}; 34895584Sanholt 349122580Sanholt/** 350122580Sanholt * DMA flags 351122580Sanholt * 352145132Sanholt * \warning 353122580Sanholt * These values \e must match xf86drm.h. 354122580Sanholt * 355122580Sanholt * \sa drm_dma. 356122580Sanholt */ 357182080Srnolandenum drm_dma_flags { 358145132Sanholt /* Flags for DMA buffer dispatch */ 359145132Sanholt _DRM_DMA_BLOCK = 0x01, /**< 360122580Sanholt * Block until buffer dispatched. 361145132Sanholt * 362122580Sanholt * \note The buffer may not yet have 363122580Sanholt * been processed by the hardware -- 364122580Sanholt * getting a hardware lock with the 365122580Sanholt * hardware quiescent will ensure 366122580Sanholt * that the buffer has been 367122580Sanholt * processed. 368122580Sanholt */ 369122580Sanholt _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 370145132Sanholt _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 371122580Sanholt 372145132Sanholt /* Flags for DMA buffer request */ 373145132Sanholt _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 374145132Sanholt _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 375145132Sanholt _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 376182080Srnoland}; 37795584Sanholt 378122580Sanholt/** 379122580Sanholt * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 380122580Sanholt * 381122580Sanholt * \sa drmAddBufs(). 382122580Sanholt */ 383182080Srnolandstruct drm_buf_desc { 384145132Sanholt int count; /**< Number of buffers of this size */ 385145132Sanholt int size; /**< Size in bytes */ 386145132Sanholt int low_mark; /**< Low water mark */ 387145132Sanholt int high_mark; /**< High water mark */ 38895584Sanholt enum { 389145132Sanholt _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 390145132Sanholt _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 391145132Sanholt _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 392182080Srnoland _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ 393182080Srnoland _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ 394145132Sanholt } flags; 395145132Sanholt unsigned long agp_start; /**< 396122580Sanholt * Start address of where the AGP buffers are 397122580Sanholt * in the AGP aperture 398122580Sanholt */ 399182080Srnoland}; 40095584Sanholt 401122580Sanholt/** 402122580Sanholt * DRM_IOCTL_INFO_BUFS ioctl argument type. 403122580Sanholt */ 404182080Srnolandstruct drm_buf_info { 405145132Sanholt int count; /**< Number of buffers described in list */ 406182080Srnoland struct drm_buf_desc __user *list; /**< List of buffer descriptions */ 407182080Srnoland}; 40895584Sanholt 409122580Sanholt/** 410122580Sanholt * DRM_IOCTL_FREE_BUFS ioctl argument type. 411122580Sanholt */ 412182080Srnolandstruct drm_buf_free { 413145132Sanholt int count; 414145132Sanholt int __user *list; 415182080Srnoland}; 41695584Sanholt 417122580Sanholt/** 418122580Sanholt * Buffer information 419122580Sanholt * 420122580Sanholt * \sa drm_buf_map. 421122580Sanholt */ 422182080Srnolandstruct drm_buf_pub { 423145132Sanholt int idx; /**< Index into the master buffer list */ 424145132Sanholt int total; /**< Buffer size */ 425145132Sanholt int used; /**< Amount of buffer in use (for DMA) */ 426145132Sanholt void __user *address; /**< Address of buffer */ 427182080Srnoland}; 42895584Sanholt 429122580Sanholt/** 430122580Sanholt * DRM_IOCTL_MAP_BUFS ioctl argument type. 431122580Sanholt */ 432182080Srnolandstruct drm_buf_map { 433145132Sanholt int count; /**< Length of the buffer list */ 434152909Sanholt#if defined(__cplusplus) 435152909Sanholt void __user *c_virtual; 436152909Sanholt#else 437145132Sanholt void __user *virtual; /**< Mmap'd area in user-virtual */ 438152909Sanholt#endif 439182080Srnoland struct drm_buf_pub __user *list; /**< Buffer information */ 440182080Srnoland}; 44195584Sanholt 442122580Sanholt/** 443122580Sanholt * DRM_IOCTL_DMA ioctl argument type. 444122580Sanholt * 445122580Sanholt * Indices here refer to the offset into the buffer list in drm_buf_get. 446122580Sanholt * 447122580Sanholt * \sa drmDMA(). 448122580Sanholt */ 449182080Srnolandstruct drm_dma { 450145132Sanholt int context; /**< Context handle */ 451145132Sanholt int send_count; /**< Number of buffers to send */ 452145132Sanholt int __user *send_indices; /**< List of handles to buffers */ 453145132Sanholt int __user *send_sizes; /**< Lengths of data to send */ 454182080Srnoland enum drm_dma_flags flags; /**< Flags */ 455145132Sanholt int request_count; /**< Number of buffers requested */ 456145132Sanholt int request_size; /**< Desired size for buffers */ 457145132Sanholt int __user *request_indices; /**< Buffer information */ 458145132Sanholt int __user *request_sizes; 459145132Sanholt int granted_count; /**< Number of buffers granted */ 460182080Srnoland}; 46195584Sanholt 462182080Srnolandenum drm_ctx_flags { 46395584Sanholt _DRM_CONTEXT_PRESERVED = 0x01, 464145132Sanholt _DRM_CONTEXT_2DONLY = 0x02 465182080Srnoland}; 46695584Sanholt 467122580Sanholt/** 468122580Sanholt * DRM_IOCTL_ADD_CTX ioctl argument type. 469122580Sanholt * 470122580Sanholt * \sa drmCreateContext() and drmDestroyContext(). 471122580Sanholt */ 472182080Srnolandstruct drm_ctx { 473145132Sanholt drm_context_t handle; 474182080Srnoland enum drm_ctx_flags flags; 475182080Srnoland}; 47695584Sanholt 477122580Sanholt/** 478122580Sanholt * DRM_IOCTL_RES_CTX ioctl argument type. 479122580Sanholt */ 480182080Srnolandstruct drm_ctx_res { 481145132Sanholt int count; 482182080Srnoland struct drm_ctx __user *contexts; 483182080Srnoland}; 48495584Sanholt 485122580Sanholt/** 486122580Sanholt * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 487122580Sanholt */ 488182080Srnolandstruct drm_draw { 489145132Sanholt drm_drawable_t handle; 490182080Srnoland}; 49195584Sanholt 492122580Sanholt/** 493182080Srnoland * DRM_IOCTL_UPDATE_DRAW ioctl argument type. 494182080Srnoland */ 495182080Srnolandtypedef enum { 496182080Srnoland DRM_DRAWABLE_CLIPRECTS, 497182080Srnoland} drm_drawable_info_type_t; 498182080Srnoland 499182080Srnolandstruct drm_update_draw { 500182080Srnoland drm_drawable_t handle; 501182080Srnoland unsigned int type; 502182080Srnoland unsigned int num; 503182080Srnoland unsigned long long data; 504182080Srnoland}; 505182080Srnoland 506182080Srnoland/** 507122580Sanholt * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 508122580Sanholt */ 509182080Srnolandstruct drm_auth { 510145132Sanholt drm_magic_t magic; 511182080Srnoland}; 51295584Sanholt 513122580Sanholt/** 514122580Sanholt * DRM_IOCTL_IRQ_BUSID ioctl argument type. 515122580Sanholt * 516122580Sanholt * \sa drmGetInterruptFromBusID(). 517122580Sanholt */ 518182080Srnolandstruct drm_irq_busid { 519122580Sanholt int irq; /**< IRQ number */ 520122580Sanholt int busnum; /**< bus number */ 521122580Sanholt int devnum; /**< device number */ 522122580Sanholt int funcnum; /**< function number */ 523182080Srnoland}; 52495584Sanholt 525182080Srnolandenum drm_vblank_seq_type { 526145132Sanholt _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 527145132Sanholt _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 528182080Srnoland _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 529182080Srnoland _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 530182080Srnoland _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 531145132Sanholt _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 532182080Srnoland}; 533112015Sanholt 534182080Srnoland#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) 535182080Srnoland#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \ 536182080Srnoland _DRM_VBLANK_NEXTONMISS) 537112015Sanholt 538112015Sanholtstruct drm_wait_vblank_request { 539182080Srnoland enum drm_vblank_seq_type type; 540112015Sanholt unsigned int sequence; 541112015Sanholt unsigned long signal; 542112015Sanholt}; 543112015Sanholt 544112015Sanholtstruct drm_wait_vblank_reply { 545182080Srnoland enum drm_vblank_seq_type type; 546112015Sanholt unsigned int sequence; 547112015Sanholt long tval_sec; 548112015Sanholt long tval_usec; 549112015Sanholt}; 550112015Sanholt 551122580Sanholt/** 552122580Sanholt * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 553122580Sanholt * 554122580Sanholt * \sa drmWaitVBlank(). 555122580Sanholt */ 556182080Srnolandunion drm_wait_vblank { 557112015Sanholt struct drm_wait_vblank_request request; 558112015Sanholt struct drm_wait_vblank_reply reply; 559182080Srnoland}; 560112015Sanholt 561182080Srnoland 562182080Srnoland#define _DRM_PRE_MODESET 1 563182080Srnoland#define _DRM_POST_MODESET 2 564182080Srnoland 565122580Sanholt/** 566182080Srnoland * DRM_IOCTL_MODESET_CTL ioctl argument type 567182080Srnoland * 568182080Srnoland * \sa drmModesetCtl(). 569182080Srnoland */ 570182080Srnolandstruct drm_modeset_ctl { 571182080Srnoland uint32_t crtc; 572182080Srnoland uint32_t cmd; 573182080Srnoland}; 574182080Srnoland 575182080Srnoland/** 576122580Sanholt * DRM_IOCTL_AGP_ENABLE ioctl argument type. 577122580Sanholt * 578122580Sanholt * \sa drmAgpEnable(). 579122580Sanholt */ 580182080Srnolandstruct drm_agp_mode { 581122580Sanholt unsigned long mode; /**< AGP mode */ 582182080Srnoland}; 58395584Sanholt 584122580Sanholt/** 585122580Sanholt * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 586122580Sanholt * 587122580Sanholt * \sa drmAgpAlloc() and drmAgpFree(). 588122580Sanholt */ 589182080Srnolandstruct drm_agp_buffer { 590122580Sanholt unsigned long size; /**< In bytes -- will round to page boundary */ 591122580Sanholt unsigned long handle; /**< Used for binding / unbinding */ 592145132Sanholt unsigned long type; /**< Type of memory to allocate */ 593145132Sanholt unsigned long physical; /**< Physical used by i810 */ 594182080Srnoland}; 59595584Sanholt 596122580Sanholt/** 597122580Sanholt * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 598122580Sanholt * 599122580Sanholt * \sa drmAgpBind() and drmAgpUnbind(). 600122580Sanholt */ 601182080Srnolandstruct drm_agp_binding { 602145132Sanholt unsigned long handle; /**< From drm_agp_buffer */ 603122580Sanholt unsigned long offset; /**< In bytes -- will round to page boundary */ 604182080Srnoland}; 60595584Sanholt 606122580Sanholt/** 607122580Sanholt * DRM_IOCTL_AGP_INFO ioctl argument type. 608122580Sanholt * 609122580Sanholt * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 610122580Sanholt * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 611122580Sanholt * drmAgpVendorId() and drmAgpDeviceId(). 612122580Sanholt */ 613182080Srnolandstruct drm_agp_info { 614145132Sanholt int agp_version_major; 615145132Sanholt int agp_version_minor; 616145132Sanholt unsigned long mode; 617145132Sanholt unsigned long aperture_base; /**< physical address */ 618145132Sanholt unsigned long aperture_size; /**< bytes */ 619145132Sanholt unsigned long memory_allowed; /**< bytes */ 620145132Sanholt unsigned long memory_used; 62195584Sanholt 622145132Sanholt /** \name PCI information */ 623145132Sanholt /*@{ */ 62495584Sanholt unsigned short id_vendor; 62595584Sanholt unsigned short id_device; 626145132Sanholt /*@} */ 627182080Srnoland}; 62895584Sanholt 629122580Sanholt/** 630122580Sanholt * DRM_IOCTL_SG_ALLOC ioctl argument type. 631122580Sanholt */ 632182080Srnolandstruct drm_scatter_gather { 633122580Sanholt unsigned long size; /**< In bytes -- will round to page boundary */ 634122580Sanholt unsigned long handle; /**< Used for mapping / unmapping */ 635182080Srnoland}; 63695584Sanholt 637122580Sanholt/** 638122580Sanholt * DRM_IOCTL_SET_VERSION ioctl argument type. 639122580Sanholt */ 640182080Srnolandstruct drm_set_version { 641121447Sanholt int drm_di_major; 642121447Sanholt int drm_di_minor; 643121447Sanholt int drm_dd_major; 644121447Sanholt int drm_dd_minor; 645182080Srnoland}; 646121447Sanholt 647182080Srnoland 648182080Srnoland#define DRM_FENCE_FLAG_EMIT 0x00000001 649182080Srnoland#define DRM_FENCE_FLAG_SHAREABLE 0x00000002 650145132Sanholt/** 651182080Srnoland * On hardware with no interrupt events for operation completion, 652182080Srnoland * indicates that the kernel should sleep while waiting for any blocking 653182080Srnoland * operation to complete rather than spinning. 654182080Srnoland * 655182080Srnoland * Has no effect otherwise. 656182080Srnoland */ 657182080Srnoland#define DRM_FENCE_FLAG_WAIT_LAZY 0x00000004 658182080Srnoland#define DRM_FENCE_FLAG_NO_USER 0x00000010 659182080Srnoland 660182080Srnoland/* Reserved for driver use */ 661182080Srnoland#define DRM_FENCE_MASK_DRIVER 0xFF000000 662182080Srnoland 663182080Srnoland#define DRM_FENCE_TYPE_EXE 0x00000001 664182080Srnoland 665182080Srnolandstruct drm_fence_arg { 666182080Srnoland unsigned int handle; 667182080Srnoland unsigned int fence_class; 668182080Srnoland unsigned int type; 669182080Srnoland unsigned int flags; 670182080Srnoland unsigned int signaled; 671182080Srnoland unsigned int error; 672182080Srnoland unsigned int sequence; 673182080Srnoland unsigned int pad64; 674182080Srnoland uint64_t expand_pad[2]; /*Future expansion */ 675182080Srnoland}; 676182080Srnoland 677182080Srnoland/* Buffer permissions, referring to how the GPU uses the buffers. 678182080Srnoland * these translate to fence types used for the buffers. 679182080Srnoland * Typically a texture buffer is read, A destination buffer is write and 680182080Srnoland * a command (batch-) buffer is exe. Can be or-ed together. 681182080Srnoland */ 682182080Srnoland 683182080Srnoland#define DRM_BO_FLAG_READ (1ULL << 0) 684182080Srnoland#define DRM_BO_FLAG_WRITE (1ULL << 1) 685182080Srnoland#define DRM_BO_FLAG_EXE (1ULL << 2) 686182080Srnoland 687182080Srnoland/* 688182080Srnoland * All of the bits related to access mode 689182080Srnoland */ 690182080Srnoland#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE) 691182080Srnoland/* 692182080Srnoland * Status flags. Can be read to determine the actual state of a buffer. 693182080Srnoland * Can also be set in the buffer mask before validation. 694182080Srnoland */ 695182080Srnoland 696182080Srnoland/* 697182080Srnoland * Mask: Never evict this buffer. Not even with force. This type of buffer is only 698182080Srnoland * available to root and must be manually removed before buffer manager shutdown 699182080Srnoland * or lock. 700182080Srnoland * Flags: Acknowledge 701182080Srnoland */ 702182080Srnoland#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) 703182080Srnoland 704182080Srnoland/* 705182080Srnoland * Mask: Require that the buffer is placed in mappable memory when validated. 706182080Srnoland * If not set the buffer may or may not be in mappable memory when validated. 707182080Srnoland * Flags: If set, the buffer is in mappable memory. 708182080Srnoland */ 709182080Srnoland#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) 710182080Srnoland 711182080Srnoland/* Mask: The buffer should be shareable with other processes. 712182080Srnoland * Flags: The buffer is shareable with other processes. 713182080Srnoland */ 714182080Srnoland#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) 715182080Srnoland 716182080Srnoland/* Mask: If set, place the buffer in cache-coherent memory if available. 717182080Srnoland * If clear, never place the buffer in cache coherent memory if validated. 718182080Srnoland * Flags: The buffer is currently in cache-coherent memory. 719182080Srnoland */ 720182080Srnoland#define DRM_BO_FLAG_CACHED (1ULL << 7) 721182080Srnoland 722182080Srnoland/* Mask: Make sure that every time this buffer is validated, 723182080Srnoland * it ends up on the same location provided that the memory mask is the same. 724182080Srnoland * The buffer will also not be evicted when claiming space for 725182080Srnoland * other buffers. Basically a pinned buffer but it may be thrown out as 726182080Srnoland * part of buffer manager shutdown or locking. 727182080Srnoland * Flags: Acknowledge. 728182080Srnoland */ 729182080Srnoland#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) 730182080Srnoland 731182080Srnoland/* Mask: Make sure the buffer is in cached memory when mapped. In conjunction 732182080Srnoland * with DRM_BO_FLAG_CACHED it also allows the buffer to be bound into the GART 733182080Srnoland * with unsnooped PTEs instead of snooped, by using chipset-specific cache 734182080Srnoland * flushing at bind time. A better name might be DRM_BO_FLAG_TT_UNSNOOPED, 735182080Srnoland * as the eviction to local memory (TTM unbind) on map is just a side effect 736182080Srnoland * to prevent aggressive cache prefetch from the GPU disturbing the cache 737182080Srnoland * management that the DRM is doing. 738182080Srnoland * 739182080Srnoland * Flags: Acknowledge. 740182080Srnoland * Buffers allocated with this flag should not be used for suballocators 741182080Srnoland * This type may have issues on CPUs with over-aggressive caching 742182080Srnoland * http://marc.info/?l=linux-kernel&m=102376926732464&w=2 743182080Srnoland */ 744182080Srnoland#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) 745182080Srnoland 746182080Srnoland 747182080Srnoland/* Mask: Force DRM_BO_FLAG_CACHED flag strictly also if it is set. 748182080Srnoland * Flags: Acknowledge. 749182080Srnoland */ 750182080Srnoland#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) 751182080Srnoland 752182080Srnoland/* 753182080Srnoland * Mask: Force DRM_BO_FLAG_MAPPABLE flag strictly also if it is clear. 754182080Srnoland * Flags: Acknowledge. 755182080Srnoland */ 756182080Srnoland#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) 757182080Srnoland#define DRM_BO_FLAG_TILE (1ULL << 15) 758182080Srnoland 759182080Srnoland/* 760182080Srnoland * Memory type flags that can be or'ed together in the mask, but only 761182080Srnoland * one appears in flags. 762182080Srnoland */ 763182080Srnoland 764182080Srnoland/* System memory */ 765182080Srnoland#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) 766182080Srnoland/* Translation table memory */ 767182080Srnoland#define DRM_BO_FLAG_MEM_TT (1ULL << 25) 768182080Srnoland/* Vram memory */ 769182080Srnoland#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) 770182080Srnoland/* Up to the driver to define. */ 771182080Srnoland#define DRM_BO_FLAG_MEM_PRIV0 (1ULL << 27) 772182080Srnoland#define DRM_BO_FLAG_MEM_PRIV1 (1ULL << 28) 773182080Srnoland#define DRM_BO_FLAG_MEM_PRIV2 (1ULL << 29) 774182080Srnoland#define DRM_BO_FLAG_MEM_PRIV3 (1ULL << 30) 775182080Srnoland#define DRM_BO_FLAG_MEM_PRIV4 (1ULL << 31) 776182080Srnoland/* We can add more of these now with a 64-bit flag type */ 777182080Srnoland 778182080Srnoland/* 779182080Srnoland * This is a mask covering all of the memory type flags; easier to just 780182080Srnoland * use a single constant than a bunch of | values. It covers 781182080Srnoland * DRM_BO_FLAG_MEM_LOCAL through DRM_BO_FLAG_MEM_PRIV4 782182080Srnoland */ 783182080Srnoland#define DRM_BO_MASK_MEM 0x00000000FF000000ULL 784182080Srnoland/* 785182080Srnoland * This adds all of the CPU-mapping options in with the memory 786182080Srnoland * type to label all bits which change how the page gets mapped 787182080Srnoland */ 788182080Srnoland#define DRM_BO_MASK_MEMTYPE (DRM_BO_MASK_MEM | \ 789182080Srnoland DRM_BO_FLAG_CACHED_MAPPED | \ 790182080Srnoland DRM_BO_FLAG_CACHED | \ 791182080Srnoland DRM_BO_FLAG_MAPPABLE) 792182080Srnoland 793182080Srnoland/* Driver-private flags */ 794182080Srnoland#define DRM_BO_MASK_DRIVER 0xFFFF000000000000ULL 795182080Srnoland 796182080Srnoland/* 797182080Srnoland * Don't block on validate and map. Instead, return EBUSY. 798182080Srnoland */ 799182080Srnoland#define DRM_BO_HINT_DONT_BLOCK 0x00000002 800182080Srnoland/* 801182080Srnoland * Don't place this buffer on the unfenced list. This means 802182080Srnoland * that the buffer will not end up having a fence associated 803182080Srnoland * with it as a result of this operation 804182080Srnoland */ 805182080Srnoland#define DRM_BO_HINT_DONT_FENCE 0x00000004 806182080Srnoland/** 807182080Srnoland * On hardware with no interrupt events for operation completion, 808182080Srnoland * indicates that the kernel should sleep while waiting for any blocking 809182080Srnoland * operation to complete rather than spinning. 810182080Srnoland * 811182080Srnoland * Has no effect otherwise. 812182080Srnoland */ 813182080Srnoland#define DRM_BO_HINT_WAIT_LAZY 0x00000008 814182080Srnoland/* 815182080Srnoland * The client has compute relocations refering to this buffer using the 816182080Srnoland * offset in the presumed_offset field. If that offset ends up matching 817182080Srnoland * where this buffer lands, the kernel is free to skip executing those 818182080Srnoland * relocations 819182080Srnoland */ 820182080Srnoland#define DRM_BO_HINT_PRESUMED_OFFSET 0x00000010 821182080Srnoland 822182080Srnoland#define DRM_BO_INIT_MAGIC 0xfe769812 823182080Srnoland#define DRM_BO_INIT_MAJOR 1 824182080Srnoland#define DRM_BO_INIT_MINOR 0 825182080Srnoland#define DRM_BO_INIT_PATCH 0 826182080Srnoland 827182080Srnoland 828182080Srnolandstruct drm_bo_info_req { 829182080Srnoland uint64_t mask; 830182080Srnoland uint64_t flags; 831182080Srnoland unsigned int handle; 832182080Srnoland unsigned int hint; 833182080Srnoland unsigned int fence_class; 834182080Srnoland unsigned int desired_tile_stride; 835182080Srnoland unsigned int tile_info; 836182080Srnoland unsigned int pad64; 837182080Srnoland uint64_t presumed_offset; 838182080Srnoland}; 839182080Srnoland 840182080Srnolandstruct drm_bo_create_req { 841182080Srnoland uint64_t flags; 842182080Srnoland uint64_t size; 843182080Srnoland uint64_t buffer_start; 844182080Srnoland unsigned int hint; 845182080Srnoland unsigned int page_alignment; 846182080Srnoland}; 847182080Srnoland 848182080Srnoland 849182080Srnoland/* 850182080Srnoland * Reply flags 851182080Srnoland */ 852182080Srnoland 853182080Srnoland#define DRM_BO_REP_BUSY 0x00000001 854182080Srnoland 855182080Srnolandstruct drm_bo_info_rep { 856182080Srnoland uint64_t flags; 857182080Srnoland uint64_t proposed_flags; 858182080Srnoland uint64_t size; 859182080Srnoland uint64_t offset; 860182080Srnoland uint64_t arg_handle; 861182080Srnoland uint64_t buffer_start; 862182080Srnoland unsigned int handle; 863182080Srnoland unsigned int fence_flags; 864182080Srnoland unsigned int rep_flags; 865182080Srnoland unsigned int page_alignment; 866182080Srnoland unsigned int desired_tile_stride; 867182080Srnoland unsigned int hw_tile_stride; 868182080Srnoland unsigned int tile_info; 869182080Srnoland unsigned int pad64; 870182080Srnoland uint64_t expand_pad[4]; /*Future expansion */ 871182080Srnoland}; 872182080Srnoland 873182080Srnolandstruct drm_bo_arg_rep { 874182080Srnoland struct drm_bo_info_rep bo_info; 875182080Srnoland int ret; 876182080Srnoland unsigned int pad64; 877182080Srnoland}; 878182080Srnoland 879182080Srnolandstruct drm_bo_create_arg { 880182080Srnoland union { 881182080Srnoland struct drm_bo_create_req req; 882182080Srnoland struct drm_bo_info_rep rep; 883182080Srnoland } d; 884182080Srnoland}; 885182080Srnoland 886182080Srnolandstruct drm_bo_handle_arg { 887182080Srnoland unsigned int handle; 888182080Srnoland}; 889182080Srnoland 890182080Srnolandstruct drm_bo_reference_info_arg { 891182080Srnoland union { 892182080Srnoland struct drm_bo_handle_arg req; 893182080Srnoland struct drm_bo_info_rep rep; 894182080Srnoland } d; 895182080Srnoland}; 896182080Srnoland 897182080Srnolandstruct drm_bo_map_wait_idle_arg { 898182080Srnoland union { 899182080Srnoland struct drm_bo_info_req req; 900182080Srnoland struct drm_bo_info_rep rep; 901182080Srnoland } d; 902182080Srnoland}; 903182080Srnoland 904182080Srnolandstruct drm_bo_op_req { 905182080Srnoland enum { 906182080Srnoland drm_bo_validate, 907182080Srnoland drm_bo_fence, 908182080Srnoland drm_bo_ref_fence, 909182080Srnoland } op; 910182080Srnoland unsigned int arg_handle; 911182080Srnoland struct drm_bo_info_req bo_req; 912182080Srnoland}; 913182080Srnoland 914182080Srnoland 915182080Srnolandstruct drm_bo_op_arg { 916182080Srnoland uint64_t next; 917182080Srnoland union { 918182080Srnoland struct drm_bo_op_req req; 919182080Srnoland struct drm_bo_arg_rep rep; 920182080Srnoland } d; 921182080Srnoland int handled; 922182080Srnoland unsigned int pad64; 923182080Srnoland}; 924182080Srnoland 925182080Srnoland 926182080Srnoland#define DRM_BO_MEM_LOCAL 0 927182080Srnoland#define DRM_BO_MEM_TT 1 928182080Srnoland#define DRM_BO_MEM_VRAM 2 929182080Srnoland#define DRM_BO_MEM_PRIV0 3 930182080Srnoland#define DRM_BO_MEM_PRIV1 4 931182080Srnoland#define DRM_BO_MEM_PRIV2 5 932182080Srnoland#define DRM_BO_MEM_PRIV3 6 933182080Srnoland#define DRM_BO_MEM_PRIV4 7 934182080Srnoland 935182080Srnoland#define DRM_BO_MEM_TYPES 8 /* For now. */ 936182080Srnoland 937182080Srnoland#define DRM_BO_LOCK_UNLOCK_BM (1 << 0) 938182080Srnoland#define DRM_BO_LOCK_IGNORE_NO_EVICT (1 << 1) 939182080Srnoland 940182080Srnolandstruct drm_bo_version_arg { 941182080Srnoland uint32_t major; 942182080Srnoland uint32_t minor; 943182080Srnoland uint32_t patchlevel; 944182080Srnoland}; 945182080Srnoland 946182080Srnolandstruct drm_mm_type_arg { 947182080Srnoland unsigned int mem_type; 948182080Srnoland unsigned int lock_flags; 949182080Srnoland}; 950182080Srnoland 951182080Srnolandstruct drm_mm_init_arg { 952182080Srnoland unsigned int magic; 953182080Srnoland unsigned int major; 954182080Srnoland unsigned int minor; 955182080Srnoland unsigned int mem_type; 956182080Srnoland uint64_t p_offset; 957182080Srnoland uint64_t p_size; 958182080Srnoland}; 959182080Srnoland 960182080Srnolandstruct drm_mm_info_arg { 961182080Srnoland unsigned int mem_type; 962182080Srnoland uint64_t p_size; 963182080Srnoland}; 964182080Srnoland 965183573Srnolandstruct drm_gem_close { 966183573Srnoland /** Handle of the object to be closed. */ 967183573Srnoland uint32_t handle; 968183573Srnoland uint32_t pad; 969183573Srnoland}; 970183573Srnoland 971183573Srnolandstruct drm_gem_flink { 972183573Srnoland /** Handle for the object being named */ 973183573Srnoland uint32_t handle; 974183573Srnoland 975183573Srnoland /** Returned global name */ 976183573Srnoland uint32_t name; 977183573Srnoland}; 978183573Srnoland 979183573Srnolandstruct drm_gem_open { 980183573Srnoland /** Name of object being opened */ 981183573Srnoland uint32_t name; 982183573Srnoland 983183573Srnoland /** Returned handle for the object */ 984183573Srnoland uint32_t handle; 985183573Srnoland 986183573Srnoland /** Returned size of the object */ 987183573Srnoland uint64_t size; 988183573Srnoland}; 989183573Srnoland 990182080Srnoland/** 991145132Sanholt * \name Ioctls Definitions 992145132Sanholt */ 993145132Sanholt/*@{*/ 994122580Sanholt 99595584Sanholt#define DRM_IOCTL_BASE 'd' 99695584Sanholt#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 997112015Sanholt#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 998112015Sanholt#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 999112015Sanholt#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 100095584Sanholt 1001182080Srnoland#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) 1002182080Srnoland#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) 1003182080Srnoland#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) 1004182080Srnoland#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) 1005182080Srnoland#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) 1006182080Srnoland#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 1007182080Srnoland#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 1008182080Srnoland#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 1009183573Srnoland#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) 101095584Sanholt 1011183573Srnoland#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 1012183573Srnoland#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 1013183573Srnoland#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 1014183573Srnoland 1015182080Srnoland#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 1016182080Srnoland#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 1017182080Srnoland#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) 1018182080Srnoland#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) 1019182080Srnoland#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) 1020182080Srnoland#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) 1021182080Srnoland#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) 1022182080Srnoland#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) 1023182080Srnoland#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) 1024182080Srnoland#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) 1025182080Srnoland#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) 102695584Sanholt 1027182080Srnoland#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) 102895584Sanholt 1029182080Srnoland#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) 1030182080Srnoland#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) 103195584Sanholt 1032182080Srnoland#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) 1033182080Srnoland#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) 1034182080Srnoland#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) 1035182080Srnoland#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) 1036182080Srnoland#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) 1037182080Srnoland#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) 1038182080Srnoland#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) 1039182080Srnoland#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) 1040182080Srnoland#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) 1041182080Srnoland#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) 1042182080Srnoland#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) 1043182080Srnoland#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) 1044182080Srnoland#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) 104595584Sanholt 104695584Sanholt#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 104795584Sanholt#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 1048182080Srnoland#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) 1049182080Srnoland#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) 1050182080Srnoland#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) 1051182080Srnoland#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) 1052182080Srnoland#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) 1053182080Srnoland#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) 105495584Sanholt 1055182080Srnoland#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) 1056182080Srnoland#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) 105795584Sanholt 1058182080Srnoland#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 1059112015Sanholt 1060182080Srnoland#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 1061182080Srnoland 1062182080Srnoland#define DRM_IOCTL_MM_INIT DRM_IOWR(0xc0, struct drm_mm_init_arg) 1063182080Srnoland#define DRM_IOCTL_MM_TAKEDOWN DRM_IOWR(0xc1, struct drm_mm_type_arg) 1064182080Srnoland#define DRM_IOCTL_MM_LOCK DRM_IOWR(0xc2, struct drm_mm_type_arg) 1065182080Srnoland#define DRM_IOCTL_MM_UNLOCK DRM_IOWR(0xc3, struct drm_mm_type_arg) 1066182080Srnoland 1067182080Srnoland#define DRM_IOCTL_FENCE_CREATE DRM_IOWR(0xc4, struct drm_fence_arg) 1068182080Srnoland#define DRM_IOCTL_FENCE_REFERENCE DRM_IOWR(0xc6, struct drm_fence_arg) 1069182080Srnoland#define DRM_IOCTL_FENCE_UNREFERENCE DRM_IOWR(0xc7, struct drm_fence_arg) 1070182080Srnoland#define DRM_IOCTL_FENCE_SIGNALED DRM_IOWR(0xc8, struct drm_fence_arg) 1071182080Srnoland#define DRM_IOCTL_FENCE_FLUSH DRM_IOWR(0xc9, struct drm_fence_arg) 1072182080Srnoland#define DRM_IOCTL_FENCE_WAIT DRM_IOWR(0xca, struct drm_fence_arg) 1073182080Srnoland#define DRM_IOCTL_FENCE_EMIT DRM_IOWR(0xcb, struct drm_fence_arg) 1074182080Srnoland#define DRM_IOCTL_FENCE_BUFFERS DRM_IOWR(0xcc, struct drm_fence_arg) 1075182080Srnoland 1076182080Srnoland#define DRM_IOCTL_BO_CREATE DRM_IOWR(0xcd, struct drm_bo_create_arg) 1077182080Srnoland#define DRM_IOCTL_BO_MAP DRM_IOWR(0xcf, struct drm_bo_map_wait_idle_arg) 1078182080Srnoland#define DRM_IOCTL_BO_UNMAP DRM_IOWR(0xd0, struct drm_bo_handle_arg) 1079182080Srnoland#define DRM_IOCTL_BO_REFERENCE DRM_IOWR(0xd1, struct drm_bo_reference_info_arg) 1080182080Srnoland#define DRM_IOCTL_BO_UNREFERENCE DRM_IOWR(0xd2, struct drm_bo_handle_arg) 1081182080Srnoland#define DRM_IOCTL_BO_SETSTATUS DRM_IOWR(0xd3, struct drm_bo_map_wait_idle_arg) 1082182080Srnoland#define DRM_IOCTL_BO_INFO DRM_IOWR(0xd4, struct drm_bo_reference_info_arg) 1083182080Srnoland#define DRM_IOCTL_BO_WAIT_IDLE DRM_IOWR(0xd5, struct drm_bo_map_wait_idle_arg) 1084182080Srnoland#define DRM_IOCTL_BO_VERSION DRM_IOR(0xd6, struct drm_bo_version_arg) 1085182080Srnoland#define DRM_IOCTL_MM_INFO DRM_IOWR(0xd7, struct drm_mm_info_arg) 1086182080Srnoland 1087145132Sanholt/*@}*/ 1088145132Sanholt 1089122580Sanholt/** 1090122580Sanholt * Device specific ioctls should only be in their respective headers 1091182080Srnoland * The device specific ioctl range is from 0x40 to 0x99. 1092182080Srnoland * Generic IOCTLS restart at 0xA0. 1093122580Sanholt * 1094122580Sanholt * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 1095122580Sanholt * drmCommandReadWrite(). 1096122580Sanholt */ 1097112015Sanholt#define DRM_COMMAND_BASE 0x40 1098182080Srnoland#define DRM_COMMAND_END 0xA0 1099112015Sanholt 1100182080Srnoland/* typedef area */ 1101183573Srnoland#ifndef __KERNEL__ 1102182080Srnolandtypedef struct drm_clip_rect drm_clip_rect_t; 1103182080Srnolandtypedef struct drm_tex_region drm_tex_region_t; 1104182080Srnolandtypedef struct drm_hw_lock drm_hw_lock_t; 1105182080Srnolandtypedef struct drm_version drm_version_t; 1106182080Srnolandtypedef struct drm_unique drm_unique_t; 1107182080Srnolandtypedef struct drm_list drm_list_t; 1108182080Srnolandtypedef struct drm_block drm_block_t; 1109182080Srnolandtypedef struct drm_control drm_control_t; 1110182080Srnolandtypedef enum drm_map_type drm_map_type_t; 1111182080Srnolandtypedef enum drm_map_flags drm_map_flags_t; 1112182080Srnolandtypedef struct drm_ctx_priv_map drm_ctx_priv_map_t; 1113182080Srnolandtypedef struct drm_map drm_map_t; 1114182080Srnolandtypedef struct drm_client drm_client_t; 1115182080Srnolandtypedef enum drm_stat_type drm_stat_type_t; 1116182080Srnolandtypedef struct drm_stats drm_stats_t; 1117182080Srnolandtypedef enum drm_lock_flags drm_lock_flags_t; 1118182080Srnolandtypedef struct drm_lock drm_lock_t; 1119182080Srnolandtypedef enum drm_dma_flags drm_dma_flags_t; 1120182080Srnolandtypedef struct drm_buf_desc drm_buf_desc_t; 1121182080Srnolandtypedef struct drm_buf_info drm_buf_info_t; 1122182080Srnolandtypedef struct drm_buf_free drm_buf_free_t; 1123182080Srnolandtypedef struct drm_buf_pub drm_buf_pub_t; 1124182080Srnolandtypedef struct drm_buf_map drm_buf_map_t; 1125182080Srnolandtypedef struct drm_dma drm_dma_t; 1126182080Srnolandtypedef union drm_wait_vblank drm_wait_vblank_t; 1127182080Srnolandtypedef struct drm_agp_mode drm_agp_mode_t; 1128182080Srnolandtypedef enum drm_ctx_flags drm_ctx_flags_t; 1129182080Srnolandtypedef struct drm_ctx drm_ctx_t; 1130182080Srnolandtypedef struct drm_ctx_res drm_ctx_res_t; 1131182080Srnolandtypedef struct drm_draw drm_draw_t; 1132182080Srnolandtypedef struct drm_update_draw drm_update_draw_t; 1133182080Srnolandtypedef struct drm_auth drm_auth_t; 1134182080Srnolandtypedef struct drm_irq_busid drm_irq_busid_t; 1135182080Srnolandtypedef enum drm_vblank_seq_type drm_vblank_seq_type_t; 1136182080Srnolandtypedef struct drm_agp_buffer drm_agp_buffer_t; 1137182080Srnolandtypedef struct drm_agp_binding drm_agp_binding_t; 1138182080Srnolandtypedef struct drm_agp_info drm_agp_info_t; 1139182080Srnolandtypedef struct drm_scatter_gather drm_scatter_gather_t; 1140182080Srnolandtypedef struct drm_set_version drm_set_version_t; 1141182080Srnoland 1142182080Srnolandtypedef struct drm_fence_arg drm_fence_arg_t; 1143182080Srnolandtypedef struct drm_mm_type_arg drm_mm_type_arg_t; 1144182080Srnolandtypedef struct drm_mm_init_arg drm_mm_init_arg_t; 1145182080Srnolandtypedef enum drm_bo_type drm_bo_type_t; 114695584Sanholt#endif 1147182080Srnoland 1148182080Srnoland#endif 1149