1179645Smarcel/*-
2179645Smarcel * Copyright (c) 2008 Nathan Whitehorn
3179645Smarcel * Copyright (c) 2003 Peter Grehan
4179645Smarcel * All rights reserved
5179645Smarcel *
6179645Smarcel * Redistribution and use in source and binary forms, with or without
7179645Smarcel * modification, are permitted provided that the following conditions
8179645Smarcel * are met:
9179645Smarcel * 1. Redistributions of source code must retain the above copyright
10179645Smarcel *    notice, this list of conditions and the following disclaimer.
11179645Smarcel * 2. Redistributions in binary form must reproduce the above copyright
12179645Smarcel *    notice, this list of conditions and the following disclaimer in the
13179645Smarcel *    documentation and/or other materials provided with the distribution.
14179645Smarcel *
15179645Smarcel * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16179645Smarcel * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17179645Smarcel * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18179645Smarcel * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19179645Smarcel * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20179645Smarcel * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21179645Smarcel * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22179645Smarcel * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23179645Smarcel * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24179645Smarcel * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25179645Smarcel * SUCH DAMAGE.
26179645Smarcel *
27179645Smarcel * $FreeBSD$
28179645Smarcel */
29179645Smarcel
30179645Smarcel/*
31179645Smarcel * Number of transmit/receive DBDMA descriptors.
32179645Smarcel * XXX allow override with a tuneable ?
33179645Smarcel */
34179645Smarcel#define BM_MAX_DMA_COMMANDS	256
35179645Smarcel#define BM_NTXSEGS		16
36179645Smarcel
37179645Smarcel#define BM_MAX_TX_PACKETS	100
38179645Smarcel#define BM_MAX_RX_PACKETS	100
39179645Smarcel
40179645Smarcel/*
41179645Smarcel * Mutex macros
42179645Smarcel */
43179645Smarcel#define BM_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
44179645Smarcel#define BM_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
45179645Smarcel
46179645Smarcel/*
47179645Smarcel * software state for transmit job mbufs (may be elements of mbuf chains)
48179645Smarcel */
49179645Smarcelstruct bm_txsoft {
50179645Smarcel	struct mbuf *txs_mbuf;		/* head of our mbuf chain */
51179645Smarcel	bus_dmamap_t txs_dmamap;	/* our DMA map */
52179645Smarcel	int txs_firstdesc;		/* first descriptor in packet */
53179645Smarcel	int txs_lastdesc;		/* last descriptor in packet */
54179645Smarcel	int txs_stopdesc;		/* the location of the closing STOP */
55179645Smarcel
56179645Smarcel	int txs_ndescs;			/* number of descriptors */
57179645Smarcel	STAILQ_ENTRY(bm_txsoft) txs_q;
58179645Smarcel};
59179645Smarcel
60179645SmarcelSTAILQ_HEAD(bm_txsq, bm_txsoft);
61179645Smarcel
62179645Smarcel/*
63179645Smarcel * software state for receive jobs
64179645Smarcel */
65179645Smarcelstruct bm_rxsoft {
66179645Smarcel	struct mbuf *rxs_mbuf;		/* head of our mbuf chain */
67179645Smarcel	bus_dmamap_t rxs_dmamap;	/* our DMA map */
68179645Smarcel
69179645Smarcel	int dbdma_slot;
70179645Smarcel	bus_dma_segment_t segment;
71179645Smarcel};
72179645Smarcel
73179645Smarcelstruct bm_softc {
74179645Smarcel	struct ifnet    	*sc_ifp;
75179645Smarcel	struct mtx		sc_mtx;
76179645Smarcel	u_char			sc_enaddr[ETHER_ADDR_LEN];
77179645Smarcel
78179645Smarcel	int			sc_streaming;
79179645Smarcel	int			sc_ifpflags;
80179645Smarcel	int			sc_duplex;
81179645Smarcel	int 			sc_wdog_timer;
82179645Smarcel
83179645Smarcel	struct callout		sc_tick_ch;
84179645Smarcel
85179645Smarcel	device_t		sc_dev;		/* back ptr to dev */
86179645Smarcel	struct resource		*sc_memr;	/* macio bus mem resource */
87179645Smarcel	int			sc_memrid;
88179645Smarcel	device_t		sc_miibus;
89179645Smarcel
90179645Smarcel	struct mii_data		*sc_mii;
91179645Smarcel
92179645Smarcel	struct resource		*sc_txdmar, *sc_rxdmar;
93179645Smarcel	int			sc_txdmarid, sc_rxdmarid;
94179645Smarcel
95179645Smarcel	struct resource		*sc_txdmairq, *sc_rxdmairq;
96179645Smarcel	void			*sc_txihtx, *sc_rxih;
97179645Smarcel	int			sc_txdmairqid, sc_rxdmairqid;
98179645Smarcel
99179645Smarcel	bus_dma_tag_t		sc_pdma_tag;
100179645Smarcel
101179645Smarcel	bus_dma_tag_t		sc_tdma_tag;
102179645Smarcel	struct bm_txsoft	sc_txsoft[BM_MAX_TX_PACKETS];
103179645Smarcel	int			first_used_txdma_slot, next_txdma_slot;
104179645Smarcel
105179645Smarcel	struct bm_txsq		sc_txfreeq;
106179645Smarcel	struct bm_txsq		sc_txdirtyq;
107179645Smarcel
108179645Smarcel	bus_dma_tag_t		sc_rdma_tag;
109179645Smarcel	struct bm_rxsoft	sc_rxsoft[BM_MAX_TX_PACKETS];
110179645Smarcel	int			next_rxdma_slot, rxdma_loop_slot;
111179645Smarcel
112179645Smarcel	dbdma_channel_t		*sc_txdma, *sc_rxdma;
113179645Smarcel};
114