1136301Syongari/*	$FreeBSD$ */
2136301Syongari/*	$NetBSD: auxioreg.h,v 1.4 2001/10/22 07:31:41 mrg Exp $	*/
3136301Syongari
4139749Simp/*-
5136301Syongari * Copyright (c) 2000 Matthew R. Green
6136301Syongari * All rights reserved.
7136301Syongari *
8136301Syongari * Redistribution and use in source and binary forms, with or without
9136301Syongari * modification, are permitted provided that the following conditions
10136301Syongari * are met:
11136301Syongari * 1. Redistributions of source code must retain the above copyright
12136301Syongari *    notice, this list of conditions and the following disclaimer.
13136301Syongari * 2. Redistributions in binary form must reproduce the above copyright
14136301Syongari *    notice, this list of conditions and the following disclaimer in the
15136301Syongari *    documentation and/or other materials provided with the distribution.
16136301Syongari * 3. The name of the author may not be used to endorse or promote products
17136301Syongari *    derived from this software without specific prior written permission.
18136301Syongari *
19136301Syongari * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20136301Syongari * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21136301Syongari * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22136301Syongari * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23136301Syongari * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24136301Syongari * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25136301Syongari * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26136301Syongari * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27136301Syongari * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28136301Syongari * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29136301Syongari * SUCH DAMAGE.
30136301Syongari */
31136301Syongari
32136301Syongari/*
33136301Syongari * The AUXIO registers; their offset in the Ebus2 address space, plus the
34136301Syongari * bits for each register.  Note that the fdthree (FD), SUNW,CS4231 (AUDIO)
35136301Syongari * and power (POWER) devices on the Ebus2 have their AUXIO regsiters mapped
36136301Syongari * into their own "reg" properties, not the "auxio" device's "reg" properties.
37136301Syongari */
38136301Syongari#define	AUXIO_FD			0x00720000
39136301Syongari#define	AUXIO_FD_DENSENSE_INPUT		0x0
40136301Syongari#define	AUXIO_FD_DENSENSE_OUTPUT	0x1
41136301Syongari
42136301Syongari#define	AUXIO_AUDIO			0x00722000
43136301Syongari#define	AUXIO_AUDIO_POWERDOWN		0x0
44136301Syongari
45136301Syongari#define	AUXIO_POWER			0x00724000
46136301Syongari#define	AUXIO_POWER_SYSTEM_OFF		0x0
47136301Syongari#define	AUXIO_POWER_COURTESY_OFF	0x1
48136301Syongari
49136301Syongari#define	AUXIO_LED			0x00726000
50136301Syongari#define	AUXIO_LED_LED			1
51136301Syongari
52136301Syongari#define	AUXIO_PCI			0x00728000
53136301Syongari#define	AUXIO_PCI_SLOT0			0x0	/* two bits each */
54136301Syongari#define	AUXIO_PCI_SLOT1			0x2
55136301Syongari#define	AUXIO_PCI_SLOT2			0x4
56136301Syongari#define	AUXIO_PCI_SLOT3			0x6
57136301Syongari#define	AUXIO_PCI_MODE			0x8
58136301Syongari
59136301Syongari#define	AUXIO_FREQ			0x0072a000
60136301Syongari#define	AUXIO_FREQ_FREQ0		0x0
61136301Syongari#define	AUXIO_FREQ_FREQ1		0x1
62136301Syongari#define	AUXIO_FREQ_FREQ2		0x2
63136301Syongari
64136301Syongari#define	AUXIO_SCSI			0x0072c000
65136301Syongari#define	AUXIO_SCSI_INT_OSC_EN		0x0
66136301Syongari#define	AUXIO_SCSI_EXT_OSC_EN		0x1
67136301Syongari
68136301Syongari#define	AUXIO_TEMP			0x0072f000
69136301Syongari#define	AUXIO_TEMP_SELECT		0x0
70136301Syongari#define	AUXIO_TEMP_CLOCK		0x1
71136301Syongari#define	AUXIO_TEMP_ENABLE		0x2
72136301Syongari#define	AUXIO_TEMP_DATAOUT		0x3
73136301Syongari#define	AUXIO_TEMP_DATAINT		0x4
74