if_ath_tx.c revision 218932
1178479Sjb/*-
2178479Sjb * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3178479Sjb * All rights reserved.
4178479Sjb *
5178479Sjb * Redistribution and use in source and binary forms, with or without
6178479Sjb * modification, are permitted provided that the following conditions
7178479Sjb * are met:
8178479Sjb * 1. Redistributions of source code must retain the above copyright
9178479Sjb *    notice, this list of conditions and the following disclaimer,
10178479Sjb *    without modification.
11178479Sjb * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12178479Sjb *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13178479Sjb *    redistribution must be conditioned upon including a substantially
14178479Sjb *    similar Disclaimer requirement for further binary redistribution.
15178479Sjb *
16178479Sjb * NO WARRANTY
17178479Sjb * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18178479Sjb * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19178479Sjb * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20178479Sjb * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21178479Sjb * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22178479Sjb * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23178479Sjb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24178479Sjb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25268578Srpaulo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26268578Srpaulo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27178479Sjb * THE POSSIBILITY OF SUCH DAMAGES.
28178479Sjb */
29178479Sjb
30178479Sjb#include <sys/cdefs.h>
31178479Sjb__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 218932 2011-02-22 00:37:53Z adrian $");
32178479Sjb
33178479Sjb/*
34178479Sjb * Driver for the Atheros Wireless LAN controller.
35178479Sjb *
36178479Sjb * This software is derived from work of Atsushi Onoe; his contribution
37178479Sjb * is greatly appreciated.
38178479Sjb */
39178479Sjb
40178479Sjb#include "opt_inet.h"
41178479Sjb#include "opt_ath.h"
42178479Sjb#include "opt_wlan.h"
43178479Sjb
44178479Sjb#include <sys/param.h>
45178479Sjb#include <sys/systm.h>
46178479Sjb#include <sys/sysctl.h>
47178479Sjb#include <sys/mbuf.h>
48178479Sjb#include <sys/malloc.h>
49178479Sjb#include <sys/lock.h>
50178479Sjb#include <sys/mutex.h>
51178479Sjb#include <sys/kernel.h>
52178479Sjb#include <sys/socket.h>
53178479Sjb#include <sys/sockio.h>
54178479Sjb#include <sys/errno.h>
55178479Sjb#include <sys/callout.h>
56178479Sjb#include <sys/bus.h>
57178479Sjb#include <sys/endian.h>
58178479Sjb#include <sys/kthread.h>
59178479Sjb#include <sys/taskqueue.h>
60178479Sjb#include <sys/priv.h>
61178479Sjb
62178479Sjb#include <machine/bus.h>
63178479Sjb
64178479Sjb#include <net/if.h>
65178479Sjb#include <net/if_dl.h>
66178479Sjb#include <net/if_media.h>
67178479Sjb#include <net/if_types.h>
68178479Sjb#include <net/if_arp.h>
69178479Sjb#include <net/ethernet.h>
70178479Sjb#include <net/if_llc.h>
71178479Sjb
72178479Sjb#include <net80211/ieee80211_var.h>
73178479Sjb#include <net80211/ieee80211_regdomain.h>
74178479Sjb#ifdef IEEE80211_SUPPORT_SUPERG
75178479Sjb#include <net80211/ieee80211_superg.h>
76178479Sjb#endif
77178479Sjb#ifdef IEEE80211_SUPPORT_TDMA
78178479Sjb#include <net80211/ieee80211_tdma.h>
79178479Sjb#endif
80178479Sjb
81178479Sjb#include <net/bpf.h>
82178479Sjb
83178479Sjb#ifdef INET
84178479Sjb#include <netinet/in.h>
85178479Sjb#include <netinet/if_ether.h>
86178479Sjb#endif
87178479Sjb
88178479Sjb#include <dev/ath/if_athvar.h>
89178479Sjb#include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
90178479Sjb#include <dev/ath/ath_hal/ah_diagcodes.h>
91178479Sjb
92178479Sjb#include <dev/ath/if_ath_debug.h>
93178479Sjb
94178479Sjb#ifdef ATH_TX99_DIAG
95178479Sjb#include <dev/ath/ath_tx99/ath_tx99.h>
96178479Sjb#endif
97178479Sjb
98178479Sjb#include <dev/ath/if_ath_misc.h>
99178479Sjb#include <dev/ath/if_ath_tx.h>
100253725Spfg#include <dev/ath/if_ath_tx_ht.h>
101178479Sjb
102178479Sjb/*
103178479Sjb * Whether to use the 11n rate scenario functions or not
104178479Sjb */
105178567Sjbstatic inline int
106178479Sjbath_tx_is_11n(struct ath_softc *sc)
107178567Sjb{
108178479Sjb	return (sc->sc_ah->ah_magic == 0x20065416);
109178479Sjb}
110178479Sjb
111178479Sjbvoid
112178479Sjbath_txfrag_cleanup(struct ath_softc *sc,
113178479Sjb	ath_bufhead *frags, struct ieee80211_node *ni)
114178479Sjb{
115178479Sjb	struct ath_buf *bf, *next;
116178479Sjb
117178479Sjb	ATH_TXBUF_LOCK_ASSERT(sc);
118178479Sjb
119178479Sjb	STAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
120178479Sjb		/* NB: bf assumed clean */
121178479Sjb		STAILQ_REMOVE_HEAD(frags, bf_list);
122178479Sjb		STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
123178479Sjb		ieee80211_node_decref(ni);
124178479Sjb	}
125178479Sjb}
126178479Sjb
127178479Sjb/*
128178479Sjb * Setup xmit of a fragmented frame.  Allocate a buffer
129178479Sjb * for each frag and bump the node reference count to
130178479Sjb * reflect the held reference to be setup by ath_tx_start.
131178479Sjb */
132178479Sjbint
133178479Sjbath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
134178479Sjb	struct mbuf *m0, struct ieee80211_node *ni)
135178479Sjb{
136178479Sjb	struct mbuf *m;
137178479Sjb	struct ath_buf *bf;
138178479Sjb
139178479Sjb	ATH_TXBUF_LOCK(sc);
140178479Sjb	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
141178479Sjb		bf = _ath_getbuf_locked(sc);
142178479Sjb		if (bf == NULL) {	/* out of buffers, cleanup */
143178479Sjb			ath_txfrag_cleanup(sc, frags, ni);
144178479Sjb			break;
145178479Sjb		}
146178479Sjb		ieee80211_node_incref(ni);
147178479Sjb		STAILQ_INSERT_TAIL(frags, bf, bf_list);
148178479Sjb	}
149178479Sjb	ATH_TXBUF_UNLOCK(sc);
150178479Sjb
151178479Sjb	return !STAILQ_EMPTY(frags);
152178479Sjb}
153178479Sjb
154178479Sjb/*
155178479Sjb * Reclaim mbuf resources.  For fragmented frames we
156178479Sjb * need to claim each frag chained with m_nextpkt.
157178479Sjb */
158178479Sjbvoid
159178479Sjbath_freetx(struct mbuf *m)
160178479Sjb{
161178479Sjb	struct mbuf *next;
162178479Sjb
163178479Sjb	do {
164178479Sjb		next = m->m_nextpkt;
165178479Sjb		m->m_nextpkt = NULL;
166178479Sjb		m_freem(m);
167178479Sjb	} while ((m = next) != NULL);
168178479Sjb}
169178479Sjb
170178479Sjbstatic int
171178479Sjbath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
172178479Sjb{
173178479Sjb	struct mbuf *m;
174178479Sjb	int error;
175178479Sjb
176178479Sjb	/*
177178479Sjb	 * Load the DMA map so any coalescing is done.  This
178178479Sjb	 * also calculates the number of descriptors we need.
179178479Sjb	 */
180178479Sjb	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
181178479Sjb				     bf->bf_segs, &bf->bf_nseg,
182178479Sjb				     BUS_DMA_NOWAIT);
183178479Sjb	if (error == EFBIG) {
184178479Sjb		/* XXX packet requires too many descriptors */
185178479Sjb		bf->bf_nseg = ATH_TXDESC+1;
186178479Sjb	} else if (error != 0) {
187178479Sjb		sc->sc_stats.ast_tx_busdma++;
188178479Sjb		ath_freetx(m0);
189178479Sjb		return error;
190178479Sjb	}
191178479Sjb	/*
192178479Sjb	 * Discard null packets and check for packets that
193178479Sjb	 * require too many TX descriptors.  We try to convert
194178479Sjb	 * the latter to a cluster.
195178479Sjb	 */
196178479Sjb	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
197178479Sjb		sc->sc_stats.ast_tx_linear++;
198178479Sjb		m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
199178479Sjb		if (m == NULL) {
200268578Srpaulo			ath_freetx(m0);
201178479Sjb			sc->sc_stats.ast_tx_nombuf++;
202178479Sjb			return ENOMEM;
203178479Sjb		}
204178479Sjb		m0 = m;
205178479Sjb		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
206178479Sjb					     bf->bf_segs, &bf->bf_nseg,
207178479Sjb					     BUS_DMA_NOWAIT);
208178479Sjb		if (error != 0) {
209178479Sjb			sc->sc_stats.ast_tx_busdma++;
210178479Sjb			ath_freetx(m0);
211178479Sjb			return error;
212178479Sjb		}
213178479Sjb		KASSERT(bf->bf_nseg <= ATH_TXDESC,
214178479Sjb		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
215178479Sjb	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
216178479Sjb		sc->sc_stats.ast_tx_nodata++;
217178479Sjb		ath_freetx(m0);
218178479Sjb		return EIO;
219178479Sjb	}
220178479Sjb	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
221178479Sjb		__func__, m0, m0->m_pkthdr.len);
222178479Sjb	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
223178479Sjb	bf->bf_m = m0;
224178479Sjb
225178479Sjb	return 0;
226178479Sjb}
227178479Sjb
228268578Srpaulostatic void
229268578Srpauloath_tx_chaindesclist(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
230268578Srpaulo{
231268578Srpaulo	struct ath_hal *ah = sc->sc_ah;
232268578Srpaulo	struct ath_desc *ds, *ds0;
233268578Srpaulo	int i;
234268578Srpaulo
235268578Srpaulo	/*
236268578Srpaulo	 * Fillin the remainder of the descriptor info.
237268578Srpaulo	 */
238268578Srpaulo	ds0 = ds = bf->bf_desc;
239268578Srpaulo	for (i = 0; i < bf->bf_nseg; i++, ds++) {
240268578Srpaulo		ds->ds_data = bf->bf_segs[i].ds_addr;
241268578Srpaulo		if (i == bf->bf_nseg - 1)
242268578Srpaulo			ds->ds_link = 0;
243268578Srpaulo		else
244268578Srpaulo			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
245178479Sjb		ath_hal_filltxdesc(ah, ds
246178479Sjb			, bf->bf_segs[i].ds_len	/* segment length */
247178479Sjb			, i == 0		/* first segment */
248178479Sjb			, i == bf->bf_nseg - 1	/* last segment */
249178479Sjb			, ds0			/* first descriptor */
250178479Sjb		);
251178479Sjb		DPRINTF(sc, ATH_DEBUG_XMIT,
252178479Sjb			"%s: %d: %08x %08x %08x %08x %08x %08x\n",
253178479Sjb			__func__, i, ds->ds_link, ds->ds_data,
254178479Sjb			ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
255178479Sjb	}
256178479Sjb
257178479Sjb}
258178479Sjb
259178479Sjbstatic void
260178479Sjbath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
261178479Sjb{
262178479Sjb	struct ath_hal *ah = sc->sc_ah;
263178479Sjb
264178479Sjb	/* Fill in the details in the descriptor list */
265178479Sjb	ath_tx_chaindesclist(sc, txq, bf);
266178479Sjb
267178479Sjb	/*
268178479Sjb	 * Insert the frame on the outbound list and pass it on
269178479Sjb	 * to the hardware.  Multicast frames buffered for power
270178479Sjb	 * save stations and transmit from the CAB queue are stored
271178479Sjb	 * on a s/w only queue and loaded on to the CAB queue in
272178479Sjb	 * the SWBA handler since frames only go out on DTIM and
273178479Sjb	 * to avoid possible races.
274268578Srpaulo	 */
275178479Sjb	ATH_TXQ_LOCK(txq);
276178479Sjb	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
277178479Sjb	     ("busy status 0x%x", bf->bf_flags));
278178479Sjb	if (txq->axq_qnum != ATH_TXQ_SWQ) {
279178479Sjb#ifdef IEEE80211_SUPPORT_TDMA
280178479Sjb		int qbusy;
281178479Sjb
282178479Sjb		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
283178479Sjb		qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
284178479Sjb		if (txq->axq_link == NULL) {
285178479Sjb			/*
286178479Sjb			 * Be careful writing the address to TXDP.  If
287178479Sjb			 * the tx q is enabled then this write will be
288178479Sjb			 * ignored.  Normally this is not an issue but
289178479Sjb			 * when tdma is in use and the q is beacon gated
290178479Sjb			 * this race can occur.  If the q is busy then
291178479Sjb			 * defer the work to later--either when another
292178479Sjb			 * packet comes along or when we prepare a beacon
293178479Sjb			 * frame at SWBA.
294178479Sjb			 */
295178479Sjb			if (!qbusy) {
296178479Sjb				ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
297178479Sjb				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
298178479Sjb				DPRINTF(sc, ATH_DEBUG_XMIT,
299178479Sjb				    "%s: TXDP[%u] = %p (%p) depth %d\n",
300178479Sjb				    __func__, txq->axq_qnum,
301178479Sjb				    (caddr_t)bf->bf_daddr, bf->bf_desc,
302178479Sjb				    txq->axq_depth);
303178479Sjb			} else {
304178479Sjb				txq->axq_flags |= ATH_TXQ_PUTPENDING;
305178479Sjb				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
306268578Srpaulo				    "%s: Q%u busy, defer enable\n", __func__,
307178479Sjb				    txq->axq_qnum);
308178479Sjb			}
309178479Sjb		} else {
310178479Sjb			*txq->axq_link = bf->bf_daddr;
311178479Sjb			DPRINTF(sc, ATH_DEBUG_XMIT,
312178479Sjb			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
313178479Sjb			    txq->axq_qnum, txq->axq_link,
314178479Sjb			    (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
315178479Sjb			if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
316178479Sjb				/*
317178479Sjb				 * The q was busy when we previously tried
318178479Sjb				 * to write the address of the first buffer
319178479Sjb				 * in the chain.  Since it's not busy now
320178479Sjb				 * handle this chore.  We are certain the
321178479Sjb				 * buffer at the front is the right one since
322178479Sjb				 * axq_link is NULL only when the buffer list
323178479Sjb				 * is/was empty.
324178479Sjb				 */
325178479Sjb				ath_hal_puttxbuf(ah, txq->axq_qnum,
326178479Sjb					STAILQ_FIRST(&txq->axq_q)->bf_daddr);
327178479Sjb				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
328178479Sjb				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
329178479Sjb				    "%s: Q%u restarted\n", __func__,
330178479Sjb				    txq->axq_qnum);
331178479Sjb			}
332178479Sjb		}
333178479Sjb#else
334178479Sjb		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
335178479Sjb		if (txq->axq_link == NULL) {
336178479Sjb			ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
337178479Sjb			DPRINTF(sc, ATH_DEBUG_XMIT,
338178479Sjb			    "%s: TXDP[%u] = %p (%p) depth %d\n",
339178479Sjb			    __func__, txq->axq_qnum,
340178479Sjb			    (caddr_t)bf->bf_daddr, bf->bf_desc,
341178479Sjb			    txq->axq_depth);
342178479Sjb		} else {
343178479Sjb			*txq->axq_link = bf->bf_daddr;
344178479Sjb			DPRINTF(sc, ATH_DEBUG_XMIT,
345178479Sjb			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
346178479Sjb			    txq->axq_qnum, txq->axq_link,
347178479Sjb			    (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
348178479Sjb		}
349178479Sjb#endif /* IEEE80211_SUPPORT_TDMA */
350178479Sjb		txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
351178479Sjb		ath_hal_txstart(ah, txq->axq_qnum);
352178479Sjb	} else {
353178479Sjb		if (txq->axq_link != NULL) {
354178479Sjb			struct ath_buf *last = ATH_TXQ_LAST(txq);
355178479Sjb			struct ieee80211_frame *wh;
356178479Sjb
357178479Sjb			/* mark previous frame */
358178479Sjb			wh = mtod(last->bf_m, struct ieee80211_frame *);
359178479Sjb			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
360178479Sjb			bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
361178479Sjb			    BUS_DMASYNC_PREWRITE);
362178479Sjb
363178479Sjb			/* link descriptor */
364178479Sjb			*txq->axq_link = bf->bf_daddr;
365178479Sjb		}
366178479Sjb		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
367178479Sjb		txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
368178479Sjb	}
369178479Sjb	ATH_TXQ_UNLOCK(txq);
370178479Sjb}
371178479Sjb
372178479Sjbstatic int
373178479Sjbath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
374178479Sjb    struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, int *keyix)
375178479Sjb{
376178479Sjb	if (iswep) {
377178479Sjb		const struct ieee80211_cipher *cip;
378178479Sjb		struct ieee80211_key *k;
379178479Sjb
380178479Sjb		/*
381178479Sjb		 * Construct the 802.11 header+trailer for an encrypted
382178479Sjb		 * frame. The only reason this can fail is because of an
383178479Sjb		 * unknown or unsupported cipher/key type.
384178479Sjb		 */
385178479Sjb		k = ieee80211_crypto_encap(ni, m0);
386178479Sjb		if (k == NULL) {
387178479Sjb			/*
388178479Sjb			 * This can happen when the key is yanked after the
389178479Sjb			 * frame was queued.  Just discard the frame; the
390178479Sjb			 * 802.11 layer counts failures and provides
391178479Sjb			 * debugging/diagnostics.
392178479Sjb			 */
393178479Sjb			return 0;
394178479Sjb		}
395178479Sjb		/*
396178479Sjb		 * Adjust the packet + header lengths for the crypto
397178479Sjb		 * additions and calculate the h/w key index.  When
398178479Sjb		 * a s/w mic is done the frame will have had any mic
399178479Sjb		 * added to it prior to entry so m0->m_pkthdr.len will
400178479Sjb		 * account for it. Otherwise we need to add it to the
401178479Sjb		 * packet length.
402178479Sjb		 */
403178479Sjb		cip = k->wk_cipher;
404178479Sjb		(*hdrlen) += cip->ic_header;
405178479Sjb		(*pktlen) += cip->ic_header + cip->ic_trailer;
406178479Sjb		/* NB: frags always have any TKIP MIC done in s/w */
407178479Sjb		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
408178479Sjb			(*pktlen) += cip->ic_miclen;
409178479Sjb		(*keyix) = k->wk_keyix;
410268578Srpaulo	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
411178479Sjb		/*
412178479Sjb		 * Use station key cache slot, if assigned.
413178479Sjb		 */
414178479Sjb		(*keyix) = ni->ni_ucastkey.wk_keyix;
415178479Sjb		if ((*keyix) == IEEE80211_KEYIX_NONE)
416178479Sjb			(*keyix) = HAL_TXKEYIX_INVALID;
417178479Sjb	} else
418178479Sjb		(*keyix) = HAL_TXKEYIX_INVALID;
419178479Sjb
420178479Sjb	return 1;
421178479Sjb}
422178479Sjb
423178479Sjbstatic uint8_t
424178479Sjbath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
425178479Sjb    int rix, int cix, int shortPreamble)
426178479Sjb{
427178479Sjb	uint8_t ctsrate;
428178479Sjb
429178479Sjb	/*
430178479Sjb	 * CTS transmit rate is derived from the transmit rate
431178479Sjb	 * by looking in the h/w rate table.  We must also factor
432178479Sjb	 * in whether or not a short preamble is to be used.
433178479Sjb	 */
434178479Sjb	/* NB: cix is set above where RTS/CTS is enabled */
435178479Sjb	KASSERT(cix != 0xff, ("cix not setup"));
436178479Sjb	ctsrate = rt->info[cix].rateCode;
437178479Sjb
438178479Sjb	/* XXX this should only matter for legacy rates */
439178479Sjb	if (shortPreamble)
440178479Sjb		ctsrate |= rt->info[cix].shortPreamble;
441178479Sjb
442178479Sjb	return ctsrate;
443178479Sjb}
444178479Sjb
445178479Sjb
446178479Sjb/*
447178479Sjb * Calculate the RTS/CTS duration for legacy frames.
448178479Sjb */
449178479Sjbstatic int
450178479Sjbath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
451178479Sjb    int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
452178479Sjb    int flags)
453178479Sjb{
454178479Sjb	int ctsduration = 0;
455178479Sjb
456178479Sjb	/* This mustn't be called for HT modes */
457178479Sjb	if (rt->info[cix].phy == IEEE80211_T_HT) {
458178479Sjb		printf("%s: HT rate where it shouldn't be (0x%x)\n",
459178479Sjb		    __func__, rt->info[cix].rateCode);
460178479Sjb		return -1;
461178479Sjb	}
462178479Sjb
463178479Sjb	/*
464178479Sjb	 * Compute the transmit duration based on the frame
465178479Sjb	 * size and the size of an ACK frame.  We call into the
466178479Sjb	 * HAL to do the computation since it depends on the
467178479Sjb	 * characteristics of the actual PHY being used.
468178479Sjb	 *
469178479Sjb	 * NB: CTS is assumed the same size as an ACK so we can
470178479Sjb	 *     use the precalculated ACK durations.
471178479Sjb	 */
472178479Sjb	if (shortPreamble) {
473178479Sjb		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
474178479Sjb			ctsduration += rt->info[cix].spAckDuration;
475178479Sjb		ctsduration += ath_hal_computetxtime(ah,
476178479Sjb			rt, pktlen, rix, AH_TRUE);
477178479Sjb		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
478178479Sjb			ctsduration += rt->info[rix].spAckDuration;
479178479Sjb	} else {
480178479Sjb		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
481178479Sjb			ctsduration += rt->info[cix].lpAckDuration;
482178479Sjb		ctsduration += ath_hal_computetxtime(ah,
483178479Sjb			rt, pktlen, rix, AH_FALSE);
484178479Sjb		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
485178479Sjb			ctsduration += rt->info[rix].lpAckDuration;
486178479Sjb	}
487178479Sjb
488178479Sjb	return ctsduration;
489178479Sjb}
490178479Sjb
491178479Sjbint
492178479Sjbath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
493178479Sjb    struct mbuf *m0)
494178479Sjb{
495178479Sjb	struct ieee80211vap *vap = ni->ni_vap;
496178479Sjb	struct ath_vap *avp = ATH_VAP(vap);
497178479Sjb	struct ath_hal *ah = sc->sc_ah;
498178479Sjb	struct ifnet *ifp = sc->sc_ifp;
499178479Sjb	struct ieee80211com *ic = ifp->if_l2com;
500178479Sjb	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
501178479Sjb	int error, iswep, ismcast, isfrag, ismrr;
502178479Sjb	int keyix, hdrlen, pktlen, try0;
503178479Sjb	u_int8_t rix, txrate, ctsrate;
504178479Sjb	u_int8_t cix = 0xff;		/* NB: silence compiler */
505178479Sjb	struct ath_desc *ds;
506178479Sjb	struct ath_txq *txq;
507178479Sjb	struct ieee80211_frame *wh;
508178479Sjb	u_int subtype, flags, ctsduration;
509178479Sjb	HAL_PKT_TYPE atype;
510178479Sjb	const HAL_RATE_TABLE *rt;
511178479Sjb	HAL_BOOL shortPreamble;
512178479Sjb	struct ath_node *an;
513178479Sjb	u_int pri;
514178479Sjb	uint8_t try[4], rate[4];
515178479Sjb
516178479Sjb	bzero(try, sizeof(try));
517178479Sjb	bzero(rate, sizeof(rate));
518178479Sjb
519178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
520178479Sjb	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
521178479Sjb	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
522178479Sjb	isfrag = m0->m_flags & M_FRAG;
523178479Sjb	hdrlen = ieee80211_anyhdrsize(wh);
524178479Sjb	/*
525178479Sjb	 * Packet length must not include any
526178479Sjb	 * pad bytes; deduct them here.
527178479Sjb	 */
528178479Sjb	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
529178479Sjb
530178479Sjb	/* Handle encryption twiddling if needed */
531178479Sjb	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, &pktlen, &keyix)) {
532178479Sjb		ath_freetx(m0);
533178479Sjb		return EIO;
534178479Sjb	}
535178479Sjb
536178479Sjb	/* packet header may have moved, reset our local pointer */
537178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
538178479Sjb
539178479Sjb	pktlen += IEEE80211_CRC_LEN;
540178479Sjb
541178479Sjb	/*
542178479Sjb	 * Load the DMA map so any coalescing is done.  This
543178479Sjb	 * also calculates the number of descriptors we need.
544178479Sjb	 */
545178479Sjb	error = ath_tx_dmasetup(sc, bf, m0);
546178479Sjb	if (error != 0)
547178479Sjb		return error;
548178479Sjb	bf->bf_node = ni;			/* NB: held reference */
549178479Sjb	m0 = bf->bf_m;				/* NB: may have changed */
550178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
551178479Sjb
552178479Sjb	/* setup descriptors */
553178479Sjb	ds = bf->bf_desc;
554178479Sjb	rt = sc->sc_currates;
555178479Sjb	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
556178479Sjb
557178479Sjb	/*
558178479Sjb	 * NB: the 802.11 layer marks whether or not we should
559178479Sjb	 * use short preamble based on the current mode and
560178479Sjb	 * negotiated parameters.
561178479Sjb	 */
562178479Sjb	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
563178479Sjb	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
564178479Sjb		shortPreamble = AH_TRUE;
565178479Sjb		sc->sc_stats.ast_tx_shortpre++;
566178479Sjb	} else {
567178479Sjb		shortPreamble = AH_FALSE;
568178479Sjb	}
569178479Sjb
570178479Sjb	an = ATH_NODE(ni);
571178479Sjb	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
572178479Sjb	ismrr = 0;				/* default no multi-rate retry*/
573178479Sjb	pri = M_WME_GETAC(m0);			/* honor classification */
574178479Sjb	/* XXX use txparams instead of fixed values */
575178479Sjb	/*
576178479Sjb	 * Calculate Atheros packet type from IEEE80211 packet header,
577178479Sjb	 * setup for rate calculations, and select h/w transmit queue.
578178479Sjb	 */
579178479Sjb	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
580178479Sjb	case IEEE80211_FC0_TYPE_MGT:
581178479Sjb		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
582178479Sjb		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
583178479Sjb			atype = HAL_PKT_TYPE_BEACON;
584178479Sjb		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
585178479Sjb			atype = HAL_PKT_TYPE_PROBE_RESP;
586178479Sjb		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
587178479Sjb			atype = HAL_PKT_TYPE_ATIM;
588178479Sjb		else
589178479Sjb			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
590178479Sjb		rix = an->an_mgmtrix;
591178479Sjb		txrate = rt->info[rix].rateCode;
592178479Sjb		if (shortPreamble)
593178479Sjb			txrate |= rt->info[rix].shortPreamble;
594178479Sjb		try0 = ATH_TXMGTTRY;
595178479Sjb		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
596178479Sjb		break;
597178479Sjb	case IEEE80211_FC0_TYPE_CTL:
598178479Sjb		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
599178479Sjb		rix = an->an_mgmtrix;
600178479Sjb		txrate = rt->info[rix].rateCode;
601178479Sjb		if (shortPreamble)
602178479Sjb			txrate |= rt->info[rix].shortPreamble;
603178479Sjb		try0 = ATH_TXMGTTRY;
604178479Sjb		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
605178479Sjb		break;
606178479Sjb	case IEEE80211_FC0_TYPE_DATA:
607178479Sjb		atype = HAL_PKT_TYPE_NORMAL;		/* default */
608178479Sjb		/*
609178479Sjb		 * Data frames: multicast frames go out at a fixed rate,
610178479Sjb		 * EAPOL frames use the mgmt frame rate; otherwise consult
611178479Sjb		 * the rate control module for the rate to use.
612178479Sjb		 */
613178479Sjb		if (ismcast) {
614178479Sjb			rix = an->an_mcastrix;
615178479Sjb			txrate = rt->info[rix].rateCode;
616178479Sjb			if (shortPreamble)
617178479Sjb				txrate |= rt->info[rix].shortPreamble;
618178479Sjb			try0 = 1;
619178479Sjb		} else if (m0->m_flags & M_EAPOL) {
620178479Sjb			/* XXX? maybe always use long preamble? */
621178479Sjb			rix = an->an_mgmtrix;
622178479Sjb			txrate = rt->info[rix].rateCode;
623178479Sjb			if (shortPreamble)
624178479Sjb				txrate |= rt->info[rix].shortPreamble;
625178479Sjb			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
626178479Sjb		} else {
627178479Sjb			ath_rate_findrate(sc, an, shortPreamble, pktlen,
628178479Sjb				&rix, &try0, &txrate);
629178479Sjb			sc->sc_txrix = rix;		/* for LED blinking */
630178479Sjb			sc->sc_lastdatarix = rix;	/* for fast frames */
631178479Sjb			if (try0 != ATH_TXMAXTRY)
632178479Sjb				ismrr = 1;
633178479Sjb		}
634178479Sjb		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
635178479Sjb			flags |= HAL_TXDESC_NOACK;
636178479Sjb		break;
637178479Sjb	default:
638178479Sjb		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
639178479Sjb			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
640178479Sjb		/* XXX statistic */
641178479Sjb		ath_freetx(m0);
642178479Sjb		return EIO;
643178479Sjb	}
644178479Sjb	txq = sc->sc_ac2q[pri];
645178479Sjb
646178479Sjb	/*
647178479Sjb	 * When servicing one or more stations in power-save mode
648178479Sjb	 * (or) if there is some mcast data waiting on the mcast
649178479Sjb	 * queue (to prevent out of order delivery) multicast
650178479Sjb	 * frames must be buffered until after the beacon.
651178479Sjb	 */
652178479Sjb	if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
653178479Sjb		txq = &avp->av_mcastq;
654178479Sjb
655178479Sjb	/*
656178479Sjb	 * Calculate miscellaneous flags.
657178479Sjb	 */
658178479Sjb	if (ismcast) {
659178479Sjb		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
660178479Sjb	} else if (pktlen > vap->iv_rtsthreshold &&
661178479Sjb	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
662178479Sjb		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
663178479Sjb		cix = rt->info[rix].controlRate;
664178479Sjb		sc->sc_stats.ast_tx_rts++;
665178479Sjb	}
666178479Sjb	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
667178479Sjb		sc->sc_stats.ast_tx_noack++;
668178479Sjb#ifdef IEEE80211_SUPPORT_TDMA
669178479Sjb	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
670178479Sjb		DPRINTF(sc, ATH_DEBUG_TDMA,
671178479Sjb		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
672178479Sjb		sc->sc_stats.ast_tdma_ack++;
673178479Sjb		ath_freetx(m0);
674178479Sjb		return EIO;
675178479Sjb	}
676178479Sjb#endif
677178479Sjb
678178479Sjb	/*
679268578Srpaulo	 * If 802.11g protection is enabled, determine whether
680268578Srpaulo	 * to use RTS/CTS or just CTS.  Note that this is only
681178479Sjb	 * done for OFDM unicast frames.
682178479Sjb	 */
683178479Sjb	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
684178479Sjb	    rt->info[rix].phy == IEEE80211_T_OFDM &&
685178479Sjb	    (flags & HAL_TXDESC_NOACK) == 0) {
686178479Sjb		/* XXX fragments must use CCK rates w/ protection */
687178479Sjb		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
688178479Sjb			flags |= HAL_TXDESC_RTSENA;
689178479Sjb		else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
690178479Sjb			flags |= HAL_TXDESC_CTSENA;
691178479Sjb		if (isfrag) {
692178479Sjb			/*
693178479Sjb			 * For frags it would be desirable to use the
694178479Sjb			 * highest CCK rate for RTS/CTS.  But stations
695178479Sjb			 * farther away may detect it at a lower CCK rate
696178479Sjb			 * so use the configured protection rate instead
697178479Sjb			 * (for now).
698178479Sjb			 */
699178479Sjb			cix = rt->info[sc->sc_protrix].controlRate;
700178479Sjb		} else
701178479Sjb			cix = rt->info[sc->sc_protrix].controlRate;
702178479Sjb		sc->sc_stats.ast_tx_protect++;
703178479Sjb	}
704178479Sjb
705178479Sjb	/*
706178479Sjb	 * Calculate duration.  This logically belongs in the 802.11
707178479Sjb	 * layer but it lacks sufficient information to calculate it.
708178479Sjb	 */
709178479Sjb	if ((flags & HAL_TXDESC_NOACK) == 0 &&
710178479Sjb	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
711178479Sjb		u_int16_t dur;
712268578Srpaulo		if (shortPreamble)
713268578Srpaulo			dur = rt->info[rix].spAckDuration;
714268578Srpaulo		else
715178479Sjb			dur = rt->info[rix].lpAckDuration;
716178479Sjb		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
717178479Sjb			dur += dur;		/* additional SIFS+ACK */
718178479Sjb			KASSERT(m0->m_nextpkt != NULL, ("no fragment"));
719178479Sjb			/*
720178479Sjb			 * Include the size of next fragment so NAV is
721178479Sjb			 * updated properly.  The last fragment uses only
722178479Sjb			 * the ACK duration
723178479Sjb			 */
724178479Sjb			dur += ath_hal_computetxtime(ah, rt,
725178479Sjb					m0->m_nextpkt->m_pkthdr.len,
726178479Sjb					rix, shortPreamble);
727178479Sjb		}
728178479Sjb		if (isfrag) {
729178479Sjb			/*
730178479Sjb			 * Force hardware to use computed duration for next
731178479Sjb			 * fragment by disabling multi-rate retry which updates
732178479Sjb			 * duration based on the multi-rate duration table.
733178479Sjb			 */
734178479Sjb			ismrr = 0;
735178479Sjb			try0 = ATH_TXMGTTRY;	/* XXX? */
736178479Sjb		}
737178479Sjb		*(u_int16_t *)wh->i_dur = htole16(dur);
738178479Sjb	}
739178479Sjb
740178479Sjb	/*
741178479Sjb	 * Calculate RTS/CTS rate and duration if needed.
742178479Sjb	 */
743178479Sjb	ctsduration = 0;
744178479Sjb	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
745178479Sjb		ctsrate = ath_tx_get_rtscts_rate(ah, rt, rix, cix, shortPreamble);
746178479Sjb
747178479Sjb		/* The 11n chipsets do ctsduration calculations for you */
748178479Sjb		if (! ath_tx_is_11n(sc))
749178479Sjb			ctsduration = ath_tx_calc_ctsduration(ah, rix, cix, shortPreamble,
750178479Sjb			    pktlen, rt, flags);
751238457Spfg		/*
752268578Srpaulo		 * Must disable multi-rate retry when using RTS/CTS.
753238457Spfg		 */
754178479Sjb		ismrr = 0;
755178479Sjb		try0 = ATH_TXMGTTRY;		/* XXX */
756178479Sjb	} else
757178479Sjb		ctsrate = 0;
758178479Sjb
759178479Sjb	/*
760238457Spfg	 * At this point we are committed to sending the frame
761238457Spfg	 * and we don't need to look at m_nextpkt; clear it in
762238457Spfg	 * case this frame is part of frag chain.
763238457Spfg	 */
764238457Spfg	m0->m_nextpkt = NULL;
765268578Srpaulo
766268578Srpaulo	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
767268578Srpaulo		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
768268578Srpaulo		    sc->sc_hwmap[rix].ieeerate, -1);
769268578Srpaulo
770268578Srpaulo	if (ieee80211_radiotap_active_vap(vap)) {
771268578Srpaulo		u_int64_t tsf = ath_hal_gettsf64(ah);
772268578Srpaulo
773268578Srpaulo		sc->sc_tx_th.wt_tsf = htole64(tsf);
774268578Srpaulo		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
775268578Srpaulo		if (iswep)
776268578Srpaulo			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
777268578Srpaulo		if (isfrag)
778268578Srpaulo			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
779178479Sjb		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
780178479Sjb		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
781178479Sjb		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
782178479Sjb
783178479Sjb		ieee80211_radiotap_tx(vap, m0);
784178479Sjb	}
785178479Sjb
786178479Sjb	/*
787178479Sjb	 * Determine if a tx interrupt should be generated for
788178479Sjb	 * this descriptor.  We take a tx interrupt to reap
789178479Sjb	 * descriptors when the h/w hits an EOL condition or
790178479Sjb	 * when the descriptor is specifically marked to generate
791178479Sjb	 * an interrupt.  We periodically mark descriptors in this
792178479Sjb	 * way to insure timely replenishing of the supply needed
793178479Sjb	 * for sending frames.  Defering interrupts reduces system
794178479Sjb	 * load and potentially allows more concurrent work to be
795178479Sjb	 * done but if done to aggressively can cause senders to
796178479Sjb	 * backup.
797178479Sjb	 *
798178479Sjb	 * NB: use >= to deal with sc_txintrperiod changing
799178479Sjb	 *     dynamically through sysctl.
800178479Sjb	 */
801178479Sjb	if (flags & HAL_TXDESC_INTREQ) {
802178479Sjb		txq->axq_intrcnt = 0;
803178479Sjb	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
804178479Sjb		flags |= HAL_TXDESC_INTREQ;
805178479Sjb		txq->axq_intrcnt = 0;
806178479Sjb	}
807178479Sjb
808178479Sjb	if (ath_tx_is_11n(sc)) {
809178479Sjb		rate[0] = rix;
810178479Sjb		try[0] = try0;
811178479Sjb	}
812178479Sjb
813178479Sjb	/*
814178479Sjb	 * Formulate first tx descriptor with tx controls.
815178479Sjb	 */
816178479Sjb	/* XXX check return value? */
817178479Sjb	/* XXX is this ok to call for 11n descriptors? */
818178479Sjb	/* XXX or should it go through the first, next, last 11n calls? */
819178479Sjb	ath_hal_setuptxdesc(ah, ds
820178479Sjb		, pktlen		/* packet length */
821178479Sjb		, hdrlen		/* header length */
822178479Sjb		, atype			/* Atheros packet type */
823178479Sjb		, ni->ni_txpower	/* txpower */
824178479Sjb		, txrate, try0		/* series 0 rate/tries */
825178479Sjb		, keyix			/* key cache index */
826178479Sjb		, sc->sc_txantenna	/* antenna mode */
827178479Sjb		, flags			/* flags */
828178479Sjb		, ctsrate		/* rts/cts rate */
829178479Sjb		, ctsduration		/* rts/cts duration */
830178479Sjb	);
831178479Sjb	bf->bf_txflags = flags;
832178479Sjb	/*
833178479Sjb	 * Setup the multi-rate retry state only when we're
834178479Sjb	 * going to use it.  This assumes ath_hal_setuptxdesc
835178479Sjb	 * initializes the descriptors (so we don't have to)
836178479Sjb	 * when the hardware supports multi-rate retry and
837178479Sjb	 * we don't use it.
838178479Sjb	 */
839178479Sjb        if (ismrr) {
840178479Sjb                if (ath_tx_is_11n(sc))
841178479Sjb                        ath_rate_getxtxrates(sc, an, rix, rate, try);
842178479Sjb                else
843178479Sjb                        ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
844178479Sjb        }
845178479Sjb
846178479Sjb        if (ath_tx_is_11n(sc)) {
847178479Sjb                ath_buf_set_rate(sc, ni, bf, pktlen, flags, ctsrate, (atype == HAL_PKT_TYPE_PSPOLL), rate, try);
848178479Sjb        }
849178479Sjb
850178479Sjb	ath_tx_handoff(sc, txq, bf);
851178479Sjb	return 0;
852178479Sjb}
853178479Sjb
854178479Sjbstatic int
855178479Sjbath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
856178479Sjb	struct ath_buf *bf, struct mbuf *m0,
857178479Sjb	const struct ieee80211_bpf_params *params)
858178479Sjb{
859178479Sjb	struct ifnet *ifp = sc->sc_ifp;
860178479Sjb	struct ieee80211com *ic = ifp->if_l2com;
861178479Sjb	struct ath_hal *ah = sc->sc_ah;
862178479Sjb	struct ieee80211vap *vap = ni->ni_vap;
863178479Sjb	int error, ismcast, ismrr;
864178479Sjb	int keyix, hdrlen, pktlen, try0, txantenna;
865178479Sjb	u_int8_t rix, cix, txrate, ctsrate, rate1, rate2, rate3;
866178479Sjb	struct ieee80211_frame *wh;
867178479Sjb	u_int flags, ctsduration;
868178479Sjb	HAL_PKT_TYPE atype;
869178479Sjb	const HAL_RATE_TABLE *rt;
870178479Sjb	struct ath_desc *ds;
871178479Sjb	u_int pri;
872178479Sjb	uint8_t try[4], rate[4];
873178479Sjb
874178479Sjb	bzero(try, sizeof(try));
875178479Sjb	bzero(rate, sizeof(rate));
876178479Sjb
877178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
878178479Sjb	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
879178479Sjb	hdrlen = ieee80211_anyhdrsize(wh);
880178479Sjb	/*
881178479Sjb	 * Packet length must not include any
882178479Sjb	 * pad bytes; deduct them here.
883178479Sjb	 */
884178479Sjb	/* XXX honor IEEE80211_BPF_DATAPAD */
885178479Sjb	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
886178479Sjb
887178479Sjb	/* Handle encryption twiddling if needed */
888178479Sjb	if (! ath_tx_tag_crypto(sc, ni, m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, &hdrlen, &pktlen, &keyix)) {
889178479Sjb		ath_freetx(m0);
890178479Sjb		return EIO;
891178479Sjb	}
892178479Sjb	/* packet header may have moved, reset our local pointer */
893178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
894178479Sjb
895178479Sjb	error = ath_tx_dmasetup(sc, bf, m0);
896178479Sjb	if (error != 0)
897178479Sjb		return error;
898178479Sjb	m0 = bf->bf_m;				/* NB: may have changed */
899178479Sjb	wh = mtod(m0, struct ieee80211_frame *);
900178479Sjb	bf->bf_node = ni;			/* NB: held reference */
901178479Sjb
902178479Sjb	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
903178479Sjb	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
904178479Sjb	if (params->ibp_flags & IEEE80211_BPF_RTS)
905178479Sjb		flags |= HAL_TXDESC_RTSENA;
906178479Sjb	else if (params->ibp_flags & IEEE80211_BPF_CTS)
907178479Sjb		flags |= HAL_TXDESC_CTSENA;
908178479Sjb	/* XXX leave ismcast to injector? */
909178479Sjb	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
910178479Sjb		flags |= HAL_TXDESC_NOACK;
911178479Sjb
912178479Sjb	rt = sc->sc_currates;
913178479Sjb	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
914178479Sjb	rix = ath_tx_findrix(sc, params->ibp_rate0);
915178479Sjb	txrate = rt->info[rix].rateCode;
916178479Sjb	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
917178479Sjb		txrate |= rt->info[rix].shortPreamble;
918178479Sjb	sc->sc_txrix = rix;
919178479Sjb	try0 = params->ibp_try0;
920178479Sjb	ismrr = (params->ibp_try1 != 0);
921178479Sjb	txantenna = params->ibp_pri >> 2;
922178479Sjb	if (txantenna == 0)			/* XXX? */
923178479Sjb		txantenna = sc->sc_txantenna;
924178479Sjb
925178479Sjb	ctsduration = 0;
926178479Sjb	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
927178479Sjb		cix = ath_tx_findrix(sc, params->ibp_ctsrate);
928178479Sjb		ctsrate = ath_tx_get_rtscts_rate(ah, rt, rix, cix, params->ibp_flags & IEEE80211_BPF_SHORTPRE);
929178479Sjb		/* The 11n chipsets do ctsduration calculations for you */
930178479Sjb		if (! ath_tx_is_11n(sc))
931178479Sjb			ctsduration = ath_tx_calc_ctsduration(ah, rix, cix,
932178479Sjb			    params->ibp_flags & IEEE80211_BPF_SHORTPRE, pktlen,
933178479Sjb			    rt, flags);
934178479Sjb		/*
935178479Sjb		 * Must disable multi-rate retry when using RTS/CTS.
936178479Sjb		 */
937178479Sjb		ismrr = 0;			/* XXX */
938178479Sjb	} else
939178479Sjb		ctsrate = 0;
940178479Sjb
941178479Sjb	pri = params->ibp_pri & 3;
942178479Sjb	/*
943178479Sjb	 * NB: we mark all packets as type PSPOLL so the h/w won't
944178479Sjb	 * set the sequence number, duration, etc.
945178479Sjb	 */
946178479Sjb	atype = HAL_PKT_TYPE_PSPOLL;
947178479Sjb
948178479Sjb	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
949178479Sjb		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
950178479Sjb		    sc->sc_hwmap[rix].ieeerate, -1);
951178479Sjb
952178479Sjb	if (ieee80211_radiotap_active_vap(vap)) {
953178479Sjb		u_int64_t tsf = ath_hal_gettsf64(ah);
954178479Sjb
955178479Sjb		sc->sc_tx_th.wt_tsf = htole64(tsf);
956178479Sjb		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
957178479Sjb		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
958178479Sjb			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
959178479Sjb		if (m0->m_flags & M_FRAG)
960178479Sjb			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
961178479Sjb		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
962178479Sjb		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
963178479Sjb		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
964178479Sjb
965178479Sjb		ieee80211_radiotap_tx(vap, m0);
966178479Sjb	}
967178479Sjb
968178479Sjb	/*
969178479Sjb	 * Formulate first tx descriptor with tx controls.
970178479Sjb	 */
971178479Sjb	ds = bf->bf_desc;
972178479Sjb	/* XXX check return value? */
973178479Sjb	ath_hal_setuptxdesc(ah, ds
974178479Sjb		, pktlen		/* packet length */
975178479Sjb		, hdrlen		/* header length */
976178479Sjb		, atype			/* Atheros packet type */
977178479Sjb		, params->ibp_power	/* txpower */
978178479Sjb		, txrate, try0		/* series 0 rate/tries */
979178479Sjb		, keyix			/* key cache index */
980178479Sjb		, txantenna		/* antenna mode */
981178479Sjb		, flags			/* flags */
982178479Sjb		, ctsrate		/* rts/cts rate */
983178479Sjb		, ctsduration		/* rts/cts duration */
984178479Sjb	);
985178479Sjb	bf->bf_txflags = flags;
986178479Sjb
987178479Sjb	if (ath_tx_is_11n(sc)) {
988178479Sjb		rate[0] = ath_tx_findrix(sc, params->ibp_rate0);
989178479Sjb		try[0] = params->ibp_try0;
990178479Sjb
991178479Sjb		if (ismrr) {
992178479Sjb			/* Remember, rate[] is actually an array of rix's -adrian */
993178479Sjb			rate[0] = ath_tx_findrix(sc, params->ibp_rate0);
994178479Sjb			rate[1] = ath_tx_findrix(sc, params->ibp_rate1);
995178479Sjb			rate[2] = ath_tx_findrix(sc, params->ibp_rate2);
996178479Sjb			rate[3] = ath_tx_findrix(sc, params->ibp_rate3);
997178479Sjb
998178479Sjb			try[0] = params->ibp_try0;
999178479Sjb			try[1] = params->ibp_try1;
1000178479Sjb			try[2] = params->ibp_try2;
1001178479Sjb			try[3] = params->ibp_try3;
1002178479Sjb		}
1003178479Sjb	} else {
1004178479Sjb		if (ismrr) {
1005178479Sjb			rix = ath_tx_findrix(sc, params->ibp_rate1);
1006178479Sjb			rate1 = rt->info[rix].rateCode;
1007178479Sjb			if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1008178479Sjb				rate1 |= rt->info[rix].shortPreamble;
1009178479Sjb			if (params->ibp_try2) {
1010178479Sjb				rix = ath_tx_findrix(sc, params->ibp_rate2);
1011178479Sjb				rate2 = rt->info[rix].rateCode;
1012178479Sjb				if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1013178479Sjb					rate2 |= rt->info[rix].shortPreamble;
1014178479Sjb			} else
1015178479Sjb				rate2 = 0;
1016178479Sjb			if (params->ibp_try3) {
1017178479Sjb				rix = ath_tx_findrix(sc, params->ibp_rate3);
1018178479Sjb				rate3 = rt->info[rix].rateCode;
1019178479Sjb				if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1020178479Sjb					rate3 |= rt->info[rix].shortPreamble;
1021178479Sjb			} else
1022178479Sjb				rate3 = 0;
1023178479Sjb			ath_hal_setupxtxdesc(ah, ds
1024178479Sjb				, rate1, params->ibp_try1	/* series 1 */
1025178479Sjb				, rate2, params->ibp_try2	/* series 2 */
1026178479Sjb				, rate3, params->ibp_try3	/* series 3 */
1027178479Sjb			);
1028178479Sjb		}
1029178479Sjb	}
1030178479Sjb
1031178479Sjb	if (ath_tx_is_11n(sc)) {
1032178479Sjb		/*
1033178479Sjb		 * notice that rix doesn't include any of the "magic" flags txrate
1034178479Sjb		 * does for communicating "other stuff" to the HAL.
1035178479Sjb		 */
1036178479Sjb		ath_buf_set_rate(sc, ni, bf, pktlen, flags, ctsrate, (atype == HAL_PKT_TYPE_PSPOLL), rate, try);
1037178479Sjb	}
1038178479Sjb
1039178479Sjb	/* NB: no buffered multicast in power save support */
1040178479Sjb	ath_tx_handoff(sc, sc->sc_ac2q[pri], bf);
1041178479Sjb	return 0;
1042178479Sjb}
1043178479Sjb
1044178479Sjbint
1045178479Sjbath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1046178479Sjb	const struct ieee80211_bpf_params *params)
1047178479Sjb{
1048178479Sjb	struct ieee80211com *ic = ni->ni_ic;
1049178479Sjb	struct ifnet *ifp = ic->ic_ifp;
1050178479Sjb	struct ath_softc *sc = ifp->if_softc;
1051178479Sjb	struct ath_buf *bf;
1052178479Sjb	int error;
1053178479Sjb
1054178479Sjb	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
1055178479Sjb		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
1056178479Sjb		    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
1057178479Sjb			"!running" : "invalid");
1058178479Sjb		m_freem(m);
1059178479Sjb		error = ENETDOWN;
1060178479Sjb		goto bad;
1061178479Sjb	}
1062178479Sjb	/*
1063178479Sjb	 * Grab a TX buffer and associated resources.
1064178479Sjb	 */
1065178479Sjb	bf = ath_getbuf(sc);
1066178479Sjb	if (bf == NULL) {
1067178479Sjb		sc->sc_stats.ast_tx_nobuf++;
1068178479Sjb		m_freem(m);
1069178479Sjb		error = ENOBUFS;
1070178479Sjb		goto bad;
1071178479Sjb	}
1072178479Sjb
1073178479Sjb	if (params == NULL) {
1074178479Sjb		/*
1075178479Sjb		 * Legacy path; interpret frame contents to decide
1076178479Sjb		 * precisely how to send the frame.
1077178479Sjb		 */
1078178479Sjb		if (ath_tx_start(sc, ni, bf, m)) {
1079178479Sjb			error = EIO;		/* XXX */
1080178479Sjb			goto bad2;
1081178479Sjb		}
1082178479Sjb	} else {
1083178479Sjb		/*
1084178479Sjb		 * Caller supplied explicit parameters to use in
1085178479Sjb		 * sending the frame.
1086178479Sjb		 */
1087178479Sjb		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
1088178479Sjb			error = EIO;		/* XXX */
1089178479Sjb			goto bad2;
1090178479Sjb		}
1091178479Sjb	}
1092178479Sjb	sc->sc_wd_timer = 5;
1093178479Sjb	ifp->if_opackets++;
1094178479Sjb	sc->sc_stats.ast_tx_raw++;
1095178479Sjb
1096178479Sjb	return 0;
1097178479Sjbbad2:
1098178479Sjb	ATH_TXBUF_LOCK(sc);
1099178479Sjb	STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1100178479Sjb	ATH_TXBUF_UNLOCK(sc);
1101178479Sjbbad:
1102178479Sjb	ifp->if_oerrors++;
1103178479Sjb	sc->sc_stats.ast_tx_raw_fail++;
1104178479Sjb	ieee80211_free_node(ni);
1105178479Sjb	return error;
1106178479Sjb}
1107178479Sjb