1185380Ssam/* 2187831Ssam * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3185380Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185380Ssam * 5185380Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185380Ssam * purpose with or without fee is hereby granted, provided that the above 7185380Ssam * copyright notice and this permission notice appear in all copies. 8185380Ssam * 9185380Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185380Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185380Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185380Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185380Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185380Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185380Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185380Ssam * 17187831Ssam * $FreeBSD$ 18185380Ssam */ 19185380Ssam#include "opt_ah.h" 20185380Ssam 21185380Ssam/* 22185380Ssam * XXX this is virtually the same code as for 5212; we reuse 23185380Ssam * storage in the 5212 state block; need to refactor. 24185380Ssam */ 25185380Ssam#include "ah.h" 26185380Ssam#include "ah_internal.h" 27185380Ssam#include "ah_desc.h" 28185380Ssam 29185380Ssam#include "ar5416/ar5416.h" 30185380Ssam#include "ar5416/ar5416reg.h" 31185380Ssam#include "ar5416/ar5416phy.h" 32185380Ssam 33185380Ssam/* 34185380Ssam * Anti noise immunity support. We track phy errors and react 35185380Ssam * to excessive errors by adjusting the noise immunity parameters. 36185380Ssam */ 37185380Ssam 38185380Ssam#define HAL_EP_RND(x, mul) \ 39185380Ssam ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 40185380Ssam#define BEACON_RSSI(ahp) \ 41185380Ssam HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \ 42185380Ssam HAL_RSSI_EP_MULTIPLIER) 43185380Ssam 44185380Ssam/* 45185380Ssam * ANI processing tunes radio parameters according to PHY errors 46185380Ssam * and related information. This is done for for noise and spur 47185380Ssam * immunity in all operating modes if the device indicates it's 48185380Ssam * capable at attach time. In addition, when there is a reference 49185380Ssam * rssi value (e.g. beacon frames from an ap in station mode) 50185380Ssam * further tuning is done. 51185380Ssam * 52185380Ssam * ANI_ENA indicates whether any ANI processing should be done; 53185380Ssam * this is specified at attach time. 54185380Ssam * 55185380Ssam * ANI_ENA_RSSI indicates whether rssi-based processing should 56185380Ssam * done, this is enabled based on operating mode and is meaningful 57185380Ssam * only if ANI_ENA is true. 58185380Ssam * 59185380Ssam * ANI parameters are typically controlled only by the hal. The 60185380Ssam * AniControl interface however permits manual tuning through the 61185380Ssam * diagnostic api. 62185380Ssam */ 63185380Ssam#define ANI_ENA(ah) \ 64185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA) 65185380Ssam#define ANI_ENA_RSSI(ah) \ 66185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA) 67185380Ssam 68185380Ssam#define ah_mibStats ah_stats.ast_mibstats 69185380Ssam 70185380Ssamstatic void 71185380SsamenableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params) 72185380Ssam{ 73185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 74185380Ssam 75185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: " 76185380Ssam "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n", 77185380Ssam __func__, params->ofdmPhyErrBase, params->cckPhyErrBase); 78185380Ssam 79185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 80185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 81185380Ssam 82185380Ssam OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase); 83185380Ssam OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase); 84185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 85185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 86185380Ssam 87185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/ 88185380Ssam ar5212EnableMibCounters(ah); /* enable everything */ 89185380Ssam} 90185380Ssam 91185380Ssamstatic void 92185380SsamdisableAniMIBCounters(struct ath_hal *ah) 93185380Ssam{ 94185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 95185380Ssam 96185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n"); 97185380Ssam 98185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */ 99185380Ssam ar5212DisableMibCounters(ah); /* disable everything */ 100185380Ssam 101185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0); 102185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0); 103185380Ssam} 104185380Ssam 105185380Ssamstatic void 106185380SsamsetPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params) 107185380Ssam{ 108185380Ssam if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) { 109185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 110185380Ssam "OFDM Trigger %d is too high for hw counters, using max\n", 111185380Ssam params->ofdmTrigHigh); 112185380Ssam params->ofdmPhyErrBase = 0; 113185380Ssam } else 114185380Ssam params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh; 115185380Ssam if (params->cckTrigHigh >= AR_PHY_COUNTMAX) { 116185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 117185380Ssam "CCK Trigger %d is too high for hw counters, using max\n", 118185380Ssam params->cckTrigHigh); 119185380Ssam params->cckPhyErrBase = 0; 120185380Ssam } else 121185380Ssam params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh; 122185380Ssam} 123185380Ssam 124185380Ssam/* 125185380Ssam * Setup ANI handling. Sets all thresholds and reset the 126185380Ssam * channel statistics. Note that ar5416AniReset should be 127185380Ssam * called by ar5416Reset before anything else happens and 128185380Ssam * that's where we force initial settings. 129185380Ssam */ 130185380Ssamvoid 131185380Ssamar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24, 132185380Ssam const struct ar5212AniParams *params5, HAL_BOOL enable) 133185380Ssam{ 134185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 135185380Ssam 136185380Ssam if (params24 != AH_NULL) { 137185380Ssam OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24)); 138185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams24); 139185380Ssam } 140185380Ssam if (params5 != AH_NULL) { 141185380Ssam OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5)); 142185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams5); 143185380Ssam } 144185380Ssam 145185380Ssam OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani)); 146185380Ssam /* Enable MIB Counters */ 147185380Ssam enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/); 148185380Ssam 149185380Ssam if (enable) { /* Enable ani now */ 150185380Ssam HALASSERT(params24 != AH_NULL && params5 != AH_NULL); 151185380Ssam ahp->ah_procPhyErr |= HAL_ANI_ENA; 152185380Ssam } else { 153185380Ssam ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 154185380Ssam } 155185380Ssam} 156185380Ssam 157185380Ssam/* 158185380Ssam * Cleanup any ANI state setup. 159224514Sadrian * 160224514Sadrian * This doesn't restore registers to their default settings! 161185380Ssam */ 162185380Ssamvoid 163185380Ssamar5416AniDetach(struct ath_hal *ah) 164185380Ssam{ 165185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n"); 166185380Ssam disableAniMIBCounters(ah); 167185380Ssam} 168185380Ssam 169185380Ssam/* 170185380Ssam * Control Adaptive Noise Immunity Parameters 171185380Ssam */ 172185380SsamHAL_BOOL 173185380Ssamar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) 174185380Ssam{ 175185380Ssam typedef int TABLE[]; 176185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 177185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 178224514Sadrian const struct ar5212AniParams *params = AH_NULL; 179185380Ssam 180224514Sadrian /* 181224514Sadrian * This function may be called before there's a current 182224514Sadrian * channel (eg to disable ANI.) 183224514Sadrian */ 184224514Sadrian if (aniState != AH_NULL) 185224514Sadrian params = aniState->params; 186224514Sadrian 187224514Sadrian OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd); 188224514Sadrian 189224514Sadrian /* These commands can't be disabled */ 190224514Sadrian if (cmd == HAL_ANI_PRESENT) 191224514Sadrian return AH_TRUE; 192224514Sadrian 193224514Sadrian if (cmd == HAL_ANI_MODE) { 194224514Sadrian if (param == 0) { 195224514Sadrian ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 196224514Sadrian /* Turn off HW counters if we have them */ 197224514Sadrian ar5416AniDetach(ah); 198224514Sadrian } else { /* normal/auto mode */ 199224514Sadrian /* don't mess with state if already enabled */ 200224514Sadrian if (! (ahp->ah_procPhyErr & HAL_ANI_ENA)) { 201224514Sadrian /* Enable MIB Counters */ 202224514Sadrian /* 203224514Sadrian * XXX use 2.4ghz params if no channel is 204224514Sadrian * available 205224514Sadrian */ 206224514Sadrian enableAniMIBCounters(ah, 207224514Sadrian ahp->ah_curani != AH_NULL ? 208224514Sadrian ahp->ah_curani->params: 209224514Sadrian &ahp->ah_aniParams24); 210224514Sadrian ahp->ah_procPhyErr |= HAL_ANI_ENA; 211224514Sadrian } 212224514Sadrian } 213224514Sadrian return AH_TRUE; 214224514Sadrian } 215224514Sadrian 216222276Sadrian /* Check whether the particular function is enabled */ 217222276Sadrian if (((1 << cmd) & AH5416(ah)->ah_ani_function) == 0) { 218222276Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: command %d disabled\n", 219222276Sadrian __func__, cmd); 220222276Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd %d; mask %x\n", __func__, cmd, AH5416(ah)->ah_ani_function); 221222276Sadrian return AH_FALSE; 222222276Sadrian } 223222276Sadrian 224185380Ssam 225222276Sadrian switch (cmd) { 226185380Ssam case HAL_ANI_NOISE_IMMUNITY_LEVEL: { 227185380Ssam u_int level = param; 228185380Ssam 229217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level); 230185380Ssam if (level >= params->maxNoiseImmunityLevel) { 231217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 232203159Srpaulo "%s: immunity level out of range (%u > %u)\n", 233185380Ssam __func__, level, params->maxNoiseImmunityLevel); 234185380Ssam return AH_FALSE; 235185380Ssam } 236185380Ssam 237185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, 238185380Ssam AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]); 239185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 240185380Ssam AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]); 241185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 242185380Ssam AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]); 243185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 244185380Ssam AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]); 245185380Ssam 246185380Ssam if (level > aniState->noiseImmunityLevel) 247185380Ssam ahp->ah_stats.ast_ani_niup++; 248185380Ssam else if (level < aniState->noiseImmunityLevel) 249185380Ssam ahp->ah_stats.ast_ani_nidown++; 250185380Ssam aniState->noiseImmunityLevel = level; 251185380Ssam break; 252185380Ssam } 253185380Ssam case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: { 254185380Ssam static const TABLE m1ThreshLow = { 127, 50 }; 255185380Ssam static const TABLE m2ThreshLow = { 127, 40 }; 256185380Ssam static const TABLE m1Thresh = { 127, 0x4d }; 257185380Ssam static const TABLE m2Thresh = { 127, 0x40 }; 258185380Ssam static const TABLE m2CountThr = { 31, 16 }; 259185380Ssam static const TABLE m2CountThrLow = { 63, 48 }; 260185380Ssam u_int on = param ? 1 : 0; 261185380Ssam 262217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled"); 263185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 264185380Ssam AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]); 265185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 266185380Ssam AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]); 267185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 268185380Ssam AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]); 269185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 270185380Ssam AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]); 271185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 272185380Ssam AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]); 273185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 274185380Ssam AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]); 275185380Ssam 276185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 277185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]); 278185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 279185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]); 280185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 281185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]); 282185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 283185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]); 284185380Ssam 285185380Ssam if (on) { 286185380Ssam OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW, 287185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 288185380Ssam } else { 289185380Ssam OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW, 290185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 291185380Ssam } 292185380Ssam if (on) 293185380Ssam ahp->ah_stats.ast_ani_ofdmon++; 294185380Ssam else 295185380Ssam ahp->ah_stats.ast_ani_ofdmoff++; 296185380Ssam aniState->ofdmWeakSigDetectOff = !on; 297185380Ssam break; 298185380Ssam } 299185380Ssam case HAL_ANI_CCK_WEAK_SIGNAL_THR: { 300185380Ssam static const TABLE weakSigThrCck = { 8, 6 }; 301185380Ssam u_int high = param ? 1 : 0; 302185380Ssam 303217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low"); 304185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, 305185380Ssam AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]); 306185380Ssam if (high) 307185380Ssam ahp->ah_stats.ast_ani_cckhigh++; 308185380Ssam else 309185380Ssam ahp->ah_stats.ast_ani_ccklow++; 310185380Ssam aniState->cckWeakSigThreshold = high; 311185380Ssam break; 312185380Ssam } 313185380Ssam case HAL_ANI_FIRSTEP_LEVEL: { 314185380Ssam u_int level = param; 315185380Ssam 316217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level); 317185380Ssam if (level >= params->maxFirstepLevel) { 318217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 319203159Srpaulo "%s: firstep level out of range (%u > %u)\n", 320185380Ssam __func__, level, params->maxFirstepLevel); 321185380Ssam return AH_FALSE; 322185380Ssam } 323185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 324185380Ssam AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]); 325185380Ssam if (level > aniState->firstepLevel) 326185380Ssam ahp->ah_stats.ast_ani_stepup++; 327185380Ssam else if (level < aniState->firstepLevel) 328185380Ssam ahp->ah_stats.ast_ani_stepdown++; 329185380Ssam aniState->firstepLevel = level; 330185380Ssam break; 331185380Ssam } 332185380Ssam case HAL_ANI_SPUR_IMMUNITY_LEVEL: { 333185380Ssam u_int level = param; 334185380Ssam 335217684Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level); 336185380Ssam if (level >= params->maxSpurImmunityLevel) { 337217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 338203159Srpaulo "%s: spur immunity level out of range (%u > %u)\n", 339185380Ssam __func__, level, params->maxSpurImmunityLevel); 340185380Ssam return AH_FALSE; 341185380Ssam } 342185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, 343185380Ssam AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); 344221600Sadrian 345185380Ssam if (level > aniState->spurImmunityLevel) 346185380Ssam ahp->ah_stats.ast_ani_spurup++; 347185380Ssam else if (level < aniState->spurImmunityLevel) 348185380Ssam ahp->ah_stats.ast_ani_spurdown++; 349185380Ssam aniState->spurImmunityLevel = level; 350185380Ssam break; 351185380Ssam } 352185380Ssam#ifdef AH_PRIVATE_DIAG 353185380Ssam case HAL_ANI_PHYERR_RESET: 354185380Ssam ahp->ah_stats.ast_ani_ofdmerrs = 0; 355185380Ssam ahp->ah_stats.ast_ani_cckerrs = 0; 356185380Ssam break; 357185380Ssam#endif /* AH_PRIVATE_DIAG */ 358185380Ssam default: 359217925Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n", 360185380Ssam __func__, cmd); 361185380Ssam return AH_FALSE; 362185380Ssam } 363185380Ssam return AH_TRUE; 364185380Ssam} 365185380Ssam 366185380Ssamstatic void 367185380Ssamar5416AniOfdmErrTrigger(struct ath_hal *ah) 368185380Ssam{ 369185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 370187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 371185380Ssam struct ar5212AniState *aniState; 372185380Ssam const struct ar5212AniParams *params; 373185380Ssam 374185380Ssam HALASSERT(chan != AH_NULL); 375185380Ssam 376185380Ssam if (!ANI_ENA(ah)) 377185380Ssam return; 378185380Ssam 379185380Ssam aniState = ahp->ah_curani; 380185380Ssam params = aniState->params; 381185380Ssam /* First, raise noise immunity level, up to max */ 382222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL)) && 383218763Sadrian (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) { 384185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 385185380Ssam aniState->noiseImmunityLevel + 1); 386185380Ssam return; 387185380Ssam } 388185380Ssam /* then, raise spur immunity level, up to max */ 389222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_SPUR_IMMUNITY_LEVEL)) && 390218763Sadrian (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel)) { 391185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 392185380Ssam aniState->spurImmunityLevel + 1); 393185380Ssam return; 394185380Ssam } 395185380Ssam 396185380Ssam if (ANI_ENA_RSSI(ah)) { 397185380Ssam int32_t rssi = BEACON_RSSI(ahp); 398185380Ssam if (rssi > params->rssiThrHigh) { 399185380Ssam /* 400185380Ssam * Beacon rssi is high, can turn off ofdm 401185380Ssam * weak sig detect. 402185380Ssam */ 403185380Ssam if (!aniState->ofdmWeakSigDetectOff) { 404185380Ssam ar5416AniControl(ah, 405185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 406185380Ssam AH_FALSE); 407185380Ssam ar5416AniControl(ah, 408185380Ssam HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 409185380Ssam return; 410185380Ssam } 411185380Ssam /* 412185380Ssam * If weak sig detect is already off, as last resort, 413185380Ssam * raise firstep level 414185380Ssam */ 415185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) { 416185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 417185380Ssam aniState->firstepLevel + 1); 418185380Ssam return; 419185380Ssam } 420185380Ssam } else if (rssi > params->rssiThrLow) { 421185380Ssam /* 422185380Ssam * Beacon rssi in mid range, need ofdm weak signal 423185380Ssam * detect, but we can raise firststepLevel. 424185380Ssam */ 425185380Ssam if (aniState->ofdmWeakSigDetectOff) 426185380Ssam ar5416AniControl(ah, 427185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 428185380Ssam AH_TRUE); 429185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 430185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 431185380Ssam aniState->firstepLevel + 1); 432185380Ssam return; 433185380Ssam } else { 434185380Ssam /* 435185380Ssam * Beacon rssi is low, if in 11b/g mode, turn off ofdm 436185380Ssam * weak signal detection and zero firstepLevel to 437185380Ssam * maximize CCK sensitivity 438185380Ssam */ 439187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 440185380Ssam if (!aniState->ofdmWeakSigDetectOff) 441185380Ssam ar5416AniControl(ah, 442185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 443185380Ssam AH_FALSE); 444185380Ssam if (aniState->firstepLevel > 0) 445185380Ssam ar5416AniControl(ah, 446185380Ssam HAL_ANI_FIRSTEP_LEVEL, 0); 447185380Ssam return; 448185380Ssam } 449185380Ssam } 450185380Ssam } 451185380Ssam} 452185380Ssam 453185380Ssamstatic void 454185380Ssamar5416AniCckErrTrigger(struct ath_hal *ah) 455185380Ssam{ 456185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 457187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 458185380Ssam struct ar5212AniState *aniState; 459185380Ssam const struct ar5212AniParams *params; 460185380Ssam 461185380Ssam HALASSERT(chan != AH_NULL); 462185380Ssam 463185380Ssam if (!ANI_ENA(ah)) 464185380Ssam return; 465185380Ssam 466185380Ssam /* first, raise noise immunity level, up to max */ 467185380Ssam aniState = ahp->ah_curani; 468185380Ssam params = aniState->params; 469222276Sadrian if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL) && 470222276Sadrian aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) { 471185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 472185380Ssam aniState->noiseImmunityLevel + 1); 473185380Ssam return; 474185380Ssam } 475185380Ssam 476185380Ssam if (ANI_ENA_RSSI(ah)) { 477185380Ssam int32_t rssi = BEACON_RSSI(ahp); 478185380Ssam if (rssi > params->rssiThrLow) { 479185380Ssam /* 480185380Ssam * Beacon signal in mid and high range, 481185380Ssam * raise firstep level. 482185380Ssam */ 483185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 484185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 485185380Ssam aniState->firstepLevel + 1); 486185380Ssam } else { 487185380Ssam /* 488185380Ssam * Beacon rssi is low, zero firstep level to maximize 489185380Ssam * CCK sensitivity in 11b/g mode. 490185380Ssam */ 491187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 492185380Ssam if (aniState->firstepLevel > 0) 493185380Ssam ar5416AniControl(ah, 494185380Ssam HAL_ANI_FIRSTEP_LEVEL, 0); 495185380Ssam } 496185380Ssam } 497185380Ssam } 498185380Ssam} 499185380Ssam 500185380Ssamstatic void 501185380Ssamar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState) 502185380Ssam{ 503185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 504185380Ssam const struct ar5212AniParams *params = aniState->params; 505185380Ssam 506185380Ssam aniState->listenTime = 0; 507185380Ssam /* 508185380Ssam * NB: these are written on reset based on the 509185380Ssam * ini so we must re-write them! 510185380Ssam */ 511185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, 512185380Ssam "%s: Writing ofdmbase=%u cckbase=%u\n", __func__, 513185380Ssam params->ofdmPhyErrBase, params->cckPhyErrBase); 514185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase); 515185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase); 516185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 517219862Sadrian OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 518185380Ssam 519185380Ssam /* Clear the mib counters and save them in the stats */ 520185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 521185380Ssam aniState->ofdmPhyErrCount = 0; 522185380Ssam aniState->cckPhyErrCount = 0; 523185380Ssam} 524185380Ssam 525185380Ssam/* 526185380Ssam * Restore/reset the ANI parameters and reset the statistics. 527185380Ssam * This routine must be called for every channel change. 528185380Ssam * 529185380Ssam * NOTE: This is where ah_curani is set; other ani code assumes 530185380Ssam * it is setup to reflect the current channel. 531185380Ssam */ 532185380Ssamvoid 533187831Ssamar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, 534185380Ssam HAL_OPMODE opmode, int restore) 535185380Ssam{ 536185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 537187831Ssam HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); 538187831Ssam /* XXX bounds check ic_devdata */ 539187831Ssam struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata]; 540185380Ssam uint32_t rxfilter; 541185380Ssam 542187831Ssam if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) { 543187831Ssam OS_MEMZERO(aniState, sizeof(*aniState)); 544187831Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) 545187831Ssam aniState->params = &ahp->ah_aniParams24; 546187831Ssam else 547187831Ssam aniState->params = &ahp->ah_aniParams5; 548187831Ssam ichan->privFlags |= CHANNEL_ANI_INIT; 549187831Ssam HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0); 550187831Ssam } 551185380Ssam ahp->ah_curani = aniState; 552185380Ssam#if 0 553187831Ssam ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n", 554187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 555187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 556185380Ssam#else 557187831Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n", 558187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 559187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 560185380Ssam#endif 561185380Ssam OS_MARK(ah, AH_MARK_ANI_RESET, opmode); 562185380Ssam 563185380Ssam /* 564185380Ssam * Turn off PHY error frame delivery while we futz with settings. 565185380Ssam */ 566224514Sadrian rxfilter = ah->ah_getRxFilter(ah); 567224514Sadrian ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR); 568224514Sadrian 569185380Ssam /* 570224514Sadrian * If ANI is disabled at this point, don't set the default 571224514Sadrian * ANI parameter settings - leave the HAL settings there. 572224514Sadrian * This is (currently) needed for reliable radar detection. 573224514Sadrian */ 574224514Sadrian if (! ANI_ENA(ah)) { 575224514Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n", 576224514Sadrian __func__); 577224514Sadrian goto finish; 578224514Sadrian } 579224514Sadrian 580224514Sadrian 581224514Sadrian /* 582185380Ssam * Automatic processing is done only in station mode right now. 583185380Ssam */ 584185380Ssam if (opmode == HAL_M_STA) 585185380Ssam ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA; 586185380Ssam else 587185380Ssam ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA; 588185380Ssam /* 589185380Ssam * Set all ani parameters. We either set them to initial 590185380Ssam * values or restore the previous ones for the channel. 591185380Ssam * XXX if ANI follows hardware, we don't care what mode we're 592185380Ssam * XXX in, we should keep the ani parameters 593185380Ssam */ 594187831Ssam if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) { 595185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 596185380Ssam aniState->noiseImmunityLevel); 597185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 598185380Ssam aniState->spurImmunityLevel); 599185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 600185380Ssam !aniState->ofdmWeakSigDetectOff); 601185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, 602185380Ssam aniState->cckWeakSigThreshold); 603185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 604185380Ssam aniState->firstepLevel); 605185380Ssam } else { 606185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0); 607185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 608185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 609185380Ssam AH_TRUE); 610185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE); 611185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); 612187831Ssam ichan->privFlags |= CHANNEL_ANI_SETUP; 613185380Ssam } 614224514Sadrian 615224514Sadrian /* 616224514Sadrian * In case the counters haven't yet been setup; set them up. 617224514Sadrian */ 618224514Sadrian enableAniMIBCounters(ah, aniState->params); 619185380Ssam ar5416AniRestart(ah, aniState); 620185380Ssam 621224514Sadrianfinish: 622185380Ssam /* restore RX filter mask */ 623224514Sadrian ah->ah_setRxFilter(ah, rxfilter); 624185380Ssam} 625185380Ssam 626185380Ssam/* 627185380Ssam * Process a MIB interrupt. We may potentially be invoked because 628185380Ssam * any of the MIB counters overflow/trigger so don't assume we're 629185380Ssam * here because a PHY error counter triggered. 630185380Ssam */ 631185380Ssamvoid 632185380Ssamar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats) 633185380Ssam{ 634185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 635185380Ssam uint32_t phyCnt1, phyCnt2; 636185380Ssam 637185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x " 638185380Ssam "filtofdm 0x%x filtcck 0x%x\n", 639185380Ssam __func__, OS_REG_READ(ah, AR_MIBC), 640185380Ssam OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2), 641185380Ssam OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK)); 642185380Ssam 643185380Ssam /* 644185380Ssam * First order of business is to clear whatever caused 645185380Ssam * the interrupt so we don't keep getting interrupted. 646185380Ssam * We have the usual mib counters that are reset-on-read 647185380Ssam * and the additional counters that appeared starting in 648185380Ssam * Hainan. We collect the mib counters and explicitly 649185380Ssam * zero additional counters we are not using. Anything 650185380Ssam * else is reset only if it caused the interrupt. 651185380Ssam */ 652185380Ssam /* NB: these are not reset-on-read */ 653185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 654185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 655185380Ssam /* not used, always reset them in case they are the cause */ 656185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 657185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 658185380Ssam if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0) 659185380Ssam OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR); 660185380Ssam 661185380Ssam /* Clear the mib counters and save them in the stats */ 662185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 663185380Ssam ahp->ah_stats.ast_nodestats = *stats; 664185380Ssam 665185380Ssam /* 666185380Ssam * Check for an ani stat hitting the trigger threshold. 667185380Ssam * When this happens we get a MIB interrupt and the top 668185380Ssam * 2 bits of the counter register will be 0b11, hence 669185380Ssam * the mask check of phyCnt?. 670185380Ssam */ 671185380Ssam if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || 672185380Ssam ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { 673185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 674185380Ssam const struct ar5212AniParams *params = aniState->params; 675185380Ssam uint32_t ofdmPhyErrCnt, cckPhyErrCnt; 676185380Ssam 677185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 678185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 679185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 680185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 681185380Ssam 682185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 683185380Ssam ahp->ah_stats.ast_ani_cckerrs += 684185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 685185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 686185380Ssam 687185380Ssam /* 688185380Ssam * NB: figure out which counter triggered. If both 689185380Ssam * trigger we'll only deal with one as the processing 690185380Ssam * clobbers the error counter so the trigger threshold 691185380Ssam * check will never be true. 692185380Ssam */ 693185380Ssam if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh) 694185380Ssam ar5416AniOfdmErrTrigger(ah); 695185380Ssam if (aniState->cckPhyErrCount > params->cckTrigHigh) 696185380Ssam ar5416AniCckErrTrigger(ah); 697185380Ssam /* NB: always restart to insure the h/w counters are reset */ 698185380Ssam ar5416AniRestart(ah, aniState); 699185380Ssam } 700185380Ssam} 701185380Ssam 702185380Ssamstatic void 703185380Ssamar5416AniLowerImmunity(struct ath_hal *ah) 704185380Ssam{ 705185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 706185380Ssam struct ar5212AniState *aniState; 707185380Ssam const struct ar5212AniParams *params; 708185380Ssam 709185380Ssam HALASSERT(ANI_ENA(ah)); 710185380Ssam 711185380Ssam aniState = ahp->ah_curani; 712185380Ssam params = aniState->params; 713185380Ssam if (ANI_ENA_RSSI(ah)) { 714185380Ssam int32_t rssi = BEACON_RSSI(ahp); 715185380Ssam if (rssi > params->rssiThrHigh) { 716185380Ssam /* 717185380Ssam * Beacon signal is high, leave ofdm weak signal 718185380Ssam * detection off or it may oscillate. Let it fall 719185380Ssam * through. 720185380Ssam */ 721185380Ssam } else if (rssi > params->rssiThrLow) { 722185380Ssam /* 723185380Ssam * Beacon rssi in mid range, turn on ofdm weak signal 724185380Ssam * detection or lower firstep level. 725185380Ssam */ 726185380Ssam if (aniState->ofdmWeakSigDetectOff) { 727185380Ssam ar5416AniControl(ah, 728185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 729185380Ssam AH_TRUE); 730185380Ssam return; 731185380Ssam } 732185380Ssam if (aniState->firstepLevel > 0) { 733185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 734185380Ssam aniState->firstepLevel - 1); 735185380Ssam return; 736185380Ssam } 737185380Ssam } else { 738185380Ssam /* 739185380Ssam * Beacon rssi is low, reduce firstep level. 740185380Ssam */ 741185380Ssam if (aniState->firstepLevel > 0) { 742185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 743185380Ssam aniState->firstepLevel - 1); 744185380Ssam return; 745185380Ssam } 746185380Ssam } 747185380Ssam } 748185380Ssam /* then lower spur immunity level, down to zero */ 749185380Ssam if (aniState->spurImmunityLevel > 0) { 750185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 751185380Ssam aniState->spurImmunityLevel - 1); 752185380Ssam return; 753185380Ssam } 754185380Ssam /* 755185380Ssam * if all else fails, lower noise immunity level down to a min value 756185380Ssam * zero for now 757185380Ssam */ 758185380Ssam if (aniState->noiseImmunityLevel > 0) { 759185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 760185380Ssam aniState->noiseImmunityLevel - 1); 761185380Ssam return; 762185380Ssam } 763185380Ssam} 764185380Ssam 765185380Ssam#define CLOCK_RATE 44000 /* XXX use mac_usec or similar */ 766185380Ssam/* convert HW counter values to ms using 11g clock rate, goo9d enough 767185380Ssam for 11a and Turbo */ 768185380Ssam 769185380Ssam/* 770185380Ssam * Return an approximation of the time spent ``listening'' by 771185380Ssam * deducting the cycles spent tx'ing and rx'ing from the total 772185380Ssam * cycle count since our last call. A return value <0 indicates 773185380Ssam * an invalid/inconsistent time. 774185380Ssam */ 775185380Ssamstatic int32_t 776185380Ssamar5416AniGetListenTime(struct ath_hal *ah) 777185380Ssam{ 778185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 779185380Ssam struct ar5212AniState *aniState; 780185380Ssam uint32_t txFrameCount, rxFrameCount, cycleCount; 781185380Ssam int32_t listenTime; 782185380Ssam 783185380Ssam txFrameCount = OS_REG_READ(ah, AR_TFCNT); 784185380Ssam rxFrameCount = OS_REG_READ(ah, AR_RFCNT); 785185380Ssam cycleCount = OS_REG_READ(ah, AR_CCCNT); 786185380Ssam 787185380Ssam aniState = ahp->ah_curani; 788185380Ssam if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) { 789185380Ssam /* 790185380Ssam * Cycle counter wrap (or initial call); it's not possible 791185380Ssam * to accurately calculate a value because the registers 792185380Ssam * right shift rather than wrap--so punt and return 0. 793185380Ssam */ 794185380Ssam listenTime = 0; 795185380Ssam ahp->ah_stats.ast_ani_lzero++; 796185380Ssam } else { 797185380Ssam int32_t ccdelta = cycleCount - aniState->cycleCount; 798185380Ssam int32_t rfdelta = rxFrameCount - aniState->rxFrameCount; 799185380Ssam int32_t tfdelta = txFrameCount - aniState->txFrameCount; 800185380Ssam listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE; 801185380Ssam } 802185380Ssam aniState->cycleCount = cycleCount; 803185380Ssam aniState->txFrameCount = txFrameCount; 804185380Ssam aniState->rxFrameCount = rxFrameCount; 805185380Ssam return listenTime; 806185380Ssam} 807185380Ssam 808185380Ssam/* 809185380Ssam * Update ani stats in preparation for listen time processing. 810185380Ssam */ 811185380Ssamstatic void 812185380SsamupdateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState) 813185380Ssam{ 814185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 815185380Ssam const struct ar5212AniParams *params = aniState->params; 816185380Ssam uint32_t phyCnt1, phyCnt2; 817185380Ssam int32_t ofdmPhyErrCnt, cckPhyErrCnt; 818185380Ssam 819185380Ssam /* Clear the mib counters and save them in the stats */ 820185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 821185380Ssam 822185380Ssam /* NB: these are not reset-on-read */ 823185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 824185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 825185380Ssam 826185380Ssam /* NB: these are spec'd to never roll-over */ 827185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 828185380Ssam if (ofdmPhyErrCnt < 0) { 829185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n", 830185380Ssam ofdmPhyErrCnt, phyCnt1); 831185380Ssam ofdmPhyErrCnt = AR_PHY_COUNTMAX; 832185380Ssam } 833185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 834185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 835185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 836185380Ssam 837185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 838185380Ssam if (cckPhyErrCnt < 0) { 839185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n", 840185380Ssam cckPhyErrCnt, phyCnt2); 841185380Ssam cckPhyErrCnt = AR_PHY_COUNTMAX; 842185380Ssam } 843185380Ssam ahp->ah_stats.ast_ani_cckerrs += 844185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 845185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 846185380Ssam} 847185380Ssam 848217684Sadrianvoid 849217684Sadrianar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats, 850217684Sadrian const struct ieee80211_channel *chan) 851217684Sadrian{ 852217684Sadrian struct ath_hal_5212 *ahp = AH5212(ah); 853217684Sadrian ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi; 854217684Sadrian} 855217684Sadrian 856185380Ssam/* 857185380Ssam * Do periodic processing. This routine is called from the 858185380Ssam * driver's rx interrupt handler after processing frames. 859185380Ssam */ 860185380Ssamvoid 861217684Sadrianar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan) 862185380Ssam{ 863185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 864185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 865185380Ssam const struct ar5212AniParams *params; 866185380Ssam int32_t listenTime; 867185380Ssam 868185380Ssam /* XXX can aniState be null? */ 869185380Ssam if (aniState == AH_NULL) 870185380Ssam return; 871185380Ssam if (!ANI_ENA(ah)) 872185380Ssam return; 873185380Ssam 874185380Ssam listenTime = ar5416AniGetListenTime(ah); 875185380Ssam if (listenTime < 0) { 876185380Ssam ahp->ah_stats.ast_ani_lneg++; 877185380Ssam /* restart ANI period if listenTime is invalid */ 878185380Ssam ar5416AniRestart(ah, aniState); 879185380Ssam } 880185380Ssam /* XXX beware of overflow? */ 881185380Ssam aniState->listenTime += listenTime; 882185380Ssam 883185380Ssam OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime); 884185380Ssam 885185380Ssam params = aniState->params; 886185380Ssam if (aniState->listenTime > 5*params->period) { 887185380Ssam /* 888185380Ssam * Check to see if need to lower immunity if 889185380Ssam * 5 aniPeriods have passed 890185380Ssam */ 891185380Ssam updateMIBStats(ah, aniState); 892185380Ssam if (aniState->ofdmPhyErrCount <= aniState->listenTime * 893185380Ssam params->ofdmTrigLow/1000 && 894185380Ssam aniState->cckPhyErrCount <= aniState->listenTime * 895185380Ssam params->cckTrigLow/1000) 896185380Ssam ar5416AniLowerImmunity(ah); 897185380Ssam ar5416AniRestart(ah, aniState); 898185380Ssam } else if (aniState->listenTime > params->period) { 899185380Ssam updateMIBStats(ah, aniState); 900185380Ssam /* check to see if need to raise immunity */ 901185380Ssam if (aniState->ofdmPhyErrCount > aniState->listenTime * 902185380Ssam params->ofdmTrigHigh / 1000) { 903219767Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 904219767Sadrian "%s: OFDM err %u listenTime %u\n", __func__, 905219767Sadrian aniState->ofdmPhyErrCount, aniState->listenTime); 906185380Ssam ar5416AniOfdmErrTrigger(ah); 907185380Ssam ar5416AniRestart(ah, aniState); 908185380Ssam } else if (aniState->cckPhyErrCount > aniState->listenTime * 909185380Ssam params->cckTrigHigh / 1000) { 910219767Sadrian HALDEBUG(ah, HAL_DEBUG_ANI, 911219767Sadrian "%s: CCK err %u listenTime %u\n", __func__, 912219767Sadrian aniState->ofdmPhyErrCount, aniState->listenTime); 913185380Ssam ar5416AniCckErrTrigger(ah); 914185380Ssam ar5416AniRestart(ah, aniState); 915185380Ssam } 916185380Ssam } 917185380Ssam} 918