agp_i810.c revision 172187
163010Sdfr/*- 263010Sdfr * Copyright (c) 2000 Doug Rabson 363010Sdfr * Copyright (c) 2000 Ruslan Ermilov 463010Sdfr * All rights reserved. 563010Sdfr * 663010Sdfr * Redistribution and use in source and binary forms, with or without 763010Sdfr * modification, are permitted provided that the following conditions 863010Sdfr * are met: 963010Sdfr * 1. Redistributions of source code must retain the above copyright 1063010Sdfr * notice, this list of conditions and the following disclaimer. 1163010Sdfr * 2. Redistributions in binary form must reproduce the above copyright 1263010Sdfr * notice, this list of conditions and the following disclaimer in the 1363010Sdfr * documentation and/or other materials provided with the distribution. 1463010Sdfr * 1563010Sdfr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1663010Sdfr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1763010Sdfr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1863010Sdfr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1963010Sdfr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2063010Sdfr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2163010Sdfr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2263010Sdfr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2363010Sdfr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2463010Sdfr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2563010Sdfr * SUCH DAMAGE. 2663010Sdfr */ 2763010Sdfr 28103243Sanholt/* 29103243Sanholt * Fixes for 830/845G support: David Dawes <dawes@xfree86.org> 30110785Sanholt * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org> 31103243Sanholt */ 32103243Sanholt 33116192Sobrien#include <sys/cdefs.h> 34116192Sobrien__FBSDID("$FreeBSD: head/sys/dev/agp/agp_i810.c 172187 2007-09-15 18:16:35Z alc $"); 35116192Sobrien 3663010Sdfr#include "opt_bus.h" 3763010Sdfr 3863010Sdfr#include <sys/param.h> 3963010Sdfr#include <sys/systm.h> 4063010Sdfr#include <sys/malloc.h> 4163010Sdfr#include <sys/kernel.h> 42129878Sphk#include <sys/module.h> 4363010Sdfr#include <sys/bus.h> 4463010Sdfr#include <sys/lock.h> 4576827Salfred#include <sys/mutex.h> 4679339Sjhb#include <sys/proc.h> 4763010Sdfr 48119288Simp#include <dev/pci/pcivar.h> 49119288Simp#include <dev/pci/pcireg.h> 5063010Sdfr#include <pci/agppriv.h> 5163010Sdfr#include <pci/agpreg.h> 5263010Sdfr 5363010Sdfr#include <vm/vm.h> 5463010Sdfr#include <vm/vm_object.h> 5563010Sdfr#include <vm/vm_page.h> 5663010Sdfr#include <vm/vm_pageout.h> 5763010Sdfr#include <vm/pmap.h> 5863010Sdfr 5963010Sdfr#include <machine/bus.h> 6063010Sdfr#include <machine/resource.h> 61171433Sanholt#include <machine/md_var.h> 6263010Sdfr#include <sys/rman.h> 6363010Sdfr 6463010SdfrMALLOC_DECLARE(M_AGP); 6563010Sdfr 66171433Sanholtenum { 67171433Sanholt CHIP_I810, /* i810/i815 */ 68171433Sanholt CHIP_I830, /* 830M/845G */ 69171433Sanholt CHIP_I855, /* 852GM/855GM/865G */ 70171433Sanholt CHIP_I915, /* 915G/915GM */ 71171433Sanholt CHIP_I965, /* G965 */ 72171433Sanholt CHIP_G33, /* G33/Q33/Q35 */ 73171433Sanholt}; 7463010Sdfr 75171433Sanholt/* The i810 through i855 have the registers at BAR 1, and the GATT gets 76171433Sanholt * allocated by us. The i915 has registers in BAR 0 and the GATT is at the 77171433Sanholt * start of the stolen memory, and should only be accessed by the OS through 78171433Sanholt * BAR 3. The G965 has registers and GATT in the same BAR (0) -- first 512KB 79171433Sanholt * is registers, second 512KB is GATT. 80171433Sanholt */ 81171433Sanholtstatic struct resource_spec agp_i810_res_spec[] = { 82171433Sanholt { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE }, 83171433Sanholt { -1, 0 } 84171433Sanholt}; 85103243Sanholt 86171433Sanholtstatic struct resource_spec agp_i915_res_spec[] = { 87171433Sanholt { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE }, 88171433Sanholt { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE }, 89171433Sanholt { -1, 0 } 90171433Sanholt}; 91171433Sanholt 92171433Sanholtstatic struct resource_spec agp_i965_res_spec[] = { 93171433Sanholt { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE }, 94171433Sanholt { -1, 0 } 95171433Sanholt}; 96171433Sanholt 9763010Sdfrstruct agp_i810_softc { 9863010Sdfr struct agp_softc agp; 9963010Sdfr u_int32_t initial_aperture; /* aperture size at startup */ 10063010Sdfr struct agp_gatt *gatt; 101103243Sanholt int chiptype; /* i810-like or i830 */ 102103243Sanholt u_int32_t dcache_size; /* i810 only */ 103103243Sanholt u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */ 10463010Sdfr device_t bdev; /* bridge device */ 105153031Sanholt 106171433Sanholt void *argb_cursor; /* contigmalloc area for ARGB cursor */ 107153031Sanholt 108171433Sanholt struct resource_spec * sc_res_spec; 109171433Sanholt struct resource *sc_res[2]; 11063010Sdfr}; 11163010Sdfr 112159926Sanholt/* For adding new devices, devid is the id of the graphics controller 113159926Sanholt * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the 114159926Sanholt * second head should never be added. The bridge_offset is the offset to 115159926Sanholt * subtract from devid to get the id of the hostb that the device is on. 116159926Sanholt */ 117159926Sanholtstatic const struct agp_i810_match { 118159926Sanholt int devid; 119159926Sanholt int chiptype; 120159926Sanholt int bridge_offset; 121159926Sanholt char *name; 122159926Sanholt} agp_i810_matches[] = { 123159926Sanholt {0x71218086, CHIP_I810, 0x00010000, 124159926Sanholt "Intel 82810 (i810 GMCH) SVGA controller"}, 125159926Sanholt {0x71238086, CHIP_I810, 0x00010000, 126159926Sanholt "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"}, 127159926Sanholt {0x71258086, CHIP_I810, 0x00010000, 128159926Sanholt "Intel 82810E (i810E GMCH) SVGA controller"}, 129159926Sanholt {0x11328086, CHIP_I810, 0x00020000, 130159926Sanholt "Intel 82815 (i815 GMCH) SVGA controller"}, 131159926Sanholt {0x35778086, CHIP_I830, 0x00020000, 132159926Sanholt "Intel 82830M (830M GMCH) SVGA controller"}, 133159981Sanholt {0x35828086, CHIP_I855, 0x00020000, 134159926Sanholt "Intel 82852/5"}, 135159981Sanholt {0x25728086, CHIP_I855, 0x00020000, 136159926Sanholt "Intel 82865G (865G GMCH) SVGA controller"}, 137159926Sanholt {0x25828086, CHIP_I915, 0x00020000, 138159926Sanholt "Intel 82915G (915G GMCH) SVGA controller"}, 139172187Salc {0x258A8086, CHIP_I915, 0x00020000, 140172187Salc "Intel E7221 SVGA controller"}, 141159926Sanholt {0x25928086, CHIP_I915, 0x00020000, 142159926Sanholt "Intel 82915GM (915GM GMCH) SVGA controller"}, 143159926Sanholt {0x27728086, CHIP_I915, 0x00020000, 144159926Sanholt "Intel 82945G (945G GMCH) SVGA controller"}, 145159926Sanholt {0x27A28086, CHIP_I915, 0x00020000, 146159926Sanholt "Intel 82945GM (945GM GMCH) SVGA controller"}, 147171433Sanholt {0x27A28086, CHIP_I915, 0x00020000, 148171433Sanholt "Intel 945GME SVGA controller"}, 149171433Sanholt {0x29728086, CHIP_I965, 0x00020000, 150171433Sanholt "Intel 946GZ SVGA controller"}, 151171433Sanholt {0x29828086, CHIP_I965, 0x00020000, 152171433Sanholt "Intel G965 SVGA controller"}, 153171433Sanholt {0x29928086, CHIP_I965, 0x00020000, 154171433Sanholt "Intel Q965 SVGA controller"}, 155171433Sanholt {0x29a28086, CHIP_I965, 0x00020000, 156171433Sanholt "Intel G965 SVGA controller"}, 157171433Sanholt/* 158171433Sanholt {0x29b28086, CHIP_G33, 0x00020000, 159171433Sanholt "Intel Q35 SVGA controller"}, 160171433Sanholt {0x29c28086, CHIP_G33, 0x00020000, 161171433Sanholt "Intel G33 SVGA controller"}, 162171433Sanholt {0x29d28086, CHIP_G33, 0x00020000, 163171433Sanholt "Intel Q33 SVGA controller"}, 164171433Sanholt*/ 165171433Sanholt {0x2a028086, CHIP_I965, 0x00020000, 166171433Sanholt "Intel GM965 SVGA controller"}, 167171433Sanholt {0x2a128086, CHIP_I965, 0x00020000, 168171433Sanholt "Intel GME965 SVGA controller"}, 169159926Sanholt {0, 0, 0, NULL} 170159926Sanholt}; 171159926Sanholt 172159926Sanholtstatic const struct agp_i810_match* 17363010Sdfragp_i810_match(device_t dev) 17463010Sdfr{ 175159926Sanholt int i, devid; 176159926Sanholt 17763010Sdfr if (pci_get_class(dev) != PCIC_DISPLAY 17863010Sdfr || pci_get_subclass(dev) != PCIS_DISPLAY_VGA) 17963010Sdfr return NULL; 18063010Sdfr 181159926Sanholt devid = pci_get_devid(dev); 182159926Sanholt for (i = 0; agp_i810_matches[i].devid != 0; i++) { 183159926Sanholt if (agp_i810_matches[i].devid == devid) 184159926Sanholt break; 185159926Sanholt } 186159926Sanholt if (agp_i810_matches[i].devid == 0) 187159926Sanholt return NULL; 188159926Sanholt else 189159926Sanholt return &agp_i810_matches[i]; 19063010Sdfr} 19163010Sdfr 19263010Sdfr/* 19363010Sdfr * Find bridge device. 19463010Sdfr */ 19563010Sdfrstatic device_t 19663010Sdfragp_i810_find_bridge(device_t dev) 19763010Sdfr{ 19863010Sdfr device_t *children, child; 19963010Sdfr int nchildren, i; 20063010Sdfr u_int32_t devid; 201159926Sanholt const struct agp_i810_match *match; 202159926Sanholt 203159926Sanholt match = agp_i810_match(dev); 204159926Sanholt devid = match->devid - match->bridge_offset; 20563010Sdfr 206153579Sjhb if (device_get_children(device_get_parent(device_get_parent(dev)), 207153579Sjhb &children, &nchildren)) 20863010Sdfr return 0; 20963010Sdfr 21063010Sdfr for (i = 0; i < nchildren; i++) { 21163010Sdfr child = children[i]; 21263010Sdfr 21363010Sdfr if (pci_get_devid(child) == devid) { 21463010Sdfr free(children, M_TEMP); 21563010Sdfr return child; 21663010Sdfr } 21763010Sdfr } 21863010Sdfr free(children, M_TEMP); 21963010Sdfr return 0; 22063010Sdfr} 22163010Sdfr 222155186Sjhbstatic void 223155186Sjhbagp_i810_identify(driver_t *driver, device_t parent) 224155186Sjhb{ 225155186Sjhb 226155186Sjhb if (device_find_child(parent, "agp", -1) == NULL && 227155186Sjhb agp_i810_match(parent)) 228155186Sjhb device_add_child(parent, "agp", -1); 229155186Sjhb} 230155186Sjhb 23163010Sdfrstatic int 23263010Sdfragp_i810_probe(device_t dev) 23363010Sdfr{ 234159926Sanholt device_t bdev; 235159926Sanholt const struct agp_i810_match *match; 236171433Sanholt u_int8_t smram; 237171433Sanholt int gcc1, deven; 23863010Sdfr 239127815Snjl if (resource_disabled("agp", device_get_unit(dev))) 240127815Snjl return (ENXIO); 241159926Sanholt match = agp_i810_match(dev); 242159926Sanholt if (match == NULL) 243159926Sanholt return ENXIO; 244159926Sanholt 245159926Sanholt bdev = agp_i810_find_bridge(dev); 246159926Sanholt if (!bdev) { 247159926Sanholt if (bootverbose) 248159926Sanholt printf("I810: can't find bridge device\n"); 249159926Sanholt return ENXIO; 250159926Sanholt } 251159926Sanholt 252159926Sanholt /* 253159926Sanholt * checking whether internal graphics device has been activated. 254159926Sanholt */ 255171433Sanholt switch (match->chiptype) { 256171433Sanholt case CHIP_I810: 257159926Sanholt smram = pci_read_config(bdev, AGP_I810_SMRAM, 1); 258171433Sanholt if ((smram & AGP_I810_SMRAM_GMS) == 259171433Sanholt AGP_I810_SMRAM_GMS_DISABLED) { 260159926Sanholt if (bootverbose) 261159926Sanholt printf("I810: disabled, not probing\n"); 262159926Sanholt return ENXIO; 263159926Sanholt } 264171433Sanholt break; 265171433Sanholt case CHIP_I830: 266171433Sanholt case CHIP_I855: 267159926Sanholt gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1); 268159926Sanholt if ((gcc1 & AGP_I830_GCC1_DEV2) == 269159926Sanholt AGP_I830_GCC1_DEV2_DISABLED) { 27063010Sdfr if (bootverbose) 271159926Sanholt printf("I830: disabled, not probing\n"); 27263010Sdfr return ENXIO; 27363010Sdfr } 274171433Sanholt break; 275171433Sanholt case CHIP_I915: 276171433Sanholt case CHIP_I965: 277171433Sanholt case CHIP_G33: 278171433Sanholt deven = pci_read_config(bdev, AGP_I915_DEVEN, 4); 279171433Sanholt if ((deven & AGP_I915_DEVEN_D2F0) == 280159926Sanholt AGP_I915_DEVEN_D2F0_DISABLED) { 281159926Sanholt if (bootverbose) 282159926Sanholt printf("I915: disabled, not probing\n"); 283159926Sanholt return ENXIO; 284159926Sanholt } 285171433Sanholt break; 286159926Sanholt } 287121437Sjhb 288159926Sanholt if (match->devid == 0x35828086) { 289159926Sanholt switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) { 290159926Sanholt case AGP_I855_GME: 291159926Sanholt device_set_desc(dev, 292159926Sanholt "Intel 82855GME (855GME GMCH) SVGA controller"); 293121437Sjhb break; 294159926Sanholt case AGP_I855_GM: 295159926Sanholt device_set_desc(dev, 296159926Sanholt "Intel 82855GM (855GM GMCH) SVGA controller"); 297153031Sanholt break; 298159926Sanholt case AGP_I852_GME: 299159926Sanholt device_set_desc(dev, 300159926Sanholt "Intel 82852GME (852GME GMCH) SVGA controller"); 301159926Sanholt break; 302159926Sanholt case AGP_I852_GM: 303159926Sanholt device_set_desc(dev, 304159926Sanholt "Intel 82852GM (852GM GMCH) SVGA controller"); 305159926Sanholt break; 306121437Sjhb default: 307159926Sanholt device_set_desc(dev, 308159926Sanholt "Intel 8285xM (85xGM GMCH) SVGA controller"); 309159926Sanholt break; 31063010Sdfr } 311159926Sanholt } else { 312159926Sanholt device_set_desc(dev, match->name); 31363010Sdfr } 31463010Sdfr 315159926Sanholt return BUS_PROBE_DEFAULT; 31663010Sdfr} 31763010Sdfr 318171433Sanholtstatic void 319171433Sanholtagp_i810_dump_regs(device_t dev) 320171433Sanholt{ 321171433Sanholt struct agp_i810_softc *sc = device_get_softc(dev); 322171433Sanholt 323171433Sanholt device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n", 324171433Sanholt bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL)); 325171433Sanholt 326171433Sanholt switch (sc->chiptype) { 327171433Sanholt case CHIP_I810: 328171433Sanholt device_printf(dev, "AGP_I810_MISCC: 0x%04x\n", 329171433Sanholt pci_read_config(sc->bdev, AGP_I810_MISCC, 2)); 330171433Sanholt break; 331171433Sanholt case CHIP_I830: 332171433Sanholt device_printf(dev, "AGP_I830_GCC1: 0x%02x\n", 333171433Sanholt pci_read_config(sc->bdev, AGP_I830_GCC1, 1)); 334171433Sanholt break; 335171433Sanholt case CHIP_I855: 336171433Sanholt device_printf(dev, "AGP_I855_GCC1: 0x%02x\n", 337171433Sanholt pci_read_config(sc->bdev, AGP_I855_GCC1, 1)); 338171433Sanholt break; 339171433Sanholt case CHIP_I915: 340171433Sanholt case CHIP_I965: 341171433Sanholt case CHIP_G33: 342171433Sanholt device_printf(dev, "AGP_I855_GCC1: 0x%02x\n", 343171433Sanholt pci_read_config(sc->bdev, AGP_I855_GCC1, 1)); 344171433Sanholt device_printf(dev, "AGP_I915_MSAC: 0x%02x\n", 345171433Sanholt pci_read_config(sc->bdev, AGP_I915_MSAC, 1)); 346171433Sanholt break; 347171433Sanholt } 348171433Sanholt device_printf(dev, "Aperture resource size: %d bytes\n", 349171433Sanholt AGP_GET_APERTURE(dev)); 350171433Sanholt} 351171433Sanholt 35263010Sdfrstatic int 35363010Sdfragp_i810_attach(device_t dev) 35463010Sdfr{ 35563010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 35663010Sdfr struct agp_gatt *gatt; 357159926Sanholt const struct agp_i810_match *match; 358171433Sanholt int error; 35963010Sdfr 36063010Sdfr sc->bdev = agp_i810_find_bridge(dev); 36163010Sdfr if (!sc->bdev) 36263010Sdfr return ENOENT; 36363010Sdfr 364171433Sanholt match = agp_i810_match(dev); 365171433Sanholt sc->chiptype = match->chiptype; 366171433Sanholt 367171433Sanholt switch (sc->chiptype) { 368171433Sanholt case CHIP_I810: 369171433Sanholt case CHIP_I830: 370171433Sanholt case CHIP_I855: 371171433Sanholt sc->sc_res_spec = agp_i810_res_spec; 372171433Sanholt agp_set_aperture_resource(dev, AGP_APBASE); 373171433Sanholt break; 374171433Sanholt case CHIP_I915: 375171433Sanholt case CHIP_G33: 376171433Sanholt sc->sc_res_spec = agp_i915_res_spec; 377171433Sanholt agp_set_aperture_resource(dev, AGP_I915_GMADR); 378171433Sanholt break; 379171433Sanholt case CHIP_I965: 380171433Sanholt sc->sc_res_spec = agp_i965_res_spec; 381171433Sanholt agp_set_aperture_resource(dev, AGP_I915_GMADR); 382171433Sanholt break; 383171433Sanholt } 384171433Sanholt 38563010Sdfr error = agp_generic_attach(dev); 38663010Sdfr if (error) 38763010Sdfr return error; 38863010Sdfr 389171433Sanholt if (sc->chiptype != CHIP_I965 && sc->chiptype != CHIP_G33 && 390171433Sanholt ptoa((vm_paddr_t)Maxmem) > 0xfffffffful) 391171433Sanholt { 392171433Sanholt device_printf(dev, "agp_i810.c does not support physical " 393171433Sanholt "memory above 4GB.\n"); 394171433Sanholt return ENOENT; 395171433Sanholt } 396103243Sanholt 397171433Sanholt if (bus_alloc_resources(dev, sc->sc_res_spec, sc->sc_res)) { 39863010Sdfr agp_generic_detach(dev); 399153031Sanholt return ENODEV; 40063010Sdfr } 40163010Sdfr 40263010Sdfr sc->initial_aperture = AGP_GET_APERTURE(dev); 40363010Sdfr 404103243Sanholt gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 405103243Sanholt if (!gatt) { 406171433Sanholt bus_release_resources(dev, sc->sc_res_spec, sc->sc_res); 407103243Sanholt agp_generic_detach(dev); 408103243Sanholt return ENOMEM; 409103243Sanholt } 410103243Sanholt sc->gatt = gatt; 41163010Sdfr 412103243Sanholt gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT; 41363010Sdfr 414103243Sanholt if ( sc->chiptype == CHIP_I810 ) { 415103243Sanholt /* Some i810s have on-chip memory called dcache */ 416171433Sanholt if (bus_read_1(sc->sc_res[0], AGP_I810_DRT) & 417171433Sanholt AGP_I810_DRT_POPULATED) 418103243Sanholt sc->dcache_size = 4 * 1024 * 1024; 419103243Sanholt else 420103243Sanholt sc->dcache_size = 0; 421103243Sanholt 422103243Sanholt /* According to the specs the gatt on the i810 must be 64k */ 423103243Sanholt gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0, 424103243Sanholt 0, ~0, PAGE_SIZE, 0); 425103243Sanholt if (!gatt->ag_virtual) { 426103243Sanholt if (bootverbose) 427103243Sanholt device_printf(dev, "contiguous allocation failed\n"); 428171433Sanholt bus_release_resources(dev, sc->sc_res_spec, 429171433Sanholt sc->sc_res); 430103243Sanholt free(gatt, M_AGP); 43163010Sdfr agp_generic_detach(dev); 43263010Sdfr return ENOMEM; 43363010Sdfr } 434103243Sanholt bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t)); 435103243Sanholt 436103243Sanholt gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 437103243Sanholt agp_flush_cache(); 438103243Sanholt /* Install the GATT. */ 439171433Sanholt bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 440171433Sanholt gatt->ag_physical | 1); 441110785Sanholt } else if ( sc->chiptype == CHIP_I830 ) { 442103243Sanholt /* The i830 automatically initializes the 128k gatt on boot. */ 443103243Sanholt unsigned int gcc1, pgtblctl; 444103243Sanholt 445103243Sanholt gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1); 446103243Sanholt switch (gcc1 & AGP_I830_GCC1_GMS) { 447103243Sanholt case AGP_I830_GCC1_GMS_STOLEN_512: 448103243Sanholt sc->stolen = (512 - 132) * 1024 / 4096; 449103243Sanholt break; 450103243Sanholt case AGP_I830_GCC1_GMS_STOLEN_1024: 451103243Sanholt sc->stolen = (1024 - 132) * 1024 / 4096; 452103243Sanholt break; 453103243Sanholt case AGP_I830_GCC1_GMS_STOLEN_8192: 454103243Sanholt sc->stolen = (8192 - 132) * 1024 / 4096; 455103243Sanholt break; 456103243Sanholt default: 457103243Sanholt sc->stolen = 0; 458103243Sanholt device_printf(dev, "unknown memory configuration, disabling\n"); 459171433Sanholt bus_release_resources(dev, sc->sc_res_spec, 460171433Sanholt sc->sc_res); 461171433Sanholt free(gatt, M_AGP); 462103243Sanholt agp_generic_detach(dev); 463103243Sanholt return EINVAL; 464103243Sanholt } 465171433Sanholt if (sc->stolen > 0) { 466171433Sanholt device_printf(dev, "detected %dk stolen memory\n", 467171433Sanholt sc->stolen * 4); 468171433Sanholt } 469171433Sanholt device_printf(dev, "aperture size is %dM\n", 470171433Sanholt sc->initial_aperture / 1024 / 1024); 471103243Sanholt 472103243Sanholt /* GATT address is already in there, make sure it's enabled */ 473171433Sanholt pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL); 474103243Sanholt pgtblctl |= 1; 475171433Sanholt bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl); 476103243Sanholt 477103243Sanholt gatt->ag_physical = pgtblctl & ~1; 478171433Sanholt } else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915 || 479171433Sanholt sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33) { 480171433Sanholt unsigned int gcc1, pgtblctl, stolen, gtt_size; 481153031Sanholt 482153031Sanholt /* Stolen memory is set up at the beginning of the aperture by 483171433Sanholt * the BIOS, consisting of the GATT followed by 4kb for the 484171433Sanholt * BIOS display. 485153031Sanholt */ 486171433Sanholt switch (sc->chiptype) { 487171433Sanholt case CHIP_I855: 488171433Sanholt gtt_size = 128; 489171433Sanholt break; 490171433Sanholt case CHIP_I915: 491171433Sanholt gtt_size = 256; 492171433Sanholt break; 493171433Sanholt case CHIP_I965: 494171433Sanholt case CHIP_G33: 495171433Sanholt switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) & 496171433Sanholt AGP_I810_PGTBL_SIZE_MASK) { 497171433Sanholt case AGP_I810_PGTBL_SIZE_128KB: 498171433Sanholt gtt_size = 128; 499110785Sanholt break; 500171433Sanholt case AGP_I810_PGTBL_SIZE_256KB: 501171433Sanholt gtt_size = 256; 502110785Sanholt break; 503171433Sanholt case AGP_I810_PGTBL_SIZE_512KB: 504171433Sanholt gtt_size = 512; 505110785Sanholt break; 506110785Sanholt default: 507171433Sanholt device_printf(dev, "Bad PGTBL size\n"); 508171433Sanholt bus_release_resources(dev, sc->sc_res_spec, 509171433Sanholt sc->sc_res); 510171433Sanholt free(gatt, M_AGP); 511110785Sanholt agp_generic_detach(dev); 512110785Sanholt return EINVAL; 513171433Sanholt } 514171433Sanholt break; 515171433Sanholt default: 516171433Sanholt device_printf(dev, "Bad chiptype\n"); 517171433Sanholt bus_release_resources(dev, sc->sc_res_spec, 518171433Sanholt sc->sc_res); 519171433Sanholt free(gatt, M_AGP); 520171433Sanholt agp_generic_detach(dev); 521171433Sanholt return EINVAL; 522110785Sanholt } 523171433Sanholt 524171433Sanholt /* GCC1 is called MGGC on i915+ */ 525171433Sanholt gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1); 526171433Sanholt switch (gcc1 & AGP_I855_GCC1_GMS) { 527171433Sanholt case AGP_I855_GCC1_GMS_STOLEN_1M: 528171433Sanholt stolen = 1024; 529171433Sanholt break; 530171433Sanholt case AGP_I855_GCC1_GMS_STOLEN_4M: 531171433Sanholt stolen = 4096; 532171433Sanholt break; 533171433Sanholt case AGP_I855_GCC1_GMS_STOLEN_8M: 534171433Sanholt stolen = 8192; 535171433Sanholt break; 536171433Sanholt case AGP_I855_GCC1_GMS_STOLEN_16M: 537171433Sanholt stolen = 16384; 538171433Sanholt break; 539171433Sanholt case AGP_I855_GCC1_GMS_STOLEN_32M: 540171433Sanholt stolen = 32768; 541171433Sanholt break; 542171433Sanholt case AGP_I915_GCC1_GMS_STOLEN_48M: 543171433Sanholt stolen = 49152; 544171433Sanholt break; 545171433Sanholt case AGP_I915_GCC1_GMS_STOLEN_64M: 546171433Sanholt stolen = 65536; 547171433Sanholt break; 548171433Sanholt case AGP_G33_GCC1_GMS_STOLEN_128M: 549171433Sanholt stolen = 128 * 1024; 550171433Sanholt break; 551171433Sanholt case AGP_G33_GCC1_GMS_STOLEN_256M: 552171433Sanholt stolen = 256 * 1024; 553171433Sanholt break; 554171433Sanholt default: 555171433Sanholt device_printf(dev, "unknown memory configuration, " 556171433Sanholt "disabling\n"); 557171433Sanholt bus_release_resources(dev, sc->sc_res_spec, 558171433Sanholt sc->sc_res); 559171433Sanholt free(gatt, M_AGP); 560171433Sanholt agp_generic_detach(dev); 561171433Sanholt return EINVAL; 562171433Sanholt } 563171433Sanholt sc->stolen = (stolen - gtt_size - 4) * 1024 / 4096; 564110785Sanholt if (sc->stolen > 0) 565110785Sanholt device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4); 566110785Sanholt device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024); 567110785Sanholt 568110785Sanholt /* GATT address is already in there, make sure it's enabled */ 569171433Sanholt pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL); 570110785Sanholt pgtblctl |= 1; 571171433Sanholt bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl); 572110785Sanholt 573110785Sanholt gatt->ag_physical = pgtblctl & ~1; 57463010Sdfr } 57563010Sdfr 576171433Sanholt if (0) 577171433Sanholt agp_i810_dump_regs(dev); 578171433Sanholt 579153579Sjhb return 0; 58063010Sdfr} 58163010Sdfr 58263010Sdfrstatic int 58363010Sdfragp_i810_detach(device_t dev) 58463010Sdfr{ 58563010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 58663010Sdfr int error; 58763010Sdfr 58863010Sdfr error = agp_generic_detach(dev); 58963010Sdfr if (error) 59063010Sdfr return error; 59163010Sdfr 59263010Sdfr /* Clear the GATT base. */ 593103243Sanholt if ( sc->chiptype == CHIP_I810 ) { 594171433Sanholt bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0); 595103243Sanholt } else { 596103243Sanholt unsigned int pgtblctl; 597171433Sanholt pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL); 598103243Sanholt pgtblctl &= ~1; 599171433Sanholt bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl); 600103243Sanholt } 60163010Sdfr 60263010Sdfr /* Put the aperture back the way it started. */ 60363010Sdfr AGP_SET_APERTURE(dev, sc->initial_aperture); 60463010Sdfr 605103243Sanholt if ( sc->chiptype == CHIP_I810 ) { 606103243Sanholt contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP); 607103243Sanholt } 608103243Sanholt free(sc->gatt, M_AGP); 60963010Sdfr 610171433Sanholt bus_release_resources(dev, sc->sc_res_spec, sc->sc_res); 61163010Sdfr 61263010Sdfr return 0; 61363010Sdfr} 61463010Sdfr 615171433Sanholt/** 616171433Sanholt * Sets the PCI resource size of the aperture on i830-class and below chipsets, 617171433Sanholt * while returning failure on later chipsets when an actual change is 618171433Sanholt * requested. 619171433Sanholt * 620171433Sanholt * This whole function is likely bogus, as the kernel would probably need to 621171433Sanholt * reconfigure the placement of the AGP aperture if a larger size is requested, 622171433Sanholt * which doesn't happen currently. 623171433Sanholt */ 62463010Sdfrstatic int 62563010Sdfragp_i810_set_aperture(device_t dev, u_int32_t aperture) 62663010Sdfr{ 62763010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 628153031Sanholt u_int16_t miscc, gcc1; 62963010Sdfr 630153031Sanholt switch (sc->chiptype) { 631153031Sanholt case CHIP_I810: 632103243Sanholt /* 633103243Sanholt * Double check for sanity. 634103243Sanholt */ 635103243Sanholt if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) { 636103243Sanholt device_printf(dev, "bad aperture size %d\n", aperture); 637103243Sanholt return EINVAL; 638103243Sanholt } 639153031Sanholt 640103243Sanholt miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2); 641103243Sanholt miscc &= ~AGP_I810_MISCC_WINSIZE; 642103243Sanholt if (aperture == 32 * 1024 * 1024) 643103243Sanholt miscc |= AGP_I810_MISCC_WINSIZE_32; 644103243Sanholt else 645103243Sanholt miscc |= AGP_I810_MISCC_WINSIZE_64; 646103243Sanholt 647103243Sanholt pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2); 648153031Sanholt break; 649153031Sanholt case CHIP_I830: 650153031Sanholt if (aperture != 64 * 1024 * 1024 && 651153031Sanholt aperture != 128 * 1024 * 1024) { 652103243Sanholt device_printf(dev, "bad aperture size %d\n", aperture); 653103243Sanholt return EINVAL; 654103243Sanholt } 655103243Sanholt gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2); 656103243Sanholt gcc1 &= ~AGP_I830_GCC1_GMASIZE; 657103243Sanholt if (aperture == 64 * 1024 * 1024) 658103243Sanholt gcc1 |= AGP_I830_GCC1_GMASIZE_64; 659103243Sanholt else 660103243Sanholt gcc1 |= AGP_I830_GCC1_GMASIZE_128; 66163010Sdfr 662103243Sanholt pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2); 663153031Sanholt break; 664153031Sanholt case CHIP_I855: 665153031Sanholt case CHIP_I915: 666171433Sanholt case CHIP_I965: 667171433Sanholt case CHIP_G33: 668171433Sanholt return agp_generic_set_aperture(dev, aperture); 669171433Sanholt } 670153031Sanholt 671171433Sanholt return 0; 672171433Sanholt} 673153031Sanholt 674171433Sanholt/** 675171433Sanholt * Writes a GTT entry mapping the page at the given offset from the beginning 676171433Sanholt * of the aperture to the given physical address. 677171433Sanholt */ 678171433Sanholtstatic void 679171433Sanholtagp_i810_write_gtt_entry(device_t dev, int offset, vm_offset_t physical, 680171433Sanholt int enabled) 681171433Sanholt{ 682171433Sanholt struct agp_i810_softc *sc = device_get_softc(dev); 683171433Sanholt u_int32_t pte; 684171433Sanholt 685171433Sanholt pte = (u_int32_t)physical | 1; 686171433Sanholt if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33) { 687171433Sanholt pte |= (physical & 0x0000000f00000000ull) >> 28; 688171433Sanholt } else { 689171433Sanholt /* If we do actually have memory above 4GB on an older system, 690171433Sanholt * crash cleanly rather than scribble on system memory, 691171433Sanholt * so we know we need to fix it. 692171433Sanholt */ 693171433Sanholt KASSERT((pte & 0x0000000f00000000ull) == 0, 694171433Sanholt (">4GB physical address in agp")); 695171433Sanholt } 696171433Sanholt 697171433Sanholt switch (sc->chiptype) { 698171433Sanholt case CHIP_I810: 699171433Sanholt case CHIP_I830: 700171433Sanholt case CHIP_I855: 701171433Sanholt bus_write_4(sc->sc_res[0], 702171433Sanholt AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, pte); 703153031Sanholt break; 704171433Sanholt case CHIP_I915: 705171433Sanholt case CHIP_G33: 706171433Sanholt bus_write_4(sc->sc_res[1], 707171433Sanholt (offset >> AGP_PAGE_SHIFT) * 4, pte); 708171433Sanholt break; 709171433Sanholt case CHIP_I965: 710171433Sanholt bus_write_4(sc->sc_res[0], 711171433Sanholt (offset >> AGP_PAGE_SHIFT) * 4 + (512 * 1024), pte); 712171433Sanholt break; 713103243Sanholt } 71463010Sdfr} 71563010Sdfr 71663010Sdfrstatic int 71763010Sdfragp_i810_bind_page(device_t dev, int offset, vm_offset_t physical) 71863010Sdfr{ 71963010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 72063010Sdfr 721103243Sanholt if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 722103243Sanholt device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries); 72363010Sdfr return EINVAL; 724103243Sanholt } 72563010Sdfr 726110785Sanholt if ( sc->chiptype != CHIP_I810 ) { 727103243Sanholt if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { 728103243Sanholt device_printf(dev, "trying to bind into stolen memory"); 729103243Sanholt return EINVAL; 730103243Sanholt } 731103243Sanholt } 732103243Sanholt 733171433Sanholt agp_i810_write_gtt_entry(dev, offset, physical, 1); 734153031Sanholt 73563010Sdfr return 0; 73663010Sdfr} 73763010Sdfr 73863010Sdfrstatic int 73963010Sdfragp_i810_unbind_page(device_t dev, int offset) 74063010Sdfr{ 74163010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 74263010Sdfr 74363010Sdfr if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 74463010Sdfr return EINVAL; 74563010Sdfr 746110785Sanholt if ( sc->chiptype != CHIP_I810 ) { 747103272Sanholt if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { 748103243Sanholt device_printf(dev, "trying to unbind from stolen memory"); 749103272Sanholt return EINVAL; 750103272Sanholt } 751103243Sanholt } 752103243Sanholt 753171433Sanholt agp_i810_write_gtt_entry(dev, offset, 0, 0); 754171433Sanholt 75563010Sdfr return 0; 75663010Sdfr} 75763010Sdfr 75863010Sdfr/* 75963010Sdfr * Writing via memory mapped registers already flushes all TLBs. 76063010Sdfr */ 76163010Sdfrstatic void 76263010Sdfragp_i810_flush_tlb(device_t dev) 76363010Sdfr{ 76463010Sdfr} 76563010Sdfr 76663010Sdfrstatic int 76763010Sdfragp_i810_enable(device_t dev, u_int32_t mode) 76863010Sdfr{ 76963010Sdfr 77063010Sdfr return 0; 77163010Sdfr} 77263010Sdfr 77363010Sdfrstatic struct agp_memory * 77463010Sdfragp_i810_alloc_memory(device_t dev, int type, vm_size_t size) 77563010Sdfr{ 77663010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 77763010Sdfr struct agp_memory *mem; 77863010Sdfr 77963010Sdfr if ((size & (AGP_PAGE_SIZE - 1)) != 0) 78063010Sdfr return 0; 78163010Sdfr 78263010Sdfr if (sc->agp.as_allocated + size > sc->agp.as_maxmem) 78363010Sdfr return 0; 78463010Sdfr 78563010Sdfr if (type == 1) { 78663010Sdfr /* 78763010Sdfr * Mapping local DRAM into GATT. 78863010Sdfr */ 789110785Sanholt if ( sc->chiptype != CHIP_I810 ) 790103243Sanholt return 0; 79163010Sdfr if (size != sc->dcache_size) 79263010Sdfr return 0; 79363010Sdfr } else if (type == 2) { 79463010Sdfr /* 795158655Sanholt * Type 2 is the contiguous physical memory type, that hands 796158655Sanholt * back a physical address. This is used for cursors on i810. 797158655Sanholt * Hand back as many single pages with physical as the user 798158655Sanholt * wants, but only allow one larger allocation (ARGB cursor) 799158655Sanholt * for simplicity. 80063010Sdfr */ 801158655Sanholt if (size != AGP_PAGE_SIZE) { 802158655Sanholt if (sc->argb_cursor != NULL) 803158655Sanholt return 0; 804158655Sanholt 805158655Sanholt /* Allocate memory for ARGB cursor, if we can. */ 806158655Sanholt sc->argb_cursor = contigmalloc(size, M_AGP, 807158655Sanholt 0, 0, ~0, PAGE_SIZE, 0); 808158655Sanholt if (sc->argb_cursor == NULL) 809158655Sanholt return 0; 810158655Sanholt } 81163010Sdfr } 81263010Sdfr 813111119Simp mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 81463010Sdfr mem->am_id = sc->agp.as_nextid++; 81563010Sdfr mem->am_size = size; 81663010Sdfr mem->am_type = type; 817158655Sanholt if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE)) 81863010Sdfr mem->am_obj = vm_object_allocate(OBJT_DEFAULT, 81963010Sdfr atop(round_page(size))); 82063010Sdfr else 82163010Sdfr mem->am_obj = 0; 82263010Sdfr 82363010Sdfr if (type == 2) { 824158655Sanholt if (size == AGP_PAGE_SIZE) { 825158655Sanholt /* 826158655Sanholt * Allocate and wire down the page now so that we can 827158655Sanholt * get its physical address. 828158655Sanholt */ 829158655Sanholt vm_page_t m; 830158655Sanholt 831158655Sanholt VM_OBJECT_LOCK(mem->am_obj); 832158655Sanholt m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NOBUSY | 833158655Sanholt VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 834158655Sanholt VM_OBJECT_UNLOCK(mem->am_obj); 835158655Sanholt mem->am_physical = VM_PAGE_TO_PHYS(m); 836158655Sanholt } else { 837158655Sanholt /* Our allocation is already nicely wired down for us. 838158655Sanholt * Just grab the physical address. 839158655Sanholt */ 840158655Sanholt mem->am_physical = vtophys(sc->argb_cursor); 841158655Sanholt } 84263010Sdfr } else { 84363010Sdfr mem->am_physical = 0; 84463010Sdfr } 84563010Sdfr 84663010Sdfr mem->am_offset = 0; 84763010Sdfr mem->am_is_bound = 0; 84863010Sdfr TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link); 84963010Sdfr sc->agp.as_allocated += size; 85063010Sdfr 85163010Sdfr return mem; 85263010Sdfr} 85363010Sdfr 85463010Sdfrstatic int 85563010Sdfragp_i810_free_memory(device_t dev, struct agp_memory *mem) 85663010Sdfr{ 85763010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 85863010Sdfr 85963010Sdfr if (mem->am_is_bound) 86063010Sdfr return EBUSY; 86163010Sdfr 86263010Sdfr if (mem->am_type == 2) { 863158655Sanholt if (mem->am_size == AGP_PAGE_SIZE) { 864158655Sanholt /* 865158655Sanholt * Unwire the page which we wired in alloc_memory. 866158655Sanholt */ 867158655Sanholt vm_page_t m; 868158655Sanholt 869158655Sanholt VM_OBJECT_LOCK(mem->am_obj); 870158655Sanholt m = vm_page_lookup(mem->am_obj, 0); 871158655Sanholt VM_OBJECT_UNLOCK(mem->am_obj); 872158655Sanholt vm_page_lock_queues(); 873158655Sanholt vm_page_unwire(m, 0); 874158655Sanholt vm_page_unlock_queues(); 875158655Sanholt } else { 876158655Sanholt contigfree(sc->argb_cursor, mem->am_size, M_AGP); 877158655Sanholt sc->argb_cursor = NULL; 878158655Sanholt } 87963010Sdfr } 88063010Sdfr 88163010Sdfr sc->agp.as_allocated -= mem->am_size; 88263010Sdfr TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link); 88363010Sdfr if (mem->am_obj) 88463010Sdfr vm_object_deallocate(mem->am_obj); 88563010Sdfr free(mem, M_AGP); 88663010Sdfr return 0; 88763010Sdfr} 88863010Sdfr 88963010Sdfrstatic int 89063010Sdfragp_i810_bind_memory(device_t dev, struct agp_memory *mem, 89163010Sdfr vm_offset_t offset) 89263010Sdfr{ 89363010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 89463010Sdfr vm_offset_t i; 89563010Sdfr 896158655Sanholt /* Do some sanity checks first. */ 897158655Sanholt if (offset < 0 || (offset & (AGP_PAGE_SIZE - 1)) != 0 || 898158655Sanholt offset + mem->am_size > AGP_GET_APERTURE(dev)) { 899158655Sanholt device_printf(dev, "binding memory at bad offset %#x\n", 900158655Sanholt (int)offset); 901158655Sanholt return EINVAL; 902158655Sanholt } 903158655Sanholt 904158655Sanholt if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) { 905158655Sanholt mtx_lock(&sc->agp.as_lock); 906158655Sanholt if (mem->am_is_bound) { 907158655Sanholt mtx_unlock(&sc->agp.as_lock); 908158655Sanholt return EINVAL; 909158655Sanholt } 910158655Sanholt /* The memory's already wired down, just stick it in the GTT. */ 911158655Sanholt for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 912171433Sanholt agp_i810_write_gtt_entry(dev, offset + i, 913171433Sanholt mem->am_physical + i, 1); 914158655Sanholt } 915158655Sanholt agp_flush_cache(); 916158655Sanholt mem->am_offset = offset; 917158655Sanholt mem->am_is_bound = 1; 918158655Sanholt mtx_unlock(&sc->agp.as_lock); 919158655Sanholt return 0; 920158655Sanholt } 921158655Sanholt 92263010Sdfr if (mem->am_type != 1) 92363010Sdfr return agp_generic_bind_memory(dev, mem, offset); 92463010Sdfr 925110785Sanholt if ( sc->chiptype != CHIP_I810 ) 926103243Sanholt return EINVAL; 927103243Sanholt 92863010Sdfr for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 929171433Sanholt bus_write_4(sc->sc_res[0], 930171433Sanholt AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3); 93163010Sdfr } 93263010Sdfr 93363010Sdfr return 0; 93463010Sdfr} 93563010Sdfr 93663010Sdfrstatic int 93763010Sdfragp_i810_unbind_memory(device_t dev, struct agp_memory *mem) 93863010Sdfr{ 93963010Sdfr struct agp_i810_softc *sc = device_get_softc(dev); 94063010Sdfr vm_offset_t i; 94163010Sdfr 942158655Sanholt if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) { 943158655Sanholt mtx_lock(&sc->agp.as_lock); 944158655Sanholt if (!mem->am_is_bound) { 945158655Sanholt mtx_unlock(&sc->agp.as_lock); 946158655Sanholt return EINVAL; 947158655Sanholt } 948158655Sanholt 949158655Sanholt for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 950171433Sanholt agp_i810_write_gtt_entry(dev, mem->am_offset + i, 951171433Sanholt 0, 0); 952158655Sanholt } 953158655Sanholt agp_flush_cache(); 954158655Sanholt mem->am_is_bound = 0; 955158655Sanholt mtx_unlock(&sc->agp.as_lock); 956158655Sanholt return 0; 957158655Sanholt } 958158655Sanholt 95963010Sdfr if (mem->am_type != 1) 96063010Sdfr return agp_generic_unbind_memory(dev, mem); 96163010Sdfr 962110785Sanholt if ( sc->chiptype != CHIP_I810 ) 963103243Sanholt return EINVAL; 964103243Sanholt 965171433Sanholt for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 966171433Sanholt bus_write_4(sc->sc_res[0], 967171433Sanholt AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); 968171433Sanholt } 96963010Sdfr 97063010Sdfr return 0; 97163010Sdfr} 97263010Sdfr 97363010Sdfrstatic device_method_t agp_i810_methods[] = { 97463010Sdfr /* Device interface */ 975155186Sjhb DEVMETHOD(device_identify, agp_i810_identify), 97663010Sdfr DEVMETHOD(device_probe, agp_i810_probe), 97763010Sdfr DEVMETHOD(device_attach, agp_i810_attach), 97863010Sdfr DEVMETHOD(device_detach, agp_i810_detach), 97963010Sdfr 98063010Sdfr /* AGP interface */ 981171433Sanholt DEVMETHOD(agp_get_aperture, agp_generic_get_aperture), 98263010Sdfr DEVMETHOD(agp_set_aperture, agp_i810_set_aperture), 98363010Sdfr DEVMETHOD(agp_bind_page, agp_i810_bind_page), 98463010Sdfr DEVMETHOD(agp_unbind_page, agp_i810_unbind_page), 98563010Sdfr DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb), 98663010Sdfr DEVMETHOD(agp_enable, agp_i810_enable), 98763010Sdfr DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory), 98863010Sdfr DEVMETHOD(agp_free_memory, agp_i810_free_memory), 98963010Sdfr DEVMETHOD(agp_bind_memory, agp_i810_bind_memory), 99063010Sdfr DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory), 99163010Sdfr 99263010Sdfr { 0, 0 } 99363010Sdfr}; 99463010Sdfr 99563010Sdfrstatic driver_t agp_i810_driver = { 99663010Sdfr "agp", 99763010Sdfr agp_i810_methods, 99863010Sdfr sizeof(struct agp_i810_softc), 99963010Sdfr}; 100063010Sdfr 100163010Sdfrstatic devclass_t agp_devclass; 100263010Sdfr 1003153579SjhbDRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, 0, 0); 1004113506SmdoddMODULE_DEPEND(agp_i810, agp, 1, 1, 1); 1005113506SmdoddMODULE_DEPEND(agp_i810, pci, 1, 1, 1); 1006