1210284Sjmallett/***********************license start***************
2215990Sjmallett * Copyright (c) 2003-2010  Cavium Networks (support@cavium.com). All rights
3215990Sjmallett * reserved.
4210284Sjmallett *
5210284Sjmallett *
6215990Sjmallett * Redistribution and use in source and binary forms, with or without
7215990Sjmallett * modification, are permitted provided that the following conditions are
8215990Sjmallett * met:
9210284Sjmallett *
10215990Sjmallett *   * Redistributions of source code must retain the above copyright
11215990Sjmallett *     notice, this list of conditions and the following disclaimer.
12210284Sjmallett *
13215990Sjmallett *   * Redistributions in binary form must reproduce the above
14215990Sjmallett *     copyright notice, this list of conditions and the following
15215990Sjmallett *     disclaimer in the documentation and/or other materials provided
16215990Sjmallett *     with the distribution.
17215990Sjmallett
18215990Sjmallett *   * Neither the name of Cavium Networks nor the names of
19215990Sjmallett *     its contributors may be used to endorse or promote products
20215990Sjmallett *     derived from this software without specific prior written
21215990Sjmallett *     permission.
22215990Sjmallett
23215990Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215990Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215990Sjmallett * regulations, and may be subject to export or import  regulations in other
26215990Sjmallett * countries.
27215990Sjmallett
28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29215990Sjmallett * AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38210284Sjmallett ***********************license end**************************************/
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41210284Sjmallett
42210284Sjmallett
43210284Sjmallett
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45215990Sjmallett
46210284Sjmallett/**
47210284Sjmallett * @file
48210284Sjmallett *
49210284Sjmallett * Interface to the TWSI / I2C bus
50215990Sjmallett *
51210284Sjmallett * Note: Currently on 7 bit device addresses are supported
52210284Sjmallett *
53215990Sjmallett * <hr>$Revision: 49448 $<hr>
54210284Sjmallett *
55210284Sjmallett */
56210284Sjmallett
57210284Sjmallett#ifndef __CVMX_TWSI_H__
58210284Sjmallett#define __CVMX_TWSI_H__
59210284Sjmallett
60210284Sjmallett#ifdef	__cplusplus
61210284Sjmallettextern "C" {
62210284Sjmallett#endif
63210284Sjmallett
64210284Sjmallett
65215990Sjmallett    /* Extra TWSI Bus Opcodes */
66215990Sjmallett#define TWSI_SLAVE_ADD     0
67215990Sjmallett#define TWSI_DATA          1
68215990Sjmallett#define TWSI_CTL           2
69215990Sjmallett#define TWSI_CLKCTL_STAT   3       /* R=0 selects CLKCTL, R=1 selects STAT */
70215990Sjmallett#define TWSI_STAT          3       /* when R = 1 */
71215990Sjmallett#define TWSI_SLAVE_ADD_EXT 4
72215990Sjmallett#define TWSI_RST           7
73210284Sjmallett
74215990Sjmallett
75210284Sjmallett/**
76210284Sjmallett * Do a twsi read from a 7 bit device address using an (optional) internal address.
77210284Sjmallett * Up to 8 bytes can be read at a time.
78215990Sjmallett *
79210284Sjmallett * @param twsi_id   which Octeon TWSI bus to use
80210284Sjmallett * @param dev_addr  Device address (7 bit)
81210284Sjmallett * @param internal_addr
82210284Sjmallett *                  Internal address.  Can be 0, 1 or 2 bytes in width
83210284Sjmallett * @param num_bytes Number of data bytes to read
84210284Sjmallett * @param ia_width_bytes
85210284Sjmallett *                  Internal address size in bytes (0, 1, or 2)
86210284Sjmallett * @param data      Pointer argument where the read data is returned.
87215990Sjmallett *
88210284Sjmallett * @return read data returned in 'data' argument
89210284Sjmallett *         Number of bytes read on success
90210284Sjmallett *         -1 on failure
91210284Sjmallett */
92210284Sjmallettint cvmx_twsix_read_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t *data);
93210284Sjmallett
94210284Sjmallett
95210284Sjmallett
96210284Sjmallett
97210284Sjmallett/**
98210284Sjmallett * A convenience wrapper function around cvmx_twsix_read_ia() that
99210284Sjmallett * only supports 8 bit internal addresses.
100210284Sjmallett * Reads up to 7 bytes, and returns both the value read or error
101210284Sjmallett * value in the return value
102215990Sjmallett *
103210284Sjmallett * @param twsi_id   which Octeon TWSI bus to use
104210284Sjmallett * @param dev_addr  Device address (7 bit only)
105210284Sjmallett * @param internal_addr
106210284Sjmallett *                  Internal address (8 bit only)
107210284Sjmallett * @param num_bytes Number of bytes to read (0-7)
108215990Sjmallett *
109210284Sjmallett * @return Value read from TWSI on success
110210284Sjmallett *         -1 on error
111210284Sjmallett */
112210284Sjmallettstatic inline int64_t cvmx_twsix_read_ia8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, int num_bytes)
113210284Sjmallett{
114210284Sjmallett    uint64_t data;
115210284Sjmallett    if (num_bytes < 1 || num_bytes > 7)
116210284Sjmallett        return -1;
117210284Sjmallett    if (cvmx_twsix_read_ia(twsi_id,dev_addr,internal_addr,num_bytes, 1, &data) < 0)
118210284Sjmallett        return -1;
119210284Sjmallett    return data;
120210284Sjmallett}
121210284Sjmallett
122210284Sjmallett/**
123210284Sjmallett * A convenience wrapper function around cvmx_twsix_read_ia() that
124210284Sjmallett * only supports 16 bit internal addresses.
125210284Sjmallett * Reads up to 7 bytes, and returns both the value read or error
126210284Sjmallett * value in the return value
127215990Sjmallett *
128210284Sjmallett * @param twsi_id   which Octeon TWSI bus to use
129210284Sjmallett * @param dev_addr  Device address (7 bit only)
130210284Sjmallett * @param internal_addr
131210284Sjmallett *                  Internal address (16 bit only)
132210284Sjmallett * @param num_bytes Number of bytes to read (0-7)
133215990Sjmallett *
134210284Sjmallett * @return Value read from TWSI on success
135210284Sjmallett *         -1 on error
136210284Sjmallett */
137210284Sjmallettstatic inline int64_t cvmx_twsix_read_ia16(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes)
138210284Sjmallett{
139210284Sjmallett    uint64_t data;
140210284Sjmallett    if (num_bytes < 1 || num_bytes > 7)
141210284Sjmallett        return -1;
142210284Sjmallett    if (cvmx_twsix_read_ia(twsi_id, dev_addr, internal_addr, num_bytes, 2, &data) < 0)
143210284Sjmallett        return -1;
144210284Sjmallett    return data;
145210284Sjmallett}
146210284Sjmallett
147210284Sjmallett
148210284Sjmallett
149210284Sjmallett/**
150210284Sjmallett * Read from a TWSI device (7 bit device address only) without generating any
151210284Sjmallett * internal addresses.
152210284Sjmallett * Read from 1-8 bytes and returns them in the data pointer.
153215990Sjmallett *
154210284Sjmallett * @param twsi_id   TWSI interface on Octeon to use
155210284Sjmallett * @param dev_addr  TWSI device address (7 bit only)
156210284Sjmallett * @param num_bytes number of bytes to read
157210284Sjmallett * @param data      Pointer to data read from TWSI device
158215990Sjmallett *
159210284Sjmallett * @return Number of bytes read on success
160210284Sjmallett *         -1 on error
161210284Sjmallett */
162210284Sjmallettint cvmx_twsix_read(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t *data);
163210284Sjmallett
164210284Sjmallett
165210284Sjmallett
166210284Sjmallett/**
167210284Sjmallett * Perform a twsi write operation to a 7 bit device address.
168215990Sjmallett *
169210284Sjmallett * Note that many eeprom devices have page restrictions regarding address boundaries
170210284Sjmallett * that can be crossed in one write operation.  This is device dependent, and this routine
171210284Sjmallett * does nothing in this regard.
172210284Sjmallett * This command does not generate any internal addressess.
173215990Sjmallett *
174210284Sjmallett * @param twsi_id   Octeon TWSI interface to use
175210284Sjmallett * @param dev_addr  TWSI device address
176210284Sjmallett * @param num_bytes Number of bytes to write (between 1 and 8 inclusive)
177210284Sjmallett * @param data      Data to write
178215990Sjmallett *
179210284Sjmallett * @return 0 on success
180210284Sjmallett *         -1 on failure
181210284Sjmallett */
182210284Sjmallettint cvmx_twsix_write(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t data);
183210284Sjmallett
184210284Sjmallett/**
185210284Sjmallett * Write 1-8 bytes to a TWSI device using an internal address.
186215990Sjmallett *
187210284Sjmallett * @param twsi_id   which TWSI interface on Octeon to use
188210284Sjmallett * @param dev_addr  TWSI device address (7 bit only)
189210284Sjmallett * @param internal_addr
190210284Sjmallett *                  TWSI internal address (0, 8, or 16 bits)
191210284Sjmallett * @param num_bytes Number of bytes to write (1-8)
192210284Sjmallett * @param ia_width_bytes
193210284Sjmallett *                  internal address width, in bytes (0, 1, 2)
194210284Sjmallett * @param data      Data to write.  Data is written MSB first on the twsi bus, and only the lower
195210284Sjmallett *                  num_bytes bytes of the argument are valid.  (If a 2 byte write is done, only
196210284Sjmallett *                  the low 2 bytes of the argument is used.
197215990Sjmallett *
198210284Sjmallett * @return Number of bytes read on success,
199210284Sjmallett *         -1 on error
200210284Sjmallett */
201210284Sjmallettint cvmx_twsix_write_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t data);
202210284Sjmallett
203210284Sjmallett/***********************************************************************
204210284Sjmallett** Functions below are deprecated, and not recomended for use.
205210284Sjmallett** They have been superceded by more flexible functions that are
206210284Sjmallett** now provided.
207210284Sjmallett************************************************************************/
208210284Sjmallett
209210284Sjmallett
210210284Sjmallett
211210284Sjmallett
212210284Sjmallett
213210284Sjmallett
214210284Sjmallett/**
215210284Sjmallett * Read 8-bit from a device on the TWSI / I2C bus
216210284Sjmallett *
217210284Sjmallett * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
218210284Sjmallett *                 support 0. CN56XX and CN57XX support 0-1.
219210284Sjmallett * @param dev_addr I2C device address (7 bit)
220210284Sjmallett * @param internal_addr
221210284Sjmallett *                 Internal device address
222210284Sjmallett *
223210284Sjmallett * @return 8-bit data or < 0 in case of error
224210284Sjmallett */
225210284Sjmallettstatic inline int cvmx_twsix_read8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr)
226210284Sjmallett{
227210284Sjmallett    return cvmx_twsix_read_ia8(twsi_id, dev_addr, internal_addr, 1);
228210284Sjmallett}
229210284Sjmallett
230210284Sjmallett/**
231210284Sjmallett * Read 8-bit from a device on the TWSI / I2C bus
232210284Sjmallett *
233210284Sjmallett * Uses current internal address
234210284Sjmallett *
235210284Sjmallett * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
236210284Sjmallett *                 support 0. CN56XX and CN57XX support 0-1.
237210284Sjmallett * @param dev_addr I2C device address (7 bit)
238210284Sjmallett *
239210284Sjmallett * @return 8-bit value or < 0 in case of error
240210284Sjmallett */
241210284Sjmallettstatic inline int cvmx_twsix_read8_cur_addr(int twsi_id, uint8_t dev_addr)
242210284Sjmallett{
243210284Sjmallett    uint64_t data;
244210284Sjmallett
245210284Sjmallett    if (cvmx_twsix_read(twsi_id,dev_addr, 1, &data) < 0)
246210284Sjmallett        return -1;
247210284Sjmallett    return(data & 0xff);
248210284Sjmallett}
249210284Sjmallett
250210284Sjmallett/**
251210284Sjmallett * Write 8-bit to a device on the TWSI / I2C bus
252210284Sjmallett *
253210284Sjmallett * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
254210284Sjmallett *                 support 0. CN56XX and CN57XX support 0-1.
255210284Sjmallett * @param dev_addr I2C device address (7 bit)
256210284Sjmallett * @param internal_addr
257210284Sjmallett *                 Internal device address
258210284Sjmallett * @param data     Data to be written
259210284Sjmallett *
260210284Sjmallett * @return 0 on success and < 0 in case of error
261210284Sjmallett */
262210284Sjmallettstatic inline int cvmx_twsix_write8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
263210284Sjmallett{
264210284Sjmallett    if (cvmx_twsix_write_ia(twsi_id,dev_addr,internal_addr, 1, 1,data) < 0)
265210284Sjmallett        return -1;
266210284Sjmallett    return 0;
267210284Sjmallett}
268210284Sjmallett
269210284Sjmallett/**
270210284Sjmallett * Read 8-bit from a device on the TWSI / I2C bus zero.
271210284Sjmallett *
272210284Sjmallett * This function is for compatibility with SDK 1.6.0 and
273210284Sjmallett * before which only supported a single TWSI bus.
274210284Sjmallett *
275210284Sjmallett * @param dev_addr I2C device address (7 bit)
276210284Sjmallett * @param internal_addr
277210284Sjmallett *                 Internal device address
278210284Sjmallett *
279210284Sjmallett * @return 8-bit data or < 0 in case of error
280210284Sjmallett */
281210284Sjmallettstatic inline int cvmx_twsi_read8(uint8_t dev_addr, uint8_t internal_addr)
282210284Sjmallett{
283210284Sjmallett    return cvmx_twsix_read8(0, dev_addr, internal_addr);
284210284Sjmallett}
285210284Sjmallett
286210284Sjmallett/**
287210284Sjmallett * Read 8-bit from a device on the TWSI / I2C bus zero.
288210284Sjmallett *
289210284Sjmallett * Uses current internal address
290210284Sjmallett *
291210284Sjmallett * This function is for compatibility with SDK 1.6.0 and
292210284Sjmallett * before which only supported a single TWSI bus.
293210284Sjmallett *
294210284Sjmallett * @param dev_addr I2C device address (7 bit)
295210284Sjmallett *
296210284Sjmallett * @return 8-bit value or < 0 in case of error
297210284Sjmallett */
298210284Sjmallettstatic inline int cvmx_twsi_read8_cur_addr(uint8_t dev_addr)
299210284Sjmallett{
300210284Sjmallett    return cvmx_twsix_read8_cur_addr(0, dev_addr);
301210284Sjmallett}
302210284Sjmallett
303210284Sjmallett/**
304210284Sjmallett * Write 8-bit to a device on the TWSI / I2C bus zero.
305210284Sjmallett * This function is for compatibility with SDK 1.6.0 and
306210284Sjmallett * before which only supported a single TWSI bus.
307210284Sjmallett *
308210284Sjmallett * @param dev_addr I2C device address (7 bit)
309210284Sjmallett * @param internal_addr
310210284Sjmallett *                 Internal device address
311210284Sjmallett * @param data     Data to be written
312210284Sjmallett *
313210284Sjmallett * @return 0 on success and < 0 in case of error
314210284Sjmallett */
315210284Sjmallettstatic inline int cvmx_twsi_write8(uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
316210284Sjmallett{
317210284Sjmallett    return cvmx_twsix_write8(0, dev_addr, internal_addr, data);
318210284Sjmallett}
319210284Sjmallett
320210284Sjmallett#ifdef	__cplusplus
321210284Sjmallett}
322210284Sjmallett#endif
323210284Sjmallett
324210284Sjmallett#endif  /*  __CVMX_TWSI_H__ */
325