139444Smsmith/* 239444Smsmith * Copyright (c) 1996, Sujal M. Patel 339444Smsmith * All rights reserved. 439444Smsmith * 539444Smsmith * Redistribution and use in source and binary forms, with or without 639444Smsmith * modification, are permitted provided that the following conditions 739444Smsmith * are met: 839444Smsmith * 1. Redistributions of source code must retain the above copyright 939444Smsmith * notice, this list of conditions and the following disclaimer. 1039444Smsmith * 2. Redistributions in binary form must reproduce the above copyright 1139444Smsmith * notice, this list of conditions and the following disclaimer in the 1239444Smsmith * documentation and/or other materials provided with the distribution. 1339444Smsmith * 3. All advertising materials mentioning features or use of this software 1439444Smsmith * must display the following acknowledgement: 1539444Smsmith * This product includes software developed by Sujal M. Patel 1639444Smsmith * 4. Neither the name of the author nor the names of any co-contributors 1739444Smsmith * may be used to endorse or promote products derived from this software 1839444Smsmith * without specific prior written permission. 1939444Smsmith * 2039444Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2139444Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2239444Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2339444Smsmith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2439444Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2539444Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2639444Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2739444Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2839444Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2939444Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3039444Smsmith * SUCH DAMAGE. 3139444Smsmith * 3250477Speter * $FreeBSD$ 3339444Smsmith */ 3439444Smsmith 3539444Smsmith#ifndef _I386_ISA_PNP_H_ 3639444Smsmith#define _I386_ISA_PNP_H_ 3739444Smsmith 3839444Smsmith/* Maximum Number of PnP Devices. 8 should be plenty */ 3939444Smsmith#define MAX_PNP_CARDS 8 4039444Smsmith/* 4139444Smsmith * the following is the maximum number of PnP Logical devices that 4239444Smsmith * userconfig can handle. 4339444Smsmith */ 4439444Smsmith#define MAX_PNP_LDN 20 4539444Smsmith 4639444Smsmith/* Static ports to access PnP state machine */ 4755206Speter#ifndef _KERNEL 4843561Skato#ifdef PC98 4939444Smsmith/* pnp.h is included from pnpinfo.c. */ 5039444Smsmith#define _PNP_ADDRESS 0x259 5139444Smsmith#define _PNP_WRITE_DATA 0xa59 5239444Smsmith#else 5339444Smsmith#define _PNP_ADDRESS 0x279 5439444Smsmith#define _PNP_WRITE_DATA 0xa79 5539444Smsmith#endif 5643561Skato#endif 5739444Smsmith 5839444Smsmith/* PnP Registers. Write to ADDRESS and then use WRITE/READ_DATA */ 5939444Smsmith#define SET_RD_DATA 0x00 6039444Smsmith /*** 6139444Smsmith Writing to this location modifies the address of the port used for 6239444Smsmith reading from the Plug and Play ISA cards. Bits[7:0] become I/O 6339444Smsmith read port address bits[9:2]. Reads from this register are ignored. 6439444Smsmith ***/ 6539444Smsmith 6639444Smsmith#define SERIAL_ISOLATION 0x01 6739444Smsmith /*** 6839444Smsmith A read to this register causes a Plug and Play cards in the Isolation 6939444Smsmith state to compare one bit of the boards ID. 7039444Smsmith This register is read only. 7139444Smsmith ***/ 7239444Smsmith 7339444Smsmith#define CONFIG_CONTROL 0x02 7439444Smsmith /*** 7539444Smsmith Bit[2] Reset CSN to 0 7639444Smsmith Bit[1] Return to the Wait for Key state 7739444Smsmith Bit[0] Reset all logical devices and restore configuration 7839444Smsmith registers to their power-up values. 7939444Smsmith 8039444Smsmith A write to bit[0] of this register performs a reset function on 8139444Smsmith all logical devices. This resets the contents of configuration 8239444Smsmith registers to their default state. All card's logical devices 8339444Smsmith enter their default state and the CSN is preserved. 8439444Smsmith 8539444Smsmith A write to bit[1] of this register causes all cards to enter the 8639444Smsmith Wait for Key state but all CSNs are preserved and logical devices 8739444Smsmith are not affected. 8839444Smsmith 8939444Smsmith A write to bit[2] of this register causes all cards to reset their 9039444Smsmith CSN to zero . 9139444Smsmith 9239444Smsmith This register is write-only. The values are not sticky, that is, 9339444Smsmith hardware will automatically clear them and there is no need for 9439444Smsmith software to clear the bits. 9539444Smsmith ***/ 9639444Smsmith 9739444Smsmith#define WAKE 0x03 9839444Smsmith /*** 9939444Smsmith A write to this port will cause all cards that have a CSN that 10039444Smsmith matches the write data[7:0] to go from the Sleep state to the either 10139444Smsmith the Isolation state if the write data for this command is zero or 10239444Smsmith the Config state if the write data is not zero. Additionally, the 10339444Smsmith pointer to the byte-serial device is reset. This register is 10439444Smsmith writeonly. 10539444Smsmith ***/ 10639444Smsmith 10739444Smsmith#define RESOURCE_DATA 0x04 10839444Smsmith /*** 10939444Smsmith A read from this address reads the next byte of resource information. 11039444Smsmith The Status register must be polled until bit[0] is set before this 11139444Smsmith register may be read. This register is read only. 11239444Smsmith ***/ 11339444Smsmith 11439444Smsmith#define STATUS 0x05 11539444Smsmith /*** 11639444Smsmith Bit[0] when set indicates it is okay to read the next data byte 11739444Smsmith from the Resource Data register. This register is readonly. 11839444Smsmith ***/ 11939444Smsmith 12039444Smsmith#define SET_CSN 0x06 12139444Smsmith /*** 12239444Smsmith A write to this port sets a card's CSN. The CSN is a value uniquely 12339444Smsmith assigned to each ISA card after the serial identification process 12439444Smsmith so that each card may be individually selected during a Wake[CSN] 12539444Smsmith command. This register is read/write. 12639444Smsmith ***/ 12739444Smsmith 12839444Smsmith#define SET_LDN 0x07 12939444Smsmith /*** 13039444Smsmith Selects the current logical device. All reads and writes of memory, 13139444Smsmith I/O, interrupt and DMA configuration information access the registers 13239444Smsmith of the logical device written here. In addition, the I/O Range 13339444Smsmith Check and Activate commands operate only on the selected logical 13439444Smsmith device. This register is read/write. If a card has only 1 logical 13539444Smsmith device, this location should be a read-only value of 0x00. 13639444Smsmith ***/ 13739444Smsmith 13839444Smsmith/*** addresses 0x08 - 0x1F Card Level Reserved for future use ***/ 13939444Smsmith/*** addresses 0x20 - 0x2F Card Level, Vendor Defined ***/ 14039444Smsmith 14139444Smsmith#define ACTIVATE 0x30 14239444Smsmith /*** 14339444Smsmith For each logical device there is one activate register that controls 14439444Smsmith whether or not the logical device is active on the ISA bus. Bit[0], 14539444Smsmith if set, activates the logical device. Bits[7:1] are reserved and 14639444Smsmith must return 0 on reads. This is a read/write register. Before a 14739444Smsmith logical device is activated, I/O range check must be disabled. 14839444Smsmith ***/ 14939444Smsmith 15039444Smsmith#define IO_RANGE_CHECK 0x31 15139444Smsmith /*** 15239444Smsmith This register is used to perform a conflict check on the I/O port 15339444Smsmith range programmed for use by a logical device. 15439444Smsmith 15539444Smsmith Bit[7:2] Reserved and must return 0 on reads 15639444Smsmith Bit[1] Enable I/O Range check, if set then I/O Range Check 15739444Smsmith is enabled. I/O range check is only valid when the logical 15839444Smsmith device is inactive. 15939444Smsmith 16039444Smsmith Bit[0], if set, forces the logical device to respond to I/O reads 16139444Smsmith of the logical device's assigned I/O range with a 0x55 when I/O 16239444Smsmith range check is in operation. If clear, the logical device drives 16339444Smsmith 0xAA. This register is read/write. 16439444Smsmith ***/ 16539444Smsmith 16639444Smsmith/*** addr 0x32 - 0x37 Logical Device Control Reserved for future use ***/ 16739444Smsmith/*** addr 0x38 - 0x3F Logical Device Control Vendor Define ***/ 16839444Smsmith 16939444Smsmith#define MEM_CONFIG 0x40 17039444Smsmith /*** 17139444Smsmith Four memory resource registers per range, four ranges. 17239444Smsmith Fill with 0 if no ranges are enabled. 17339444Smsmith 17439444Smsmith Offset 0: RW Memory base address bits[23:16] 17539444Smsmith Offset 1: RW Memory base address bits[15:8] 17639444Smsmith Offset 2: Memory control 17739444Smsmith Bit[1] specifies 8/16-bit control. This bit is set to indicate 17839444Smsmith 16-bit memory, and cleared to indicate 8-bit memory. 17939444Smsmith Bit[0], if cleared, indicates the next field can be used as a range 18039444Smsmith length for decode (implies range length and base alignment of memory 18139444Smsmith descriptor are equal). 18239444Smsmith Bit[0], if set, indicates the next field is the upper limit for 18339444Smsmith the address. - - Bit[0] is read-only. 18439444Smsmith Offset 3: RW upper limit or range len, bits[23:16] 18539444Smsmith Offset 4: RW upper limit or range len, bits[15:8] 18639444Smsmith Offset 5-Offset 7: filler, unused. 18739444Smsmith ***/ 18839444Smsmith 18939444Smsmith#define IO_CONFIG_BASE 0x60 19039444Smsmith /*** 19139444Smsmith Eight ranges, two bytes per range. 19239444Smsmith Offset 0: I/O port base address bits[15:8] 19339444Smsmith Offset 1: I/O port base address bits[7:0] 19439444Smsmith ***/ 19539444Smsmith 19639444Smsmith#define IRQ_CONFIG 0x70 19739444Smsmith /*** 19839444Smsmith Two entries, two bytes per entry. 19939444Smsmith Offset 0: RW interrupt level (1..15, 0=unused). 20039444Smsmith Offset 1: Bit[1]: level(1:hi, 0:low), 20139444Smsmith Bit[0]: type (1:level, 0:edge) 20239444Smsmith byte 1 can be readonly if 1 type of int is used. 20339444Smsmith ***/ 20439444Smsmith 20539444Smsmith#define DRQ_CONFIG 0x74 20639444Smsmith /*** 20739444Smsmith Two entries, one byte per entry. Bits[2:0] select 20839444Smsmith which DMA channel is in use for DMA 0. Zero selects DMA channel 20939444Smsmith 0, seven selects DMA channel 7. DMA channel 4, the cascade channel 21039444Smsmith is used to indicate no DMA channel is active. 21139444Smsmith ***/ 21239444Smsmith 21339444Smsmith/*** 32-bit memory accesses are at 0x76 ***/ 21439444Smsmith 21540553Smsmith/* Macros to parse Resource IDs */ 21640553Smsmith#define PNP_RES_TYPE(a) (a >> 7) 21740553Smsmith#define PNP_SRES_NUM(a) (a >> 3) 21840553Smsmith#define PNP_SRES_LEN(a) (a & 0x07) 21940553Smsmith#define PNP_LRES_NUM(a) (a & 0x7f) 22040553Smsmith 22139444Smsmith/* Small Resource Item names */ 22239444Smsmith#define PNP_VERSION 0x1 22339444Smsmith#define LOG_DEVICE_ID 0x2 22439444Smsmith#define COMP_DEVICE_ID 0x3 22539444Smsmith#define IRQ_FORMAT 0x4 22639444Smsmith#define DMA_FORMAT 0x5 22739444Smsmith#define START_DEPEND_FUNC 0x6 22839444Smsmith#define END_DEPEND_FUNC 0x7 22939444Smsmith#define IO_PORT_DESC 0x8 23039444Smsmith#define FIXED_IO_PORT_DESC 0x9 23139444Smsmith#define SM_RES_RESERVED 0xa-0xd 23239444Smsmith#define SM_VENDOR_DEFINED 0xe 23339444Smsmith#define END_TAG 0xf 23439444Smsmith 23539444Smsmith/* Large Resource Item names */ 23639444Smsmith#define MEMORY_RANGE_DESC 0x1 23739444Smsmith#define ID_STRING_ANSI 0x2 23839444Smsmith#define ID_STRING_UNICODE 0x3 23939444Smsmith#define LG_VENDOR_DEFINED 0x4 24039444Smsmith#define _32BIT_MEM_RANGE_DESC 0x5 24139444Smsmith#define _32BIT_FIXED_LOC_DESC 0x6 24239444Smsmith#define LG_RES_RESERVED 0x7-0x7f 24339444Smsmith 24439444Smsmith/* 24539444Smsmith * pnp_cinfo contains Configuration Information. They are used 24639444Smsmith * to communicate to the device driver the actual configuration 24739444Smsmith * of the device, and also by the userconfig menu to let the 24839444Smsmith * operating system override any configuration set by the bios. 24939444Smsmith * 25039444Smsmith */ 25139444Smsmithstruct pnp_cinfo { 25239444Smsmith u_int vendor_id; /* board id */ 25339444Smsmith u_int serial; /* Board's Serial Number */ 25439444Smsmith u_long flags; /* OS-reserved flags */ 25539444Smsmith u_char csn; /* assigned Card Select Number */ 25639444Smsmith u_char ldn; /* Logical Device Number */ 25739444Smsmith u_char enable; /* pnp enable */ 25839444Smsmith u_char override; /* override bios parms (in userconfig) */ 25939444Smsmith u_char irq[2]; /* IRQ Number */ 26039444Smsmith u_char irq_type[2]; /* IRQ Type */ 26139444Smsmith u_char drq[2]; 26239444Smsmith u_short port[8]; /* The Base Address of the Port */ 26339444Smsmith struct { 26439444Smsmith u_long base; /* Memory Base Address */ 26539444Smsmith int control; /* Memory Control Register */ 26639444Smsmith u_long range; /* Memory Range *OR* Upper Limit */ 26739444Smsmith } mem[4]; 26839444Smsmith}; 26939444Smsmith 27055206Speter#ifdef _KERNEL 27139444Smsmith 27239444Smsmithstruct pnp_device { 27339444Smsmith char *pd_name; 27439444Smsmith char * (*pd_probe ) (u_long csn, u_long vendor_id); 27539444Smsmith void (*pd_attach ) (u_long csn, u_long vend_id, char * name, 27639444Smsmith struct isa_device *dev); 27739444Smsmith u_long *pd_count; 27839444Smsmith u_int *imask ; 27939444Smsmith}; 28039444Smsmith 28139444Smsmithstruct _pnp_id { 28239444Smsmith u_long vendor_id; 28339444Smsmith u_long serial; 28439444Smsmith u_char checksum; 28539444Smsmith} ; 28639444Smsmith 28739444Smsmithstruct pnp_dlist_node { 28839444Smsmith struct pnp_device *pnp; 28939444Smsmith struct isa_device dev; 29039444Smsmith struct pnp_dlist_node *next; 29139444Smsmith}; 29239444Smsmith 29339444Smsmithtypedef struct _pnp_id pnp_id; 29439444Smsmithextern struct pnp_dlist_node *pnp_device_list; 29539444Smsmithextern pnp_id pnp_devices[MAX_PNP_CARDS]; 29639444Smsmithextern struct pnp_cinfo pnp_ldn_overrides[MAX_PNP_LDN]; 29739444Smsmithextern int pnp_overrides_valid; 29839444Smsmith 29939444Smsmith/* 30039444Smsmith * these two functions are for use in drivers 30139444Smsmith */ 30239444Smsmithint read_pnp_parms(struct pnp_cinfo *d, int ldn); 30339444Smsmithint write_pnp_parms(struct pnp_cinfo *d, int ldn); 30439444Smsmithint enable_pnp_card(void); 30539444Smsmith 30639444Smsmith/* 30739444Smsmith * used by autoconfigure to actually probe and attach drivers 30839444Smsmith */ 30992766Salfredvoid pnp_configure(void); 31039444Smsmith 31155206Speter#endif /* _KERNEL */ 31239444Smsmith 31339444Smsmith#endif /* !_I386_ISA_PNP_H_ */ 314