1189903Sjkim/*- 2189903Sjkim * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org> 3189903Sjkim * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org> 4189903Sjkim * Copyright (c) 2003 Peter Wemm 5232076Sjkim * Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org> 6189903Sjkim * All rights reserved. 7189903Sjkim * 8189903Sjkim * Redistribution and use in source and binary forms, with or without 9189903Sjkim * modification, are permitted provided that the following conditions 10189903Sjkim * are met: 11189903Sjkim * 1. Redistributions of source code must retain the above copyright 12189903Sjkim * notice, this list of conditions and the following disclaimer. 13189903Sjkim * 2. Redistributions in binary form must reproduce the above copyright 14189903Sjkim * notice, this list of conditions and the following disclaimer in the 15189903Sjkim * documentation and/or other materials provided with the distribution. 16189903Sjkim * 17189903Sjkim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18189903Sjkim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19189903Sjkim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20189903Sjkim * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21189903Sjkim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22189903Sjkim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23189903Sjkim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24189903Sjkim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25189903Sjkim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26189903Sjkim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27189903Sjkim * SUCH DAMAGE. 28189903Sjkim * 29189903Sjkim * $FreeBSD$ 30189903Sjkim */ 31189903Sjkim 32189903Sjkim#include <machine/asmacros.h> 33232081Sjkim#include <machine/ppireg.h> 34189903Sjkim#include <machine/specialreg.h> 35232081Sjkim#include <machine/timerreg.h> 36189903Sjkim 37189903Sjkim#include "assym.s" 38189903Sjkim 39189903Sjkim/* 40189903Sjkim * Resume entry point for real mode. 41189903Sjkim * 42189903Sjkim * If XFirmwareWakingVector is zero and FirmwareWakingVector is non-zero 43189903Sjkim * in FACS, the BIOS enters here in real mode after POST with CS set to 44189903Sjkim * (FirmwareWakingVector >> 4) and IP set to (FirmwareWakingVector & 0xf). 45189903Sjkim * Depending on the previous sleep state, we may need to initialize more 46189903Sjkim * of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk). 47189903Sjkim * 48189903Sjkim * Note: If XFirmwareWakingVector is non-zero, it should disable address 49189903Sjkim * translation/paging and interrupts, load all segment registers with 50189903Sjkim * a flat 4 GB address space, and set EFLAGS.IF to zero. Currently 51189903Sjkim * this mode is not supported by this code. 52189903Sjkim */ 53189903Sjkim 54189903Sjkim .data /* So we can modify it */ 55189903Sjkim 56189903Sjkim ALIGN_TEXT 57197863Sjkim .code16 58189903Sjkimwakeup_start: 59189903Sjkim /* 60189903Sjkim * Set up segment registers for real mode, a small stack for 61189903Sjkim * any calls we make, and clear any flags. 62189903Sjkim */ 63189903Sjkim cli /* make sure no interrupts */ 64189903Sjkim mov %cs, %ax /* copy %cs to %ds. Remember these */ 65189903Sjkim mov %ax, %ds /* are offsets rather than selectors */ 66189903Sjkim mov %ax, %ss 67197863Sjkim movw $PAGE_SIZE, %sp 68190341Sjkim xorw %ax, %ax 69190341Sjkim pushw %ax 70189903Sjkim popfw 71189903Sjkim 72189903Sjkim /* To debug resume hangs, beep the speaker if the user requested. */ 73190341Sjkim testb $~0, resume_beep - wakeup_start 74190341Sjkim jz 1f 75190341Sjkim movb $0, resume_beep - wakeup_start 76232081Sjkim 77232081Sjkim /* Set PIC timer2 to beep. */ 78232081Sjkim movb $(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT), %al 79232081Sjkim outb %al, $TIMER_MODE 80232081Sjkim 81232081Sjkim /* Turn on speaker. */ 82232081Sjkim inb $IO_PPI, %al 83232081Sjkim orb $PIT_SPKR, %al 84232081Sjkim outb %al, $IO_PPI 85232081Sjkim 86232081Sjkim /* Set frequency. */ 87232081Sjkim movw $0x4c0, %ax 88232081Sjkim outb %al, $TIMER_CNTR2 89232081Sjkim shrw $8, %ax 90232081Sjkim outb %al, $TIMER_CNTR2 91189903Sjkim1: 92189903Sjkim 93189903Sjkim /* Re-initialize video BIOS if the reset_video tunable is set. */ 94190341Sjkim testb $~0, reset_video - wakeup_start 95190341Sjkim jz 1f 96190341Sjkim movb $0, reset_video - wakeup_start 97189903Sjkim lcall $0xc000, $3 98189903Sjkim 99198422Sjkim /* When we reach here, int 0x10 should be ready. Hide cursor. */ 100198422Sjkim movb $0x01, %ah 101198422Sjkim movb $0x20, %ch 102198422Sjkim int $0x10 103198422Sjkim 104190341Sjkim /* Re-start in case the previous BIOS call clobbers them. */ 105190341Sjkim jmp wakeup_start 106189903Sjkim1: 107189903Sjkim 108189903Sjkim /* 109189903Sjkim * Find relocation base and patch the gdt descript and ljmp targets 110189903Sjkim */ 111189903Sjkim xorl %ebx, %ebx 112189903Sjkim mov %cs, %bx 113189903Sjkim sall $4, %ebx /* %ebx is now our relocation base */ 114189903Sjkim 115189903Sjkim /* 116189903Sjkim * Load the descriptor table pointer. We'll need it when running 117189903Sjkim * in 16-bit protected mode. 118189903Sjkim */ 119189903Sjkim lgdtl bootgdtdesc - wakeup_start 120189903Sjkim 121189903Sjkim /* Enable protected mode */ 122189903Sjkim movl $CR0_PE, %eax 123189903Sjkim mov %eax, %cr0 124189903Sjkim 125189903Sjkim /* 126189903Sjkim * Now execute a far jump to turn on protected mode. This 127189903Sjkim * causes the segment registers to turn into selectors and causes 128189903Sjkim * %cs to be loaded from the gdt. 129189903Sjkim * 130189903Sjkim * The following instruction is: 131189903Sjkim * ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start 132189903Sjkim * but gas cannot assemble that. And besides, we patch the targets 133189903Sjkim * in early startup and its a little clearer what we are patching. 134189903Sjkim */ 135189903Sjkimwakeup_sw32: 136189903Sjkim .byte 0x66 /* size override to 32 bits */ 137189903Sjkim .byte 0xea /* opcode for far jump */ 138189903Sjkim .long wakeup_32 - wakeup_start /* offset in segment */ 139189903Sjkim .word bootcode32 - bootgdt /* index in gdt for 32 bit code */ 140189903Sjkim 141189903Sjkim /* 142189903Sjkim * At this point, we are running in 32 bit legacy protected mode. 143189903Sjkim */ 144197863Sjkim ALIGN_TEXT 145189903Sjkim .code32 146189903Sjkimwakeup_32: 147189903Sjkim 148189903Sjkim mov $bootdata32 - bootgdt, %eax 149189903Sjkim mov %ax, %ds 150189903Sjkim 151189903Sjkim /* Turn on the PAE and PSE bits for when paging is enabled */ 152189903Sjkim mov %cr4, %eax 153189903Sjkim orl $(CR4_PAE | CR4_PSE), %eax 154189903Sjkim mov %eax, %cr4 155189903Sjkim 156189903Sjkim /* 157189903Sjkim * Enable EFER.LME so that we get long mode when all the prereqs are 158189903Sjkim * in place. In this case, it turns on when CR0_PG is finally enabled. 159189903Sjkim * Pick up a few other EFER bits that we'll use need we're here. 160189903Sjkim */ 161189903Sjkim movl $MSR_EFER, %ecx 162189903Sjkim rdmsr 163189903Sjkim orl $EFER_LME | EFER_SCE, %eax 164189903Sjkim wrmsr 165189903Sjkim 166189903Sjkim /* 167189903Sjkim * Point to the embedded page tables for startup. Note that this 168189903Sjkim * only gets accessed after we're actually in 64 bit mode, however 169189903Sjkim * we can only set the bottom 32 bits of %cr3 in this state. This 170189903Sjkim * means we are required to use a temporary page table that is below 171189903Sjkim * the 4GB limit. %ebx is still our relocation base. We could just 172189903Sjkim * subtract 3 * PAGE_SIZE, but that would be too easy. 173189903Sjkim */ 174189903Sjkim leal wakeup_pagetables - wakeup_start(%ebx), %eax 175189903Sjkim movl (%eax), %eax 176189903Sjkim mov %eax, %cr3 177189903Sjkim 178189903Sjkim /* 179189903Sjkim * Finally, switch to long bit mode by enabling paging. We have 180189903Sjkim * to be very careful here because all the segmentation disappears 181189903Sjkim * out from underneath us. The spec says we can depend on the 182189903Sjkim * subsequent pipelined branch to execute, but *only if* everthing 183189903Sjkim * is still identity mapped. If any mappings change, the pipeline 184189903Sjkim * will flush. 185189903Sjkim */ 186189903Sjkim mov %cr0, %eax 187189903Sjkim orl $CR0_PG, %eax 188189903Sjkim mov %eax, %cr0 189189903Sjkim 190189903Sjkim /* 191189903Sjkim * At this point paging is enabled, and we are in "compatability" mode. 192189903Sjkim * We do another far jump to reload %cs with the 64 bit selector. 193189903Sjkim * %cr3 points to a 4-level page table page. 194189903Sjkim * We cannot yet jump all the way to the kernel because we can only 195189903Sjkim * specify a 32 bit linear address. So, yet another trampoline. 196189903Sjkim * 197189903Sjkim * The following instruction is: 198189903Sjkim * ljmp $bootcode64 - bootgdt, $wakeup_64 - wakeup_start 199189903Sjkim * but gas cannot assemble that. And besides, we patch the targets 200189903Sjkim * in early startup and its a little clearer what we are patching. 201189903Sjkim */ 202189903Sjkimwakeup_sw64: 203189903Sjkim .byte 0xea /* opcode for far jump */ 204189903Sjkim .long wakeup_64 - wakeup_start /* offset in segment */ 205189903Sjkim .word bootcode64 - bootgdt /* index in gdt for 64 bit code */ 206189903Sjkim 207189903Sjkim /* 208189903Sjkim * Yeehar! We're running in 64-bit mode! We can mostly ignore our 209189903Sjkim * segment registers, and get on with it. 210189903Sjkim * Note that we are running at the correct virtual address, but with 211189903Sjkim * a 1:1 1GB mirrored mapping over entire address space. We had better 212189903Sjkim * switch to a real %cr3 promptly so that we can get to the direct map 213189903Sjkim * space. Remember that jmp is relative and that we've been relocated, 214189903Sjkim * so use an indirect jump. 215189903Sjkim */ 216190341Sjkim ALIGN_TEXT 217189903Sjkim .code64 218189903Sjkimwakeup_64: 219189903Sjkim mov $bootdata64 - bootgdt, %eax 220189903Sjkim mov %ax, %ds 221189903Sjkim 222189903Sjkim /* Restore arguments and return. */ 223210804Sjkim movq wakeup_kpml4 - wakeup_start(%rbx), %rdi 224210804Sjkim movq wakeup_ctx - wakeup_start(%rbx), %rsi 225189903Sjkim movq wakeup_retaddr - wakeup_start(%rbx), %rax 226189903Sjkim jmp *%rax 227189903Sjkim 228190341Sjkim .data 229190341Sjkim 230190341Sjkimresume_beep: 231190341Sjkim .byte 0 232190341Sjkimreset_video: 233190341Sjkim .byte 0 234190341Sjkim 235189903Sjkim ALIGN_DATA 236189903Sjkimbootgdt: 237189903Sjkim .long 0x00000000 238189903Sjkim .long 0x00000000 239190635Sjkim .long 0x00000000 240190635Sjkim .long 0x00000000 241190635Sjkim .long 0x00000000 242190635Sjkim .long 0x00000000 243190635Sjkim .long 0x00000000 244190635Sjkim .long 0x00000000 245189903Sjkim 246189903Sjkimbootcode64: 247189903Sjkim .long 0x0000ffff 248189903Sjkim .long 0x00af9b00 249189903Sjkim 250189903Sjkimbootdata64: 251189903Sjkim .long 0x0000ffff 252189903Sjkim .long 0x00af9300 253189903Sjkim 254189903Sjkimbootcode32: 255189903Sjkim .long 0x0000ffff 256189903Sjkim .long 0x00cf9b00 257189903Sjkim 258189903Sjkimbootdata32: 259189903Sjkim .long 0x0000ffff 260189903Sjkim .long 0x00cf9300 261189903Sjkimbootgdtend: 262189903Sjkim 263189903Sjkimwakeup_pagetables: 264189903Sjkim .long 0 265189903Sjkim 266189903Sjkimbootgdtdesc: 267189903Sjkim .word bootgdtend - bootgdt /* Length */ 268189903Sjkim .long bootgdt - wakeup_start /* Offset plus %ds << 4 */ 269189903Sjkim 270189903Sjkim ALIGN_DATA 271189903Sjkimwakeup_retaddr: 272189903Sjkim .quad 0 273189903Sjkimwakeup_kpml4: 274189903Sjkim .quad 0 275189903Sjkim 276189903Sjkimwakeup_ctx: 277189903Sjkim .quad 0 278210777Sjkimwakeup_pcb: 279189903Sjkim .quad 0 280232075Sjkimwakeup_fpusave: 281232075Sjkim .quad 0 282189903Sjkimwakeup_gdt: 283189903Sjkim .word 0 284189903Sjkim .quad 0 285190635Sjkim 286190635Sjkim ALIGN_DATA 287189903Sjkimwakeup_efer: 288189903Sjkim .quad 0 289189903Sjkimwakeup_star: 290189903Sjkim .quad 0 291189903Sjkimwakeup_lstar: 292189903Sjkim .quad 0 293189903Sjkimwakeup_cstar: 294189903Sjkim .quad 0 295189903Sjkimwakeup_sfmask: 296189903Sjkim .quad 0 297232076Sjkimwakeup_xsmask: 298232076Sjkim .quad 0 299189903Sjkimwakeup_cpu: 300189903Sjkim .long 0 301189903Sjkimdummy: 302