167117Sdfr.file "__divdi3.s"
267117Sdfr
367117Sdfr//
467117Sdfr// Copyright (c) 2000, Intel Corporation
567117Sdfr// All rights reserved.
667117Sdfr//
767117Sdfr// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
867117Sdfr// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
967117Sdfr// Intel Corporation.
1067117Sdfr//
1167117Sdfr// WARRANTY DISCLAIMER
1267117Sdfr//
1367117Sdfr// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1467117Sdfr// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1567117Sdfr// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1667117Sdfr// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
1767117Sdfr// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
1867117Sdfr// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
1967117Sdfr// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
2067117Sdfr// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
2167117Sdfr// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
2267117Sdfr// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2367117Sdfr// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2467117Sdfr//
2567117Sdfr// Intel Corporation is the author of this code, and requests that all
2667117Sdfr// problem reports or change requests be submitted to it directly at
2767117Sdfr// http://developer.intel.com/opensource.
2867117Sdfr//
2967117Sdfr
30111777Sobrien#include <machine/asm.h>
31111777Sobrien__FBSDID("$FreeBSD$");
32111777Sobrien
3367117Sdfr.section .text
3467117Sdfr.proc __divdi3#
3567117Sdfr.align 32
3667117Sdfr.global __divdi3#
3767117Sdfr.align 32
3867117Sdfr
3967117Sdfr// 64-bit signed integer divide
4067117Sdfr
4167117Sdfr__divdi3:
4267117Sdfr
4367117Sdfr{ .mii
4467117Sdfr  alloc r31=ar.pfs,2,0,0,0
4567117Sdfr  nop.i 0
4667117Sdfr  nop.i 0;;
4767117Sdfr} { .mmi
4867117Sdfr
4967117Sdfr  // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE
5067117Sdfr
5167117Sdfr  setf.sig f8=r32
5267117Sdfr  setf.sig f9=r33
5367117Sdfr  nop.i 0;;
5467117Sdfr} { .mfb
5567117Sdfr  nop.m 0
5667117Sdfr  fcvt.xf f6=f8
5767117Sdfr  nop.b 0
5867117Sdfr} { .mfb
5967117Sdfr  nop.m 0
6067117Sdfr  fcvt.xf f7=f9
6167117Sdfr  nop.b 0;;
6267117Sdfr} { .mfi
6367117Sdfr  nop.m 0
6467117Sdfr  // Step (1)
6567117Sdfr  // y0 = 1 / b in f8
6667117Sdfr  frcpa.s1 f8,p6=f6,f7
6767117Sdfr  nop.i 0;;
6867117Sdfr} { .mfi
6967117Sdfr  nop.m 0
7067117Sdfr  // Step (2)
7167117Sdfr  // e0 = 1 - b * y0 in f9
7267117Sdfr  (p6) fnma.s1 f9=f7,f8,f1
7367117Sdfr  nop.i 0
7467117Sdfr} { .mfi
7567117Sdfr  nop.m 0
7667117Sdfr  // Step (3)
7767117Sdfr  // q0 = a * y0 in f10
7867117Sdfr  (p6) fma.s1 f10=f6,f8,f0
7967117Sdfr  nop.i 0;;
8067117Sdfr} { .mfi
8167117Sdfr  nop.m 0
8267117Sdfr  // Step (4)
8367117Sdfr  // e1 = e0 * e0 in f11
8467117Sdfr  (p6) fma.s1 f11=f9,f9,f0
8567117Sdfr  nop.i 0
8667117Sdfr} { .mfi
8767117Sdfr  nop.m 0
8867117Sdfr  // Step (5)
8967117Sdfr  // q1 = q0 + e0 * q0 in f10
9067117Sdfr  (p6) fma.s1 f10=f9,f10,f10
9167117Sdfr  nop.i 0;;
9267117Sdfr} { .mfi
9367117Sdfr  nop.m 0
9467117Sdfr  // Step (6)
9567117Sdfr  // y1 = y0 + e0 * y0 in f8
9667117Sdfr  (p6) fma.s1 f8=f9,f8,f8
9767117Sdfr  nop.i 0;;
9867117Sdfr} { .mfi
9967117Sdfr  nop.m 0
10067117Sdfr  // Step (7)
10167117Sdfr  // q2 = q1 + e1 * q1 in f9
10267117Sdfr  (p6) fma.s1 f9=f11,f10,f10
10367117Sdfr  nop.i 0;;
10467117Sdfr} { .mfi
10567117Sdfr  nop.m 0
10667117Sdfr  // Step (8)
10767117Sdfr  // y2 = y1 + e1 * y1 in f8
10867117Sdfr  (p6) fma.s1 f8=f11,f8,f8
10967117Sdfr  nop.i 0;;
11067117Sdfr} { .mfi
11167117Sdfr  nop.m 0
11267117Sdfr  // Step (9)
11367117Sdfr  // r2 = a - b * q2 in f10
11467117Sdfr  (p6) fnma.s1 f10=f7,f9,f6
11567117Sdfr  nop.i 0;;
11667117Sdfr} { .mfi
11767117Sdfr  nop.m 0
11867117Sdfr  // Step (10)
11967117Sdfr  // q3 = q2 + r2 * y2 in f8
12067117Sdfr  (p6) fma.s1 f8=f10,f8,f9
12167117Sdfr  nop.i 0;;
12267117Sdfr} { .mfb
12367117Sdfr  nop.m 0
12467117Sdfr  // Step (11)
12567117Sdfr  // q = trunc (q3)
12667117Sdfr  fcvt.fx.trunc.s1 f8=f8
12767117Sdfr  nop.b 0;;
12867117Sdfr} { .mmi
12967117Sdfr  // quotient will be in r8 (if b != 0)
13067117Sdfr  getf.sig r8=f8
13167117Sdfr  nop.m 0
13267117Sdfr  nop.i 0;;
13367117Sdfr}
13467117Sdfr
13567117Sdfr  // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE
13667117Sdfr
13767117Sdfr{ .mmb
13867117Sdfr  nop.m 0
13967117Sdfr  nop.m 0
14067117Sdfr  br.ret.sptk b0;;
14167117Sdfr}
14267117Sdfr
14367117Sdfr.endp __divdi3
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