sha512-ia64.pl revision 160814
1160814Ssimon#!/usr/bin/env perl 2160814Ssimon# 3160814Ssimon# ==================================================================== 4160814Ssimon# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL 5160814Ssimon# project. Rights for redistribution and usage in source and binary 6160814Ssimon# forms are granted according to the OpenSSL license. 7160814Ssimon# ==================================================================== 8160814Ssimon# 9160814Ssimon# SHA256/512_Transform for Itanium. 10160814Ssimon# 11160814Ssimon# sha512_block runs in 1003 cycles on Itanium 2, which is almost 50% 12160814Ssimon# faster than gcc and >60%(!) faster than code generated by HP-UX 13160814Ssimon# compiler (yes, HP-UX is generating slower code, because unlike gcc, 14160814Ssimon# it failed to deploy "shift right pair," 'shrp' instruction, which 15160814Ssimon# substitutes for 64-bit rotate). 16160814Ssimon# 17160814Ssimon# 924 cycles long sha256_block outperforms gcc by over factor of 2(!) 18160814Ssimon# and HP-UX compiler - by >40% (yes, gcc won sha512_block, but lost 19160814Ssimon# this one big time). Note that "formally" 924 is about 100 cycles 20160814Ssimon# too much. I mean it's 64 32-bit rounds vs. 80 virtually identical 21160814Ssimon# 64-bit ones and 1003*64/80 gives 802. Extra cycles, 2 per round, 22160814Ssimon# are spent on extra work to provide for 32-bit rotations. 32-bit 23160814Ssimon# rotations are still handled by 'shrp' instruction and for this 24160814Ssimon# reason lower 32 bits are deposited to upper half of 64-bit register 25160814Ssimon# prior 'shrp' issue. And in order to minimize the amount of such 26160814Ssimon# operations, X[16] values are *maintained* with copies of lower 27160814Ssimon# halves in upper halves, which is why you'll spot such instructions 28160814Ssimon# as custom 'mux2', "parallel 32-bit add," 'padd4' and "parallel 29160814Ssimon# 32-bit unsigned right shift," 'pshr4.u' instructions here. 30160814Ssimon# 31160814Ssimon# Rules of engagement. 32160814Ssimon# 33160814Ssimon# There is only one integer shifter meaning that if I have two rotate, 34160814Ssimon# deposit or extract instructions in adjacent bundles, they shall 35160814Ssimon# split [at run-time if they have to]. But note that variable and 36160814Ssimon# parallel shifts are performed by multi-media ALU and *are* pairable 37160814Ssimon# with rotates [and alike]. On the backside MMALU is rather slow: it 38160814Ssimon# takes 2 extra cycles before the result of integer operation is 39160814Ssimon# available *to* MMALU and 2(*) extra cycles before the result of MM 40160814Ssimon# operation is available "back" *to* integer ALU, not to mention that 41160814Ssimon# MMALU itself has 2 cycles latency. However! I explicitly scheduled 42160814Ssimon# these MM instructions to avoid MM stalls, so that all these extra 43160814Ssimon# latencies get "hidden" in instruction-level parallelism. 44160814Ssimon# 45160814Ssimon# (*) 2 cycles on Itanium 1 and 1 cycle on Itanium 2. But I schedule 46160814Ssimon# for 2 in order to provide for best *overall* performance, 47160814Ssimon# because on Itanium 1 stall on MM result is accompanied by 48160814Ssimon# pipeline flush, which takes 6 cycles:-( 49160814Ssimon# 50160814Ssimon# Resulting performance numbers for 900MHz Itanium 2 system: 51160814Ssimon# 52160814Ssimon# The 'numbers' are in 1000s of bytes per second processed. 53160814Ssimon# type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 54160814Ssimon# sha1(*) 6210.14k 20376.30k 52447.83k 85870.05k 105478.12k 55160814Ssimon# sha256 7476.45k 20572.05k 41538.34k 56062.29k 62093.18k 56160814Ssimon# sha512 4996.56k 20026.28k 47597.20k 85278.79k 111501.31k 57160814Ssimon# 58160814Ssimon# (*) SHA1 numbers are for HP-UX compiler and are presented purely 59160814Ssimon# for reference purposes. I bet it can improved too... 60160814Ssimon# 61160814Ssimon# To generate code, pass the file name with either 256 or 512 in its 62160814Ssimon# name and compiler flags. 63160814Ssimon 64160814Ssimon$output=shift; 65160814Ssimon 66160814Ssimonif ($output =~ /512.*\.[s|asm]/) { 67160814Ssimon $SZ=8; 68160814Ssimon $BITS=8*$SZ; 69160814Ssimon $LDW="ld8"; 70160814Ssimon $STW="st8"; 71160814Ssimon $ADD="add"; 72160814Ssimon $SHRU="shr.u"; 73160814Ssimon $TABLE="K512"; 74160814Ssimon $func="sha512_block"; 75160814Ssimon @Sigma0=(28,34,39); 76160814Ssimon @Sigma1=(14,18,41); 77160814Ssimon @sigma0=(1, 8, 7); 78160814Ssimon @sigma1=(19,61, 6); 79160814Ssimon $rounds=80; 80160814Ssimon} elsif ($output =~ /256.*\.[s|asm]/) { 81160814Ssimon $SZ=4; 82160814Ssimon $BITS=8*$SZ; 83160814Ssimon $LDW="ld4"; 84160814Ssimon $STW="st4"; 85160814Ssimon $ADD="padd4"; 86160814Ssimon $SHRU="pshr4.u"; 87160814Ssimon $TABLE="K256"; 88160814Ssimon $func="sha256_block"; 89160814Ssimon @Sigma0=( 2,13,22); 90160814Ssimon @Sigma1=( 6,11,25); 91160814Ssimon @sigma0=( 7,18, 3); 92160814Ssimon @sigma1=(17,19,10); 93160814Ssimon $rounds=64; 94160814Ssimon} else { die "nonsense $output"; } 95160814Ssimon 96160814Ssimonopen STDOUT,">$output" || die "can't open $output: $!"; 97160814Ssimon 98160814Ssimonif ($^O eq "hpux") { 99160814Ssimon $ADDP="addp4"; 100160814Ssimon for (@ARGV) { $ADDP="add" if (/[\+DD|\-mlp]64/); } 101160814Ssimon} else { $ADDP="add"; } 102160814Ssimonfor (@ARGV) { $big_endian=1 if (/\-DB_ENDIAN/); 103160814Ssimon $big_endian=0 if (/\-DL_ENDIAN/); } 104160814Ssimonif (!defined($big_endian)) 105160814Ssimon { $big_endian=(unpack('L',pack('N',1))==1); } 106160814Ssimon 107160814Ssimon$code=<<___; 108160814Ssimon.ident \"$output, version 1.0\" 109160814Ssimon.ident \"IA-64 ISA artwork by Andy Polyakov <appro\@fy.chalmers.se>\" 110160814Ssimon.explicit 111160814Ssimon.text 112160814Ssimon 113160814Ssimonprsave=r14; 114160814SsimonK=r15; 115160814SsimonA=r16; B=r17; C=r18; D=r19; 116160814SsimonE=r20; F=r21; G=r22; H=r23; 117160814SsimonT1=r24; T2=r25; 118160814Ssimons0=r26; s1=r27; t0=r28; t1=r29; 119160814SsimonKtbl=r30; 120160814Ssimonctx=r31; // 1st arg 121160814Ssimoninput=r48; // 2nd arg 122160814Ssimonnum=r49; // 3rd arg 123160814Ssimonsgm0=r50; sgm1=r51; // small constants 124160814Ssimon 125160814Ssimon// void $func (SHA_CTX *ctx, const void *in,size_t num[,int host]) 126160814Ssimon.global $func# 127160814Ssimon.proc $func# 128160814Ssimon.align 32 129160814Ssimon$func: 130160814Ssimon .prologue 131160814Ssimon .fframe 0 132160814Ssimon .save ar.pfs,r2 133160814Ssimon .save ar.lc,r3 134160814Ssimon .save pr,prsave 135160814Ssimon{ .mmi; alloc r2=ar.pfs,3,17,0,16 136160814Ssimon $ADDP ctx=0,r32 // 1st arg 137160814Ssimon mov r3=ar.lc } 138160814Ssimon{ .mmi; $ADDP input=0,r33 // 2nd arg 139160814Ssimon addl Ktbl=\@ltoff($TABLE#),gp 140160814Ssimon mov prsave=pr };; 141160814Ssimon 142160814Ssimon .body 143160814Ssimon{ .mii; ld8 Ktbl=[Ktbl] 144160814Ssimon mov num=r34 };; // 3rd arg 145160814Ssimon 146160814Ssimon{ .mib; add r8=0*$SZ,ctx 147160814Ssimon add r9=1*$SZ,ctx 148160814Ssimon brp.loop.imp .L_first16,.L_first16_ctop 149160814Ssimon } 150160814Ssimon{ .mib; add r10=2*$SZ,ctx 151160814Ssimon add r11=3*$SZ,ctx 152160814Ssimon brp.loop.imp .L_rest,.L_rest_ctop 153160814Ssimon };; 154160814Ssimon// load A-H 155160814Ssimon{ .mmi; $LDW A=[r8],4*$SZ 156160814Ssimon $LDW B=[r9],4*$SZ 157160814Ssimon mov sgm0=$sigma0[2] } 158160814Ssimon{ .mmi; $LDW C=[r10],4*$SZ 159160814Ssimon $LDW D=[r11],4*$SZ 160160814Ssimon mov sgm1=$sigma1[2] };; 161160814Ssimon{ .mmi; $LDW E=[r8] 162160814Ssimon $LDW F=[r9] } 163160814Ssimon{ .mmi; $LDW G=[r10] 164160814Ssimon $LDW H=[r11] 165160814Ssimon cmp.ne p15,p14=0,r35 };; // used in sha256_block 166160814Ssimon 167160814Ssimon.L_outer: 168160814Ssimon{ .mii; mov ar.lc=15 169160814Ssimon mov ar.ec=1 };; 170160814Ssimon.align 32 171160814Ssimon.L_first16: 172160814Ssimon.rotr X[16] 173160814Ssimon___ 174160814Ssimon$t0="t0", $t1="t1", $code.=<<___ if ($BITS==32); 175160814Ssimon{ .mib; (p14) add r9=1,input 176160814Ssimon (p14) add r10=2,input } 177160814Ssimon{ .mib; (p14) add r11=3,input 178160814Ssimon (p15) br.dptk.few .L_host };; 179160814Ssimon{ .mmi; (p14) ld1 r8=[input],$SZ 180160814Ssimon (p14) ld1 r9=[r9] } 181160814Ssimon{ .mmi; (p14) ld1 r10=[r10] 182160814Ssimon (p14) ld1 r11=[r11] };; 183160814Ssimon{ .mii; (p14) dep r9=r8,r9,8,8 184160814Ssimon (p14) dep r11=r10,r11,8,8 };; 185160814Ssimon{ .mib; (p14) dep X[15]=r9,r11,16,16 };; 186160814Ssimon.L_host: 187160814Ssimon{ .mib; (p15) $LDW X[15]=[input],$SZ // X[i]=*input++ 188160814Ssimon dep.z $t1=E,32,32 } 189160814Ssimon{ .mib; $LDW K=[Ktbl],$SZ 190160814Ssimon zxt4 E=E };; 191160814Ssimon{ .mmi; or $t1=$t1,E 192160814Ssimon and T1=F,E 193160814Ssimon and T2=A,B } 194160814Ssimon{ .mmi; andcm r8=G,E 195160814Ssimon and r9=A,C 196160814Ssimon mux2 $t0=A,0x44 };; // copy lower half to upper 197160814Ssimon{ .mib; xor T1=T1,r8 // T1=((e & f) ^ (~e & g)) 198160814Ssimon _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14) 199160814Ssimon{ .mib; and r10=B,C 200160814Ssimon xor T2=T2,r9 };; 201160814Ssimon___ 202160814Ssimon$t0="A", $t1="E", $code.=<<___ if ($BITS==64); 203160814Ssimon{ .mmi; $LDW X[15]=[input],$SZ // X[i]=*input++ 204160814Ssimon and T1=F,E 205160814Ssimon and T2=A,B } 206160814Ssimon{ .mmi; $LDW K=[Ktbl],$SZ 207160814Ssimon andcm r8=G,E 208160814Ssimon and r9=A,C };; 209160814Ssimon{ .mmi; xor T1=T1,r8 //T1=((e & f) ^ (~e & g)) 210160814Ssimon and r10=B,C 211160814Ssimon _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14) 212160814Ssimon{ .mmi; xor T2=T2,r9 213160814Ssimon mux1 X[15]=X[15],\@rev };; // eliminated in big-endian 214160814Ssimon___ 215160814Ssimon$code.=<<___; 216160814Ssimon{ .mib; add T1=T1,H // T1=Ch(e,f,g)+h 217160814Ssimon _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18) 218160814Ssimon{ .mib; xor T2=T2,r10 // T2=((a & b) ^ (a & c) ^ (b & c)) 219160814Ssimon mov H=G };; 220160814Ssimon{ .mib; xor r11=r8,r11 221160814Ssimon _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41) 222160814Ssimon{ .mib; mov G=F 223160814Ssimon mov F=E };; 224160814Ssimon{ .mib; xor r9=r9,r11 // r9=Sigma1(e) 225160814Ssimon _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28) 226160814Ssimon{ .mib; add T1=T1,K // T1=Ch(e,f,g)+h+K512[i] 227160814Ssimon mov E=D };; 228160814Ssimon{ .mib; add T1=T1,r9 // T1+=Sigma1(e) 229160814Ssimon _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34) 230160814Ssimon{ .mib; mov D=C 231160814Ssimon mov C=B };; 232160814Ssimon{ .mib; add T1=T1,X[15] // T1+=X[i] 233160814Ssimon _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39) 234160814Ssimon{ .mib; xor r10=r10,r11 235160814Ssimon mux2 X[15]=X[15],0x44 };; // eliminated in 64-bit 236160814Ssimon{ .mmi; xor r10=r8,r10 // r10=Sigma0(a) 237160814Ssimon mov B=A 238160814Ssimon add A=T1,T2 };; 239160814Ssimon.L_first16_ctop: 240160814Ssimon{ .mib; add E=E,T1 241160814Ssimon add A=A,r10 // T2=Maj(a,b,c)+Sigma0(a) 242160814Ssimon br.ctop.sptk .L_first16 };; 243160814Ssimon 244160814Ssimon{ .mib; mov ar.lc=$rounds-17 } 245160814Ssimon{ .mib; mov ar.ec=1 };; 246160814Ssimon.align 32 247160814Ssimon.L_rest: 248160814Ssimon.rotr X[16] 249160814Ssimon{ .mib; $LDW K=[Ktbl],$SZ 250160814Ssimon _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1) 251160814Ssimon{ .mib; $ADD X[15]=X[15],X[15-9] // X[i&0xF]+=X[(i+9)&0xF] 252160814Ssimon $SHRU s0=X[15-1],sgm0 };; // s0=X[(i+1)&0xF]>>7 253160814Ssimon{ .mib; and T1=F,E 254160814Ssimon _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8) 255160814Ssimon{ .mib; andcm r10=G,E 256160814Ssimon $SHRU s1=X[15-14],sgm1 };; // s1=X[(i+14)&0xF]>>6 257160814Ssimon{ .mmi; xor T1=T1,r10 // T1=((e & f) ^ (~e & g)) 258160814Ssimon xor r9=r8,r9 259160814Ssimon _rotr r10=X[15-14],$sigma1[0] };;// ROTR(s1,19) 260160814Ssimon{ .mib; and T2=A,B 261160814Ssimon _rotr r11=X[15-14],$sigma1[1] }// ROTR(s1,61) 262160814Ssimon{ .mib; and r8=A,C };; 263160814Ssimon___ 264160814Ssimon$t0="t0", $t1="t1", $code.=<<___ if ($BITS==32); 265160814Ssimon// I adhere to mmi; in order to hold Itanium 1 back and avoid 6 cycle 266160814Ssimon// pipeline flush in last bundle. Note that even on Itanium2 the 267160814Ssimon// latter stalls for one clock cycle... 268160814Ssimon{ .mmi; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF]) 269160814Ssimon dep.z $t1=E,32,32 } 270160814Ssimon{ .mmi; xor r10=r11,r10 271160814Ssimon zxt4 E=E };; 272160814Ssimon{ .mmi; or $t1=$t1,E 273160814Ssimon xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF]) 274160814Ssimon mux2 $t0=A,0x44 };; // copy lower half to upper 275160814Ssimon{ .mmi; xor T2=T2,r8 276160814Ssimon _rotr r9=$t1,$Sigma1[0] } // ROTR(e,14) 277160814Ssimon{ .mmi; and r10=B,C 278160814Ssimon add T1=T1,H // T1=Ch(e,f,g)+h 279160814Ssimon $ADD X[15]=X[15],s0 };; // X[i&0xF]+=sigma0(X[(i+1)&0xF]) 280160814Ssimon___ 281160814Ssimon$t0="A", $t1="E", $code.=<<___ if ($BITS==64); 282160814Ssimon{ .mib; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF]) 283160814Ssimon _rotr r9=$t1,$Sigma1[0] } // ROTR(e,14) 284160814Ssimon{ .mib; xor r10=r11,r10 285160814Ssimon xor T2=T2,r8 };; 286160814Ssimon{ .mib; xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF]) 287160814Ssimon add T1=T1,H } 288160814Ssimon{ .mib; and r10=B,C 289160814Ssimon $ADD X[15]=X[15],s0 };; // X[i&0xF]+=sigma0(X[(i+1)&0xF]) 290160814Ssimon___ 291160814Ssimon$code.=<<___; 292160814Ssimon{ .mmi; xor T2=T2,r10 // T2=((a & b) ^ (a & c) ^ (b & c)) 293160814Ssimon mov H=G 294160814Ssimon _rotr r8=$t1,$Sigma1[1] };; // ROTR(e,18) 295160814Ssimon{ .mmi; xor r11=r8,r9 296160814Ssimon $ADD X[15]=X[15],s1 // X[i&0xF]+=sigma1(X[(i+14)&0xF]) 297160814Ssimon _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41) 298160814Ssimon{ .mmi; mov G=F 299160814Ssimon mov F=E };; 300160814Ssimon{ .mib; xor r9=r9,r11 // r9=Sigma1(e) 301160814Ssimon _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28) 302160814Ssimon{ .mib; add T1=T1,K // T1=Ch(e,f,g)+h+K512[i] 303160814Ssimon mov E=D };; 304160814Ssimon{ .mib; add T1=T1,r9 // T1+=Sigma1(e) 305160814Ssimon _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34) 306160814Ssimon{ .mib; mov D=C 307160814Ssimon mov C=B };; 308160814Ssimon{ .mmi; add T1=T1,X[15] // T1+=X[i] 309160814Ssimon xor r10=r10,r11 310160814Ssimon _rotr r8=$t0,$Sigma0[2] };; // ROTR(a,39) 311160814Ssimon{ .mmi; xor r10=r8,r10 // r10=Sigma0(a) 312160814Ssimon mov B=A 313160814Ssimon add A=T1,T2 };; 314160814Ssimon.L_rest_ctop: 315160814Ssimon{ .mib; add E=E,T1 316160814Ssimon add A=A,r10 // T2=Maj(a,b,c)+Sigma0(a) 317160814Ssimon br.ctop.sptk .L_rest };; 318160814Ssimon 319160814Ssimon{ .mib; add r8=0*$SZ,ctx 320160814Ssimon add r9=1*$SZ,ctx } 321160814Ssimon{ .mib; add r10=2*$SZ,ctx 322160814Ssimon add r11=3*$SZ,ctx };; 323160814Ssimon{ .mmi; $LDW r32=[r8],4*$SZ 324160814Ssimon $LDW r33=[r9],4*$SZ } 325160814Ssimon{ .mmi; $LDW r34=[r10],4*$SZ 326160814Ssimon $LDW r35=[r11],4*$SZ 327160814Ssimon cmp.ltu p6,p7=1,num };; 328160814Ssimon{ .mmi; $LDW r36=[r8],-4*$SZ 329160814Ssimon $LDW r37=[r9],-4*$SZ 330160814Ssimon(p6) add Ktbl=-$SZ*$rounds,Ktbl } 331160814Ssimon{ .mmi; $LDW r38=[r10],-4*$SZ 332160814Ssimon $LDW r39=[r11],-4*$SZ 333160814Ssimon(p7) mov ar.lc=r3 };; 334160814Ssimon{ .mmi; add A=A,r32 335160814Ssimon add B=B,r33 336160814Ssimon add C=C,r34 } 337160814Ssimon{ .mmi; add D=D,r35 338160814Ssimon add E=E,r36 339160814Ssimon add F=F,r37 };; 340160814Ssimon{ .mmi; $STW [r8]=A,4*$SZ 341160814Ssimon $STW [r9]=B,4*$SZ 342160814Ssimon add G=G,r38 } 343160814Ssimon{ .mmi; $STW [r10]=C,4*$SZ 344160814Ssimon $STW [r11]=D,4*$SZ 345160814Ssimon add H=H,r39 };; 346160814Ssimon{ .mmi; $STW [r8]=E 347160814Ssimon $STW [r9]=F 348160814Ssimon(p6) add num=-1,num } 349160814Ssimon{ .mmb; $STW [r10]=G 350160814Ssimon $STW [r11]=H 351160814Ssimon(p6) br.dptk.many .L_outer };; 352160814Ssimon 353160814Ssimon{ .mib; mov pr=prsave,0x1ffff 354160814Ssimon br.ret.sptk.many b0 };; 355160814Ssimon.endp $func# 356160814Ssimon___ 357160814Ssimon 358160814Ssimon$code =~ s/\`([^\`]*)\`/eval $1/gem; 359160814Ssimon$code =~ s/_rotr(\s+)([^=]+)=([^,]+),([0-9]+)/shrp$1$2=$3,$3,$4/gm; 360160814Ssimonif ($BITS==64) { 361160814Ssimon $code =~ s/mux2(\s+)\S+/nop.i$1 0x0/gm; 362160814Ssimon $code =~ s/mux1(\s+)\S+/nop.i$1 0x0/gm if ($big_endian); 363160814Ssimon} 364160814Ssimon 365160814Ssimonprint $code; 366160814Ssimon 367160814Ssimonprint<<___ if ($BITS==32); 368160814Ssimon.align 64 369160814Ssimon.type K256#,\@object 370160814SsimonK256: data4 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 371160814Ssimon data4 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 372160814Ssimon data4 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 373160814Ssimon data4 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 374160814Ssimon data4 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc 375160814Ssimon data4 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da 376160814Ssimon data4 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 377160814Ssimon data4 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 378160814Ssimon data4 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 379160814Ssimon data4 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 380160814Ssimon data4 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 381160814Ssimon data4 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 382160814Ssimon data4 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 383160814Ssimon data4 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 384160814Ssimon data4 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 385160814Ssimon data4 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 386160814Ssimon.size K256#,$SZ*$rounds 387160814Ssimon___ 388160814Ssimonprint<<___ if ($BITS==64); 389160814Ssimon.align 64 390160814Ssimon.type K512#,\@object 391160814SsimonK512: data8 0x428a2f98d728ae22,0x7137449123ef65cd 392160814Ssimon data8 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc 393160814Ssimon data8 0x3956c25bf348b538,0x59f111f1b605d019 394160814Ssimon data8 0x923f82a4af194f9b,0xab1c5ed5da6d8118 395160814Ssimon data8 0xd807aa98a3030242,0x12835b0145706fbe 396160814Ssimon data8 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2 397160814Ssimon data8 0x72be5d74f27b896f,0x80deb1fe3b1696b1 398160814Ssimon data8 0x9bdc06a725c71235,0xc19bf174cf692694 399160814Ssimon data8 0xe49b69c19ef14ad2,0xefbe4786384f25e3 400160814Ssimon data8 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65 401160814Ssimon data8 0x2de92c6f592b0275,0x4a7484aa6ea6e483 402160814Ssimon data8 0x5cb0a9dcbd41fbd4,0x76f988da831153b5 403160814Ssimon data8 0x983e5152ee66dfab,0xa831c66d2db43210 404160814Ssimon data8 0xb00327c898fb213f,0xbf597fc7beef0ee4 405160814Ssimon data8 0xc6e00bf33da88fc2,0xd5a79147930aa725 406160814Ssimon data8 0x06ca6351e003826f,0x142929670a0e6e70 407160814Ssimon data8 0x27b70a8546d22ffc,0x2e1b21385c26c926 408160814Ssimon data8 0x4d2c6dfc5ac42aed,0x53380d139d95b3df 409160814Ssimon data8 0x650a73548baf63de,0x766a0abb3c77b2a8 410160814Ssimon data8 0x81c2c92e47edaee6,0x92722c851482353b 411160814Ssimon data8 0xa2bfe8a14cf10364,0xa81a664bbc423001 412160814Ssimon data8 0xc24b8b70d0f89791,0xc76c51a30654be30 413160814Ssimon data8 0xd192e819d6ef5218,0xd69906245565a910 414160814Ssimon data8 0xf40e35855771202a,0x106aa07032bbd1b8 415160814Ssimon data8 0x19a4c116b8d2d0c8,0x1e376c085141ab53 416160814Ssimon data8 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8 417160814Ssimon data8 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb 418160814Ssimon data8 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3 419160814Ssimon data8 0x748f82ee5defb2fc,0x78a5636f43172f60 420160814Ssimon data8 0x84c87814a1f0ab72,0x8cc702081a6439ec 421160814Ssimon data8 0x90befffa23631e28,0xa4506cebde82bde9 422160814Ssimon data8 0xbef9a3f7b2c67915,0xc67178f2e372532b 423160814Ssimon data8 0xca273eceea26619c,0xd186b8c721c0c207 424160814Ssimon data8 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178 425160814Ssimon data8 0x06f067aa72176fba,0x0a637dc5a2c898a6 426160814Ssimon data8 0x113f9804bef90dae,0x1b710b35131c471b 427160814Ssimon data8 0x28db77f523047d84,0x32caab7b40c72493 428160814Ssimon data8 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c 429160814Ssimon data8 0x4cc5d4becb3e42b6,0x597f299cfc657e2a 430160814Ssimon data8 0x5fcb6fab3ad6faec,0x6c44198c4a475817 431160814Ssimon.size K512#,$SZ*$rounds 432160814Ssimon___ 433