patch-r262261-llvm-r199061-sparc.diff revision 263765
1Pull in r199061 from upstream llvm trunk (by Jakob Stoklund Olesen): 2 3 Handle bundled terminators in isBlockOnlyReachableByFallthrough. 4 5 Targets like SPARC and MIPS have delay slots and normally bundle the 6 delay slot instruction with the corresponding terminator. 7 8 Teach isBlockOnlyReachableByFallthrough to find any MBB operands on 9 bundled terminators so SPARC doesn't need to specialize this function. 10 11Introduced here: http://svn.freebsd.org/changeset/base/262261 12 13Index: test/CodeGen/SPARC/missinglabel.ll 14=================================================================== 15--- test/CodeGen/SPARC/missinglabel.ll 16+++ test/CodeGen/SPARC/missinglabel.ll 17@@ -0,0 +1,23 @@ 18+; RUN: llc < %s -verify-machineinstrs | FileCheck %s 19+target datalayout = "E-m:e-i64:64-n32:64-S128" 20+target triple = "sparc64-unknown-linux-gnu" 21+ 22+define void @f() align 2 { 23+entry: 24+; CHECK: %xcc, .LBB0_1 25+ %cmp = icmp eq i64 undef, 0 26+ br i1 %cmp, label %targetblock, label %cond.false 27+ 28+cond.false: 29+ unreachable 30+ 31+; CHECK: .LBB0_1: ! %targetblock 32+targetblock: 33+ br i1 undef, label %cond.false.i83, label %exit.i85 34+ 35+cond.false.i83: 36+ unreachable 37+ 38+exit.i85: 39+ unreachable 40+} 41Index: lib/Target/Sparc/SparcAsmPrinter.cpp 42=================================================================== 43--- lib/Target/Sparc/SparcAsmPrinter.cpp 44+++ lib/Target/Sparc/SparcAsmPrinter.cpp 45@@ -65,10 +65,6 @@ namespace { 46 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 47 unsigned AsmVariant, const char *ExtraCode, 48 raw_ostream &O); 49- 50- virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) 51- const; 52- 53 }; 54 } // end of anonymous namespace 55 56@@ -390,37 +386,6 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const 57 return false; 58 } 59 60-/// isBlockOnlyReachableByFallthough - Return true if the basic block has 61-/// exactly one predecessor and the control transfer mechanism between 62-/// the predecessor and this block is a fall-through. 63-/// 64-/// This overrides AsmPrinter's implementation to handle delay slots. 65-bool SparcAsmPrinter:: 66-isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { 67- // If this is a landing pad, it isn't a fall through. If it has no preds, 68- // then nothing falls through to it. 69- if (MBB->isLandingPad() || MBB->pred_empty()) 70- return false; 71- 72- // If there isn't exactly one predecessor, it can't be a fall through. 73- MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI; 74- ++PI2; 75- if (PI2 != MBB->pred_end()) 76- return false; 77- 78- // The predecessor has to be immediately before this block. 79- const MachineBasicBlock *Pred = *PI; 80- 81- if (!Pred->isLayoutSuccessor(MBB)) 82- return false; 83- 84- // Check if the last terminator is an unconditional branch. 85- MachineBasicBlock::const_iterator I = Pred->end(); 86- while (I != Pred->begin() && !(--I)->isTerminator()) 87- ; // Noop 88- return I == Pred->end() || !I->isBarrier(); 89-} 90- 91 // Force static initialization. 92 extern "C" void LLVMInitializeSparcAsmPrinter() { 93 RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget); 94Index: lib/CodeGen/AsmPrinter/AsmPrinter.cpp 95=================================================================== 96--- lib/CodeGen/AsmPrinter/AsmPrinter.cpp 97+++ lib/CodeGen/AsmPrinter/AsmPrinter.cpp 98@@ -23,6 +23,7 @@ 99 #include "llvm/CodeGen/MachineConstantPool.h" 100 #include "llvm/CodeGen/MachineFrameInfo.h" 101 #include "llvm/CodeGen/MachineFunction.h" 102+#include "llvm/CodeGen/MachineInstrBundle.h" 103 #include "llvm/CodeGen/MachineJumpTableInfo.h" 104 #include "llvm/CodeGen/MachineLoopInfo.h" 105 #include "llvm/CodeGen/MachineModuleInfo.h" 106@@ -2221,14 +2222,13 @@ isBlockOnlyReachableByFallthrough(const MachineBas 107 if (!MI.isBranch() || MI.isIndirectBranch()) 108 return false; 109 110- // If we are the operands of one of the branches, this is not 111- // a fall through. 112- for (MachineInstr::mop_iterator OI = MI.operands_begin(), 113- OE = MI.operands_end(); OI != OE; ++OI) { 114- const MachineOperand& OP = *OI; 115- if (OP.isJTI()) 116+ // If we are the operands of one of the branches, this is not a fall 117+ // through. Note that targets with delay slots will usually bundle 118+ // terminators with the delay slot instruction. 119+ for (ConstMIBundleOperands OP(&MI); OP.isValid(); ++OP) { 120+ if (OP->isJTI()) 121 return false; 122- if (OP.isMBB() && OP.getMBB() == MBB) 123+ if (OP->isMBB() && OP->getMBB() == MBB) 124 return false; 125 } 126 } 127