XCore.td revision 193323
1193323Sed//===- XCore.td - Describe the XCore Target Machine --------*- tablegen -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// 11193323Sed//===----------------------------------------------------------------------===// 12193323Sed 13193323Sed//===----------------------------------------------------------------------===// 14193323Sed// Target-independent interfaces which we are implementing 15193323Sed//===----------------------------------------------------------------------===// 16193323Sed 17193323Sedinclude "llvm/Target/Target.td" 18193323Sed 19193323Sed//===----------------------------------------------------------------------===// 20193323Sed// Descriptions 21193323Sed//===----------------------------------------------------------------------===// 22193323Sed 23193323Sedinclude "XCoreRegisterInfo.td" 24193323Sedinclude "XCoreInstrInfo.td" 25193323Sedinclude "XCoreCallingConv.td" 26193323Sed 27193323Seddef XCoreInstrInfo : InstrInfo { 28193323Sed let TSFlagsFields = []; 29193323Sed let TSFlagsShifts = []; 30193323Sed} 31193323Sed 32193323Sed//===----------------------------------------------------------------------===// 33193323Sed// XCore Subtarget features. 34193323Sed//===----------------------------------------------------------------------===// 35193323Sed 36193323Seddef FeatureXS1A 37193323Sed : SubtargetFeature<"xs1a", "IsXS1A", "true", 38193323Sed "Enable XS1A instructions">; 39193323Sed 40193323Seddef FeatureXS1B 41193323Sed : SubtargetFeature<"xs1b", "IsXS1B", "true", 42193323Sed "Enable XS1B instructions">; 43193323Sed 44193323Sed//===----------------------------------------------------------------------===// 45193323Sed// XCore processors supported. 46193323Sed//===----------------------------------------------------------------------===// 47193323Sed 48193323Sedclass Proc<string Name, list<SubtargetFeature> Features> 49193323Sed : Processor<Name, NoItineraries, Features>; 50193323Sed 51193323Seddef : Proc<"generic", [FeatureXS1A]>; 52193323Seddef : Proc<"xs1a-generic", [FeatureXS1A]>; 53193323Seddef : Proc<"xs1b-generic", [FeatureXS1B]>; 54193323Sed 55193323Sed//===----------------------------------------------------------------------===// 56193323Sed// Declare the target which we are implementing 57193323Sed//===----------------------------------------------------------------------===// 58193323Sed 59193323Seddef XCore : Target { 60193323Sed // Pull in Instruction Info: 61193323Sed let InstructionSet = XCoreInstrInfo; 62193323Sed} 63