1235633Sdim//===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10235633Sdim// This is the top level entry point for the XCore target. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed//===----------------------------------------------------------------------===// 15193323Sed// Target-independent interfaces which we are implementing 16193323Sed//===----------------------------------------------------------------------===// 17193323Sed 18193323Sedinclude "llvm/Target/Target.td" 19193323Sed 20193323Sed//===----------------------------------------------------------------------===// 21193323Sed// Descriptions 22193323Sed//===----------------------------------------------------------------------===// 23193323Sed 24193323Sedinclude "XCoreRegisterInfo.td" 25193323Sedinclude "XCoreInstrInfo.td" 26193323Sedinclude "XCoreCallingConv.td" 27193323Sed 28206274Srdivackydef XCoreInstrInfo : InstrInfo; 29193323Sed 30193323Sed//===----------------------------------------------------------------------===// 31193323Sed// XCore processors supported. 32193323Sed//===----------------------------------------------------------------------===// 33193323Sed 34193323Sedclass Proc<string Name, list<SubtargetFeature> Features> 35193323Sed : Processor<Name, NoItineraries, Features>; 36193323Sed 37198090Srdivackydef : Proc<"generic", []>; 38198090Srdivackydef : Proc<"xs1b-generic", []>; 39193323Sed 40193323Sed//===----------------------------------------------------------------------===// 41193323Sed// Declare the target which we are implementing 42193323Sed//===----------------------------------------------------------------------===// 43193323Sed 44252723Sdimdef XCoreAsmWriter : AsmWriter { 45252723Sdim string AsmWriterClassName = "InstPrinter"; 46252723Sdim bit isMCAsmWriter = 1; 47252723Sdim} 48252723Sdim 49193323Seddef XCore : Target { 50193323Sed // Pull in Instruction Info: 51193323Sed let InstructionSet = XCoreInstrInfo; 52252723Sdim let AssemblyWriters = [XCoreAsmWriter]; 53193323Sed} 54