XCoreMCTargetDesc.cpp revision 235633
12116Sjkh//===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
22116Sjkh//
32116Sjkh//                     The LLVM Compiler Infrastructure
42116Sjkh//
52116Sjkh// This file is distributed under the University of Illinois Open Source
62116Sjkh// License. See LICENSE.TXT for details.
78870Srgrimes//
82116Sjkh//===----------------------------------------------------------------------===//
92116Sjkh//
102116Sjkh// This file provides XCore specific target descriptions.
112116Sjkh//
12176451Sdas//===----------------------------------------------------------------------===//
13176451Sdas
142116Sjkh#include "XCoreMCTargetDesc.h"
15219361Sdas#include "XCoreMCAsmInfo.h"
16226375Sdas#include "llvm/MC/MCCodeGenInfo.h"
17219361Sdas#include "llvm/MC/MCInstrInfo.h"
18219361Sdas#include "llvm/MC/MCRegisterInfo.h"
192116Sjkh#include "llvm/MC/MCSubtargetInfo.h"
202116Sjkh#include "llvm/Support/ErrorHandling.h"
21219361Sdas#include "llvm/Support/TargetRegistry.h"
222116Sjkh
232116Sjkh#define GET_INSTRINFO_MC_DESC
242116Sjkh#include "XCoreGenInstrInfo.inc"
25219361Sdas
26219361Sdas#define GET_SUBTARGETINFO_MC_DESC
272116Sjkh#include "XCoreGenSubtargetInfo.inc"
282116Sjkh
292116Sjkh#define GET_REGINFO_MC_DESC
302116Sjkh#include "XCoreGenRegisterInfo.inc"
31251024Sdas
322116Sjkhusing namespace llvm;
3397413Salfred
3497413Salfredstatic MCInstrInfo *createXCoreMCInstrInfo() {
352116Sjkh  MCInstrInfo *X = new MCInstrInfo();
36226411Sdas  InitXCoreMCInstrInfo(X);
372116Sjkh  return X;
382116Sjkh}
392116Sjkh
402116Sjkhstatic MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
41226375Sdas  MCRegisterInfo *X = new MCRegisterInfo();
42226375Sdas  InitXCoreMCRegisterInfo(X, XCore::LR);
43226375Sdas  return X;
44251024Sdas}
45226375Sdas
46226375Sdasstatic MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
472116Sjkh                                                   StringRef FS) {
48226375Sdas  MCSubtargetInfo *X = new MCSubtargetInfo();
492116Sjkh  InitXCoreMCSubtargetInfo(X, TT, CPU, FS);
50226376Sdas  return X;
51226376Sdas}
522116Sjkh
53219361Sdasstatic MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
54219361Sdas  MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
55219361Sdas
56219361Sdas  // Initial state of the frame pointer is SP.
57219361Sdas  MachineLocation Dst(MachineLocation::VirtualFP);
58226376Sdas  MachineLocation Src(XCore::SP, 0);
59226376Sdas  MAI->addInitialFrameState(0, Dst, Src);
60226376Sdas
61226376Sdas  return MAI;
62226376Sdas}
63226376Sdas
64226376Sdasstatic MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
65226376Sdas                                               CodeModel::Model CM,
66226376Sdas                                               CodeGenOpt::Level OL) {
67226376Sdas  MCCodeGenInfo *X = new MCCodeGenInfo();
68219361Sdas  X->InitMCCodeGenInfo(RM, CM, OL);
69226376Sdas  return X;
70226376Sdas}
71226376Sdas
722116Sjkh// Force static initialization.
73extern "C" void LLVMInitializeXCoreTargetMC() {
74  // Register the MC asm info.
75  RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
76
77  // Register the MC codegen info.
78  TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
79                                        createXCoreMCCodeGenInfo);
80
81  // Register the MC instruction info.
82  TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
83
84  // Register the MC register info.
85  TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
86
87  // Register the MC subtarget info.
88  TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
89                                          createXCoreMCSubtargetInfo);
90}
91