1193323Sed//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file declares the Sparc specific subclass of TargetMachine. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed#ifndef SPARCTARGETMACHINE_H 15193323Sed#define SPARCTARGETMACHINE_H 16193323Sed 17252723Sdim#include "SparcFrameLowering.h" 18252723Sdim#include "SparcISelLowering.h" 19193323Sed#include "SparcInstrInfo.h" 20263509Sdim#include "SparcJITInfo.h" 21208599Srdivacky#include "SparcSelectionDAGInfo.h" 22218893Sdim#include "SparcSubtarget.h" 23252723Sdim#include "llvm/IR/DataLayout.h" 24252723Sdim#include "llvm/Target/TargetFrameLowering.h" 25218893Sdim#include "llvm/Target/TargetMachine.h" 26193323Sed 27193323Sednamespace llvm { 28193323Sed 29193323Sedclass SparcTargetMachine : public LLVMTargetMachine { 30203954Srdivacky SparcSubtarget Subtarget; 31245431Sdim const DataLayout DL; // Calculates type size & alignment 32245431Sdim SparcInstrInfo InstrInfo; 33193323Sed SparcTargetLowering TLInfo; 34208599Srdivacky SparcSelectionDAGInfo TSInfo; 35218893Sdim SparcFrameLowering FrameLowering; 36263509Sdim SparcJITInfo JITInfo; 37193323Sedpublic: 38226890Sdim SparcTargetMachine(const Target &T, StringRef TT, 39235633Sdim StringRef CPU, StringRef FS, const TargetOptions &Options, 40235633Sdim Reloc::Model RM, CodeModel::Model CM, 41235633Sdim CodeGenOpt::Level OL, bool is64bit); 42193323Sed 43193323Sed virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } 44218893Sdim virtual const TargetFrameLowering *getFrameLowering() const { 45218893Sdim return &FrameLowering; 46218893Sdim } 47193323Sed virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } 48193323Sed virtual const SparcRegisterInfo *getRegisterInfo() const { 49193323Sed return &InstrInfo.getRegisterInfo(); 50193323Sed } 51207618Srdivacky virtual const SparcTargetLowering* getTargetLowering() const { 52207618Srdivacky return &TLInfo; 53193323Sed } 54208599Srdivacky virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const { 55208599Srdivacky return &TSInfo; 56208599Srdivacky } 57263509Sdim virtual SparcJITInfo *getJITInfo() { 58263509Sdim return &JITInfo; 59263509Sdim } 60245431Sdim virtual const DataLayout *getDataLayout() const { return &DL; } 61193323Sed 62193323Sed // Pass Pipeline Configuration 63235633Sdim virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 64263509Sdim virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE); 65193323Sed}; 66193323Sed 67203954Srdivacky/// SparcV8TargetMachine - Sparc 32-bit target machine 68203954Srdivacky/// 69203954Srdivackyclass SparcV8TargetMachine : public SparcTargetMachine { 70235633Sdim virtual void anchor(); 71203954Srdivackypublic: 72226890Sdim SparcV8TargetMachine(const Target &T, StringRef TT, 73226890Sdim StringRef CPU, StringRef FS, 74235633Sdim const TargetOptions &Options, 75235633Sdim Reloc::Model RM, CodeModel::Model CM, 76235633Sdim CodeGenOpt::Level OL); 77203954Srdivacky}; 78203954Srdivacky 79203954Srdivacky/// SparcV9TargetMachine - Sparc 64-bit target machine 80203954Srdivacky/// 81203954Srdivackyclass SparcV9TargetMachine : public SparcTargetMachine { 82235633Sdim virtual void anchor(); 83203954Srdivackypublic: 84226890Sdim SparcV9TargetMachine(const Target &T, StringRef TT, 85226890Sdim StringRef CPU, StringRef FS, 86235633Sdim const TargetOptions &Options, 87235633Sdim Reloc::Model RM, CodeModel::Model CM, 88235633Sdim CodeGenOpt::Level OL); 89203954Srdivacky}; 90203954Srdivacky 91193323Sed} // end namespace llvm 92193323Sed 93193323Sed#endif 94