SIRegisterInfo.cpp revision 249259 
1//===-- SIRegisterInfo.cpp - SI Register Information ---------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief SI implementation of the TargetRegisterInfo class.
12//
13//===----------------------------------------------------------------------===//
14
15
16#include "SIRegisterInfo.h"
17#include "AMDGPUTargetMachine.h"
18
19using namespace llvm;
20
21SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm,
22    const TargetInstrInfo &tii)
23: AMDGPURegisterInfo(tm, tii),
24  TM(tm),
25  TII(tii)
26  { }
27
28BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
29  BitVector Reserved(getNumRegs());
30  return Reserved;
31}
32
33unsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC,
34                                             MachineFunction &MF) const {
35  return RC->getNumRegs();
36}
37
38const TargetRegisterClass *
39SIRegisterInfo::getISARegClass(const TargetRegisterClass * rc) const {
40  switch (rc->getID()) {
41  case AMDGPU::GPRF32RegClassID:
42    return &AMDGPU::VReg_32RegClass;
43  default: return rc;
44  }
45}
46
47const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass(
48                                                                   MVT VT) const {
49  switch(VT.SimpleTy) {
50    default:
51    case MVT::i32: return &AMDGPU::VReg_32RegClass;
52  }
53}
54