PPCTargetTransformInfo.cpp revision 249259
1249259Sdim//===-- PPCTargetTransformInfo.cpp - PPC specific TTI pass ----------------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim/// \file 10249259Sdim/// This file implements a TargetTransformInfo analysis pass specific to the 11249259Sdim/// PPC target machine. It uses the target's detailed information to provide 12249259Sdim/// more precise answers to certain TTI queries, while letting the target 13249259Sdim/// independent and default TTI implementations handle the rest. 14249259Sdim/// 15249259Sdim//===----------------------------------------------------------------------===// 16249259Sdim 17249259Sdim#define DEBUG_TYPE "ppctti" 18249259Sdim#include "PPC.h" 19249259Sdim#include "PPCTargetMachine.h" 20249259Sdim#include "llvm/Analysis/TargetTransformInfo.h" 21249259Sdim#include "llvm/Support/Debug.h" 22249259Sdim#include "llvm/Target/TargetLowering.h" 23249259Sdim#include "llvm/Target/CostTable.h" 24249259Sdimusing namespace llvm; 25249259Sdim 26249259Sdim// Declare the pass initialization routine locally as target-specific passes 27249259Sdim// don't havve a target-wide initialization entry point, and so we rely on the 28249259Sdim// pass constructor initialization. 29249259Sdimnamespace llvm { 30249259Sdimvoid initializePPCTTIPass(PassRegistry &); 31249259Sdim} 32249259Sdim 33249259Sdimnamespace { 34249259Sdim 35249259Sdimclass PPCTTI : public ImmutablePass, public TargetTransformInfo { 36249259Sdim const PPCTargetMachine *TM; 37249259Sdim const PPCSubtarget *ST; 38249259Sdim const PPCTargetLowering *TLI; 39249259Sdim 40249259Sdim /// Estimate the overhead of scalarizing an instruction. Insert and Extract 41249259Sdim /// are set if the result needs to be inserted and/or extracted from vectors. 42249259Sdim unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const; 43249259Sdim 44249259Sdimpublic: 45249259Sdim PPCTTI() : ImmutablePass(ID), TM(0), ST(0), TLI(0) { 46249259Sdim llvm_unreachable("This pass cannot be directly constructed"); 47249259Sdim } 48249259Sdim 49249259Sdim PPCTTI(const PPCTargetMachine *TM) 50249259Sdim : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()), 51249259Sdim TLI(TM->getTargetLowering()) { 52249259Sdim initializePPCTTIPass(*PassRegistry::getPassRegistry()); 53249259Sdim } 54249259Sdim 55249259Sdim virtual void initializePass() { 56249259Sdim pushTTIStack(this); 57249259Sdim } 58249259Sdim 59249259Sdim virtual void finalizePass() { 60249259Sdim popTTIStack(); 61249259Sdim } 62249259Sdim 63249259Sdim virtual void getAnalysisUsage(AnalysisUsage &AU) const { 64249259Sdim TargetTransformInfo::getAnalysisUsage(AU); 65249259Sdim } 66249259Sdim 67249259Sdim /// Pass identification. 68249259Sdim static char ID; 69249259Sdim 70249259Sdim /// Provide necessary pointer adjustments for the two base classes. 71249259Sdim virtual void *getAdjustedAnalysisPointer(const void *ID) { 72249259Sdim if (ID == &TargetTransformInfo::ID) 73249259Sdim return (TargetTransformInfo*)this; 74249259Sdim return this; 75249259Sdim } 76249259Sdim 77249259Sdim /// \name Scalar TTI Implementations 78249259Sdim /// @{ 79249259Sdim virtual PopcntSupportKind getPopcntSupport(unsigned TyWidth) const; 80249259Sdim 81249259Sdim /// @} 82249259Sdim 83249259Sdim /// \name Vector TTI Implementations 84249259Sdim /// @{ 85249259Sdim 86249259Sdim virtual unsigned getNumberOfRegisters(bool Vector) const; 87249259Sdim virtual unsigned getRegisterBitWidth(bool Vector) const; 88249259Sdim virtual unsigned getMaximumUnrollFactor() const; 89249259Sdim virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, 90249259Sdim OperandValueKind, 91249259Sdim OperandValueKind) const; 92249259Sdim virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp, 93249259Sdim int Index, Type *SubTp) const; 94249259Sdim virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 95249259Sdim Type *Src) const; 96249259Sdim virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 97249259Sdim Type *CondTy) const; 98249259Sdim virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 99249259Sdim unsigned Index) const; 100249259Sdim virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, 101249259Sdim unsigned Alignment, 102249259Sdim unsigned AddressSpace) const; 103249259Sdim 104249259Sdim /// @} 105249259Sdim}; 106249259Sdim 107249259Sdim} // end anonymous namespace 108249259Sdim 109249259SdimINITIALIZE_AG_PASS(PPCTTI, TargetTransformInfo, "ppctti", 110249259Sdim "PPC Target Transform Info", true, true, false) 111249259Sdimchar PPCTTI::ID = 0; 112249259Sdim 113249259SdimImmutablePass * 114249259Sdimllvm::createPPCTargetTransformInfoPass(const PPCTargetMachine *TM) { 115249259Sdim return new PPCTTI(TM); 116249259Sdim} 117249259Sdim 118249259Sdim 119249259Sdim//===----------------------------------------------------------------------===// 120249259Sdim// 121249259Sdim// PPC cost model. 122249259Sdim// 123249259Sdim//===----------------------------------------------------------------------===// 124249259Sdim 125249259SdimPPCTTI::PopcntSupportKind PPCTTI::getPopcntSupport(unsigned TyWidth) const { 126249259Sdim assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); 127249259Sdim if (ST->hasPOPCNTD() && TyWidth <= 64) 128249259Sdim return PSK_FastHardware; 129249259Sdim return PSK_Software; 130249259Sdim} 131249259Sdim 132249259Sdimunsigned PPCTTI::getNumberOfRegisters(bool Vector) const { 133249259Sdim if (Vector && !ST->hasAltivec()) 134249259Sdim return 0; 135249259Sdim return 32; 136249259Sdim} 137249259Sdim 138249259Sdimunsigned PPCTTI::getRegisterBitWidth(bool Vector) const { 139249259Sdim if (Vector) { 140249259Sdim if (ST->hasAltivec()) return 128; 141249259Sdim return 0; 142249259Sdim } 143249259Sdim 144249259Sdim if (ST->isPPC64()) 145249259Sdim return 64; 146249259Sdim return 32; 147249259Sdim 148249259Sdim} 149249259Sdim 150249259Sdimunsigned PPCTTI::getMaximumUnrollFactor() const { 151249259Sdim unsigned Directive = ST->getDarwinDirective(); 152249259Sdim // The 440 has no SIMD support, but floating-point instructions 153249259Sdim // have a 5-cycle latency, so unroll by 5x for latency hiding. 154249259Sdim if (Directive == PPC::DIR_440) 155249259Sdim return 5; 156249259Sdim 157249259Sdim // The A2 has no SIMD support, but floating-point instructions 158249259Sdim // have a 6-cycle latency, so unroll by 6x for latency hiding. 159249259Sdim if (Directive == PPC::DIR_A2) 160249259Sdim return 6; 161249259Sdim 162249259Sdim // FIXME: For lack of any better information, do no harm... 163249259Sdim if (Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500) 164249259Sdim return 1; 165249259Sdim 166249259Sdim // For most things, modern systems have two execution units (and 167249259Sdim // out-of-order execution). 168249259Sdim return 2; 169249259Sdim} 170249259Sdim 171249259Sdimunsigned PPCTTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty, 172249259Sdim OperandValueKind Op1Info, 173249259Sdim OperandValueKind Op2Info) const { 174249259Sdim assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode"); 175249259Sdim 176249259Sdim // Fallback to the default implementation. 177249259Sdim return TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty, Op1Info, 178249259Sdim Op2Info); 179249259Sdim} 180249259Sdim 181249259Sdimunsigned PPCTTI::getShuffleCost(ShuffleKind Kind, Type *Tp, int Index, 182249259Sdim Type *SubTp) const { 183249259Sdim return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp); 184249259Sdim} 185249259Sdim 186249259Sdimunsigned PPCTTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const { 187249259Sdim assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode"); 188249259Sdim 189249259Sdim return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src); 190249259Sdim} 191249259Sdim 192249259Sdimunsigned PPCTTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 193249259Sdim Type *CondTy) const { 194249259Sdim return TargetTransformInfo::getCmpSelInstrCost(Opcode, ValTy, CondTy); 195249259Sdim} 196249259Sdim 197249259Sdimunsigned PPCTTI::getVectorInstrCost(unsigned Opcode, Type *Val, 198249259Sdim unsigned Index) const { 199249259Sdim assert(Val->isVectorTy() && "This must be a vector type"); 200249259Sdim 201249259Sdim int ISD = TLI->InstructionOpcodeToISD(Opcode); 202249259Sdim assert(ISD && "Invalid opcode"); 203249259Sdim 204249259Sdim // Estimated cost of a load-hit-store delay. This was obtained 205249259Sdim // experimentally as a minimum needed to prevent unprofitable 206249259Sdim // vectorization for the paq8p benchmark. It may need to be 207249259Sdim // raised further if other unprofitable cases remain. 208249259Sdim unsigned LHSPenalty = 12; 209249259Sdim 210249259Sdim // Vector element insert/extract with Altivec is very expensive, 211249259Sdim // because they require store and reload with the attendant 212249259Sdim // processor stall for load-hit-store. Until VSX is available, 213249259Sdim // these need to be estimated as very costly. 214249259Sdim if (ISD == ISD::EXTRACT_VECTOR_ELT || 215249259Sdim ISD == ISD::INSERT_VECTOR_ELT) 216249259Sdim return LHSPenalty + 217249259Sdim TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index); 218249259Sdim 219249259Sdim return TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index); 220249259Sdim} 221249259Sdim 222249259Sdimunsigned PPCTTI::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 223249259Sdim unsigned AddressSpace) const { 224249259Sdim // Legalize the type. 225249259Sdim std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Src); 226249259Sdim assert((Opcode == Instruction::Load || Opcode == Instruction::Store) && 227249259Sdim "Invalid Opcode"); 228249259Sdim 229249259Sdim // Each load/store unit costs 1. 230249259Sdim unsigned Cost = LT.first * 1; 231249259Sdim 232249259Sdim // PPC in general does not support unaligned loads and stores. They'll need 233249259Sdim // to be decomposed based on the alignment factor. 234249259Sdim unsigned SrcBytes = LT.second.getStoreSize(); 235249259Sdim if (SrcBytes && Alignment && Alignment < SrcBytes) 236249259Sdim Cost *= (SrcBytes/Alignment); 237249259Sdim 238249259Sdim return Cost; 239249259Sdim} 240249259Sdim 241