HexagonScheduleV4.td revision 234285
1234285Sdim//=-HexagonScheduleV4.td - HexagonV4 Scheduling Definitions --*- tablegen -*-=// 2234285Sdim// 3234285Sdim// The LLVM Compiler Infrastructure 4234285Sdim// 5234285Sdim// This file is distributed under the University of Illinois Open Source 6234285Sdim// License. See LICENSE.TXT for details. 7234285Sdim// 8234285Sdim//===----------------------------------------------------------------------===// 9234285Sdim 10234285Sdim// There are four SLOTS (four parallel pipelines) in Hexagon V4 machine. 11234285Sdim// This file describes that machine information. 12234285Sdim 13234285Sdim// 14234285Sdim// |===========|==================================================| 15234285Sdim// | PIPELINE | Instruction Classes | 16234285Sdim// |===========|==================================================| 17234285Sdim// | SLOT0 | LD ST ALU32 MEMOP NV SYSTEM | 18234285Sdim// |-----------|--------------------------------------------------| 19234285Sdim// | SLOT1 | LD ST ALU32 | 20234285Sdim// |-----------|--------------------------------------------------| 21234285Sdim// | SLOT2 | XTYPE ALU32 J JR | 22234285Sdim// |-----------|--------------------------------------------------| 23234285Sdim// | SLOT3 | XTYPE ALU32 J CR | 24234285Sdim// |===========|==================================================| 25234285Sdim 26234285Sdim// Functional Units. 27234285Sdimdef SLOT0 : FuncUnit; 28234285Sdimdef SLOT1 : FuncUnit; 29234285Sdimdef SLOT2 : FuncUnit; 30234285Sdimdef SLOT3 : FuncUnit; 31234285Sdim 32234285Sdim// Itinerary classes. 33234285Sdimdef NV_V4 : InstrItinClass; 34234285Sdimdef MEM_V4 : InstrItinClass; 35234285Sdim// ALU64/M/S Instruction classes of V2 are collectively knownn as XTYPE in V4. 36234285Sdimdef PREFIX : InstrItinClass; 37234285Sdim 38234285Sdimdef HexagonItinerariesV4 : 39234285Sdim ProcessorItineraries<[SLOT0, SLOT1, SLOT2, SLOT3], [], [ 40234285Sdim InstrItinData<ALU32 , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>, 41234285Sdim InstrItinData<ALU64 , [InstrStage<1, [SLOT2, SLOT3]>]>, 42234285Sdim InstrItinData<CR , [InstrStage<1, [SLOT3]>]>, 43234285Sdim InstrItinData<J , [InstrStage<1, [SLOT2, SLOT3]>]>, 44234285Sdim InstrItinData<JR , [InstrStage<1, [SLOT2]>]>, 45234285Sdim InstrItinData<LD , [InstrStage<1, [SLOT0, SLOT1]>]>, 46234285Sdim InstrItinData<M , [InstrStage<1, [SLOT2, SLOT3]>]>, 47234285Sdim InstrItinData<ST , [InstrStage<1, [SLOT0, SLOT1]>]>, 48234285Sdim InstrItinData<S , [InstrStage<1, [SLOT2, SLOT3]>]>, 49234285Sdim InstrItinData<SYS , [InstrStage<1, [SLOT0]>]>, 50234285Sdim InstrItinData<NV_V4 , [InstrStage<1, [SLOT0]>]>, 51234285Sdim InstrItinData<MEM_V4 , [InstrStage<1, [SLOT0]>]>, 52234285Sdim InstrItinData<MARKER , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>, 53234285Sdim InstrItinData<PREFIX , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>, 54234285Sdim InstrItinData<PSEUDO , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]> 55234285Sdim ]>; 56234285Sdim 57234285Sdim//===----------------------------------------------------------------------===// 58234285Sdim// Hexagon V4 Resource Definitions - 59234285Sdim//===----------------------------------------------------------------------===// 60