1199481Srdivacky//===- Thumb2RegisterInfo.h - Thumb-2 Register Information Impl -*- C++ -*-===// 2195340Sed// 3195340Sed// The LLVM Compiler Infrastructure 4195340Sed// 5195340Sed// This file is distributed under the University of Illinois Open Source 6195340Sed// License. See LICENSE.TXT for details. 7195340Sed// 8195340Sed//===----------------------------------------------------------------------===// 9195340Sed// 10199481Srdivacky// This file contains the Thumb-2 implementation of the TargetRegisterInfo 11199481Srdivacky// class. 12195340Sed// 13195340Sed//===----------------------------------------------------------------------===// 14195340Sed 15195340Sed#ifndef THUMB2REGISTERINFO_H 16195340Sed#define THUMB2REGISTERINFO_H 17195340Sed 18195340Sed#include "ARM.h" 19235633Sdim#include "ARMBaseRegisterInfo.h" 20195340Sed#include "llvm/Target/TargetRegisterInfo.h" 21195340Sed 22195340Sednamespace llvm { 23195340Sed 24263509Sdimclass ARMSubtarget; 25263509Sdim 26195340Sedstruct Thumb2RegisterInfo : public ARMBaseRegisterInfo { 27195340Sedpublic: 28263509Sdim Thumb2RegisterInfo(const ARMSubtarget &STI); 29195340Sed 30195340Sed /// emitLoadConstPool - Emits a load from constpool to materialize the 31195340Sed /// specified immediate. 32195340Sed void emitLoadConstPool(MachineBasicBlock &MBB, 33195340Sed MachineBasicBlock::iterator &MBBI, 34198090Srdivacky DebugLoc dl, 35198090Srdivacky unsigned DestReg, unsigned SubIdx, int Val, 36198090Srdivacky ARMCC::CondCodes Pred = ARMCC::AL, 37221345Sdim unsigned PredReg = 0, 38221345Sdim unsigned MIFlags = MachineInstr::NoFlags) const; 39195340Sed}; 40195340Sed} 41195340Sed 42195340Sed#endif // THUMB2REGISTERINFO_H 43