11573Srgrimes//===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// 21573Srgrimes// 31573Srgrimes// The LLVM Compiler Infrastructure 41573Srgrimes// 51573Srgrimes// This file is distributed under the University of Illinois Open Source 61573Srgrimes// License. See LICENSE.TXT for details. 71573Srgrimes// 81573Srgrimes//===----------------------------------------------------------------------===// 91573Srgrimes// 101573Srgrimes// This file contains the ARM implementation of the TargetInstrInfo class. 111573Srgrimes// 121573Srgrimes//===----------------------------------------------------------------------===// 131573Srgrimes 141573Srgrimes#ifndef ARMINSTRUCTIONINFO_H 151573Srgrimes#define ARMINSTRUCTIONINFO_H 161573Srgrimes 171573Srgrimes#include "ARM.h" 181573Srgrimes#include "ARMBaseInstrInfo.h" 191573Srgrimes#include "ARMRegisterInfo.h" 201573Srgrimes#include "ARMSubtarget.h" 211573Srgrimes 221573Srgrimesnamespace llvm { 231573Srgrimes class ARMSubtarget; 241573Srgrimes 251573Srgrimesclass ARMInstrInfo : public ARMBaseInstrInfo { 261573Srgrimes ARMRegisterInfo RI; 271573Srgrimespublic: 281573Srgrimes explicit ARMInstrInfo(const ARMSubtarget &STI); 291573Srgrimes 301573Srgrimes /// getNoopForMachoTarget - Return the noop instruction to use for a noop. 311573Srgrimes void getNoopForMachoTarget(MCInst &NopInst) const; 321573Srgrimes 3390039Sobrien // Return the non-pre/post incrementing version of 'Opc'. Return 0 3490039Sobrien // if there is not such an opcode. 351573Srgrimes unsigned getUnindexedOpcode(unsigned Opc) const; 3671579Sdeischen 371573Srgrimes /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 3811677Sbde /// such, whenever a client has an instance of instruction info, it should 391573Srgrimes /// always be able to get register info as well (through this method). 401573Srgrimes /// 411573Srgrimes const ARMRegisterInfo &getRegisterInfo() const { return RI; } 421573Srgrimes}; 43214680Sed 44214680Sed} 451573Srgrimes 461573Srgrimes#endif 4771579Sdeischen