StackSlotColoring.cpp revision 207618 
1//===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the stack slot coloring pass.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "stackcoloring"
15#include "VirtRegMap.h"
16#include "llvm/CodeGen/Passes.h"
17#include "llvm/CodeGen/LiveIntervalAnalysis.h"
18#include "llvm/CodeGen/LiveStackAnalysis.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineLoopInfo.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/MachineRegisterInfo.h"
23#include "llvm/CodeGen/PseudoSourceValue.h"
24#include "llvm/Support/CommandLine.h"
25#include "llvm/Support/Debug.h"
26#include "llvm/Target/TargetInstrInfo.h"
27#include "llvm/Target/TargetMachine.h"
28#include "llvm/ADT/BitVector.h"
29#include "llvm/ADT/SmallSet.h"
30#include "llvm/ADT/SmallVector.h"
31#include "llvm/ADT/Statistic.h"
32#include <vector>
33using namespace llvm;
34
35static cl::opt<bool>
36DisableSharing("no-stack-slot-sharing",
37             cl::init(false), cl::Hidden,
38             cl::desc("Suppress slot sharing during stack coloring"));
39
40static cl::opt<bool>
41ColorWithRegsOpt("color-ss-with-regs",
42                 cl::init(false), cl::Hidden,
43                 cl::desc("Color stack slots with free registers"));
44
45
46static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
47
48STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
49STATISTIC(NumRegRepl,    "Number of stack slot refs replaced with reg refs");
50STATISTIC(NumLoadElim,   "Number of loads eliminated");
51STATISTIC(NumStoreElim,  "Number of stores eliminated");
52STATISTIC(NumDead,       "Number of trivially dead stack accesses eliminated");
53
54namespace {
55  class StackSlotColoring : public MachineFunctionPass {
56    bool ColorWithRegs;
57    LiveStacks* LS;
58    VirtRegMap* VRM;
59    MachineFrameInfo *MFI;
60    MachineRegisterInfo *MRI;
61    const TargetInstrInfo  *TII;
62    const TargetRegisterInfo *TRI;
63    const MachineLoopInfo *loopInfo;
64
65    // SSIntervals - Spill slot intervals.
66    std::vector<LiveInterval*> SSIntervals;
67
68    // SSRefs - Keep a list of frame index references for each spill slot.
69    SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
70
71    // OrigAlignments - Alignments of stack objects before coloring.
72    SmallVector<unsigned, 16> OrigAlignments;
73
74    // OrigSizes - Sizess of stack objects before coloring.
75    SmallVector<unsigned, 16> OrigSizes;
76
77    // AllColors - If index is set, it's a spill slot, i.e. color.
78    // FIXME: This assumes PEI locate spill slot with smaller indices
79    // closest to stack pointer / frame pointer. Therefore, smaller
80    // index == better color.
81    BitVector AllColors;
82
83    // NextColor - Next "color" that's not yet used.
84    int NextColor;
85
86    // UsedColors - "Colors" that have been assigned.
87    BitVector UsedColors;
88
89    // Assignments - Color to intervals mapping.
90    SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
91
92  public:
93    static char ID; // Pass identification
94    StackSlotColoring() :
95      MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
96    StackSlotColoring(bool RegColor) :
97      MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
98
99    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
100      AU.setPreservesCFG();
101      AU.addRequired<SlotIndexes>();
102      AU.addPreserved<SlotIndexes>();
103      AU.addRequired<LiveStacks>();
104      AU.addRequired<VirtRegMap>();
105      AU.addPreserved<VirtRegMap>();
106      AU.addRequired<MachineLoopInfo>();
107      AU.addPreserved<MachineLoopInfo>();
108      AU.addPreservedID(MachineDominatorsID);
109      MachineFunctionPass::getAnalysisUsage(AU);
110    }
111
112    virtual bool runOnMachineFunction(MachineFunction &MF);
113    virtual const char* getPassName() const {
114      return "Stack Slot Coloring";
115    }
116
117  private:
118    void InitializeSlots();
119    void ScanForSpillSlotRefs(MachineFunction &MF);
120    bool OverlapWithAssignments(LiveInterval *li, int Color) const;
121    int ColorSlot(LiveInterval *li);
122    bool ColorSlots(MachineFunction &MF);
123    bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
124                                SmallVector<SmallVector<int, 4>, 16> &RevMap,
125                                BitVector &SlotIsReg);
126    void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
127                            MachineFunction &MF);
128    bool PropagateBackward(MachineBasicBlock::iterator MII,
129                           MachineBasicBlock *MBB,
130                           unsigned OldReg, unsigned NewReg);
131    bool PropagateForward(MachineBasicBlock::iterator MII,
132                          MachineBasicBlock *MBB,
133                          unsigned OldReg, unsigned NewReg);
134    void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
135                                    unsigned Reg, const TargetRegisterClass *RC,
136                                    SmallSet<unsigned, 4> &Defs,
137                                    MachineFunction &MF);
138    bool AllMemRefsCanBeUnfolded(int SS);
139    bool RemoveDeadStores(MachineBasicBlock* MBB);
140  };
141} // end anonymous namespace
142
143char StackSlotColoring::ID = 0;
144
145static RegisterPass<StackSlotColoring>
146X("stack-slot-coloring", "Stack Slot Coloring");
147
148FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
149  return new StackSlotColoring(RegColor);
150}
151
152namespace {
153  // IntervalSorter - Comparison predicate that sort live intervals by
154  // their weight.
155  struct IntervalSorter {
156    bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
157      return LHS->weight > RHS->weight;
158    }
159  };
160}
161
162/// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
163/// references and update spill slot weights.
164void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
165  SSRefs.resize(MFI->getObjectIndexEnd());
166
167  // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
168  for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
169       MBBI != E; ++MBBI) {
170    MachineBasicBlock *MBB = &*MBBI;
171    unsigned loopDepth = loopInfo->getLoopDepth(MBB);
172    for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
173         MII != EE; ++MII) {
174      MachineInstr *MI = &*MII;
175      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
176        MachineOperand &MO = MI->getOperand(i);
177        if (!MO.isFI())
178          continue;
179        int FI = MO.getIndex();
180        if (FI < 0)
181          continue;
182        if (!LS->hasInterval(FI))
183          continue;
184        LiveInterval &li = LS->getInterval(FI);
185        if (!MI->isDebugValue())
186          li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
187        SSRefs[FI].push_back(MI);
188      }
189    }
190  }
191}
192
193/// InitializeSlots - Process all spill stack slot liveintervals and add them
194/// to a sorted (by weight) list.
195void StackSlotColoring::InitializeSlots() {
196  int LastFI = MFI->getObjectIndexEnd();
197  OrigAlignments.resize(LastFI);
198  OrigSizes.resize(LastFI);
199  AllColors.resize(LastFI);
200  UsedColors.resize(LastFI);
201  Assignments.resize(LastFI);
202
203  // Gather all spill slots into a list.
204  DEBUG(dbgs() << "Spill slot intervals:\n");
205  for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
206    LiveInterval &li = i->second;
207    DEBUG(li.dump());
208    int FI = li.getStackSlotIndex();
209    if (MFI->isDeadObjectIndex(FI))
210      continue;
211    SSIntervals.push_back(&li);
212    OrigAlignments[FI] = MFI->getObjectAlignment(FI);
213    OrigSizes[FI]      = MFI->getObjectSize(FI);
214    AllColors.set(FI);
215  }
216  DEBUG(dbgs() << '\n');
217
218  // Sort them by weight.
219  std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
220
221  // Get first "color".
222  NextColor = AllColors.find_first();
223}
224
225/// OverlapWithAssignments - Return true if LiveInterval overlaps with any
226/// LiveIntervals that have already been assigned to the specified color.
227bool
228StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
229  const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
230  for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
231    LiveInterval *OtherLI = OtherLIs[i];
232    if (OtherLI->overlaps(*li))
233      return true;
234  }
235  return false;
236}
237
238/// ColorSlotsWithFreeRegs - If there are any free registers available, try
239/// replacing spill slots references with registers instead.
240bool
241StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
242                                   SmallVector<SmallVector<int, 4>, 16> &RevMap,
243                                   BitVector &SlotIsReg) {
244  if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
245    return false;
246
247  bool Changed = false;
248  DEBUG(dbgs() << "Assigning unused registers to spill slots:\n");
249  for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
250    LiveInterval *li = SSIntervals[i];
251    int SS = li->getStackSlotIndex();
252    if (!UsedColors[SS] || li->weight < 20)
253      // If the weight is < 20, i.e. two references in a loop with depth 1,
254      // don't bother with it.
255      continue;
256
257    // These slots allow to share the same registers.
258    bool AllColored = true;
259    SmallVector<unsigned, 4> ColoredRegs;
260    for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
261      int RSS = RevMap[SS][j];
262      const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
263      // If it's not colored to another stack slot, try coloring it
264      // to a "free" register.
265      if (!RC) {
266        AllColored = false;
267        continue;
268      }
269      unsigned Reg = VRM->getFirstUnusedRegister(RC);
270      if (!Reg) {
271        AllColored = false;
272        continue;
273      }
274      if (!AllMemRefsCanBeUnfolded(RSS)) {
275        AllColored = false;
276        continue;
277      } else {
278        DEBUG(dbgs() << "Assigning fi#" << RSS << " to "
279                     << TRI->getName(Reg) << '\n');
280        ColoredRegs.push_back(Reg);
281        SlotMapping[RSS] = Reg;
282        SlotIsReg.set(RSS);
283        Changed = true;
284      }
285    }
286
287    // Register and its sub-registers are no longer free.
288    while (!ColoredRegs.empty()) {
289      unsigned Reg = ColoredRegs.back();
290      ColoredRegs.pop_back();
291      VRM->setRegisterUsed(Reg);
292      // If reg is a callee-saved register, it will have to be spilled in
293      // the prologue.
294      MRI->setPhysRegUsed(Reg);
295      for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
296        VRM->setRegisterUsed(*AS);
297        MRI->setPhysRegUsed(*AS);
298      }
299    }
300    // This spill slot is dead after the rewrites
301    if (AllColored) {
302      MFI->RemoveStackObject(SS);
303      ++NumEliminated;
304    }
305  }
306  DEBUG(dbgs() << '\n');
307
308  return Changed;
309}
310
311/// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
312///
313int StackSlotColoring::ColorSlot(LiveInterval *li) {
314  int Color = -1;
315  bool Share = false;
316  if (!DisableSharing) {
317    // Check if it's possible to reuse any of the used colors.
318    Color = UsedColors.find_first();
319    while (Color != -1) {
320      if (!OverlapWithAssignments(li, Color)) {
321        Share = true;
322        ++NumEliminated;
323        break;
324      }
325      Color = UsedColors.find_next(Color);
326    }
327  }
328
329  // Assign it to the first available color (assumed to be the best) if it's
330  // not possible to share a used color with other objects.
331  if (!Share) {
332    assert(NextColor != -1 && "No more spill slots?");
333    Color = NextColor;
334    UsedColors.set(Color);
335    NextColor = AllColors.find_next(NextColor);
336  }
337
338  // Record the assignment.
339  Assignments[Color].push_back(li);
340  int FI = li->getStackSlotIndex();
341  DEBUG(dbgs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
342
343  // Change size and alignment of the allocated slot. If there are multiple
344  // objects sharing the same slot, then make sure the size and alignment
345  // are large enough for all.
346  unsigned Align = OrigAlignments[FI];
347  if (!Share || Align > MFI->getObjectAlignment(Color))
348    MFI->setObjectAlignment(Color, Align);
349  int64_t Size = OrigSizes[FI];
350  if (!Share || Size > MFI->getObjectSize(Color))
351    MFI->setObjectSize(Color, Size);
352  return Color;
353}
354
355/// Colorslots - Color all spill stack slots and rewrite all frameindex machine
356/// operands in the function.
357bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
358  unsigned NumObjs = MFI->getObjectIndexEnd();
359  SmallVector<int, 16> SlotMapping(NumObjs, -1);
360  SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
361  SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
362  BitVector SlotIsReg(NumObjs);
363  BitVector UsedColors(NumObjs);
364
365  DEBUG(dbgs() << "Color spill slot intervals:\n");
366  bool Changed = false;
367  for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
368    LiveInterval *li = SSIntervals[i];
369    int SS = li->getStackSlotIndex();
370    int NewSS = ColorSlot(li);
371    assert(NewSS >= 0 && "Stack coloring failed?");
372    SlotMapping[SS] = NewSS;
373    RevMap[NewSS].push_back(SS);
374    SlotWeights[NewSS] += li->weight;
375    UsedColors.set(NewSS);
376    Changed |= (SS != NewSS);
377  }
378
379  DEBUG(dbgs() << "\nSpill slots after coloring:\n");
380  for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
381    LiveInterval *li = SSIntervals[i];
382    int SS = li->getStackSlotIndex();
383    li->weight = SlotWeights[SS];
384  }
385  // Sort them by new weight.
386  std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
387
388#ifndef NDEBUG
389  for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
390    DEBUG(SSIntervals[i]->dump());
391  DEBUG(dbgs() << '\n');
392#endif
393
394  // Can we "color" a stack slot with a unused register?
395  Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
396
397  if (!Changed)
398    return false;
399
400  // Rewrite all MO_FrameIndex operands.
401  SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
402  for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
403    bool isReg = SlotIsReg[SS];
404    int NewFI = SlotMapping[SS];
405    if (NewFI == -1 || (NewFI == (int)SS && !isReg))
406      continue;
407
408    const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
409    SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
410    for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
411      if (!isReg)
412        RewriteInstruction(RefMIs[i], SS, NewFI, MF);
413      else {
414        // Rewrite to use a register instead.
415        unsigned MBBId = RefMIs[i]->getParent()->getNumber();
416        SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
417        UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
418      }
419  }
420
421  // Delete unused stack slots.
422  while (NextColor != -1) {
423    DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");
424    MFI->RemoveStackObject(NextColor);
425    NextColor = AllColors.find_next(NextColor);
426  }
427
428  return true;
429}
430
431/// AllMemRefsCanBeUnfolded - Return true if all references of the specified
432/// spill slot index can be unfolded.
433bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
434  SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
435  for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
436    MachineInstr *MI = RefMIs[i];
437    if (TII->isLoadFromStackSlot(MI, SS) ||
438        TII->isStoreToStackSlot(MI, SS))
439      // Restore and spill will become copies.
440      return true;
441    if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
442      return false;
443    for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
444      MachineOperand &MO = MI->getOperand(j);
445      if (MO.isFI() && MO.getIndex() != SS)
446        // If it uses another frameindex, we can, currently* unfold it.
447        return false;
448    }
449  }
450  return true;
451}
452
453/// RewriteInstruction - Rewrite specified instruction by replacing references
454/// to old frame index with new one.
455void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
456                                           int NewFI, MachineFunction &MF) {
457  // Update the operands.
458  for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
459    MachineOperand &MO = MI->getOperand(i);
460    if (!MO.isFI())
461      continue;
462    int FI = MO.getIndex();
463    if (FI != OldFI)
464      continue;
465    MO.setIndex(NewFI);
466  }
467
468  // Update the memory references. This changes the MachineMemOperands
469  // directly. They may be in use by multiple instructions, however all
470  // instructions using OldFI are being rewritten to use NewFI.
471  const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
472  const Value *NewSV = PseudoSourceValue::getFixedStack(NewFI);
473  for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
474       E = MI->memoperands_end(); I != E; ++I)
475    if ((*I)->getValue() == OldSV)
476      (*I)->setValue(NewSV);
477}
478
479/// PropagateBackward - Traverse backward and look for the definition of
480/// OldReg. If it can successfully update all of the references with NewReg,
481/// do so and return true.
482bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
483                                          MachineBasicBlock *MBB,
484                                          unsigned OldReg, unsigned NewReg) {
485  if (MII == MBB->begin())
486    return false;
487
488  SmallVector<MachineOperand*, 4> Uses;
489  SmallVector<MachineOperand*, 4> Refs;
490  while (--MII != MBB->begin()) {
491    bool FoundDef = false;  // Not counting 2address def.
492
493    Uses.clear();
494    const TargetInstrDesc &TID = MII->getDesc();
495    for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
496      MachineOperand &MO = MII->getOperand(i);
497      if (!MO.isReg())
498        continue;
499      unsigned Reg = MO.getReg();
500      if (Reg == 0)
501        continue;
502      if (Reg == OldReg) {
503        if (MO.isImplicit())
504          return false;
505
506        // Abort the use is actually a sub-register def. We don't have enough
507        // information to figure out if it is really legal.
508        if (MO.getSubReg() || MII->isExtractSubreg() ||
509            MII->isInsertSubreg() || MII->isSubregToReg())
510          return false;
511
512        const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
513        if (RC && !RC->contains(NewReg))
514          return false;
515
516        if (MO.isUse()) {
517          Uses.push_back(&MO);
518        } else {
519          Refs.push_back(&MO);
520          if (!MII->isRegTiedToUseOperand(i))
521            FoundDef = true;
522        }
523      } else if (TRI->regsOverlap(Reg, NewReg)) {
524        return false;
525      } else if (TRI->regsOverlap(Reg, OldReg)) {
526        if (!MO.isUse() || !MO.isKill())
527          return false;
528      }
529    }
530
531    if (FoundDef) {
532      // Found non-two-address def. Stop here.
533      for (unsigned i = 0, e = Refs.size(); i != e; ++i)
534        Refs[i]->setReg(NewReg);
535      return true;
536    }
537
538    // Two-address uses must be updated as well.
539    for (unsigned i = 0, e = Uses.size(); i != e; ++i)
540      Refs.push_back(Uses[i]);
541  }
542  return false;
543}
544
545/// PropagateForward - Traverse forward and look for the kill of OldReg. If
546/// it can successfully update all of the uses with NewReg, do so and
547/// return true.
548bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
549                                         MachineBasicBlock *MBB,
550                                         unsigned OldReg, unsigned NewReg) {
551  if (MII == MBB->end())
552    return false;
553
554  SmallVector<MachineOperand*, 4> Uses;
555  while (++MII != MBB->end()) {
556    bool FoundKill = false;
557    const TargetInstrDesc &TID = MII->getDesc();
558    for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
559      MachineOperand &MO = MII->getOperand(i);
560      if (!MO.isReg())
561        continue;
562      unsigned Reg = MO.getReg();
563      if (Reg == 0)
564        continue;
565      if (Reg == OldReg) {
566        if (MO.isDef() || MO.isImplicit())
567          return false;
568
569        // Abort the use is actually a sub-register use. We don't have enough
570        // information to figure out if it is really legal.
571        if (MO.getSubReg() || MII->isExtractSubreg())
572          return false;
573
574        const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
575        if (RC && !RC->contains(NewReg))
576          return false;
577        if (MO.isKill())
578          FoundKill = true;
579
580        Uses.push_back(&MO);
581      } else if (TRI->regsOverlap(Reg, NewReg) ||
582                 TRI->regsOverlap(Reg, OldReg))
583        return false;
584    }
585    if (FoundKill) {
586      for (unsigned i = 0, e = Uses.size(); i != e; ++i)
587        Uses[i]->setReg(NewReg);
588      return true;
589    }
590  }
591  return false;
592}
593
594/// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
595/// folded memory references and replacing those references with register
596/// references instead.
597void
598StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
599                                               unsigned Reg,
600                                               const TargetRegisterClass *RC,
601                                               SmallSet<unsigned, 4> &Defs,
602                                               MachineFunction &MF) {
603  MachineBasicBlock *MBB = MI->getParent();
604  if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
605    if (PropagateForward(MI, MBB, DstReg, Reg)) {
606      DEBUG(dbgs() << "Eliminated load: ");
607      DEBUG(MI->dump());
608      ++NumLoadElim;
609    } else {
610      TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC);
611      ++NumRegRepl;
612    }
613
614    if (!Defs.count(Reg)) {
615      // If this is the first use of Reg in this MBB and it wasn't previously
616      // defined in MBB, add it to livein.
617      MBB->addLiveIn(Reg);
618      Defs.insert(Reg);
619    }
620  } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
621    if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
622      DEBUG(dbgs() << "Eliminated store: ");
623      DEBUG(MI->dump());
624      ++NumStoreElim;
625    } else {
626      TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC);
627      ++NumRegRepl;
628    }
629
630    // Remember reg has been defined in MBB.
631    Defs.insert(Reg);
632  } else {
633    SmallVector<MachineInstr*, 4> NewMIs;
634    bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
635    Success = Success; // Silence compiler warning.
636    assert(Success && "Failed to unfold!");
637    MachineInstr *NewMI = NewMIs[0];
638    MBB->insert(MI, NewMI);
639    ++NumRegRepl;
640
641    if (NewMI->readsRegister(Reg)) {
642      if (!Defs.count(Reg))
643        // If this is the first use of Reg in this MBB and it wasn't previously
644        // defined in MBB, add it to livein.
645        MBB->addLiveIn(Reg);
646      Defs.insert(Reg);
647    }
648  }
649  MBB->erase(MI);
650}
651
652/// RemoveDeadStores - Scan through a basic block and look for loads followed
653/// by stores.  If they're both using the same stack slot, then the store is
654/// definitely dead.  This could obviously be much more aggressive (consider
655/// pairs with instructions between them), but such extensions might have a
656/// considerable compile time impact.
657bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
658  // FIXME: This could be much more aggressive, but we need to investigate
659  // the compile time impact of doing so.
660  bool changed = false;
661
662  SmallVector<MachineInstr*, 4> toErase;
663
664  for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
665       I != E; ++I) {
666    if (DCELimit != -1 && (int)NumDead >= DCELimit)
667      break;
668
669    MachineBasicBlock::iterator NextMI = llvm::next(I);
670    if (NextMI == MBB->end()) continue;
671
672    int FirstSS, SecondSS;
673    unsigned LoadReg = 0;
674    unsigned StoreReg = 0;
675    if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
676    if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
677    if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
678
679    ++NumDead;
680    changed = true;
681
682    if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
683      ++NumDead;
684      toErase.push_back(I);
685    }
686
687    toErase.push_back(NextMI);
688    ++I;
689  }
690
691  for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
692       E = toErase.end(); I != E; ++I)
693    (*I)->eraseFromParent();
694
695  return changed;
696}
697
698
699bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
700  DEBUG(dbgs() << "********** Stack Slot Coloring **********\n");
701
702  MFI = MF.getFrameInfo();
703  MRI = &MF.getRegInfo();
704  TII = MF.getTarget().getInstrInfo();
705  TRI = MF.getTarget().getRegisterInfo();
706  LS = &getAnalysis<LiveStacks>();
707  VRM = &getAnalysis<VirtRegMap>();
708  loopInfo = &getAnalysis<MachineLoopInfo>();
709
710  bool Changed = false;
711
712  unsigned NumSlots = LS->getNumIntervals();
713  if (NumSlots < 2) {
714    if (NumSlots == 0 || !VRM->HasUnusedRegisters())
715      // Nothing to do!
716      return false;
717  }
718
719  // Gather spill slot references
720  ScanForSpillSlotRefs(MF);
721  InitializeSlots();
722  Changed = ColorSlots(MF);
723
724  NextColor = -1;
725  SSIntervals.clear();
726  for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
727    SSRefs[i].clear();
728  SSRefs.clear();
729  OrigAlignments.clear();
730  OrigSizes.clear();
731  AllColors.clear();
732  UsedColors.clear();
733  for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
734    Assignments[i].clear();
735  Assignments.clear();
736
737  if (Changed) {
738    for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
739      Changed |= RemoveDeadStores(I);
740  }
741
742  return Changed;
743}
744