rtlanal.c revision 70635
1/* Analyze RTL for C-Compiler 2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21 22#include "config.h" 23#include "system.h" 24#include "rtl.h" 25 26static int rtx_addr_can_trap_p PROTO((rtx)); 27static void reg_set_p_1 PROTO((rtx, rtx)); 28static void reg_set_last_1 PROTO((rtx, rtx)); 29 30 31/* Forward declarations */ 32static int jmp_uses_reg_or_mem PROTO((rtx)); 33 34/* Bit flags that specify the machine subtype we are compiling for. 35 Bits are tested using macros TARGET_... defined in the tm.h file 36 and set by `-m...' switches. Must be defined in rtlanal.c. */ 37 38int target_flags; 39 40/* Return 1 if the value of X is unstable 41 (would be different at a different point in the program). 42 The frame pointer, arg pointer, etc. are considered stable 43 (within one function) and so is anything marked `unchanging'. */ 44 45int 46rtx_unstable_p (x) 47 rtx x; 48{ 49 register RTX_CODE code = GET_CODE (x); 50 register int i; 51 register char *fmt; 52 53 if (code == MEM) 54 return ! RTX_UNCHANGING_P (x); 55 56 if (code == QUEUED) 57 return 1; 58 59 if (code == CONST || code == CONST_INT) 60 return 0; 61 62 if (code == REG) 63 return ! (REGNO (x) == FRAME_POINTER_REGNUM 64 || REGNO (x) == HARD_FRAME_POINTER_REGNUM 65 || REGNO (x) == ARG_POINTER_REGNUM 66 || RTX_UNCHANGING_P (x)); 67 68 fmt = GET_RTX_FORMAT (code); 69 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 70 if (fmt[i] == 'e') 71 if (rtx_unstable_p (XEXP (x, i))) 72 return 1; 73 return 0; 74} 75 76/* Return 1 if X has a value that can vary even between two 77 executions of the program. 0 means X can be compared reliably 78 against certain constants or near-constants. 79 The frame pointer and the arg pointer are considered constant. */ 80 81int 82rtx_varies_p (x) 83 rtx x; 84{ 85 register RTX_CODE code = GET_CODE (x); 86 register int i; 87 register char *fmt; 88 89 switch (code) 90 { 91 case MEM: 92 case QUEUED: 93 return 1; 94 95 case CONST: 96 case CONST_INT: 97 case CONST_DOUBLE: 98 case SYMBOL_REF: 99 case LABEL_REF: 100 return 0; 101 102 case REG: 103 /* Note that we have to test for the actual rtx used for the frame 104 and arg pointers and not just the register number in case we have 105 eliminated the frame and/or arg pointer and are using it 106 for pseudos. */ 107 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx 108 || x == arg_pointer_rtx || x == pic_offset_table_rtx); 109 110 case LO_SUM: 111 /* The operand 0 of a LO_SUM is considered constant 112 (in fact is it related specifically to operand 1). */ 113 return rtx_varies_p (XEXP (x, 1)); 114 115 default: 116 break; 117 } 118 119 fmt = GET_RTX_FORMAT (code); 120 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 121 if (fmt[i] == 'e') 122 if (rtx_varies_p (XEXP (x, i))) 123 return 1; 124 return 0; 125} 126 127/* Return 0 if the use of X as an address in a MEM can cause a trap. */ 128 129static int 130rtx_addr_can_trap_p (x) 131 register rtx x; 132{ 133 register enum rtx_code code = GET_CODE (x); 134 135 switch (code) 136 { 137 case SYMBOL_REF: 138 case LABEL_REF: 139 /* SYMBOL_REF is problematic due to the possible presence of 140 a #pragma weak, but to say that loads from symbols can trap is 141 *very* costly. It's not at all clear what's best here. For 142 now, we ignore the impact of #pragma weak. */ 143 return 0; 144 145 case REG: 146 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ 147 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx 148 || x == stack_pointer_rtx || x == arg_pointer_rtx); 149 150 case CONST: 151 return rtx_addr_can_trap_p (XEXP (x, 0)); 152 153 case PLUS: 154 /* An address is assumed not to trap if it is an address that can't 155 trap plus a constant integer. */ 156 return (rtx_addr_can_trap_p (XEXP (x, 0)) 157 || GET_CODE (XEXP (x, 1)) != CONST_INT); 158 159 case LO_SUM: 160 return rtx_addr_can_trap_p (XEXP (x, 1)); 161 162 default: 163 break; 164 } 165 166 /* If it isn't one of the case above, it can cause a trap. */ 167 return 1; 168} 169 170/* Return 1 if X refers to a memory location whose address 171 cannot be compared reliably with constant addresses, 172 or if X refers to a BLKmode memory object. */ 173 174int 175rtx_addr_varies_p (x) 176 rtx x; 177{ 178 register enum rtx_code code; 179 register int i; 180 register char *fmt; 181 182 if (x == 0) 183 return 0; 184 185 code = GET_CODE (x); 186 if (code == MEM) 187 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); 188 189 fmt = GET_RTX_FORMAT (code); 190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 191 if (fmt[i] == 'e') 192 { 193 if (rtx_addr_varies_p (XEXP (x, i))) 194 return 1; 195 } 196 else if (fmt[i] == 'E') 197 { 198 int j; 199 for (j = 0; j < XVECLEN (x, i); j++) 200 if (rtx_addr_varies_p (XVECEXP (x, i, j))) 201 return 1; 202 } 203 return 0; 204} 205 206/* Return the value of the integer term in X, if one is apparent; 207 otherwise return 0. 208 Only obvious integer terms are detected. 209 This is used in cse.c with the `related_value' field.*/ 210 211HOST_WIDE_INT 212get_integer_term (x) 213 rtx x; 214{ 215 if (GET_CODE (x) == CONST) 216 x = XEXP (x, 0); 217 218 if (GET_CODE (x) == MINUS 219 && GET_CODE (XEXP (x, 1)) == CONST_INT) 220 return - INTVAL (XEXP (x, 1)); 221 if (GET_CODE (x) == PLUS 222 && GET_CODE (XEXP (x, 1)) == CONST_INT) 223 return INTVAL (XEXP (x, 1)); 224 return 0; 225} 226 227/* If X is a constant, return the value sans apparent integer term; 228 otherwise return 0. 229 Only obvious integer terms are detected. */ 230 231rtx 232get_related_value (x) 233 rtx x; 234{ 235 if (GET_CODE (x) != CONST) 236 return 0; 237 x = XEXP (x, 0); 238 if (GET_CODE (x) == PLUS 239 && GET_CODE (XEXP (x, 1)) == CONST_INT) 240 return XEXP (x, 0); 241 else if (GET_CODE (x) == MINUS 242 && GET_CODE (XEXP (x, 1)) == CONST_INT) 243 return XEXP (x, 0); 244 return 0; 245} 246 247/* Nonzero if register REG appears somewhere within IN. 248 Also works if REG is not a register; in this case it checks 249 for a subexpression of IN that is Lisp "equal" to REG. */ 250 251int 252reg_mentioned_p (reg, in) 253 register rtx reg, in; 254{ 255 register char *fmt; 256 register int i; 257 register enum rtx_code code; 258 259 if (in == 0) 260 return 0; 261 262 if (reg == in) 263 return 1; 264 265 if (GET_CODE (in) == LABEL_REF) 266 return reg == XEXP (in, 0); 267 268 code = GET_CODE (in); 269 270 switch (code) 271 { 272 /* Compare registers by number. */ 273 case REG: 274 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); 275 276 /* These codes have no constituent expressions 277 and are unique. */ 278 case SCRATCH: 279 case CC0: 280 case PC: 281 return 0; 282 283 case CONST_INT: 284 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); 285 286 case CONST_DOUBLE: 287 /* These are kept unique for a given value. */ 288 return 0; 289 290 default: 291 break; 292 } 293 294 if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) 295 return 1; 296 297 fmt = GET_RTX_FORMAT (code); 298 299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 300 { 301 if (fmt[i] == 'E') 302 { 303 register int j; 304 for (j = XVECLEN (in, i) - 1; j >= 0; j--) 305 if (reg_mentioned_p (reg, XVECEXP (in, i, j))) 306 return 1; 307 } 308 else if (fmt[i] == 'e' 309 && reg_mentioned_p (reg, XEXP (in, i))) 310 return 1; 311 } 312 return 0; 313} 314 315/* Return 1 if in between BEG and END, exclusive of BEG and END, there is 316 no CODE_LABEL insn. */ 317 318int 319no_labels_between_p (beg, end) 320 rtx beg, end; 321{ 322 register rtx p; 323 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) 324 if (GET_CODE (p) == CODE_LABEL) 325 return 0; 326 return 1; 327} 328 329/* Return 1 if in between BEG and END, exclusive of BEG and END, there is 330 no JUMP_INSN insn. */ 331 332int 333no_jumps_between_p (beg, end) 334 rtx beg, end; 335{ 336 register rtx p; 337 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) 338 if (GET_CODE (p) == JUMP_INSN) 339 return 0; 340 return 1; 341} 342 343/* Nonzero if register REG is used in an insn between 344 FROM_INSN and TO_INSN (exclusive of those two). */ 345 346int 347reg_used_between_p (reg, from_insn, to_insn) 348 rtx reg, from_insn, to_insn; 349{ 350 register rtx insn; 351 352 if (from_insn == to_insn) 353 return 0; 354 355 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 356 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 357 && (reg_overlap_mentioned_p (reg, PATTERN (insn)) 358 || (GET_CODE (insn) == CALL_INSN 359 && (find_reg_fusage (insn, USE, reg) 360 || find_reg_fusage (insn, CLOBBER, reg))))) 361 return 1; 362 return 0; 363} 364 365/* Nonzero if the old value of X, a register, is referenced in BODY. If X 366 is entirely replaced by a new value and the only use is as a SET_DEST, 367 we do not consider it a reference. */ 368 369int 370reg_referenced_p (x, body) 371 rtx x; 372 rtx body; 373{ 374 int i; 375 376 switch (GET_CODE (body)) 377 { 378 case SET: 379 if (reg_overlap_mentioned_p (x, SET_SRC (body))) 380 return 1; 381 382 /* If the destination is anything other than CC0, PC, a REG or a SUBREG 383 of a REG that occupies all of the REG, the insn references X if 384 it is mentioned in the destination. */ 385 if (GET_CODE (SET_DEST (body)) != CC0 386 && GET_CODE (SET_DEST (body)) != PC 387 && GET_CODE (SET_DEST (body)) != REG 388 && ! (GET_CODE (SET_DEST (body)) == SUBREG 389 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG 390 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) 391 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 392 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) 393 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) 394 && reg_overlap_mentioned_p (x, SET_DEST (body))) 395 return 1; 396 return 0; 397 398 case ASM_OPERANDS: 399 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) 400 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) 401 return 1; 402 return 0; 403 404 case CALL: 405 case USE: 406 return reg_overlap_mentioned_p (x, body); 407 408 case TRAP_IF: 409 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); 410 411 case UNSPEC: 412 case UNSPEC_VOLATILE: 413 case PARALLEL: 414 for (i = XVECLEN (body, 0) - 1; i >= 0; i--) 415 if (reg_referenced_p (x, XVECEXP (body, 0, i))) 416 return 1; 417 return 0; 418 419 default: 420 return 0; 421 } 422} 423 424/* Nonzero if register REG is referenced in an insn between 425 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do 426 not count. */ 427 428int 429reg_referenced_between_p (reg, from_insn, to_insn) 430 rtx reg, from_insn, to_insn; 431{ 432 register rtx insn; 433 434 if (from_insn == to_insn) 435 return 0; 436 437 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 438 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 439 && (reg_referenced_p (reg, PATTERN (insn)) 440 || (GET_CODE (insn) == CALL_INSN 441 && find_reg_fusage (insn, USE, reg)))) 442 return 1; 443 return 0; 444} 445 446/* Nonzero if register REG is set or clobbered in an insn between 447 FROM_INSN and TO_INSN (exclusive of those two). */ 448 449int 450reg_set_between_p (reg, from_insn, to_insn) 451 rtx reg, from_insn, to_insn; 452{ 453 register rtx insn; 454 455 if (from_insn == to_insn) 456 return 0; 457 458 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 459 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 460 && reg_set_p (reg, insn)) 461 return 1; 462 return 0; 463} 464 465/* Internals of reg_set_between_p. */ 466 467static rtx reg_set_reg; 468static int reg_set_flag; 469 470static void 471reg_set_p_1 (x, pat) 472 rtx x; 473 rtx pat ATTRIBUTE_UNUSED; 474{ 475 /* We don't want to return 1 if X is a MEM that contains a register 476 within REG_SET_REG. */ 477 478 if ((GET_CODE (x) != MEM) 479 && reg_overlap_mentioned_p (reg_set_reg, x)) 480 reg_set_flag = 1; 481} 482 483int 484reg_set_p (reg, insn) 485 rtx reg, insn; 486{ 487 rtx body = insn; 488 489 /* We can be passed an insn or part of one. If we are passed an insn, 490 check if a side-effect of the insn clobbers REG. */ 491 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 492 { 493 if (FIND_REG_INC_NOTE (insn, reg) 494 || (GET_CODE (insn) == CALL_INSN 495 /* We'd like to test call_used_regs here, but rtlanal.c can't 496 reference that variable due to its use in genattrtab. So 497 we'll just be more conservative. 498 499 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE 500 information holds all clobbered registers. */ 501 && ((GET_CODE (reg) == REG 502 && REGNO (reg) < FIRST_PSEUDO_REGISTER) 503 || GET_CODE (reg) == MEM 504 || find_reg_fusage (insn, CLOBBER, reg)))) 505 return 1; 506 507 body = PATTERN (insn); 508 } 509 510 reg_set_reg = reg; 511 reg_set_flag = 0; 512 note_stores (body, reg_set_p_1); 513 return reg_set_flag; 514} 515 516/* Similar to reg_set_between_p, but check all registers in X. Return 0 517 only if none of them are modified between START and END. Do not 518 consider non-registers one way or the other. */ 519 520int 521regs_set_between_p (x, start, end) 522 rtx x; 523 rtx start, end; 524{ 525 enum rtx_code code = GET_CODE (x); 526 char *fmt; 527 int i, j; 528 529 switch (code) 530 { 531 case CONST_INT: 532 case CONST_DOUBLE: 533 case CONST: 534 case SYMBOL_REF: 535 case LABEL_REF: 536 case PC: 537 case CC0: 538 return 0; 539 540 case REG: 541 return reg_set_between_p (x, start, end); 542 543 default: 544 break; 545 } 546 547 fmt = GET_RTX_FORMAT (code); 548 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 549 { 550 if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) 551 return 1; 552 553 else if (fmt[i] == 'E') 554 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 555 if (regs_set_between_p (XVECEXP (x, i, j), start, end)) 556 return 1; 557 } 558 559 return 0; 560} 561 562/* Similar to reg_set_between_p, but check all registers in X. Return 0 563 only if none of them are modified between START and END. Return 1 if 564 X contains a MEM; this routine does not perform any memory aliasing. */ 565 566int 567modified_between_p (x, start, end) 568 rtx x; 569 rtx start, end; 570{ 571 enum rtx_code code = GET_CODE (x); 572 char *fmt; 573 int i, j; 574 575 switch (code) 576 { 577 case CONST_INT: 578 case CONST_DOUBLE: 579 case CONST: 580 case SYMBOL_REF: 581 case LABEL_REF: 582 return 0; 583 584 case PC: 585 case CC0: 586 return 1; 587 588 case MEM: 589 /* If the memory is not constant, assume it is modified. If it is 590 constant, we still have to check the address. */ 591 if (! RTX_UNCHANGING_P (x)) 592 return 1; 593 break; 594 595 case REG: 596 return reg_set_between_p (x, start, end); 597 598 default: 599 break; 600 } 601 602 fmt = GET_RTX_FORMAT (code); 603 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 604 { 605 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) 606 return 1; 607 608 if (fmt[i] == 'E') 609 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 610 if (modified_between_p (XVECEXP (x, i, j), start, end)) 611 return 1; 612 } 613 614 return 0; 615} 616 617/* Similar to reg_set_p, but check all registers in X. Return 0 only if none 618 of them are modified in INSN. Return 1 if X contains a MEM; this routine 619 does not perform any memory aliasing. */ 620 621int 622modified_in_p (x, insn) 623 rtx x; 624 rtx insn; 625{ 626 enum rtx_code code = GET_CODE (x); 627 char *fmt; 628 int i, j; 629 630 switch (code) 631 { 632 case CONST_INT: 633 case CONST_DOUBLE: 634 case CONST: 635 case SYMBOL_REF: 636 case LABEL_REF: 637 return 0; 638 639 case PC: 640 case CC0: 641 return 1; 642 643 case MEM: 644 /* If the memory is not constant, assume it is modified. If it is 645 constant, we still have to check the address. */ 646 if (! RTX_UNCHANGING_P (x)) 647 return 1; 648 break; 649 650 case REG: 651 return reg_set_p (x, insn); 652 653 default: 654 break; 655 } 656 657 fmt = GET_RTX_FORMAT (code); 658 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 659 { 660 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) 661 return 1; 662 663 if (fmt[i] == 'E') 664 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 665 if (modified_in_p (XVECEXP (x, i, j), insn)) 666 return 1; 667 } 668 669 return 0; 670} 671 672/* Given an INSN, return a SET expression if this insn has only a single SET. 673 It may also have CLOBBERs, USEs, or SET whose output 674 will not be used, which we ignore. */ 675 676rtx 677single_set (insn) 678 rtx insn; 679{ 680 rtx set; 681 int i; 682 683 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 684 return 0; 685 686 if (GET_CODE (PATTERN (insn)) == SET) 687 return PATTERN (insn); 688 689 else if (GET_CODE (PATTERN (insn)) == PARALLEL) 690 { 691 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) 692 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET 693 && (! find_reg_note (insn, REG_UNUSED, 694 SET_DEST (XVECEXP (PATTERN (insn), 0, i))) 695 || side_effects_p (XVECEXP (PATTERN (insn), 0, i)))) 696 { 697 if (set) 698 return 0; 699 else 700 set = XVECEXP (PATTERN (insn), 0, i); 701 } 702 return set; 703 } 704 705 return 0; 706} 707 708/* Given an INSN, return nonzero if it has more than one SET, else return 709 zero. */ 710 711int 712multiple_sets (insn) 713 rtx insn; 714{ 715 int found; 716 int i; 717 718 /* INSN must be an insn. */ 719 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 720 return 0; 721 722 /* Only a PARALLEL can have multiple SETs. */ 723 if (GET_CODE (PATTERN (insn)) == PARALLEL) 724 { 725 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) 726 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) 727 { 728 /* If we have already found a SET, then return now. */ 729 if (found) 730 return 1; 731 else 732 found = 1; 733 } 734 } 735 736 /* Either zero or one SET. */ 737 return 0; 738} 739 740/* Return the last thing that X was assigned from before *PINSN. Verify that 741 the object is not modified up to VALID_TO. If it was, if we hit 742 a partial assignment to X, or hit a CODE_LABEL first, return X. If we 743 found an assignment, update *PINSN to point to it. 744 ALLOW_HWREG is set to 1 if hardware registers are allowed to be the src. */ 745 746rtx 747find_last_value (x, pinsn, valid_to, allow_hwreg) 748 rtx x; 749 rtx *pinsn; 750 rtx valid_to; 751 int allow_hwreg; 752{ 753 rtx p; 754 755 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; 756 p = PREV_INSN (p)) 757 if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 758 { 759 rtx set = single_set (p); 760 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); 761 762 if (set && rtx_equal_p (x, SET_DEST (set))) 763 { 764 rtx src = SET_SRC (set); 765 766 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) 767 src = XEXP (note, 0); 768 769 if (! modified_between_p (src, PREV_INSN (p), valid_to) 770 /* Reject hard registers because we don't usually want 771 to use them; we'd rather use a pseudo. */ 772 && (! (GET_CODE (src) == REG 773 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg)) 774 { 775 *pinsn = p; 776 return src; 777 } 778 } 779 780 /* If set in non-simple way, we don't have a value. */ 781 if (reg_set_p (x, p)) 782 break; 783 } 784 785 return x; 786} 787 788/* Return nonzero if register in range [REGNO, ENDREGNO) 789 appears either explicitly or implicitly in X 790 other than being stored into. 791 792 References contained within the substructure at LOC do not count. 793 LOC may be zero, meaning don't ignore anything. */ 794 795int 796refers_to_regno_p (regno, endregno, x, loc) 797 int regno, endregno; 798 rtx x; 799 rtx *loc; 800{ 801 register int i; 802 register RTX_CODE code; 803 register char *fmt; 804 805 repeat: 806 /* The contents of a REG_NONNEG note is always zero, so we must come here 807 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ 808 if (x == 0) 809 return 0; 810 811 code = GET_CODE (x); 812 813 switch (code) 814 { 815 case REG: 816 i = REGNO (x); 817 818 /* If we modifying the stack, frame, or argument pointer, it will 819 clobber a virtual register. In fact, we could be more precise, 820 but it isn't worth it. */ 821 if ((i == STACK_POINTER_REGNUM 822#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 823 || i == ARG_POINTER_REGNUM 824#endif 825 || i == FRAME_POINTER_REGNUM) 826 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) 827 return 1; 828 829 return (endregno > i 830 && regno < i + (i < FIRST_PSEUDO_REGISTER 831 ? HARD_REGNO_NREGS (i, GET_MODE (x)) 832 : 1)); 833 834 case SUBREG: 835 /* If this is a SUBREG of a hard reg, we can see exactly which 836 registers are being modified. Otherwise, handle normally. */ 837 if (GET_CODE (SUBREG_REG (x)) == REG 838 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 839 { 840 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 841 int inner_endregno 842 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 843 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 844 845 return endregno > inner_regno && regno < inner_endregno; 846 } 847 break; 848 849 case CLOBBER: 850 case SET: 851 if (&SET_DEST (x) != loc 852 /* Note setting a SUBREG counts as referring to the REG it is in for 853 a pseudo but not for hard registers since we can 854 treat each word individually. */ 855 && ((GET_CODE (SET_DEST (x)) == SUBREG 856 && loc != &SUBREG_REG (SET_DEST (x)) 857 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 858 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 859 && refers_to_regno_p (regno, endregno, 860 SUBREG_REG (SET_DEST (x)), loc)) 861 || (GET_CODE (SET_DEST (x)) != REG 862 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) 863 return 1; 864 865 if (code == CLOBBER || loc == &SET_SRC (x)) 866 return 0; 867 x = SET_SRC (x); 868 goto repeat; 869 870 default: 871 break; 872 } 873 874 /* X does not match, so try its subexpressions. */ 875 876 fmt = GET_RTX_FORMAT (code); 877 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 878 { 879 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 880 { 881 if (i == 0) 882 { 883 x = XEXP (x, 0); 884 goto repeat; 885 } 886 else 887 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) 888 return 1; 889 } 890 else if (fmt[i] == 'E') 891 { 892 register int j; 893 for (j = XVECLEN (x, i) - 1; j >=0; j--) 894 if (loc != &XVECEXP (x, i, j) 895 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) 896 return 1; 897 } 898 } 899 return 0; 900} 901 902/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 903 we check if any register number in X conflicts with the relevant register 904 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 905 contains a MEM (we don't bother checking for memory addresses that can't 906 conflict because we expect this to be a rare case. */ 907 908int 909reg_overlap_mentioned_p (x, in) 910 rtx x, in; 911{ 912 int regno, endregno; 913 914 /* Overly conservative. */ 915 if (GET_CODE (x) == STRICT_LOW_PART) 916 x = XEXP (x, 0); 917 918 /* If either argument is a constant, then modifying X can not affect IN. */ 919 if (CONSTANT_P (x) || CONSTANT_P (in)) 920 return 0; 921 else if (GET_CODE (x) == SUBREG) 922 { 923 regno = REGNO (SUBREG_REG (x)); 924 if (regno < FIRST_PSEUDO_REGISTER) 925 regno += SUBREG_WORD (x); 926 } 927 else if (GET_CODE (x) == REG) 928 regno = REGNO (x); 929 else if (GET_CODE (x) == MEM) 930 { 931 char *fmt; 932 int i; 933 934 if (GET_CODE (in) == MEM) 935 return 1; 936 937 fmt = GET_RTX_FORMAT (GET_CODE (in)); 938 939 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) 940 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) 941 return 1; 942 943 return 0; 944 } 945 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 946 || GET_CODE (x) == CC0) 947 return reg_mentioned_p (x, in); 948 else if (GET_CODE (x) == PARALLEL 949 && GET_MODE (x) == BLKmode) 950 { 951 register int i; 952 953 /* If any register in here refers to it 954 we return true. */ 955 for (i = XVECLEN (x, 0) - 1; i >= 0; i--) 956 if (reg_overlap_mentioned_p (SET_DEST (XVECEXP (x, 0, i)), in)) 957 return 1; 958 return 0; 959 } 960 else 961 abort (); 962 963 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 964 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 965 966 return refers_to_regno_p (regno, endregno, in, NULL_PTR); 967} 968 969/* Used for communications between the next few functions. */ 970 971static int reg_set_last_unknown; 972static rtx reg_set_last_value; 973static int reg_set_last_first_regno, reg_set_last_last_regno; 974 975/* Called via note_stores from reg_set_last. */ 976 977static void 978reg_set_last_1 (x, pat) 979 rtx x; 980 rtx pat; 981{ 982 int first, last; 983 984 /* If X is not a register, or is not one in the range we care 985 about, ignore. */ 986 if (GET_CODE (x) != REG) 987 return; 988 989 first = REGNO (x); 990 last = first + (first < FIRST_PSEUDO_REGISTER 991 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); 992 993 if (first >= reg_set_last_last_regno 994 || last <= reg_set_last_first_regno) 995 return; 996 997 /* If this is a CLOBBER or is some complex LHS, or doesn't modify 998 exactly the registers we care about, show we don't know the value. */ 999 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x 1000 || first != reg_set_last_first_regno 1001 || last != reg_set_last_last_regno) 1002 reg_set_last_unknown = 1; 1003 else 1004 reg_set_last_value = SET_SRC (pat); 1005} 1006 1007/* Return the last value to which REG was set prior to INSN. If we can't 1008 find it easily, return 0. 1009 1010 We only return a REG, SUBREG, or constant because it is too hard to 1011 check if a MEM remains unchanged. */ 1012 1013rtx 1014reg_set_last (x, insn) 1015 rtx x; 1016 rtx insn; 1017{ 1018 rtx orig_insn = insn; 1019 1020 reg_set_last_first_regno = REGNO (x); 1021 1022 reg_set_last_last_regno 1023 = reg_set_last_first_regno 1024 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER 1025 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); 1026 1027 reg_set_last_unknown = 0; 1028 reg_set_last_value = 0; 1029 1030 /* Scan backwards until reg_set_last_1 changed one of the above flags. 1031 Stop when we reach a label or X is a hard reg and we reach a 1032 CALL_INSN (if reg_set_last_last_regno is a hard reg). 1033 1034 If we find a set of X, ensure that its SET_SRC remains unchanged. */ 1035 1036 /* We compare with <= here, because reg_set_last_last_regno 1037 is actually the number of the first reg *not* in X. */ 1038 for (; 1039 insn && GET_CODE (insn) != CODE_LABEL 1040 && ! (GET_CODE (insn) == CALL_INSN 1041 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); 1042 insn = PREV_INSN (insn)) 1043 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 1044 { 1045 note_stores (PATTERN (insn), reg_set_last_1); 1046 if (reg_set_last_unknown) 1047 return 0; 1048 else if (reg_set_last_value) 1049 { 1050 if (CONSTANT_P (reg_set_last_value) 1051 || ((GET_CODE (reg_set_last_value) == REG 1052 || GET_CODE (reg_set_last_value) == SUBREG) 1053 && ! reg_set_between_p (reg_set_last_value, 1054 insn, orig_insn))) 1055 return reg_set_last_value; 1056 else 1057 return 0; 1058 } 1059 } 1060 1061 return 0; 1062} 1063 1064/* This is 1 until after the rtl generation pass. */ 1065int rtx_equal_function_value_matters; 1066 1067/* Return 1 if X and Y are identical-looking rtx's. 1068 This is the Lisp function EQUAL for rtx arguments. */ 1069 1070int 1071rtx_equal_p (x, y) 1072 rtx x, y; 1073{ 1074 register int i; 1075 register int j; 1076 register enum rtx_code code; 1077 register char *fmt; 1078 1079 if (x == y) 1080 return 1; 1081 if (x == 0 || y == 0) 1082 return 0; 1083 1084 code = GET_CODE (x); 1085 /* Rtx's of different codes cannot be equal. */ 1086 if (code != GET_CODE (y)) 1087 return 0; 1088 1089 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. 1090 (REG:SI x) and (REG:HI x) are NOT equivalent. */ 1091 1092 if (GET_MODE (x) != GET_MODE (y)) 1093 return 0; 1094 1095 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ 1096 1097 if (code == REG) 1098 /* Until rtl generation is complete, don't consider a reference to the 1099 return register of the current function the same as the return from a 1100 called function. This eases the job of function integration. Once the 1101 distinction is no longer needed, they can be considered equivalent. */ 1102 return (REGNO (x) == REGNO (y) 1103 && (! rtx_equal_function_value_matters 1104 || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y))); 1105 else if (code == LABEL_REF) 1106 return XEXP (x, 0) == XEXP (y, 0); 1107 else if (code == SYMBOL_REF) 1108 return XSTR (x, 0) == XSTR (y, 0); 1109 else if (code == SCRATCH || code == CONST_DOUBLE) 1110 return 0; 1111 1112 /* Compare the elements. If any pair of corresponding elements 1113 fail to match, return 0 for the whole things. */ 1114 1115 fmt = GET_RTX_FORMAT (code); 1116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1117 { 1118 switch (fmt[i]) 1119 { 1120 case 'w': 1121 if (XWINT (x, i) != XWINT (y, i)) 1122 return 0; 1123 break; 1124 1125 case 'n': 1126 case 'i': 1127 if (XINT (x, i) != XINT (y, i)) 1128 return 0; 1129 break; 1130 1131 case 'V': 1132 case 'E': 1133 /* Two vectors must have the same length. */ 1134 if (XVECLEN (x, i) != XVECLEN (y, i)) 1135 return 0; 1136 1137 /* And the corresponding elements must match. */ 1138 for (j = 0; j < XVECLEN (x, i); j++) 1139 if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) 1140 return 0; 1141 break; 1142 1143 case 'e': 1144 if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) 1145 return 0; 1146 break; 1147 1148 case 'S': 1149 case 's': 1150 if (strcmp (XSTR (x, i), XSTR (y, i))) 1151 return 0; 1152 break; 1153 1154 case 'u': 1155 /* These are just backpointers, so they don't matter. */ 1156 break; 1157 1158 case '0': 1159 break; 1160 1161 /* It is believed that rtx's at this level will never 1162 contain anything but integers and other rtx's, 1163 except for within LABEL_REFs and SYMBOL_REFs. */ 1164 default: 1165 abort (); 1166 } 1167 } 1168 return 1; 1169} 1170 1171/* Call FUN on each register or MEM that is stored into or clobbered by X. 1172 (X would be the pattern of an insn). 1173 FUN receives two arguments: 1174 the REG, MEM, CC0 or PC being stored in or clobbered, 1175 the SET or CLOBBER rtx that does the store. 1176 1177 If the item being stored in or clobbered is a SUBREG of a hard register, 1178 the SUBREG will be passed. */ 1179 1180void 1181note_stores (x, fun) 1182 register rtx x; 1183 void (*fun) PROTO ((rtx, rtx)); 1184{ 1185 if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)) 1186 { 1187 register rtx dest = SET_DEST (x); 1188 while ((GET_CODE (dest) == SUBREG 1189 && (GET_CODE (SUBREG_REG (dest)) != REG 1190 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) 1191 || GET_CODE (dest) == ZERO_EXTRACT 1192 || GET_CODE (dest) == SIGN_EXTRACT 1193 || GET_CODE (dest) == STRICT_LOW_PART) 1194 dest = XEXP (dest, 0); 1195 1196 if (GET_CODE (dest) == PARALLEL 1197 && GET_MODE (dest) == BLKmode) 1198 { 1199 register int i; 1200 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) 1201 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x); 1202 } 1203 else 1204 (*fun) (dest, x); 1205 } 1206 else if (GET_CODE (x) == PARALLEL) 1207 { 1208 register int i; 1209 for (i = XVECLEN (x, 0) - 1; i >= 0; i--) 1210 { 1211 register rtx y = XVECEXP (x, 0, i); 1212 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) 1213 { 1214 register rtx dest = SET_DEST (y); 1215 while ((GET_CODE (dest) == SUBREG 1216 && (GET_CODE (SUBREG_REG (dest)) != REG 1217 || (REGNO (SUBREG_REG (dest)) 1218 >= FIRST_PSEUDO_REGISTER))) 1219 || GET_CODE (dest) == ZERO_EXTRACT 1220 || GET_CODE (dest) == SIGN_EXTRACT 1221 || GET_CODE (dest) == STRICT_LOW_PART) 1222 dest = XEXP (dest, 0); 1223 if (GET_CODE (dest) == PARALLEL 1224 && GET_MODE (dest) == BLKmode) 1225 { 1226 register int i; 1227 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) 1228 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y); 1229 } 1230 else 1231 (*fun) (dest, y); 1232 } 1233 } 1234 } 1235} 1236 1237/* Return nonzero if X's old contents don't survive after INSN. 1238 This will be true if X is (cc0) or if X is a register and 1239 X dies in INSN or because INSN entirely sets X. 1240 1241 "Entirely set" means set directly and not through a SUBREG, 1242 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. 1243 Likewise, REG_INC does not count. 1244 1245 REG may be a hard or pseudo reg. Renumbering is not taken into account, 1246 but for this use that makes no difference, since regs don't overlap 1247 during their lifetimes. Therefore, this function may be used 1248 at any time after deaths have been computed (in flow.c). 1249 1250 If REG is a hard reg that occupies multiple machine registers, this 1251 function will only return 1 if each of those registers will be replaced 1252 by INSN. */ 1253 1254int 1255dead_or_set_p (insn, x) 1256 rtx insn; 1257 rtx x; 1258{ 1259 register int regno, last_regno; 1260 register int i; 1261 1262 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ 1263 if (GET_CODE (x) == CC0) 1264 return 1; 1265 1266 if (GET_CODE (x) != REG) 1267 abort (); 1268 1269 regno = REGNO (x); 1270 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno 1271 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); 1272 1273 for (i = regno; i <= last_regno; i++) 1274 if (! dead_or_set_regno_p (insn, i)) 1275 return 0; 1276 1277 return 1; 1278} 1279 1280/* Utility function for dead_or_set_p to check an individual register. Also 1281 called from flow.c. */ 1282 1283int 1284dead_or_set_regno_p (insn, test_regno) 1285 rtx insn; 1286 int test_regno; 1287{ 1288 int regno, endregno; 1289 rtx link; 1290 1291 /* See if there is a death note for something that includes 1292 TEST_REGNO. */ 1293 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1294 { 1295 if (REG_NOTE_KIND (link) != REG_DEAD 1296 || GET_CODE (XEXP (link, 0)) != REG) 1297 continue; 1298 1299 regno = REGNO (XEXP (link, 0)); 1300 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1301 : regno + HARD_REGNO_NREGS (regno, 1302 GET_MODE (XEXP (link, 0)))); 1303 1304 if (test_regno >= regno && test_regno < endregno) 1305 return 1; 1306 } 1307 1308 if (GET_CODE (insn) == CALL_INSN 1309 && find_regno_fusage (insn, CLOBBER, test_regno)) 1310 return 1; 1311 1312 if (GET_CODE (PATTERN (insn)) == SET) 1313 { 1314 rtx dest = SET_DEST (PATTERN (insn)); 1315 1316 /* A value is totally replaced if it is the destination or the 1317 destination is a SUBREG of REGNO that does not change the number of 1318 words in it. */ 1319 if (GET_CODE (dest) == SUBREG 1320 && (((GET_MODE_SIZE (GET_MODE (dest)) 1321 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 1322 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) 1323 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 1324 dest = SUBREG_REG (dest); 1325 1326 if (GET_CODE (dest) != REG) 1327 return 0; 1328 1329 regno = REGNO (dest); 1330 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1331 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); 1332 1333 return (test_regno >= regno && test_regno < endregno); 1334 } 1335 else if (GET_CODE (PATTERN (insn)) == PARALLEL) 1336 { 1337 register int i; 1338 1339 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 1340 { 1341 rtx body = XVECEXP (PATTERN (insn), 0, i); 1342 1343 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) 1344 { 1345 rtx dest = SET_DEST (body); 1346 1347 if (GET_CODE (dest) == SUBREG 1348 && (((GET_MODE_SIZE (GET_MODE (dest)) 1349 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 1350 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) 1351 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 1352 dest = SUBREG_REG (dest); 1353 1354 if (GET_CODE (dest) != REG) 1355 continue; 1356 1357 regno = REGNO (dest); 1358 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1359 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); 1360 1361 if (test_regno >= regno && test_regno < endregno) 1362 return 1; 1363 } 1364 } 1365 } 1366 1367 return 0; 1368} 1369 1370/* Return the reg-note of kind KIND in insn INSN, if there is one. 1371 If DATUM is nonzero, look for one whose datum is DATUM. */ 1372 1373rtx 1374find_reg_note (insn, kind, datum) 1375 rtx insn; 1376 enum reg_note kind; 1377 rtx datum; 1378{ 1379 register rtx link; 1380 1381 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ 1382 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 1383 return 0; 1384 1385 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1386 if (REG_NOTE_KIND (link) == kind 1387 && (datum == 0 || datum == XEXP (link, 0))) 1388 return link; 1389 return 0; 1390} 1391 1392/* Return the reg-note of kind KIND in insn INSN which applies to register 1393 number REGNO, if any. Return 0 if there is no such reg-note. Note that 1394 the REGNO of this NOTE need not be REGNO if REGNO is a hard register; 1395 it might be the case that the note overlaps REGNO. */ 1396 1397rtx 1398find_regno_note (insn, kind, regno) 1399 rtx insn; 1400 enum reg_note kind; 1401 int regno; 1402{ 1403 register rtx link; 1404 1405 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ 1406 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 1407 return 0; 1408 1409 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1410 if (REG_NOTE_KIND (link) == kind 1411 /* Verify that it is a register, so that scratch and MEM won't cause a 1412 problem here. */ 1413 && GET_CODE (XEXP (link, 0)) == REG 1414 && REGNO (XEXP (link, 0)) <= regno 1415 && ((REGNO (XEXP (link, 0)) 1416 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 1417 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), 1418 GET_MODE (XEXP (link, 0))))) 1419 > regno)) 1420 return link; 1421 return 0; 1422} 1423 1424/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found 1425 in the CALL_INSN_FUNCTION_USAGE information of INSN. */ 1426 1427int 1428find_reg_fusage (insn, code, datum) 1429 rtx insn; 1430 enum rtx_code code; 1431 rtx datum; 1432{ 1433 /* If it's not a CALL_INSN, it can't possibly have a 1434 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ 1435 if (GET_CODE (insn) != CALL_INSN) 1436 return 0; 1437 1438 if (! datum) 1439 abort(); 1440 1441 if (GET_CODE (datum) != REG) 1442 { 1443 register rtx link; 1444 1445 for (link = CALL_INSN_FUNCTION_USAGE (insn); 1446 link; 1447 link = XEXP (link, 1)) 1448 if (GET_CODE (XEXP (link, 0)) == code 1449 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) 1450 return 1; 1451 } 1452 else 1453 { 1454 register int regno = REGNO (datum); 1455 1456 /* CALL_INSN_FUNCTION_USAGE information cannot contain references 1457 to pseudo registers, so don't bother checking. */ 1458 1459 if (regno < FIRST_PSEUDO_REGISTER) 1460 { 1461 int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); 1462 int i; 1463 1464 for (i = regno; i < end_regno; i++) 1465 if (find_regno_fusage (insn, code, i)) 1466 return 1; 1467 } 1468 } 1469 1470 return 0; 1471} 1472 1473/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found 1474 in the CALL_INSN_FUNCTION_USAGE information of INSN. */ 1475 1476int 1477find_regno_fusage (insn, code, regno) 1478 rtx insn; 1479 enum rtx_code code; 1480 int regno; 1481{ 1482 register rtx link; 1483 1484 /* CALL_INSN_FUNCTION_USAGE information cannot contain references 1485 to pseudo registers, so don't bother checking. */ 1486 1487 if (regno >= FIRST_PSEUDO_REGISTER 1488 || GET_CODE (insn) != CALL_INSN ) 1489 return 0; 1490 1491 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) 1492 { 1493 register int regnote; 1494 register rtx op; 1495 1496 if (GET_CODE (op = XEXP (link, 0)) == code 1497 && GET_CODE (SET_DEST (op)) == REG 1498 && (regnote = REGNO (SET_DEST (op))) <= regno 1499 && regnote 1500 + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op))) 1501 > regno) 1502 return 1; 1503 } 1504 1505 return 0; 1506} 1507 1508/* Remove register note NOTE from the REG_NOTES of INSN. */ 1509 1510void 1511remove_note (insn, note) 1512 register rtx note; 1513 register rtx insn; 1514{ 1515 register rtx link; 1516 1517 if (REG_NOTES (insn) == note) 1518 { 1519 REG_NOTES (insn) = XEXP (note, 1); 1520 return; 1521 } 1522 1523 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1524 if (XEXP (link, 1) == note) 1525 { 1526 XEXP (link, 1) = XEXP (note, 1); 1527 return; 1528 } 1529 1530 abort (); 1531} 1532 1533/* Search LISTP (an EXPR_LIST) for NODE and remove NODE from the list 1534 if it is found. 1535 1536 A simple equality test is used to determine if NODE is on the 1537 EXPR_LIST. */ 1538 1539void 1540remove_node_from_expr_list (node, listp) 1541 rtx node; 1542 rtx *listp; 1543{ 1544 rtx temp = *listp; 1545 rtx prev = NULL_RTX; 1546 1547 while (temp) 1548 { 1549 if (node == XEXP (temp, 0)) 1550 { 1551 /* Splice the node out of the list. */ 1552 if (prev) 1553 XEXP (prev, 1) = XEXP (temp, 1); 1554 else 1555 *listp = XEXP (temp, 1); 1556 1557 return; 1558 } 1559 temp = XEXP (temp, 1); 1560 } 1561} 1562 1563/* Nonzero if X contains any volatile instructions. These are instructions 1564 which may cause unpredictable machine state instructions, and thus no 1565 instructions should be moved or combined across them. This includes 1566 only volatile asms and UNSPEC_VOLATILE instructions. */ 1567 1568int 1569volatile_insn_p (x) 1570 rtx x; 1571{ 1572 register RTX_CODE code; 1573 1574 code = GET_CODE (x); 1575 switch (code) 1576 { 1577 case LABEL_REF: 1578 case SYMBOL_REF: 1579 case CONST_INT: 1580 case CONST: 1581 case CONST_DOUBLE: 1582 case CC0: 1583 case PC: 1584 case REG: 1585 case SCRATCH: 1586 case CLOBBER: 1587 case ASM_INPUT: 1588 case ADDR_VEC: 1589 case ADDR_DIFF_VEC: 1590 case CALL: 1591 case MEM: 1592 return 0; 1593 1594 case UNSPEC_VOLATILE: 1595 /* case TRAP_IF: This isn't clear yet. */ 1596 return 1; 1597 1598 case ASM_OPERANDS: 1599 if (MEM_VOLATILE_P (x)) 1600 return 1; 1601 1602 default: 1603 break; 1604 } 1605 1606 /* Recursively scan the operands of this expression. */ 1607 1608 { 1609 register char *fmt = GET_RTX_FORMAT (code); 1610 register int i; 1611 1612 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1613 { 1614 if (fmt[i] == 'e') 1615 { 1616 if (volatile_insn_p (XEXP (x, i))) 1617 return 1; 1618 } 1619 if (fmt[i] == 'E') 1620 { 1621 register int j; 1622 for (j = 0; j < XVECLEN (x, i); j++) 1623 if (volatile_insn_p (XVECEXP (x, i, j))) 1624 return 1; 1625 } 1626 } 1627 } 1628 return 0; 1629} 1630 1631/* Nonzero if X contains any volatile memory references 1632 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ 1633 1634int 1635volatile_refs_p (x) 1636 rtx x; 1637{ 1638 register RTX_CODE code; 1639 1640 code = GET_CODE (x); 1641 switch (code) 1642 { 1643 case LABEL_REF: 1644 case SYMBOL_REF: 1645 case CONST_INT: 1646 case CONST: 1647 case CONST_DOUBLE: 1648 case CC0: 1649 case PC: 1650 case REG: 1651 case SCRATCH: 1652 case CLOBBER: 1653 case ASM_INPUT: 1654 case ADDR_VEC: 1655 case ADDR_DIFF_VEC: 1656 return 0; 1657 1658 case CALL: 1659 case UNSPEC_VOLATILE: 1660 /* case TRAP_IF: This isn't clear yet. */ 1661 return 1; 1662 1663 case MEM: 1664 case ASM_OPERANDS: 1665 if (MEM_VOLATILE_P (x)) 1666 return 1; 1667 1668 default: 1669 break; 1670 } 1671 1672 /* Recursively scan the operands of this expression. */ 1673 1674 { 1675 register char *fmt = GET_RTX_FORMAT (code); 1676 register int i; 1677 1678 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1679 { 1680 if (fmt[i] == 'e') 1681 { 1682 if (volatile_refs_p (XEXP (x, i))) 1683 return 1; 1684 } 1685 if (fmt[i] == 'E') 1686 { 1687 register int j; 1688 for (j = 0; j < XVECLEN (x, i); j++) 1689 if (volatile_refs_p (XVECEXP (x, i, j))) 1690 return 1; 1691 } 1692 } 1693 } 1694 return 0; 1695} 1696 1697/* Similar to above, except that it also rejects register pre- and post- 1698 incrementing. */ 1699 1700int 1701side_effects_p (x) 1702 rtx x; 1703{ 1704 register RTX_CODE code; 1705 1706 code = GET_CODE (x); 1707 switch (code) 1708 { 1709 case LABEL_REF: 1710 case SYMBOL_REF: 1711 case CONST_INT: 1712 case CONST: 1713 case CONST_DOUBLE: 1714 case CC0: 1715 case PC: 1716 case REG: 1717 case SCRATCH: 1718 case ASM_INPUT: 1719 case ADDR_VEC: 1720 case ADDR_DIFF_VEC: 1721 return 0; 1722 1723 case CLOBBER: 1724 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c 1725 when some combination can't be done. If we see one, don't think 1726 that we can simplify the expression. */ 1727 return (GET_MODE (x) != VOIDmode); 1728 1729 case PRE_INC: 1730 case PRE_DEC: 1731 case POST_INC: 1732 case POST_DEC: 1733 case CALL: 1734 case UNSPEC_VOLATILE: 1735 /* case TRAP_IF: This isn't clear yet. */ 1736 return 1; 1737 1738 case MEM: 1739 case ASM_OPERANDS: 1740 if (MEM_VOLATILE_P (x)) 1741 return 1; 1742 1743 default: 1744 break; 1745 } 1746 1747 /* Recursively scan the operands of this expression. */ 1748 1749 { 1750 register char *fmt = GET_RTX_FORMAT (code); 1751 register int i; 1752 1753 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1754 { 1755 if (fmt[i] == 'e') 1756 { 1757 if (side_effects_p (XEXP (x, i))) 1758 return 1; 1759 } 1760 if (fmt[i] == 'E') 1761 { 1762 register int j; 1763 for (j = 0; j < XVECLEN (x, i); j++) 1764 if (side_effects_p (XVECEXP (x, i, j))) 1765 return 1; 1766 } 1767 } 1768 } 1769 return 0; 1770} 1771 1772/* Return nonzero if evaluating rtx X might cause a trap. */ 1773 1774int 1775may_trap_p (x) 1776 rtx x; 1777{ 1778 int i; 1779 enum rtx_code code; 1780 char *fmt; 1781 1782 if (x == 0) 1783 return 0; 1784 code = GET_CODE (x); 1785 switch (code) 1786 { 1787 /* Handle these cases quickly. */ 1788 case CONST_INT: 1789 case CONST_DOUBLE: 1790 case SYMBOL_REF: 1791 case LABEL_REF: 1792 case CONST: 1793 case PC: 1794 case CC0: 1795 case REG: 1796 case SCRATCH: 1797 return 0; 1798 1799 /* Conditional trap can trap! */ 1800 case UNSPEC_VOLATILE: 1801 case TRAP_IF: 1802 return 1; 1803 1804 /* Memory ref can trap unless it's a static var or a stack slot. */ 1805 case MEM: 1806 return rtx_addr_can_trap_p (XEXP (x, 0)); 1807 1808 /* Division by a non-constant might trap. */ 1809 case DIV: 1810 case MOD: 1811 case UDIV: 1812 case UMOD: 1813 if (! CONSTANT_P (XEXP (x, 1)) 1814 || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) 1815 return 1; 1816 /* This was const0_rtx, but by not using that, 1817 we can link this file into other programs. */ 1818 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) 1819 return 1; 1820 break; 1821 1822 case EXPR_LIST: 1823 /* An EXPR_LIST is used to represent a function call. This 1824 certainly may trap. */ 1825 return 1; 1826 1827 default: 1828 /* Any floating arithmetic may trap. */ 1829 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) 1830 return 1; 1831 } 1832 1833 fmt = GET_RTX_FORMAT (code); 1834 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1835 { 1836 if (fmt[i] == 'e') 1837 { 1838 if (may_trap_p (XEXP (x, i))) 1839 return 1; 1840 } 1841 else if (fmt[i] == 'E') 1842 { 1843 register int j; 1844 for (j = 0; j < XVECLEN (x, i); j++) 1845 if (may_trap_p (XVECEXP (x, i, j))) 1846 return 1; 1847 } 1848 } 1849 return 0; 1850} 1851 1852/* Return nonzero if X contains a comparison that is not either EQ or NE, 1853 i.e., an inequality. */ 1854 1855int 1856inequality_comparisons_p (x) 1857 rtx x; 1858{ 1859 register char *fmt; 1860 register int len, i; 1861 register enum rtx_code code = GET_CODE (x); 1862 1863 switch (code) 1864 { 1865 case REG: 1866 case SCRATCH: 1867 case PC: 1868 case CC0: 1869 case CONST_INT: 1870 case CONST_DOUBLE: 1871 case CONST: 1872 case LABEL_REF: 1873 case SYMBOL_REF: 1874 return 0; 1875 1876 case LT: 1877 case LTU: 1878 case GT: 1879 case GTU: 1880 case LE: 1881 case LEU: 1882 case GE: 1883 case GEU: 1884 return 1; 1885 1886 default: 1887 break; 1888 } 1889 1890 len = GET_RTX_LENGTH (code); 1891 fmt = GET_RTX_FORMAT (code); 1892 1893 for (i = 0; i < len; i++) 1894 { 1895 if (fmt[i] == 'e') 1896 { 1897 if (inequality_comparisons_p (XEXP (x, i))) 1898 return 1; 1899 } 1900 else if (fmt[i] == 'E') 1901 { 1902 register int j; 1903 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1904 if (inequality_comparisons_p (XVECEXP (x, i, j))) 1905 return 1; 1906 } 1907 } 1908 1909 return 0; 1910} 1911 1912/* Replace any occurrence of FROM in X with TO. The function does 1913 not enter into CONST_DOUBLE for the replace. 1914 1915 Note that copying is not done so X must not be shared unless all copies 1916 are to be modified. */ 1917 1918rtx 1919replace_rtx (x, from, to) 1920 rtx x, from, to; 1921{ 1922 register int i, j; 1923 register char *fmt; 1924 1925 /* The following prevents loops occurrence when we change MEM in 1926 CONST_DOUBLE onto the same CONST_DOUBLE. */ 1927 if (x != 0 && GET_CODE (x) == CONST_DOUBLE) 1928 return x; 1929 1930 if (x == from) 1931 return to; 1932 1933 /* Allow this function to make replacements in EXPR_LISTs. */ 1934 if (x == 0) 1935 return 0; 1936 1937 fmt = GET_RTX_FORMAT (GET_CODE (x)); 1938 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 1939 { 1940 if (fmt[i] == 'e') 1941 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); 1942 else if (fmt[i] == 'E') 1943 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1944 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); 1945 } 1946 1947 return x; 1948} 1949 1950/* Throughout the rtx X, replace many registers according to REG_MAP. 1951 Return the replacement for X (which may be X with altered contents). 1952 REG_MAP[R] is the replacement for register R, or 0 for don't replace. 1953 NREGS is the length of REG_MAP; regs >= NREGS are not mapped. 1954 1955 We only support REG_MAP entries of REG or SUBREG. Also, hard registers 1956 should not be mapped to pseudos or vice versa since validate_change 1957 is not called. 1958 1959 If REPLACE_DEST is 1, replacements are also done in destinations; 1960 otherwise, only sources are replaced. */ 1961 1962rtx 1963replace_regs (x, reg_map, nregs, replace_dest) 1964 rtx x; 1965 rtx *reg_map; 1966 int nregs; 1967 int replace_dest; 1968{ 1969 register enum rtx_code code; 1970 register int i; 1971 register char *fmt; 1972 1973 if (x == 0) 1974 return x; 1975 1976 code = GET_CODE (x); 1977 switch (code) 1978 { 1979 case SCRATCH: 1980 case PC: 1981 case CC0: 1982 case CONST_INT: 1983 case CONST_DOUBLE: 1984 case CONST: 1985 case SYMBOL_REF: 1986 case LABEL_REF: 1987 return x; 1988 1989 case REG: 1990 /* Verify that the register has an entry before trying to access it. */ 1991 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) 1992 { 1993 /* SUBREGs can't be shared. Always return a copy to ensure that if 1994 this replacement occurs more than once then each instance will 1995 get distinct rtx. */ 1996 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) 1997 return copy_rtx (reg_map[REGNO (x)]); 1998 return reg_map[REGNO (x)]; 1999 } 2000 return x; 2001 2002 case SUBREG: 2003 /* Prevent making nested SUBREGs. */ 2004 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs 2005 && reg_map[REGNO (SUBREG_REG (x))] != 0 2006 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) 2007 { 2008 rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; 2009 rtx map_inner = SUBREG_REG (map_val); 2010 2011 if (GET_MODE (x) == GET_MODE (map_inner)) 2012 return map_inner; 2013 else 2014 { 2015 /* We cannot call gen_rtx here since we may be linked with 2016 genattrtab.c. */ 2017 /* Let's try clobbering the incoming SUBREG and see 2018 if this is really safe. */ 2019 SUBREG_REG (x) = map_inner; 2020 SUBREG_WORD (x) += SUBREG_WORD (map_val); 2021 return x; 2022#if 0 2023 rtx new = rtx_alloc (SUBREG); 2024 PUT_MODE (new, GET_MODE (x)); 2025 SUBREG_REG (new) = map_inner; 2026 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); 2027#endif 2028 } 2029 } 2030 break; 2031 2032 case SET: 2033 if (replace_dest) 2034 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); 2035 2036 else if (GET_CODE (SET_DEST (x)) == MEM 2037 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) 2038 /* Even if we are not to replace destinations, replace register if it 2039 is CONTAINED in destination (destination is memory or 2040 STRICT_LOW_PART). */ 2041 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), 2042 reg_map, nregs, 0); 2043 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) 2044 /* Similarly, for ZERO_EXTRACT we replace all operands. */ 2045 break; 2046 2047 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); 2048 return x; 2049 2050 default: 2051 break; 2052 } 2053 2054 fmt = GET_RTX_FORMAT (code); 2055 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2056 { 2057 if (fmt[i] == 'e') 2058 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); 2059 if (fmt[i] == 'E') 2060 { 2061 register int j; 2062 for (j = 0; j < XVECLEN (x, i); j++) 2063 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, 2064 nregs, replace_dest); 2065 } 2066 } 2067 return x; 2068} 2069 2070/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is 2071 not in the constant pool and not in the condition of an IF_THEN_ELSE. */ 2072 2073static int 2074jmp_uses_reg_or_mem (x) 2075 rtx x; 2076{ 2077 enum rtx_code code = GET_CODE (x); 2078 int i, j; 2079 char *fmt; 2080 2081 switch (code) 2082 { 2083 case CONST: 2084 case LABEL_REF: 2085 case PC: 2086 return 0; 2087 2088 case REG: 2089 return 1; 2090 2091 case MEM: 2092 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF 2093 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); 2094 2095 case IF_THEN_ELSE: 2096 return (jmp_uses_reg_or_mem (XEXP (x, 1)) 2097 || jmp_uses_reg_or_mem (XEXP (x, 2))); 2098 2099 case PLUS: case MINUS: case MULT: 2100 return (jmp_uses_reg_or_mem (XEXP (x, 0)) 2101 || jmp_uses_reg_or_mem (XEXP (x, 1))); 2102 2103 default: 2104 break; 2105 } 2106 2107 fmt = GET_RTX_FORMAT (code); 2108 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2109 { 2110 if (fmt[i] == 'e' 2111 && jmp_uses_reg_or_mem (XEXP (x, i))) 2112 return 1; 2113 2114 if (fmt[i] == 'E') 2115 for (j = 0; j < XVECLEN (x, i); j++) 2116 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) 2117 return 1; 2118 } 2119 2120 return 0; 2121} 2122 2123/* Return nonzero if INSN is an indirect jump (aka computed jump). 2124 2125 Tablejumps and casesi insns are not considered indirect jumps; 2126 we can recognize them by a (use (lael_ref)). */ 2127 2128int 2129computed_jump_p (insn) 2130 rtx insn; 2131{ 2132 int i; 2133 if (GET_CODE (insn) == JUMP_INSN) 2134 { 2135 rtx pat = PATTERN (insn); 2136 2137 if (GET_CODE (pat) == PARALLEL) 2138 { 2139 int len = XVECLEN (pat, 0); 2140 int has_use_labelref = 0; 2141 2142 for (i = len - 1; i >= 0; i--) 2143 if (GET_CODE (XVECEXP (pat, 0, i)) == USE 2144 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) 2145 == LABEL_REF)) 2146 has_use_labelref = 1; 2147 2148 if (! has_use_labelref) 2149 for (i = len - 1; i >= 0; i--) 2150 if (GET_CODE (XVECEXP (pat, 0, i)) == SET 2151 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx 2152 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) 2153 return 1; 2154 } 2155 else if (GET_CODE (pat) == SET 2156 && SET_DEST (pat) == pc_rtx 2157 && jmp_uses_reg_or_mem (SET_SRC (pat))) 2158 return 1; 2159 } 2160 return 0; 2161} 2162 2163/* Traverse X via depth-first search, calling F for each 2164 sub-expression (including X itself). F is also passed the DATA. 2165 If F returns -1, do not traverse sub-expressions, but continue 2166 traversing the rest of the tree. If F ever returns any other 2167 non-zero value, stop the traversal, and return the value returned 2168 by F. Otherwise, return 0. This function does not traverse inside 2169 tree structure that contains RTX_EXPRs, or into sub-expressions 2170 whose format code is `0' since it is not known whether or not those 2171 codes are actually RTL. 2172 2173 This routine is very general, and could (should?) be used to 2174 implement many of the other routines in this file. */ 2175 2176int 2177for_each_rtx (x, f, data) 2178 rtx *x; 2179 rtx_function f; 2180 void *data; 2181{ 2182 int result; 2183 int length; 2184 char* format; 2185 int i; 2186 2187 /* Call F on X. */ 2188 result = (*f)(x, data); 2189 if (result == -1) 2190 /* Do not traverse sub-expressions. */ 2191 return 0; 2192 else if (result != 0) 2193 /* Stop the traversal. */ 2194 return result; 2195 2196 if (*x == NULL_RTX) 2197 /* There are no sub-expressions. */ 2198 return 0; 2199 2200 length = GET_RTX_LENGTH (GET_CODE (*x)); 2201 format = GET_RTX_FORMAT (GET_CODE (*x)); 2202 2203 for (i = 0; i < length; ++i) 2204 { 2205 switch (format[i]) 2206 { 2207 case 'e': 2208 result = for_each_rtx (&XEXP (*x, i), f, data); 2209 if (result != 0) 2210 return result; 2211 break; 2212 2213 case 'V': 2214 case 'E': 2215 if (XVEC (*x, i) != 0) 2216 { 2217 int j; 2218 for (j = 0; j < XVECLEN (*x, i); ++j) 2219 { 2220 result = for_each_rtx (&XVECEXP (*x, i, j), f, data); 2221 if (result != 0) 2222 return result; 2223 } 2224 } 2225 break; 2226 2227 default: 2228 /* Nothing to do. */ 2229 break; 2230 } 2231 2232 } 2233 2234 return 0; 2235} 2236 2237/* Searches X for any reference to REGNO, returning the rtx of the 2238 reference found if any. Otherwise, returns NULL_RTX. */ 2239 2240rtx 2241regno_use_in (regno, x) 2242 int regno; 2243 rtx x; 2244{ 2245 register char *fmt; 2246 int i, j; 2247 rtx tem; 2248 2249 if (GET_CODE (x) == REG && REGNO (x) == regno) 2250 return x; 2251 2252 fmt = GET_RTX_FORMAT (GET_CODE (x)); 2253 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 2254 { 2255 if (fmt[i] == 'e') 2256 { 2257 if ((tem = regno_use_in (regno, XEXP (x, i)))) 2258 return tem; 2259 } 2260 else if (fmt[i] == 'E') 2261 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 2262 if ((tem = regno_use_in (regno , XVECEXP (x, i, j)))) 2263 return tem; 2264 } 2265 2266 return NULL_RTX; 2267} 2268 2269 2270/* Return 1 if X is an autoincrement side effect and the register is 2271 not the stack pointer. */ 2272int 2273auto_inc_p (x) 2274 rtx x; 2275{ 2276 switch (GET_CODE (x)) 2277 { 2278 case PRE_INC: 2279 case POST_INC: 2280 case PRE_DEC: 2281 case POST_DEC: 2282 case PRE_MODIFY: 2283 case POST_MODIFY: 2284 /* There are no REG_INC notes for SP. */ 2285 if (XEXP (x, 0) != stack_pointer_rtx) 2286 return 1; 2287 default: 2288 break; 2289 } 2290 return 0; 2291} 2292 2293/* Return 1 if the sequence of instructions beginning with FROM and up 2294 to and including TO is safe to move. If NEW_TO is non-NULL, and 2295 the sequence is not already safe to move, but can be easily 2296 extended to a sequence which is safe, then NEW_TO will point to the 2297 end of the extended sequence. 2298 2299 For now, this function only checks that the region contains whole 2300 exception regiongs, but it could be extended to check additional 2301 conditions as well. */ 2302 2303int 2304insns_safe_to_move_p (from, to, new_to) 2305 rtx from; 2306 rtx to; 2307 rtx *new_to; 2308{ 2309 int eh_region_count = 0; 2310 int past_to_p = 0; 2311 rtx r = from; 2312 2313 /* By default, assume the end of the region will be what was 2314 suggested. */ 2315 if (new_to) 2316 *new_to = to; 2317 2318 while (r) 2319 { 2320 if (GET_CODE (r) == NOTE) 2321 { 2322 switch (NOTE_LINE_NUMBER (r)) 2323 { 2324 case NOTE_INSN_EH_REGION_BEG: 2325 ++eh_region_count; 2326 break; 2327 2328 case NOTE_INSN_EH_REGION_END: 2329 if (eh_region_count == 0) 2330 /* This sequence of instructions contains the end of 2331 an exception region, but not he beginning. Moving 2332 it will cause chaos. */ 2333 return 0; 2334 2335 --eh_region_count; 2336 break; 2337 2338 default: 2339 break; 2340 } 2341 } 2342 else if (past_to_p) 2343 /* If we've passed TO, and we see a non-note instruction, we 2344 can't extend the sequence to a movable sequence. */ 2345 return 0; 2346 2347 if (r == to) 2348 { 2349 if (!new_to) 2350 /* It's OK to move the sequence if there were matched sets of 2351 exception region notes. */ 2352 return eh_region_count == 0; 2353 2354 past_to_p = 1; 2355 } 2356 2357 /* It's OK to move the sequence if there were matched sets of 2358 exception region notes. */ 2359 if (past_to_p && eh_region_count == 0) 2360 { 2361 *new_to = r; 2362 return 1; 2363 } 2364 2365 /* Go to the next instruction. */ 2366 r = NEXT_INSN (r); 2367 } 2368 2369 return 0; 2370} 2371