rtlanal.c revision 50397
1/* Analyze RTL for C-Compiler 2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21 22#include "config.h" 23#include "system.h" 24#include "rtl.h" 25 26static int rtx_addr_can_trap_p PROTO((rtx)); 27static void reg_set_p_1 PROTO((rtx, rtx)); 28static void reg_set_last_1 PROTO((rtx, rtx)); 29 30 31/* Forward declarations */ 32static int jmp_uses_reg_or_mem PROTO((rtx)); 33 34/* Bit flags that specify the machine subtype we are compiling for. 35 Bits are tested using macros TARGET_... defined in the tm.h file 36 and set by `-m...' switches. Must be defined in rtlanal.c. */ 37 38int target_flags; 39 40/* Return 1 if the value of X is unstable 41 (would be different at a different point in the program). 42 The frame pointer, arg pointer, etc. are considered stable 43 (within one function) and so is anything marked `unchanging'. */ 44 45int 46rtx_unstable_p (x) 47 rtx x; 48{ 49 register RTX_CODE code = GET_CODE (x); 50 register int i; 51 register char *fmt; 52 53 if (code == MEM) 54 return ! RTX_UNCHANGING_P (x); 55 56 if (code == QUEUED) 57 return 1; 58 59 if (code == CONST || code == CONST_INT) 60 return 0; 61 62 if (code == REG) 63 return ! (REGNO (x) == FRAME_POINTER_REGNUM 64 || REGNO (x) == HARD_FRAME_POINTER_REGNUM 65 || REGNO (x) == ARG_POINTER_REGNUM 66 || RTX_UNCHANGING_P (x)); 67 68 fmt = GET_RTX_FORMAT (code); 69 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 70 if (fmt[i] == 'e') 71 if (rtx_unstable_p (XEXP (x, i))) 72 return 1; 73 return 0; 74} 75 76/* Return 1 if X has a value that can vary even between two 77 executions of the program. 0 means X can be compared reliably 78 against certain constants or near-constants. 79 The frame pointer and the arg pointer are considered constant. */ 80 81int 82rtx_varies_p (x) 83 rtx x; 84{ 85 register RTX_CODE code = GET_CODE (x); 86 register int i; 87 register char *fmt; 88 89 switch (code) 90 { 91 case MEM: 92 case QUEUED: 93 return 1; 94 95 case CONST: 96 case CONST_INT: 97 case CONST_DOUBLE: 98 case SYMBOL_REF: 99 case LABEL_REF: 100 return 0; 101 102 case REG: 103 /* Note that we have to test for the actual rtx used for the frame 104 and arg pointers and not just the register number in case we have 105 eliminated the frame and/or arg pointer and are using it 106 for pseudos. */ 107 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx 108 || x == arg_pointer_rtx || x == pic_offset_table_rtx); 109 110 case LO_SUM: 111 /* The operand 0 of a LO_SUM is considered constant 112 (in fact is it related specifically to operand 1). */ 113 return rtx_varies_p (XEXP (x, 1)); 114 115 default: 116 break; 117 } 118 119 fmt = GET_RTX_FORMAT (code); 120 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 121 if (fmt[i] == 'e') 122 if (rtx_varies_p (XEXP (x, i))) 123 return 1; 124 return 0; 125} 126 127/* Return 0 if the use of X as an address in a MEM can cause a trap. */ 128 129static int 130rtx_addr_can_trap_p (x) 131 register rtx x; 132{ 133 register enum rtx_code code = GET_CODE (x); 134 135 switch (code) 136 { 137 case SYMBOL_REF: 138 case LABEL_REF: 139 /* SYMBOL_REF is problematic due to the possible presence of 140 a #pragma weak, but to say that loads from symbols can trap is 141 *very* costly. It's not at all clear what's best here. For 142 now, we ignore the impact of #pragma weak. */ 143 return 0; 144 145 case REG: 146 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ 147 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx 148 || x == stack_pointer_rtx || x == arg_pointer_rtx); 149 150 case CONST: 151 return rtx_addr_can_trap_p (XEXP (x, 0)); 152 153 case PLUS: 154 /* An address is assumed not to trap if it is an address that can't 155 trap plus a constant integer. */ 156 return (rtx_addr_can_trap_p (XEXP (x, 0)) 157 || GET_CODE (XEXP (x, 1)) != CONST_INT); 158 159 case LO_SUM: 160 return rtx_addr_can_trap_p (XEXP (x, 1)); 161 162 default: 163 break; 164 } 165 166 /* If it isn't one of the case above, it can cause a trap. */ 167 return 1; 168} 169 170/* Return 1 if X refers to a memory location whose address 171 cannot be compared reliably with constant addresses, 172 or if X refers to a BLKmode memory object. */ 173 174int 175rtx_addr_varies_p (x) 176 rtx x; 177{ 178 register enum rtx_code code; 179 register int i; 180 register char *fmt; 181 182 if (x == 0) 183 return 0; 184 185 code = GET_CODE (x); 186 if (code == MEM) 187 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); 188 189 fmt = GET_RTX_FORMAT (code); 190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 191 if (fmt[i] == 'e') 192 { 193 if (rtx_addr_varies_p (XEXP (x, i))) 194 return 1; 195 } 196 else if (fmt[i] == 'E') 197 { 198 int j; 199 for (j = 0; j < XVECLEN (x, i); j++) 200 if (rtx_addr_varies_p (XVECEXP (x, i, j))) 201 return 1; 202 } 203 return 0; 204} 205 206/* Return the value of the integer term in X, if one is apparent; 207 otherwise return 0. 208 Only obvious integer terms are detected. 209 This is used in cse.c with the `related_value' field.*/ 210 211HOST_WIDE_INT 212get_integer_term (x) 213 rtx x; 214{ 215 if (GET_CODE (x) == CONST) 216 x = XEXP (x, 0); 217 218 if (GET_CODE (x) == MINUS 219 && GET_CODE (XEXP (x, 1)) == CONST_INT) 220 return - INTVAL (XEXP (x, 1)); 221 if (GET_CODE (x) == PLUS 222 && GET_CODE (XEXP (x, 1)) == CONST_INT) 223 return INTVAL (XEXP (x, 1)); 224 return 0; 225} 226 227/* If X is a constant, return the value sans apparent integer term; 228 otherwise return 0. 229 Only obvious integer terms are detected. */ 230 231rtx 232get_related_value (x) 233 rtx x; 234{ 235 if (GET_CODE (x) != CONST) 236 return 0; 237 x = XEXP (x, 0); 238 if (GET_CODE (x) == PLUS 239 && GET_CODE (XEXP (x, 1)) == CONST_INT) 240 return XEXP (x, 0); 241 else if (GET_CODE (x) == MINUS 242 && GET_CODE (XEXP (x, 1)) == CONST_INT) 243 return XEXP (x, 0); 244 return 0; 245} 246 247/* Nonzero if register REG appears somewhere within IN. 248 Also works if REG is not a register; in this case it checks 249 for a subexpression of IN that is Lisp "equal" to REG. */ 250 251int 252reg_mentioned_p (reg, in) 253 register rtx reg, in; 254{ 255 register char *fmt; 256 register int i; 257 register enum rtx_code code; 258 259 if (in == 0) 260 return 0; 261 262 if (reg == in) 263 return 1; 264 265 if (GET_CODE (in) == LABEL_REF) 266 return reg == XEXP (in, 0); 267 268 code = GET_CODE (in); 269 270 switch (code) 271 { 272 /* Compare registers by number. */ 273 case REG: 274 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); 275 276 /* These codes have no constituent expressions 277 and are unique. */ 278 case SCRATCH: 279 case CC0: 280 case PC: 281 return 0; 282 283 case CONST_INT: 284 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); 285 286 case CONST_DOUBLE: 287 /* These are kept unique for a given value. */ 288 return 0; 289 290 default: 291 break; 292 } 293 294 if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) 295 return 1; 296 297 fmt = GET_RTX_FORMAT (code); 298 299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 300 { 301 if (fmt[i] == 'E') 302 { 303 register int j; 304 for (j = XVECLEN (in, i) - 1; j >= 0; j--) 305 if (reg_mentioned_p (reg, XVECEXP (in, i, j))) 306 return 1; 307 } 308 else if (fmt[i] == 'e' 309 && reg_mentioned_p (reg, XEXP (in, i))) 310 return 1; 311 } 312 return 0; 313} 314 315/* Return 1 if in between BEG and END, exclusive of BEG and END, there is 316 no CODE_LABEL insn. */ 317 318int 319no_labels_between_p (beg, end) 320 rtx beg, end; 321{ 322 register rtx p; 323 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) 324 if (GET_CODE (p) == CODE_LABEL) 325 return 0; 326 return 1; 327} 328 329/* Nonzero if register REG is used in an insn between 330 FROM_INSN and TO_INSN (exclusive of those two). */ 331 332int 333reg_used_between_p (reg, from_insn, to_insn) 334 rtx reg, from_insn, to_insn; 335{ 336 register rtx insn; 337 338 if (from_insn == to_insn) 339 return 0; 340 341 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 342 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 343 && (reg_overlap_mentioned_p (reg, PATTERN (insn)) 344 || (GET_CODE (insn) == CALL_INSN 345 && (find_reg_fusage (insn, USE, reg) 346 || find_reg_fusage (insn, CLOBBER, reg))))) 347 return 1; 348 return 0; 349} 350 351/* Nonzero if the old value of X, a register, is referenced in BODY. If X 352 is entirely replaced by a new value and the only use is as a SET_DEST, 353 we do not consider it a reference. */ 354 355int 356reg_referenced_p (x, body) 357 rtx x; 358 rtx body; 359{ 360 int i; 361 362 switch (GET_CODE (body)) 363 { 364 case SET: 365 if (reg_overlap_mentioned_p (x, SET_SRC (body))) 366 return 1; 367 368 /* If the destination is anything other than CC0, PC, a REG or a SUBREG 369 of a REG that occupies all of the REG, the insn references X if 370 it is mentioned in the destination. */ 371 if (GET_CODE (SET_DEST (body)) != CC0 372 && GET_CODE (SET_DEST (body)) != PC 373 && GET_CODE (SET_DEST (body)) != REG 374 && ! (GET_CODE (SET_DEST (body)) == SUBREG 375 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG 376 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) 377 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 378 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) 379 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) 380 && reg_overlap_mentioned_p (x, SET_DEST (body))) 381 return 1; 382 return 0; 383 384 case ASM_OPERANDS: 385 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) 386 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) 387 return 1; 388 return 0; 389 390 case CALL: 391 case USE: 392 return reg_overlap_mentioned_p (x, body); 393 394 case TRAP_IF: 395 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); 396 397 case UNSPEC: 398 case UNSPEC_VOLATILE: 399 case PARALLEL: 400 for (i = XVECLEN (body, 0) - 1; i >= 0; i--) 401 if (reg_referenced_p (x, XVECEXP (body, 0, i))) 402 return 1; 403 return 0; 404 405 default: 406 return 0; 407 } 408} 409 410/* Nonzero if register REG is referenced in an insn between 411 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do 412 not count. */ 413 414int 415reg_referenced_between_p (reg, from_insn, to_insn) 416 rtx reg, from_insn, to_insn; 417{ 418 register rtx insn; 419 420 if (from_insn == to_insn) 421 return 0; 422 423 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 424 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 425 && (reg_referenced_p (reg, PATTERN (insn)) 426 || (GET_CODE (insn) == CALL_INSN 427 && find_reg_fusage (insn, USE, reg)))) 428 return 1; 429 return 0; 430} 431 432/* Nonzero if register REG is set or clobbered in an insn between 433 FROM_INSN and TO_INSN (exclusive of those two). */ 434 435int 436reg_set_between_p (reg, from_insn, to_insn) 437 rtx reg, from_insn, to_insn; 438{ 439 register rtx insn; 440 441 if (from_insn == to_insn) 442 return 0; 443 444 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) 445 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 446 && reg_set_p (reg, insn)) 447 return 1; 448 return 0; 449} 450 451/* Internals of reg_set_between_p. */ 452 453static rtx reg_set_reg; 454static int reg_set_flag; 455 456static void 457reg_set_p_1 (x, pat) 458 rtx x; 459 rtx pat ATTRIBUTE_UNUSED; 460{ 461 /* We don't want to return 1 if X is a MEM that contains a register 462 within REG_SET_REG. */ 463 464 if ((GET_CODE (x) != MEM) 465 && reg_overlap_mentioned_p (reg_set_reg, x)) 466 reg_set_flag = 1; 467} 468 469int 470reg_set_p (reg, insn) 471 rtx reg, insn; 472{ 473 rtx body = insn; 474 475 /* We can be passed an insn or part of one. If we are passed an insn, 476 check if a side-effect of the insn clobbers REG. */ 477 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 478 { 479 if (FIND_REG_INC_NOTE (insn, reg) 480 || (GET_CODE (insn) == CALL_INSN 481 /* We'd like to test call_used_regs here, but rtlanal.c can't 482 reference that variable due to its use in genattrtab. So 483 we'll just be more conservative. 484 485 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE 486 information holds all clobbered registers. */ 487 && ((GET_CODE (reg) == REG 488 && REGNO (reg) < FIRST_PSEUDO_REGISTER) 489 || GET_CODE (reg) == MEM 490 || find_reg_fusage (insn, CLOBBER, reg)))) 491 return 1; 492 493 body = PATTERN (insn); 494 } 495 496 reg_set_reg = reg; 497 reg_set_flag = 0; 498 note_stores (body, reg_set_p_1); 499 return reg_set_flag; 500} 501 502/* Similar to reg_set_between_p, but check all registers in X. Return 0 503 only if none of them are modified between START and END. Return 1 if 504 X contains a MEM; this routine does not perform any memory aliasing. */ 505 506int 507modified_between_p (x, start, end) 508 rtx x; 509 rtx start, end; 510{ 511 enum rtx_code code = GET_CODE (x); 512 char *fmt; 513 int i, j; 514 515 switch (code) 516 { 517 case CONST_INT: 518 case CONST_DOUBLE: 519 case CONST: 520 case SYMBOL_REF: 521 case LABEL_REF: 522 return 0; 523 524 case PC: 525 case CC0: 526 return 1; 527 528 case MEM: 529 /* If the memory is not constant, assume it is modified. If it is 530 constant, we still have to check the address. */ 531 if (! RTX_UNCHANGING_P (x)) 532 return 1; 533 break; 534 535 case REG: 536 return reg_set_between_p (x, start, end); 537 538 default: 539 break; 540 } 541 542 fmt = GET_RTX_FORMAT (code); 543 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 544 { 545 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) 546 return 1; 547 548 if (fmt[i] == 'E') 549 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 550 if (modified_between_p (XVECEXP (x, i, j), start, end)) 551 return 1; 552 } 553 554 return 0; 555} 556 557/* Similar to reg_set_p, but check all registers in X. Return 0 only if none 558 of them are modified in INSN. Return 1 if X contains a MEM; this routine 559 does not perform any memory aliasing. */ 560 561int 562modified_in_p (x, insn) 563 rtx x; 564 rtx insn; 565{ 566 enum rtx_code code = GET_CODE (x); 567 char *fmt; 568 int i, j; 569 570 switch (code) 571 { 572 case CONST_INT: 573 case CONST_DOUBLE: 574 case CONST: 575 case SYMBOL_REF: 576 case LABEL_REF: 577 return 0; 578 579 case PC: 580 case CC0: 581 return 1; 582 583 case MEM: 584 /* If the memory is not constant, assume it is modified. If it is 585 constant, we still have to check the address. */ 586 if (! RTX_UNCHANGING_P (x)) 587 return 1; 588 break; 589 590 case REG: 591 return reg_set_p (x, insn); 592 593 default: 594 break; 595 } 596 597 fmt = GET_RTX_FORMAT (code); 598 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 599 { 600 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) 601 return 1; 602 603 if (fmt[i] == 'E') 604 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 605 if (modified_in_p (XVECEXP (x, i, j), insn)) 606 return 1; 607 } 608 609 return 0; 610} 611 612/* Given an INSN, return a SET expression if this insn has only a single SET. 613 It may also have CLOBBERs, USEs, or SET whose output 614 will not be used, which we ignore. */ 615 616rtx 617single_set (insn) 618 rtx insn; 619{ 620 rtx set; 621 int i; 622 623 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 624 return 0; 625 626 if (GET_CODE (PATTERN (insn)) == SET) 627 return PATTERN (insn); 628 629 else if (GET_CODE (PATTERN (insn)) == PARALLEL) 630 { 631 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) 632 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET 633 && (! find_reg_note (insn, REG_UNUSED, 634 SET_DEST (XVECEXP (PATTERN (insn), 0, i))) 635 || side_effects_p (XVECEXP (PATTERN (insn), 0, i)))) 636 { 637 if (set) 638 return 0; 639 else 640 set = XVECEXP (PATTERN (insn), 0, i); 641 } 642 return set; 643 } 644 645 return 0; 646} 647 648/* Return the last thing that X was assigned from before *PINSN. Verify that 649 the object is not modified up to VALID_TO. If it was, if we hit 650 a partial assignment to X, or hit a CODE_LABEL first, return X. If we 651 found an assignment, update *PINSN to point to it. */ 652 653rtx 654find_last_value (x, pinsn, valid_to) 655 rtx x; 656 rtx *pinsn; 657 rtx valid_to; 658{ 659 rtx p; 660 661 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; 662 p = PREV_INSN (p)) 663 if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 664 { 665 rtx set = single_set (p); 666 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); 667 668 if (set && rtx_equal_p (x, SET_DEST (set))) 669 { 670 rtx src = SET_SRC (set); 671 672 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) 673 src = XEXP (note, 0); 674 675 if (! modified_between_p (src, PREV_INSN (p), valid_to) 676 /* Reject hard registers because we don't usually want 677 to use them; we'd rather use a pseudo. */ 678 && ! (GET_CODE (src) == REG 679 && REGNO (src) < FIRST_PSEUDO_REGISTER)) 680 { 681 *pinsn = p; 682 return src; 683 } 684 } 685 686 /* If set in non-simple way, we don't have a value. */ 687 if (reg_set_p (x, p)) 688 break; 689 } 690 691 return x; 692} 693 694/* Return nonzero if register in range [REGNO, ENDREGNO) 695 appears either explicitly or implicitly in X 696 other than being stored into. 697 698 References contained within the substructure at LOC do not count. 699 LOC may be zero, meaning don't ignore anything. */ 700 701int 702refers_to_regno_p (regno, endregno, x, loc) 703 int regno, endregno; 704 rtx x; 705 rtx *loc; 706{ 707 register int i; 708 register RTX_CODE code; 709 register char *fmt; 710 711 repeat: 712 /* The contents of a REG_NONNEG note is always zero, so we must come here 713 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ 714 if (x == 0) 715 return 0; 716 717 code = GET_CODE (x); 718 719 switch (code) 720 { 721 case REG: 722 i = REGNO (x); 723 724 /* If we modifying the stack, frame, or argument pointer, it will 725 clobber a virtual register. In fact, we could be more precise, 726 but it isn't worth it. */ 727 if ((i == STACK_POINTER_REGNUM 728#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 729 || i == ARG_POINTER_REGNUM 730#endif 731 || i == FRAME_POINTER_REGNUM) 732 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) 733 return 1; 734 735 return (endregno > i 736 && regno < i + (i < FIRST_PSEUDO_REGISTER 737 ? HARD_REGNO_NREGS (i, GET_MODE (x)) 738 : 1)); 739 740 case SUBREG: 741 /* If this is a SUBREG of a hard reg, we can see exactly which 742 registers are being modified. Otherwise, handle normally. */ 743 if (GET_CODE (SUBREG_REG (x)) == REG 744 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 745 { 746 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 747 int inner_endregno 748 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 749 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 750 751 return endregno > inner_regno && regno < inner_endregno; 752 } 753 break; 754 755 case CLOBBER: 756 case SET: 757 if (&SET_DEST (x) != loc 758 /* Note setting a SUBREG counts as referring to the REG it is in for 759 a pseudo but not for hard registers since we can 760 treat each word individually. */ 761 && ((GET_CODE (SET_DEST (x)) == SUBREG 762 && loc != &SUBREG_REG (SET_DEST (x)) 763 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 764 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 765 && refers_to_regno_p (regno, endregno, 766 SUBREG_REG (SET_DEST (x)), loc)) 767 || (GET_CODE (SET_DEST (x)) != REG 768 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) 769 return 1; 770 771 if (code == CLOBBER || loc == &SET_SRC (x)) 772 return 0; 773 x = SET_SRC (x); 774 goto repeat; 775 776 default: 777 break; 778 } 779 780 /* X does not match, so try its subexpressions. */ 781 782 fmt = GET_RTX_FORMAT (code); 783 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 784 { 785 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 786 { 787 if (i == 0) 788 { 789 x = XEXP (x, 0); 790 goto repeat; 791 } 792 else 793 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) 794 return 1; 795 } 796 else if (fmt[i] == 'E') 797 { 798 register int j; 799 for (j = XVECLEN (x, i) - 1; j >=0; j--) 800 if (loc != &XVECEXP (x, i, j) 801 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) 802 return 1; 803 } 804 } 805 return 0; 806} 807 808/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 809 we check if any register number in X conflicts with the relevant register 810 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 811 contains a MEM (we don't bother checking for memory addresses that can't 812 conflict because we expect this to be a rare case. */ 813 814int 815reg_overlap_mentioned_p (x, in) 816 rtx x, in; 817{ 818 int regno, endregno; 819 820 /* Overly conservative. */ 821 if (GET_CODE (x) == STRICT_LOW_PART) 822 x = XEXP (x, 0); 823 824 /* If either argument is a constant, then modifying X can not affect IN. */ 825 if (CONSTANT_P (x) || CONSTANT_P (in)) 826 return 0; 827 else if (GET_CODE (x) == SUBREG) 828 { 829 regno = REGNO (SUBREG_REG (x)); 830 if (regno < FIRST_PSEUDO_REGISTER) 831 regno += SUBREG_WORD (x); 832 } 833 else if (GET_CODE (x) == REG) 834 regno = REGNO (x); 835 else if (GET_CODE (x) == MEM) 836 { 837 char *fmt; 838 int i; 839 840 if (GET_CODE (in) == MEM) 841 return 1; 842 843 fmt = GET_RTX_FORMAT (GET_CODE (in)); 844 845 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) 846 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) 847 return 1; 848 849 return 0; 850 } 851 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 852 || GET_CODE (x) == CC0) 853 return reg_mentioned_p (x, in); 854 else 855 abort (); 856 857 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 858 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 859 860 return refers_to_regno_p (regno, endregno, in, NULL_PTR); 861} 862 863/* Used for communications between the next few functions. */ 864 865static int reg_set_last_unknown; 866static rtx reg_set_last_value; 867static int reg_set_last_first_regno, reg_set_last_last_regno; 868 869/* Called via note_stores from reg_set_last. */ 870 871static void 872reg_set_last_1 (x, pat) 873 rtx x; 874 rtx pat; 875{ 876 int first, last; 877 878 /* If X is not a register, or is not one in the range we care 879 about, ignore. */ 880 if (GET_CODE (x) != REG) 881 return; 882 883 first = REGNO (x); 884 last = first + (first < FIRST_PSEUDO_REGISTER 885 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); 886 887 if (first >= reg_set_last_last_regno 888 || last <= reg_set_last_first_regno) 889 return; 890 891 /* If this is a CLOBBER or is some complex LHS, or doesn't modify 892 exactly the registers we care about, show we don't know the value. */ 893 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x 894 || first != reg_set_last_first_regno 895 || last != reg_set_last_last_regno) 896 reg_set_last_unknown = 1; 897 else 898 reg_set_last_value = SET_SRC (pat); 899} 900 901/* Return the last value to which REG was set prior to INSN. If we can't 902 find it easily, return 0. 903 904 We only return a REG, SUBREG, or constant because it is too hard to 905 check if a MEM remains unchanged. */ 906 907rtx 908reg_set_last (x, insn) 909 rtx x; 910 rtx insn; 911{ 912 rtx orig_insn = insn; 913 914 reg_set_last_first_regno = REGNO (x); 915 916 reg_set_last_last_regno 917 = reg_set_last_first_regno 918 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER 919 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); 920 921 reg_set_last_unknown = 0; 922 reg_set_last_value = 0; 923 924 /* Scan backwards until reg_set_last_1 changed one of the above flags. 925 Stop when we reach a label or X is a hard reg and we reach a 926 CALL_INSN (if reg_set_last_last_regno is a hard reg). 927 928 If we find a set of X, ensure that its SET_SRC remains unchanged. */ 929 930 /* We compare with <= here, because reg_set_last_last_regno 931 is actually the number of the first reg *not* in X. */ 932 for (; 933 insn && GET_CODE (insn) != CODE_LABEL 934 && ! (GET_CODE (insn) == CALL_INSN 935 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); 936 insn = PREV_INSN (insn)) 937 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 938 { 939 note_stores (PATTERN (insn), reg_set_last_1); 940 if (reg_set_last_unknown) 941 return 0; 942 else if (reg_set_last_value) 943 { 944 if (CONSTANT_P (reg_set_last_value) 945 || ((GET_CODE (reg_set_last_value) == REG 946 || GET_CODE (reg_set_last_value) == SUBREG) 947 && ! reg_set_between_p (reg_set_last_value, 948 insn, orig_insn))) 949 return reg_set_last_value; 950 else 951 return 0; 952 } 953 } 954 955 return 0; 956} 957 958/* This is 1 until after the rtl generation pass. */ 959int rtx_equal_function_value_matters; 960 961/* Return 1 if X and Y are identical-looking rtx's. 962 This is the Lisp function EQUAL for rtx arguments. */ 963 964int 965rtx_equal_p (x, y) 966 rtx x, y; 967{ 968 register int i; 969 register int j; 970 register enum rtx_code code; 971 register char *fmt; 972 973 if (x == y) 974 return 1; 975 if (x == 0 || y == 0) 976 return 0; 977 978 code = GET_CODE (x); 979 /* Rtx's of different codes cannot be equal. */ 980 if (code != GET_CODE (y)) 981 return 0; 982 983 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. 984 (REG:SI x) and (REG:HI x) are NOT equivalent. */ 985 986 if (GET_MODE (x) != GET_MODE (y)) 987 return 0; 988 989 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ 990 991 if (code == REG) 992 /* Until rtl generation is complete, don't consider a reference to the 993 return register of the current function the same as the return from a 994 called function. This eases the job of function integration. Once the 995 distinction is no longer needed, they can be considered equivalent. */ 996 return (REGNO (x) == REGNO (y) 997 && (! rtx_equal_function_value_matters 998 || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y))); 999 else if (code == LABEL_REF) 1000 return XEXP (x, 0) == XEXP (y, 0); 1001 else if (code == SYMBOL_REF) 1002 return XSTR (x, 0) == XSTR (y, 0); 1003 else if (code == SCRATCH || code == CONST_DOUBLE) 1004 return 0; 1005 1006 /* Compare the elements. If any pair of corresponding elements 1007 fail to match, return 0 for the whole things. */ 1008 1009 fmt = GET_RTX_FORMAT (code); 1010 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1011 { 1012 switch (fmt[i]) 1013 { 1014 case 'w': 1015 if (XWINT (x, i) != XWINT (y, i)) 1016 return 0; 1017 break; 1018 1019 case 'n': 1020 case 'i': 1021 if (XINT (x, i) != XINT (y, i)) 1022 return 0; 1023 break; 1024 1025 case 'V': 1026 case 'E': 1027 /* Two vectors must have the same length. */ 1028 if (XVECLEN (x, i) != XVECLEN (y, i)) 1029 return 0; 1030 1031 /* And the corresponding elements must match. */ 1032 for (j = 0; j < XVECLEN (x, i); j++) 1033 if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) 1034 return 0; 1035 break; 1036 1037 case 'e': 1038 if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) 1039 return 0; 1040 break; 1041 1042 case 'S': 1043 case 's': 1044 if (strcmp (XSTR (x, i), XSTR (y, i))) 1045 return 0; 1046 break; 1047 1048 case 'u': 1049 /* These are just backpointers, so they don't matter. */ 1050 break; 1051 1052 case '0': 1053 break; 1054 1055 /* It is believed that rtx's at this level will never 1056 contain anything but integers and other rtx's, 1057 except for within LABEL_REFs and SYMBOL_REFs. */ 1058 default: 1059 abort (); 1060 } 1061 } 1062 return 1; 1063} 1064 1065/* Call FUN on each register or MEM that is stored into or clobbered by X. 1066 (X would be the pattern of an insn). 1067 FUN receives two arguments: 1068 the REG, MEM, CC0 or PC being stored in or clobbered, 1069 the SET or CLOBBER rtx that does the store. 1070 1071 If the item being stored in or clobbered is a SUBREG of a hard register, 1072 the SUBREG will be passed. */ 1073 1074void 1075note_stores (x, fun) 1076 register rtx x; 1077 void (*fun) (); 1078{ 1079 if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)) 1080 { 1081 register rtx dest = SET_DEST (x); 1082 while ((GET_CODE (dest) == SUBREG 1083 && (GET_CODE (SUBREG_REG (dest)) != REG 1084 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) 1085 || GET_CODE (dest) == ZERO_EXTRACT 1086 || GET_CODE (dest) == SIGN_EXTRACT 1087 || GET_CODE (dest) == STRICT_LOW_PART) 1088 dest = XEXP (dest, 0); 1089 (*fun) (dest, x); 1090 } 1091 else if (GET_CODE (x) == PARALLEL) 1092 { 1093 register int i; 1094 for (i = XVECLEN (x, 0) - 1; i >= 0; i--) 1095 { 1096 register rtx y = XVECEXP (x, 0, i); 1097 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) 1098 { 1099 register rtx dest = SET_DEST (y); 1100 while ((GET_CODE (dest) == SUBREG 1101 && (GET_CODE (SUBREG_REG (dest)) != REG 1102 || (REGNO (SUBREG_REG (dest)) 1103 >= FIRST_PSEUDO_REGISTER))) 1104 || GET_CODE (dest) == ZERO_EXTRACT 1105 || GET_CODE (dest) == SIGN_EXTRACT 1106 || GET_CODE (dest) == STRICT_LOW_PART) 1107 dest = XEXP (dest, 0); 1108 (*fun) (dest, y); 1109 } 1110 } 1111 } 1112} 1113 1114/* Return nonzero if X's old contents don't survive after INSN. 1115 This will be true if X is (cc0) or if X is a register and 1116 X dies in INSN or because INSN entirely sets X. 1117 1118 "Entirely set" means set directly and not through a SUBREG, 1119 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. 1120 Likewise, REG_INC does not count. 1121 1122 REG may be a hard or pseudo reg. Renumbering is not taken into account, 1123 but for this use that makes no difference, since regs don't overlap 1124 during their lifetimes. Therefore, this function may be used 1125 at any time after deaths have been computed (in flow.c). 1126 1127 If REG is a hard reg that occupies multiple machine registers, this 1128 function will only return 1 if each of those registers will be replaced 1129 by INSN. */ 1130 1131int 1132dead_or_set_p (insn, x) 1133 rtx insn; 1134 rtx x; 1135{ 1136 register int regno, last_regno; 1137 register int i; 1138 1139 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ 1140 if (GET_CODE (x) == CC0) 1141 return 1; 1142 1143 if (GET_CODE (x) != REG) 1144 abort (); 1145 1146 regno = REGNO (x); 1147 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno 1148 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); 1149 1150 for (i = regno; i <= last_regno; i++) 1151 if (! dead_or_set_regno_p (insn, i)) 1152 return 0; 1153 1154 return 1; 1155} 1156 1157/* Utility function for dead_or_set_p to check an individual register. Also 1158 called from flow.c. */ 1159 1160int 1161dead_or_set_regno_p (insn, test_regno) 1162 rtx insn; 1163 int test_regno; 1164{ 1165 int regno, endregno; 1166 rtx link; 1167 1168 /* REG_READ notes are not normally maintained after reload, so we 1169 ignore them if the are invalid. */ 1170 if (! reload_completed 1171#ifdef PRESERVE_DEATH_INFO_REGNO_P 1172 || PRESERVE_DEATH_INFO_REGNO_P (test_regno) 1173#endif 1174 ) 1175 { 1176 /* See if there is a death note for something that includes 1177 TEST_REGNO. */ 1178 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1179 { 1180 if (REG_NOTE_KIND (link) != REG_DEAD 1181 || GET_CODE (XEXP (link, 0)) != REG) 1182 continue; 1183 1184 regno = REGNO (XEXP (link, 0)); 1185 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1186 : regno + HARD_REGNO_NREGS (regno, 1187 GET_MODE (XEXP (link, 0)))); 1188 1189 if (test_regno >= regno && test_regno < endregno) 1190 return 1; 1191 } 1192 } 1193 1194 if (GET_CODE (insn) == CALL_INSN 1195 && find_regno_fusage (insn, CLOBBER, test_regno)) 1196 return 1; 1197 1198 if (GET_CODE (PATTERN (insn)) == SET) 1199 { 1200 rtx dest = SET_DEST (PATTERN (insn)); 1201 1202 /* A value is totally replaced if it is the destination or the 1203 destination is a SUBREG of REGNO that does not change the number of 1204 words in it. */ 1205 if (GET_CODE (dest) == SUBREG 1206 && (((GET_MODE_SIZE (GET_MODE (dest)) 1207 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 1208 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) 1209 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 1210 dest = SUBREG_REG (dest); 1211 1212 if (GET_CODE (dest) != REG) 1213 return 0; 1214 1215 regno = REGNO (dest); 1216 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1217 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); 1218 1219 return (test_regno >= regno && test_regno < endregno); 1220 } 1221 else if (GET_CODE (PATTERN (insn)) == PARALLEL) 1222 { 1223 register int i; 1224 1225 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 1226 { 1227 rtx body = XVECEXP (PATTERN (insn), 0, i); 1228 1229 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) 1230 { 1231 rtx dest = SET_DEST (body); 1232 1233 if (GET_CODE (dest) == SUBREG 1234 && (((GET_MODE_SIZE (GET_MODE (dest)) 1235 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 1236 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) 1237 + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 1238 dest = SUBREG_REG (dest); 1239 1240 if (GET_CODE (dest) != REG) 1241 continue; 1242 1243 regno = REGNO (dest); 1244 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 1245 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); 1246 1247 if (test_regno >= regno && test_regno < endregno) 1248 return 1; 1249 } 1250 } 1251 } 1252 1253 return 0; 1254} 1255 1256/* Return the reg-note of kind KIND in insn INSN, if there is one. 1257 If DATUM is nonzero, look for one whose datum is DATUM. */ 1258 1259rtx 1260find_reg_note (insn, kind, datum) 1261 rtx insn; 1262 enum reg_note kind; 1263 rtx datum; 1264{ 1265 register rtx link; 1266 1267 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ 1268 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 1269 return 0; 1270 1271 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1272 if (REG_NOTE_KIND (link) == kind 1273 && (datum == 0 || datum == XEXP (link, 0))) 1274 return link; 1275 return 0; 1276} 1277 1278/* Return the reg-note of kind KIND in insn INSN which applies to register 1279 number REGNO, if any. Return 0 if there is no such reg-note. Note that 1280 the REGNO of this NOTE need not be REGNO if REGNO is a hard register; 1281 it might be the case that the note overlaps REGNO. */ 1282 1283rtx 1284find_regno_note (insn, kind, regno) 1285 rtx insn; 1286 enum reg_note kind; 1287 int regno; 1288{ 1289 register rtx link; 1290 1291 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */ 1292 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 1293 return 0; 1294 1295 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1296 if (REG_NOTE_KIND (link) == kind 1297 /* Verify that it is a register, so that scratch and MEM won't cause a 1298 problem here. */ 1299 && GET_CODE (XEXP (link, 0)) == REG 1300 && REGNO (XEXP (link, 0)) <= regno 1301 && ((REGNO (XEXP (link, 0)) 1302 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 1303 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), 1304 GET_MODE (XEXP (link, 0))))) 1305 > regno)) 1306 return link; 1307 return 0; 1308} 1309 1310/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found 1311 in the CALL_INSN_FUNCTION_USAGE information of INSN. */ 1312 1313int 1314find_reg_fusage (insn, code, datum) 1315 rtx insn; 1316 enum rtx_code code; 1317 rtx datum; 1318{ 1319 /* If it's not a CALL_INSN, it can't possibly have a 1320 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ 1321 if (GET_CODE (insn) != CALL_INSN) 1322 return 0; 1323 1324 if (! datum) 1325 abort(); 1326 1327 if (GET_CODE (datum) != REG) 1328 { 1329 register rtx link; 1330 1331 for (link = CALL_INSN_FUNCTION_USAGE (insn); 1332 link; 1333 link = XEXP (link, 1)) 1334 if (GET_CODE (XEXP (link, 0)) == code 1335 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) 1336 return 1; 1337 } 1338 else 1339 { 1340 register int regno = REGNO (datum); 1341 1342 /* CALL_INSN_FUNCTION_USAGE information cannot contain references 1343 to pseudo registers, so don't bother checking. */ 1344 1345 if (regno < FIRST_PSEUDO_REGISTER) 1346 { 1347 int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); 1348 int i; 1349 1350 for (i = regno; i < end_regno; i++) 1351 if (find_regno_fusage (insn, code, i)) 1352 return 1; 1353 } 1354 } 1355 1356 return 0; 1357} 1358 1359/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found 1360 in the CALL_INSN_FUNCTION_USAGE information of INSN. */ 1361 1362int 1363find_regno_fusage (insn, code, regno) 1364 rtx insn; 1365 enum rtx_code code; 1366 int regno; 1367{ 1368 register rtx link; 1369 1370 /* CALL_INSN_FUNCTION_USAGE information cannot contain references 1371 to pseudo registers, so don't bother checking. */ 1372 1373 if (regno >= FIRST_PSEUDO_REGISTER 1374 || GET_CODE (insn) != CALL_INSN ) 1375 return 0; 1376 1377 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) 1378 { 1379 register int regnote; 1380 register rtx op; 1381 1382 if (GET_CODE (op = XEXP (link, 0)) == code 1383 && GET_CODE (SET_DEST (op)) == REG 1384 && (regnote = REGNO (SET_DEST (op))) <= regno 1385 && regnote 1386 + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op))) 1387 > regno) 1388 return 1; 1389 } 1390 1391 return 0; 1392} 1393 1394/* Remove register note NOTE from the REG_NOTES of INSN. */ 1395 1396void 1397remove_note (insn, note) 1398 register rtx note; 1399 register rtx insn; 1400{ 1401 register rtx link; 1402 1403 if (REG_NOTES (insn) == note) 1404 { 1405 REG_NOTES (insn) = XEXP (note, 1); 1406 return; 1407 } 1408 1409 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 1410 if (XEXP (link, 1) == note) 1411 { 1412 XEXP (link, 1) = XEXP (note, 1); 1413 return; 1414 } 1415 1416 abort (); 1417} 1418 1419/* Nonzero if X contains any volatile instructions. These are instructions 1420 which may cause unpredictable machine state instructions, and thus no 1421 instructions should be moved or combined across them. This includes 1422 only volatile asms and UNSPEC_VOLATILE instructions. */ 1423 1424int 1425volatile_insn_p (x) 1426 rtx x; 1427{ 1428 register RTX_CODE code; 1429 1430 code = GET_CODE (x); 1431 switch (code) 1432 { 1433 case LABEL_REF: 1434 case SYMBOL_REF: 1435 case CONST_INT: 1436 case CONST: 1437 case CONST_DOUBLE: 1438 case CC0: 1439 case PC: 1440 case REG: 1441 case SCRATCH: 1442 case CLOBBER: 1443 case ASM_INPUT: 1444 case ADDR_VEC: 1445 case ADDR_DIFF_VEC: 1446 case CALL: 1447 case MEM: 1448 return 0; 1449 1450 case UNSPEC_VOLATILE: 1451 /* case TRAP_IF: This isn't clear yet. */ 1452 return 1; 1453 1454 case ASM_OPERANDS: 1455 if (MEM_VOLATILE_P (x)) 1456 return 1; 1457 1458 default: 1459 break; 1460 } 1461 1462 /* Recursively scan the operands of this expression. */ 1463 1464 { 1465 register char *fmt = GET_RTX_FORMAT (code); 1466 register int i; 1467 1468 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1469 { 1470 if (fmt[i] == 'e') 1471 { 1472 if (volatile_insn_p (XEXP (x, i))) 1473 return 1; 1474 } 1475 if (fmt[i] == 'E') 1476 { 1477 register int j; 1478 for (j = 0; j < XVECLEN (x, i); j++) 1479 if (volatile_insn_p (XVECEXP (x, i, j))) 1480 return 1; 1481 } 1482 } 1483 } 1484 return 0; 1485} 1486 1487/* Nonzero if X contains any volatile memory references 1488 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ 1489 1490int 1491volatile_refs_p (x) 1492 rtx x; 1493{ 1494 register RTX_CODE code; 1495 1496 code = GET_CODE (x); 1497 switch (code) 1498 { 1499 case LABEL_REF: 1500 case SYMBOL_REF: 1501 case CONST_INT: 1502 case CONST: 1503 case CONST_DOUBLE: 1504 case CC0: 1505 case PC: 1506 case REG: 1507 case SCRATCH: 1508 case CLOBBER: 1509 case ASM_INPUT: 1510 case ADDR_VEC: 1511 case ADDR_DIFF_VEC: 1512 return 0; 1513 1514 case CALL: 1515 case UNSPEC_VOLATILE: 1516 /* case TRAP_IF: This isn't clear yet. */ 1517 return 1; 1518 1519 case MEM: 1520 case ASM_OPERANDS: 1521 if (MEM_VOLATILE_P (x)) 1522 return 1; 1523 1524 default: 1525 break; 1526 } 1527 1528 /* Recursively scan the operands of this expression. */ 1529 1530 { 1531 register char *fmt = GET_RTX_FORMAT (code); 1532 register int i; 1533 1534 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1535 { 1536 if (fmt[i] == 'e') 1537 { 1538 if (volatile_refs_p (XEXP (x, i))) 1539 return 1; 1540 } 1541 if (fmt[i] == 'E') 1542 { 1543 register int j; 1544 for (j = 0; j < XVECLEN (x, i); j++) 1545 if (volatile_refs_p (XVECEXP (x, i, j))) 1546 return 1; 1547 } 1548 } 1549 } 1550 return 0; 1551} 1552 1553/* Similar to above, except that it also rejects register pre- and post- 1554 incrementing. */ 1555 1556int 1557side_effects_p (x) 1558 rtx x; 1559{ 1560 register RTX_CODE code; 1561 1562 code = GET_CODE (x); 1563 switch (code) 1564 { 1565 case LABEL_REF: 1566 case SYMBOL_REF: 1567 case CONST_INT: 1568 case CONST: 1569 case CONST_DOUBLE: 1570 case CC0: 1571 case PC: 1572 case REG: 1573 case SCRATCH: 1574 case ASM_INPUT: 1575 case ADDR_VEC: 1576 case ADDR_DIFF_VEC: 1577 return 0; 1578 1579 case CLOBBER: 1580 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c 1581 when some combination can't be done. If we see one, don't think 1582 that we can simplify the expression. */ 1583 return (GET_MODE (x) != VOIDmode); 1584 1585 case PRE_INC: 1586 case PRE_DEC: 1587 case POST_INC: 1588 case POST_DEC: 1589 case CALL: 1590 case UNSPEC_VOLATILE: 1591 /* case TRAP_IF: This isn't clear yet. */ 1592 return 1; 1593 1594 case MEM: 1595 case ASM_OPERANDS: 1596 if (MEM_VOLATILE_P (x)) 1597 return 1; 1598 1599 default: 1600 break; 1601 } 1602 1603 /* Recursively scan the operands of this expression. */ 1604 1605 { 1606 register char *fmt = GET_RTX_FORMAT (code); 1607 register int i; 1608 1609 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1610 { 1611 if (fmt[i] == 'e') 1612 { 1613 if (side_effects_p (XEXP (x, i))) 1614 return 1; 1615 } 1616 if (fmt[i] == 'E') 1617 { 1618 register int j; 1619 for (j = 0; j < XVECLEN (x, i); j++) 1620 if (side_effects_p (XVECEXP (x, i, j))) 1621 return 1; 1622 } 1623 } 1624 } 1625 return 0; 1626} 1627 1628/* Return nonzero if evaluating rtx X might cause a trap. */ 1629 1630int 1631may_trap_p (x) 1632 rtx x; 1633{ 1634 int i; 1635 enum rtx_code code; 1636 char *fmt; 1637 1638 if (x == 0) 1639 return 0; 1640 code = GET_CODE (x); 1641 switch (code) 1642 { 1643 /* Handle these cases quickly. */ 1644 case CONST_INT: 1645 case CONST_DOUBLE: 1646 case SYMBOL_REF: 1647 case LABEL_REF: 1648 case CONST: 1649 case PC: 1650 case CC0: 1651 case REG: 1652 case SCRATCH: 1653 return 0; 1654 1655 /* Conditional trap can trap! */ 1656 case UNSPEC_VOLATILE: 1657 case TRAP_IF: 1658 return 1; 1659 1660 /* Memory ref can trap unless it's a static var or a stack slot. */ 1661 case MEM: 1662 return rtx_addr_can_trap_p (XEXP (x, 0)); 1663 1664 /* Division by a non-constant might trap. */ 1665 case DIV: 1666 case MOD: 1667 case UDIV: 1668 case UMOD: 1669 if (! CONSTANT_P (XEXP (x, 1)) 1670 || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) 1671 return 1; 1672 /* This was const0_rtx, but by not using that, 1673 we can link this file into other programs. */ 1674 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) 1675 return 1; 1676 break; 1677 1678 case EXPR_LIST: 1679 /* An EXPR_LIST is used to represent a function call. This 1680 certainly may trap. */ 1681 return 1; 1682 1683 default: 1684 /* Any floating arithmetic may trap. */ 1685 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) 1686 return 1; 1687 } 1688 1689 fmt = GET_RTX_FORMAT (code); 1690 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1691 { 1692 if (fmt[i] == 'e') 1693 { 1694 if (may_trap_p (XEXP (x, i))) 1695 return 1; 1696 } 1697 else if (fmt[i] == 'E') 1698 { 1699 register int j; 1700 for (j = 0; j < XVECLEN (x, i); j++) 1701 if (may_trap_p (XVECEXP (x, i, j))) 1702 return 1; 1703 } 1704 } 1705 return 0; 1706} 1707 1708/* Return nonzero if X contains a comparison that is not either EQ or NE, 1709 i.e., an inequality. */ 1710 1711int 1712inequality_comparisons_p (x) 1713 rtx x; 1714{ 1715 register char *fmt; 1716 register int len, i; 1717 register enum rtx_code code = GET_CODE (x); 1718 1719 switch (code) 1720 { 1721 case REG: 1722 case SCRATCH: 1723 case PC: 1724 case CC0: 1725 case CONST_INT: 1726 case CONST_DOUBLE: 1727 case CONST: 1728 case LABEL_REF: 1729 case SYMBOL_REF: 1730 return 0; 1731 1732 case LT: 1733 case LTU: 1734 case GT: 1735 case GTU: 1736 case LE: 1737 case LEU: 1738 case GE: 1739 case GEU: 1740 return 1; 1741 1742 default: 1743 break; 1744 } 1745 1746 len = GET_RTX_LENGTH (code); 1747 fmt = GET_RTX_FORMAT (code); 1748 1749 for (i = 0; i < len; i++) 1750 { 1751 if (fmt[i] == 'e') 1752 { 1753 if (inequality_comparisons_p (XEXP (x, i))) 1754 return 1; 1755 } 1756 else if (fmt[i] == 'E') 1757 { 1758 register int j; 1759 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1760 if (inequality_comparisons_p (XVECEXP (x, i, j))) 1761 return 1; 1762 } 1763 } 1764 1765 return 0; 1766} 1767 1768/* Replace any occurrence of FROM in X with TO. The function does 1769 not enter into CONST_DOUBLE for the replace. 1770 1771 Note that copying is not done so X must not be shared unless all copies 1772 are to be modified. */ 1773 1774rtx 1775replace_rtx (x, from, to) 1776 rtx x, from, to; 1777{ 1778 register int i, j; 1779 register char *fmt; 1780 1781 /* The following prevents loops occurrence when we change MEM in 1782 CONST_DOUBLE onto the same CONST_DOUBLE. */ 1783 if (x != 0 && GET_CODE (x) == CONST_DOUBLE) 1784 return x; 1785 1786 if (x == from) 1787 return to; 1788 1789 /* Allow this function to make replacements in EXPR_LISTs. */ 1790 if (x == 0) 1791 return 0; 1792 1793 fmt = GET_RTX_FORMAT (GET_CODE (x)); 1794 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 1795 { 1796 if (fmt[i] == 'e') 1797 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); 1798 else if (fmt[i] == 'E') 1799 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1800 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); 1801 } 1802 1803 return x; 1804} 1805 1806/* Throughout the rtx X, replace many registers according to REG_MAP. 1807 Return the replacement for X (which may be X with altered contents). 1808 REG_MAP[R] is the replacement for register R, or 0 for don't replace. 1809 NREGS is the length of REG_MAP; regs >= NREGS are not mapped. 1810 1811 We only support REG_MAP entries of REG or SUBREG. Also, hard registers 1812 should not be mapped to pseudos or vice versa since validate_change 1813 is not called. 1814 1815 If REPLACE_DEST is 1, replacements are also done in destinations; 1816 otherwise, only sources are replaced. */ 1817 1818rtx 1819replace_regs (x, reg_map, nregs, replace_dest) 1820 rtx x; 1821 rtx *reg_map; 1822 int nregs; 1823 int replace_dest; 1824{ 1825 register enum rtx_code code; 1826 register int i; 1827 register char *fmt; 1828 1829 if (x == 0) 1830 return x; 1831 1832 code = GET_CODE (x); 1833 switch (code) 1834 { 1835 case SCRATCH: 1836 case PC: 1837 case CC0: 1838 case CONST_INT: 1839 case CONST_DOUBLE: 1840 case CONST: 1841 case SYMBOL_REF: 1842 case LABEL_REF: 1843 return x; 1844 1845 case REG: 1846 /* Verify that the register has an entry before trying to access it. */ 1847 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) 1848 { 1849 /* SUBREGs can't be shared. Always return a copy to ensure that if 1850 this replacement occurs more than once then each instance will 1851 get distinct rtx. */ 1852 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) 1853 return copy_rtx (reg_map[REGNO (x)]); 1854 return reg_map[REGNO (x)]; 1855 } 1856 return x; 1857 1858 case SUBREG: 1859 /* Prevent making nested SUBREGs. */ 1860 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs 1861 && reg_map[REGNO (SUBREG_REG (x))] != 0 1862 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) 1863 { 1864 rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; 1865 rtx map_inner = SUBREG_REG (map_val); 1866 1867 if (GET_MODE (x) == GET_MODE (map_inner)) 1868 return map_inner; 1869 else 1870 { 1871 /* We cannot call gen_rtx here since we may be linked with 1872 genattrtab.c. */ 1873 /* Let's try clobbering the incoming SUBREG and see 1874 if this is really safe. */ 1875 SUBREG_REG (x) = map_inner; 1876 SUBREG_WORD (x) += SUBREG_WORD (map_val); 1877 return x; 1878#if 0 1879 rtx new = rtx_alloc (SUBREG); 1880 PUT_MODE (new, GET_MODE (x)); 1881 SUBREG_REG (new) = map_inner; 1882 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); 1883#endif 1884 } 1885 } 1886 break; 1887 1888 case SET: 1889 if (replace_dest) 1890 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); 1891 1892 else if (GET_CODE (SET_DEST (x)) == MEM 1893 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) 1894 /* Even if we are not to replace destinations, replace register if it 1895 is CONTAINED in destination (destination is memory or 1896 STRICT_LOW_PART). */ 1897 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), 1898 reg_map, nregs, 0); 1899 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) 1900 /* Similarly, for ZERO_EXTRACT we replace all operands. */ 1901 break; 1902 1903 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); 1904 return x; 1905 1906 default: 1907 break; 1908 } 1909 1910 fmt = GET_RTX_FORMAT (code); 1911 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1912 { 1913 if (fmt[i] == 'e') 1914 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); 1915 if (fmt[i] == 'E') 1916 { 1917 register int j; 1918 for (j = 0; j < XVECLEN (x, i); j++) 1919 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, 1920 nregs, replace_dest); 1921 } 1922 } 1923 return x; 1924} 1925 1926/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is 1927 not in the constant pool and not in the condition of an IF_THEN_ELSE. */ 1928 1929static int 1930jmp_uses_reg_or_mem (x) 1931 rtx x; 1932{ 1933 enum rtx_code code = GET_CODE (x); 1934 int i, j; 1935 char *fmt; 1936 1937 switch (code) 1938 { 1939 case CONST: 1940 case LABEL_REF: 1941 case PC: 1942 return 0; 1943 1944 case REG: 1945 return 1; 1946 1947 case MEM: 1948 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF 1949 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))); 1950 1951 case IF_THEN_ELSE: 1952 return (jmp_uses_reg_or_mem (XEXP (x, 1)) 1953 || jmp_uses_reg_or_mem (XEXP (x, 2))); 1954 1955 case PLUS: case MINUS: case MULT: 1956 return (jmp_uses_reg_or_mem (XEXP (x, 0)) 1957 || jmp_uses_reg_or_mem (XEXP (x, 1))); 1958 1959 default: 1960 break; 1961 } 1962 1963 fmt = GET_RTX_FORMAT (code); 1964 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1965 { 1966 if (fmt[i] == 'e' 1967 && jmp_uses_reg_or_mem (XEXP (x, i))) 1968 return 1; 1969 1970 if (fmt[i] == 'E') 1971 for (j = 0; j < XVECLEN (x, i); j++) 1972 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j))) 1973 return 1; 1974 } 1975 1976 return 0; 1977} 1978 1979/* Return nonzero if INSN is an indirect jump (aka computed jump). 1980 1981 Tablejumps and casesi insns are not considered indirect jumps; 1982 we can recognize them by a (use (lael_ref)). */ 1983 1984int 1985computed_jump_p (insn) 1986 rtx insn; 1987{ 1988 int i; 1989 if (GET_CODE (insn) == JUMP_INSN) 1990 { 1991 rtx pat = PATTERN (insn); 1992 1993 if (GET_CODE (pat) == PARALLEL) 1994 { 1995 int len = XVECLEN (pat, 0); 1996 int has_use_labelref = 0; 1997 1998 for (i = len - 1; i >= 0; i--) 1999 if (GET_CODE (XVECEXP (pat, 0, i)) == USE 2000 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) 2001 == LABEL_REF)) 2002 has_use_labelref = 1; 2003 2004 if (! has_use_labelref) 2005 for (i = len - 1; i >= 0; i--) 2006 if (GET_CODE (XVECEXP (pat, 0, i)) == SET 2007 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx 2008 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) 2009 return 1; 2010 } 2011 else if (GET_CODE (pat) == SET 2012 && SET_DEST (pat) == pc_rtx 2013 && jmp_uses_reg_or_mem (SET_SRC (pat))) 2014 return 1; 2015 } 2016 return 0; 2017} 2018