reload.c revision 70639
1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21/* $FreeBSD: head/contrib/gcc/reload.c 70639 2001-01-03 17:17:01Z obrien $ */ 22 23 24/* This file contains subroutines used only from the file reload1.c. 25 It knows how to scan one insn for operands and values 26 that need to be copied into registers to make valid code. 27 It also finds other operands and values which are valid 28 but for which equivalent values in registers exist and 29 ought to be used instead. 30 31 Before processing the first insn of the function, call `init_reload'. 32 33 To scan an insn, call `find_reloads'. This does two things: 34 1. sets up tables describing which values must be reloaded 35 for this insn, and what kind of hard regs they must be reloaded into; 36 2. optionally record the locations where those values appear in 37 the data, so they can be replaced properly later. 38 This is done only if the second arg to `find_reloads' is nonzero. 39 40 The third arg to `find_reloads' specifies the number of levels 41 of indirect addressing supported by the machine. If it is zero, 42 indirect addressing is not valid. If it is one, (MEM (REG n)) 43 is valid even if (REG n) did not get a hard register; if it is two, 44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 45 hard register, and similarly for higher values. 46 47 Then you must choose the hard regs to reload those pseudo regs into, 48 and generate appropriate load insns before this insn and perhaps 49 also store insns after this insn. Set up the array `reload_reg_rtx' 50 to contain the REG rtx's for the registers you used. In some 51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 52 for certain reloads. Then that tells you which register to use, 53 so you do not need to allocate one. But you still do need to add extra 54 instructions to copy the value into and out of that register. 55 56 Finally you must call `subst_reloads' to substitute the reload reg rtx's 57 into the locations already recorded. 58 59NOTE SIDE EFFECTS: 60 61 find_reloads can alter the operands of the instruction it is called on. 62 63 1. Two operands of any sort may be interchanged, if they are in a 64 commutative instruction. 65 This happens only if find_reloads thinks the instruction will compile 66 better that way. 67 68 2. Pseudo-registers that are equivalent to constants are replaced 69 with those constants if they are not in hard registers. 70 711 happens every time find_reloads is called. 722 happens only when REPLACE is 1, which is only when 73actually doing the reloads, not when just counting them. 74 75 76Using a reload register for several reloads in one insn: 77 78When an insn has reloads, it is considered as having three parts: 79the input reloads, the insn itself after reloading, and the output reloads. 80Reloads of values used in memory addresses are often needed for only one part. 81 82When this is so, reload_when_needed records which part needs the reload. 83Two reloads for different parts of the insn can share the same reload 84register. 85 86When a reload is used for addresses in multiple parts, or when it is 87an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 88a register with any other reload. */ 89 90#define REG_OK_STRICT 91 92#include "config.h" 93#include "system.h" 94#include "rtl.h" 95#include "insn-config.h" 96#include "insn-codes.h" 97#include "recog.h" 98#include "reload.h" 99#include "regs.h" 100#include "hard-reg-set.h" 101#include "flags.h" 102#include "real.h" 103#include "output.h" 104#include "expr.h" 105#include "toplev.h" 106 107#ifndef REGISTER_MOVE_COST 108#define REGISTER_MOVE_COST(x, y) 2 109#endif 110 111#ifndef REGNO_MODE_OK_FOR_BASE_P 112#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 113#endif 114 115#ifndef REG_MODE_OK_FOR_BASE_P 116#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 117#endif 118 119/* The variables set up by `find_reloads' are: 120 121 n_reloads number of distinct reloads needed; max reload # + 1 122 tables indexed by reload number 123 reload_in rtx for value to reload from 124 reload_out rtx for where to store reload-reg afterward if nec 125 (often the same as reload_in) 126 reload_reg_class enum reg_class, saying what regs to reload into 127 reload_inmode enum machine_mode; mode this operand should have 128 when reloaded, on input. 129 reload_outmode enum machine_mode; mode this operand should have 130 when reloaded, on output. 131 reload_optional char, nonzero for an optional reload. 132 Optional reloads are ignored unless the 133 value is already sitting in a register. 134 reload_nongroup char, nonzero when a reload must use a register 135 not already allocated to a group. 136 reload_inc int, positive amount to increment or decrement by if 137 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC. 138 Ignored otherwise (don't assume it is zero). 139 reload_in_reg rtx. A reg for which reload_in is the equivalent. 140 If reload_in is a symbol_ref which came from 141 reg_equiv_constant, then this is the pseudo 142 which has that symbol_ref as equivalent. 143 reload_reg_rtx rtx. This is the register to reload into. 144 If it is zero when `find_reloads' returns, 145 you must find a suitable register in the class 146 specified by reload_reg_class, and store here 147 an rtx for that register with mode from 148 reload_inmode or reload_outmode. 149 reload_nocombine char, nonzero if this reload shouldn't be 150 combined with another reload. 151 reload_opnum int, operand number being reloaded. This is 152 used to group related reloads and need not always 153 be equal to the actual operand number in the insn, 154 though it current will be; for in-out operands, it 155 is one of the two operand numbers. 156 reload_when_needed enum, classifies reload as needed either for 157 addressing an input reload, addressing an output, 158 for addressing a non-reloaded mem ref, 159 or for unspecified purposes (i.e., more than one 160 of the above). 161 reload_secondary_p int, 1 if this is a secondary register for one 162 or more reloads. 163 reload_secondary_in_reload 164 reload_secondary_out_reload 165 int, gives the reload number of a secondary 166 reload, when needed; otherwise -1 167 reload_secondary_in_icode 168 reload_secondary_out_icode 169 enum insn_code, if a secondary reload is required, 170 gives the INSN_CODE that uses the secondary 171 reload as a scratch register, or CODE_FOR_nothing 172 if the secondary reload register is to be an 173 intermediate register. */ 174int n_reloads; 175 176rtx reload_in[MAX_RELOADS]; 177rtx reload_out[MAX_RELOADS]; 178enum reg_class reload_reg_class[MAX_RELOADS]; 179enum machine_mode reload_inmode[MAX_RELOADS]; 180enum machine_mode reload_outmode[MAX_RELOADS]; 181rtx reload_reg_rtx[MAX_RELOADS]; 182char reload_optional[MAX_RELOADS]; 183char reload_nongroup[MAX_RELOADS]; 184int reload_inc[MAX_RELOADS]; 185rtx reload_in_reg[MAX_RELOADS]; 186rtx reload_out_reg[MAX_RELOADS]; 187char reload_nocombine[MAX_RELOADS]; 188int reload_opnum[MAX_RELOADS]; 189enum reload_type reload_when_needed[MAX_RELOADS]; 190int reload_secondary_p[MAX_RELOADS]; 191int reload_secondary_in_reload[MAX_RELOADS]; 192int reload_secondary_out_reload[MAX_RELOADS]; 193enum insn_code reload_secondary_in_icode[MAX_RELOADS]; 194enum insn_code reload_secondary_out_icode[MAX_RELOADS]; 195 196/* All the "earlyclobber" operands of the current insn 197 are recorded here. */ 198int n_earlyclobbers; 199rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 200 201int reload_n_operands; 202 203/* Replacing reloads. 204 205 If `replace_reloads' is nonzero, then as each reload is recorded 206 an entry is made for it in the table `replacements'. 207 Then later `subst_reloads' can look through that table and 208 perform all the replacements needed. */ 209 210/* Nonzero means record the places to replace. */ 211static int replace_reloads; 212 213/* Each replacement is recorded with a structure like this. */ 214struct replacement 215{ 216 rtx *where; /* Location to store in */ 217 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 218 a SUBREG; 0 otherwise. */ 219 int what; /* which reload this is for */ 220 enum machine_mode mode; /* mode it must have */ 221}; 222 223static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 224 225/* Number of replacements currently recorded. */ 226static int n_replacements; 227 228/* Used to track what is modified by an operand. */ 229struct decomposition 230{ 231 int reg_flag; /* Nonzero if referencing a register. */ 232 int safe; /* Nonzero if this can't conflict with anything. */ 233 rtx base; /* Base address for MEM. */ 234 HOST_WIDE_INT start; /* Starting offset or register number. */ 235 HOST_WIDE_INT end; /* Ending offset or register number. */ 236}; 237 238#ifdef SECONDARY_MEMORY_NEEDED 239 240/* Save MEMs needed to copy from one class of registers to another. One MEM 241 is used per mode, but normally only one or two modes are ever used. 242 243 We keep two versions, before and after register elimination. The one 244 after register elimination is record separately for each operand. This 245 is done in case the address is not valid to be sure that we separately 246 reload each. */ 247 248static rtx secondary_memlocs[NUM_MACHINE_MODES]; 249static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 250#endif 251 252/* The instruction we are doing reloads for; 253 so we can test whether a register dies in it. */ 254static rtx this_insn; 255 256/* Nonzero if this instruction is a user-specified asm with operands. */ 257static int this_insn_is_asm; 258 259/* If hard_regs_live_known is nonzero, 260 we can tell which hard regs are currently live, 261 at least enough to succeed in choosing dummy reloads. */ 262static int hard_regs_live_known; 263 264/* Indexed by hard reg number, 265 element is nonnegative if hard reg has been spilled. 266 This vector is passed to `find_reloads' as an argument 267 and is not changed here. */ 268static short *static_reload_reg_p; 269 270/* Set to 1 in subst_reg_equivs if it changes anything. */ 271static int subst_reg_equivs_changed; 272 273/* On return from push_reload, holds the reload-number for the OUT 274 operand, which can be different for that from the input operand. */ 275static int output_reloadnum; 276 277 /* Compare two RTX's. */ 278#define MATCHES(x, y) \ 279 (x == y || (x != 0 && (GET_CODE (x) == REG \ 280 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 281 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 282 283 /* Indicates if two reloads purposes are for similar enough things that we 284 can merge their reloads. */ 285#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 286 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 287 || ((when1) == (when2) && (op1) == (op2)) \ 288 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 289 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 290 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 291 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 292 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 293 294 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 295#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 296 ((when1) != (when2) \ 297 || ! ((op1) == (op2) \ 298 || (when1) == RELOAD_FOR_INPUT \ 299 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 300 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 301 302 /* If we are going to reload an address, compute the reload type to 303 use. */ 304#define ADDR_TYPE(type) \ 305 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 306 ? RELOAD_FOR_INPADDR_ADDRESS \ 307 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 308 ? RELOAD_FOR_OUTADDR_ADDRESS \ 309 : (type))) 310 311#ifdef HAVE_SECONDARY_RELOADS 312static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class, 313 enum machine_mode, enum reload_type, 314 enum insn_code *)); 315#endif 316static enum reg_class find_valid_class PROTO((enum machine_mode, int)); 317static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class, 318 enum machine_mode, enum machine_mode, 319 int, int, int, enum reload_type)); 320static void push_replacement PROTO((rtx *, int, enum machine_mode)); 321static void combine_reloads PROTO((void)); 322static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class, 323 enum reload_type, int, int)); 324static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *, 325 enum machine_mode, enum machine_mode, 326 enum reg_class, int, int)); 327static int hard_reg_set_here_p PROTO((int, int, rtx)); 328static struct decomposition decompose PROTO((rtx)); 329static int immune_p PROTO((rtx, rtx, struct decomposition)); 330static int alternative_allows_memconst PROTO((const char *, int)); 331static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx)); 332static rtx make_memloc PROTO((rtx, int)); 333static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *, 334 int, enum reload_type, int, rtx)); 335static rtx subst_reg_equivs PROTO((rtx, rtx)); 336static rtx subst_indexed_address PROTO((rtx)); 337static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *, 338 int, enum reload_type,int, rtx)); 339static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class, 340 enum machine_mode, int, 341 enum reload_type, int)); 342static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type, 343 int, rtx)); 344static int find_inc_amount PROTO((rtx, rtx)); 345static int loc_mentioned_in_p PROTO((rtx *, rtx)); 346 347#ifdef HAVE_SECONDARY_RELOADS 348 349/* Determine if any secondary reloads are needed for loading (if IN_P is 350 non-zero) or storing (if IN_P is zero) X to or from a reload register of 351 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 352 are needed, push them. 353 354 Return the reload number of the secondary reload we made, or -1 if 355 we didn't need one. *PICODE is set to the insn_code to use if we do 356 need a secondary reload. */ 357 358static int 359push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 360 type, picode) 361 int in_p; 362 rtx x; 363 int opnum; 364 int optional; 365 enum reg_class reload_class; 366 enum machine_mode reload_mode; 367 enum reload_type type; 368 enum insn_code *picode; 369{ 370 enum reg_class class = NO_REGS; 371 enum machine_mode mode = reload_mode; 372 enum insn_code icode = CODE_FOR_nothing; 373 enum reg_class t_class = NO_REGS; 374 enum machine_mode t_mode = VOIDmode; 375 enum insn_code t_icode = CODE_FOR_nothing; 376 enum reload_type secondary_type; 377 int s_reload, t_reload = -1; 378 379 if (type == RELOAD_FOR_INPUT_ADDRESS 380 || type == RELOAD_FOR_OUTPUT_ADDRESS 381 || type == RELOAD_FOR_INPADDR_ADDRESS 382 || type == RELOAD_FOR_OUTADDR_ADDRESS) 383 secondary_type = type; 384 else 385 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 386 387 *picode = CODE_FOR_nothing; 388 389 /* If X is a paradoxical SUBREG, use the inner value to determine both the 390 mode and object being reloaded. */ 391 if (GET_CODE (x) == SUBREG 392 && (GET_MODE_SIZE (GET_MODE (x)) 393 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 394 { 395 x = SUBREG_REG (x); 396 reload_mode = GET_MODE (x); 397 } 398 399 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 400 is still a pseudo-register by now, it *must* have an equivalent MEM 401 but we don't want to assume that), use that equivalent when seeing if 402 a secondary reload is needed since whether or not a reload is needed 403 might be sensitive to the form of the MEM. */ 404 405 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 406 && reg_equiv_mem[REGNO (x)] != 0) 407 x = reg_equiv_mem[REGNO (x)]; 408 409#ifdef SECONDARY_INPUT_RELOAD_CLASS 410 if (in_p) 411 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 412#endif 413 414#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 415 if (! in_p) 416 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 417#endif 418 419 /* If we don't need any secondary registers, done. */ 420 if (class == NO_REGS) 421 return -1; 422 423 /* Get a possible insn to use. If the predicate doesn't accept X, don't 424 use the insn. */ 425 426 icode = (in_p ? reload_in_optab[(int) reload_mode] 427 : reload_out_optab[(int) reload_mode]); 428 429 if (icode != CODE_FOR_nothing 430 && insn_operand_predicate[(int) icode][in_p] 431 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode))) 432 icode = CODE_FOR_nothing; 433 434 /* If we will be using an insn, see if it can directly handle the reload 435 register we will be using. If it can, the secondary reload is for a 436 scratch register. If it can't, we will use the secondary reload for 437 an intermediate register and require a tertiary reload for the scratch 438 register. */ 439 440 if (icode != CODE_FOR_nothing) 441 { 442 /* If IN_P is non-zero, the reload register will be the output in 443 operand 0. If IN_P is zero, the reload register will be the input 444 in operand 1. Outputs should have an initial "=", which we must 445 skip. */ 446 447 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p]; 448 enum reg_class insn_class 449 = (insn_letter == 'r' ? GENERAL_REGS 450 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 451 452 if (insn_class == NO_REGS 453 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=') 454 /* The scratch register's constraint must start with "=&". */ 455 || insn_operand_constraint[(int) icode][2][0] != '=' 456 || insn_operand_constraint[(int) icode][2][1] != '&') 457 abort (); 458 459 if (reg_class_subset_p (reload_class, insn_class)) 460 mode = insn_operand_mode[(int) icode][2]; 461 else 462 { 463 char t_letter = insn_operand_constraint[(int) icode][2][2]; 464 class = insn_class; 465 t_mode = insn_operand_mode[(int) icode][2]; 466 t_class = (t_letter == 'r' ? GENERAL_REGS 467 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 468 t_icode = icode; 469 icode = CODE_FOR_nothing; 470 } 471 } 472 473 /* This case isn't valid, so fail. Reload is allowed to use the same 474 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 475 in the case of a secondary register, we actually need two different 476 registers for correct code. We fail here to prevent the possibility of 477 silently generating incorrect code later. 478 479 The convention is that secondary input reloads are valid only if the 480 secondary_class is different from class. If you have such a case, you 481 can not use secondary reloads, you must work around the problem some 482 other way. 483 484 Allow this when MODE is not reload_mode and assume that the generated 485 code handles this case (it does on the Alpha, which is the only place 486 this currently happens). */ 487 488 if (in_p && class == reload_class && mode == reload_mode) 489 abort (); 490 491 /* If we need a tertiary reload, see if we have one we can reuse or else 492 make a new one. */ 493 494 if (t_class != NO_REGS) 495 { 496 for (t_reload = 0; t_reload < n_reloads; t_reload++) 497 if (reload_secondary_p[t_reload] 498 && (reg_class_subset_p (t_class, reload_reg_class[t_reload]) 499 || reg_class_subset_p (reload_reg_class[t_reload], t_class)) 500 && ((in_p && reload_inmode[t_reload] == t_mode) 501 || (! in_p && reload_outmode[t_reload] == t_mode)) 502 && ((in_p && (reload_secondary_in_icode[t_reload] 503 == CODE_FOR_nothing)) 504 || (! in_p &&(reload_secondary_out_icode[t_reload] 505 == CODE_FOR_nothing))) 506 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 507 && MERGABLE_RELOADS (secondary_type, 508 reload_when_needed[t_reload], 509 opnum, reload_opnum[t_reload])) 510 { 511 if (in_p) 512 reload_inmode[t_reload] = t_mode; 513 if (! in_p) 514 reload_outmode[t_reload] = t_mode; 515 516 if (reg_class_subset_p (t_class, reload_reg_class[t_reload])) 517 reload_reg_class[t_reload] = t_class; 518 519 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum); 520 reload_optional[t_reload] &= optional; 521 reload_secondary_p[t_reload] = 1; 522 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload], 523 opnum, reload_opnum[t_reload])) 524 reload_when_needed[t_reload] = RELOAD_OTHER; 525 } 526 527 if (t_reload == n_reloads) 528 { 529 /* We need to make a new tertiary reload for this register class. */ 530 reload_in[t_reload] = reload_out[t_reload] = 0; 531 reload_reg_class[t_reload] = t_class; 532 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode; 533 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode; 534 reload_reg_rtx[t_reload] = 0; 535 reload_optional[t_reload] = optional; 536 reload_nongroup[t_reload] = 0; 537 reload_inc[t_reload] = 0; 538 /* Maybe we could combine these, but it seems too tricky. */ 539 reload_nocombine[t_reload] = 1; 540 reload_in_reg[t_reload] = 0; 541 reload_out_reg[t_reload] = 0; 542 reload_opnum[t_reload] = opnum; 543 reload_when_needed[t_reload] = secondary_type; 544 reload_secondary_in_reload[t_reload] = -1; 545 reload_secondary_out_reload[t_reload] = -1; 546 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing; 547 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing; 548 reload_secondary_p[t_reload] = 1; 549 550 n_reloads++; 551 } 552 } 553 554 /* See if we can reuse an existing secondary reload. */ 555 for (s_reload = 0; s_reload < n_reloads; s_reload++) 556 if (reload_secondary_p[s_reload] 557 && (reg_class_subset_p (class, reload_reg_class[s_reload]) 558 || reg_class_subset_p (reload_reg_class[s_reload], class)) 559 && ((in_p && reload_inmode[s_reload] == mode) 560 || (! in_p && reload_outmode[s_reload] == mode)) 561 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload) 562 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload)) 563 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode) 564 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode)) 565 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 566 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload], 567 opnum, reload_opnum[s_reload])) 568 { 569 if (in_p) 570 reload_inmode[s_reload] = mode; 571 if (! in_p) 572 reload_outmode[s_reload] = mode; 573 574 if (reg_class_subset_p (class, reload_reg_class[s_reload])) 575 reload_reg_class[s_reload] = class; 576 577 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum); 578 reload_optional[s_reload] &= optional; 579 reload_secondary_p[s_reload] = 1; 580 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload], 581 opnum, reload_opnum[s_reload])) 582 reload_when_needed[s_reload] = RELOAD_OTHER; 583 } 584 585 if (s_reload == n_reloads) 586 { 587#ifdef SECONDARY_MEMORY_NEEDED 588 /* If we need a memory location to copy between the two reload regs, 589 set it up now. Note that we do the input case before making 590 the reload and the output case after. This is due to the 591 way reloads are output. */ 592 593 if (in_p && icode == CODE_FOR_nothing 594 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 595 { 596 get_secondary_mem (x, reload_mode, opnum, type); 597 598 /* We may have just added new reloads. Make sure we add 599 the new reload at the end. */ 600 s_reload = n_reloads; 601 } 602#endif 603 604 /* We need to make a new secondary reload for this register class. */ 605 reload_in[s_reload] = reload_out[s_reload] = 0; 606 reload_reg_class[s_reload] = class; 607 608 reload_inmode[s_reload] = in_p ? mode : VOIDmode; 609 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode; 610 reload_reg_rtx[s_reload] = 0; 611 reload_optional[s_reload] = optional; 612 reload_nongroup[s_reload] = 0; 613 reload_inc[s_reload] = 0; 614 /* Maybe we could combine these, but it seems too tricky. */ 615 reload_nocombine[s_reload] = 1; 616 reload_in_reg[s_reload] = 0; 617 reload_out_reg[s_reload] = 0; 618 reload_opnum[s_reload] = opnum; 619 reload_when_needed[s_reload] = secondary_type; 620 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1; 621 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1; 622 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; 623 reload_secondary_out_icode[s_reload] 624 = ! in_p ? t_icode : CODE_FOR_nothing; 625 reload_secondary_p[s_reload] = 1; 626 627 n_reloads++; 628 629#ifdef SECONDARY_MEMORY_NEEDED 630 if (! in_p && icode == CODE_FOR_nothing 631 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 632 get_secondary_mem (x, mode, opnum, type); 633#endif 634 } 635 636 *picode = icode; 637 return s_reload; 638} 639#endif /* HAVE_SECONDARY_RELOADS */ 640 641#ifdef SECONDARY_MEMORY_NEEDED 642 643/* Return a memory location that will be used to copy X in mode MODE. 644 If we haven't already made a location for this mode in this insn, 645 call find_reloads_address on the location being returned. */ 646 647rtx 648get_secondary_mem (x, mode, opnum, type) 649 rtx x; 650 enum machine_mode mode; 651 int opnum; 652 enum reload_type type; 653{ 654 rtx loc; 655 int mem_valid; 656 657 /* By default, if MODE is narrower than a word, widen it to a word. 658 This is required because most machines that require these memory 659 locations do not support short load and stores from all registers 660 (e.g., FP registers). */ 661 662#ifdef SECONDARY_MEMORY_NEEDED_MODE 663 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 664#else 665 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 666 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 667#endif 668 669 /* If we already have made a MEM for this operand in MODE, return it. */ 670 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 671 return secondary_memlocs_elim[(int) mode][opnum]; 672 673 /* If this is the first time we've tried to get a MEM for this mode, 674 allocate a new one. `something_changed' in reload will get set 675 by noticing that the frame size has changed. */ 676 677 if (secondary_memlocs[(int) mode] == 0) 678 { 679#ifdef SECONDARY_MEMORY_NEEDED_RTX 680 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 681#else 682 secondary_memlocs[(int) mode] 683 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 684#endif 685 } 686 687 /* Get a version of the address doing any eliminations needed. If that 688 didn't give us a new MEM, make a new one if it isn't valid. */ 689 690 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 691 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 692 693 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 694 loc = copy_rtx (loc); 695 696 /* The only time the call below will do anything is if the stack 697 offset is too large. In that case IND_LEVELS doesn't matter, so we 698 can just pass a zero. Adjust the type to be the address of the 699 corresponding object. If the address was valid, save the eliminated 700 address. If it wasn't valid, we need to make a reload each time, so 701 don't save it. */ 702 703 if (! mem_valid) 704 { 705 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 706 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 707 : RELOAD_OTHER); 708 709 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), 710 opnum, type, 0, 0); 711 } 712 713 secondary_memlocs_elim[(int) mode][opnum] = loc; 714 return loc; 715} 716 717/* Clear any secondary memory locations we've made. */ 718 719void 720clear_secondary_mem () 721{ 722 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs); 723} 724#endif /* SECONDARY_MEMORY_NEEDED */ 725 726/* Find the largest class for which every register number plus N is valid in 727 M1 (if in range). Abort if no such class exists. */ 728 729static enum reg_class 730find_valid_class (m1, n) 731 enum machine_mode m1; 732 int n; 733{ 734 int class; 735 int regno; 736 enum reg_class best_class; 737 int best_size = 0; 738 739 for (class = 1; class < N_REG_CLASSES; class++) 740 { 741 int bad = 0; 742 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 743 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 744 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 745 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 746 bad = 1; 747 748 if (! bad && reg_class_size[class] > best_size) 749 best_class = class, best_size = reg_class_size[class]; 750 } 751 752 if (best_size == 0) 753 abort (); 754 755 return best_class; 756} 757 758/* Return the number of a previously made reload that can be combined with 759 a new one, or n_reloads if none of the existing reloads can be used. 760 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 761 push_reload, they determine the kind of the new reload that we try to 762 combine. P_IN points to the corresponding value of IN, which can be 763 modified by this function. 764 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 765static int 766find_reusable_reload (p_in, out, class, type, opnum, dont_share) 767 rtx *p_in, out; 768 enum reg_class class; 769 enum reload_type type; 770 int opnum, dont_share; 771{ 772 rtx in = *p_in; 773 int i; 774 /* We can't merge two reloads if the output of either one is 775 earlyclobbered. */ 776 777 if (earlyclobber_operand_p (out)) 778 return n_reloads; 779 780 /* We can use an existing reload if the class is right 781 and at least one of IN and OUT is a match 782 and the other is at worst neutral. 783 (A zero compared against anything is neutral.) 784 785 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 786 for the same thing since that can cause us to need more reload registers 787 than we otherwise would. */ 788 789 for (i = 0; i < n_reloads; i++) 790 if ((reg_class_subset_p (class, reload_reg_class[i]) 791 || reg_class_subset_p (reload_reg_class[i], class)) 792 /* If the existing reload has a register, it must fit our class. */ 793 && (reload_reg_rtx[i] == 0 794 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 795 true_regnum (reload_reg_rtx[i]))) 796 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share 797 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out))) 798 || 799 (out != 0 && MATCHES (reload_out[i], out) 800 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))) 801 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 802 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 803 && MERGABLE_RELOADS (type, reload_when_needed[i], 804 opnum, reload_opnum[i])) 805 return i; 806 807 /* Reloading a plain reg for input can match a reload to postincrement 808 that reg, since the postincrement's value is the right value. 809 Likewise, it can match a preincrement reload, since we regard 810 the preincrementation as happening before any ref in this insn 811 to that register. */ 812 for (i = 0; i < n_reloads; i++) 813 if ((reg_class_subset_p (class, reload_reg_class[i]) 814 || reg_class_subset_p (reload_reg_class[i], class)) 815 /* If the existing reload has a register, it must fit our 816 class. */ 817 && (reload_reg_rtx[i] == 0 818 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 819 true_regnum (reload_reg_rtx[i]))) 820 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0 821 && ((GET_CODE (in) == REG 822 && (GET_CODE (reload_in[i]) == POST_INC 823 || GET_CODE (reload_in[i]) == POST_DEC 824 || GET_CODE (reload_in[i]) == PRE_INC 825 || GET_CODE (reload_in[i]) == PRE_DEC) 826 && MATCHES (XEXP (reload_in[i], 0), in)) 827 || 828 (GET_CODE (reload_in[i]) == REG 829 && (GET_CODE (in) == POST_INC 830 || GET_CODE (in) == POST_DEC 831 || GET_CODE (in) == PRE_INC 832 || GET_CODE (in) == PRE_DEC) 833 && MATCHES (XEXP (in, 0), reload_in[i]))) 834 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 835 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 836 && MERGABLE_RELOADS (type, reload_when_needed[i], 837 opnum, reload_opnum[i])) 838 { 839 /* Make sure reload_in ultimately has the increment, 840 not the plain register. */ 841 if (GET_CODE (in) == REG) 842 *p_in = reload_in[i]; 843 return i; 844 } 845 return n_reloads; 846} 847 848/* Record one reload that needs to be performed. 849 IN is an rtx saying where the data are to be found before this instruction. 850 OUT says where they must be stored after the instruction. 851 (IN is zero for data not read, and OUT is zero for data not written.) 852 INLOC and OUTLOC point to the places in the instructions where 853 IN and OUT were found. 854 If IN and OUT are both non-zero, it means the same register must be used 855 to reload both IN and OUT. 856 857 CLASS is a register class required for the reloaded data. 858 INMODE is the machine mode that the instruction requires 859 for the reg that replaces IN and OUTMODE is likewise for OUT. 860 861 If IN is zero, then OUT's location and mode should be passed as 862 INLOC and INMODE. 863 864 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 865 866 OPTIONAL nonzero means this reload does not need to be performed: 867 it can be discarded if that is more convenient. 868 869 OPNUM and TYPE say what the purpose of this reload is. 870 871 The return value is the reload-number for this reload. 872 873 If both IN and OUT are nonzero, in some rare cases we might 874 want to make two separate reloads. (Actually we never do this now.) 875 Therefore, the reload-number for OUT is stored in 876 output_reloadnum when we return; the return value applies to IN. 877 Usually (presently always), when IN and OUT are nonzero, 878 the two reload-numbers are equal, but the caller should be careful to 879 distinguish them. */ 880 881static int 882push_reload (in, out, inloc, outloc, class, 883 inmode, outmode, strict_low, optional, opnum, type) 884 rtx in, out; 885 rtx *inloc, *outloc; 886 enum reg_class class; 887 enum machine_mode inmode, outmode; 888 int strict_low; 889 int optional; 890 int opnum; 891 enum reload_type type; 892{ 893 register int i; 894 int dont_share = 0; 895 int dont_remove_subreg = 0; 896 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 897 int secondary_in_reload = -1, secondary_out_reload = -1; 898 enum insn_code secondary_in_icode = CODE_FOR_nothing; 899 enum insn_code secondary_out_icode = CODE_FOR_nothing; 900 901 /* INMODE and/or OUTMODE could be VOIDmode if no mode 902 has been specified for the operand. In that case, 903 use the operand's mode as the mode to reload. */ 904 if (inmode == VOIDmode && in != 0) 905 inmode = GET_MODE (in); 906 if (outmode == VOIDmode && out != 0) 907 outmode = GET_MODE (out); 908 909 /* If IN is a pseudo register everywhere-equivalent to a constant, and 910 it is not in a hard register, reload straight from the constant, 911 since we want to get rid of such pseudo registers. 912 Often this is done earlier, but not always in find_reloads_address. */ 913 if (in != 0 && GET_CODE (in) == REG) 914 { 915 register int regno = REGNO (in); 916 917 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 918 && reg_equiv_constant[regno] != 0) 919 in = reg_equiv_constant[regno]; 920 } 921 922 /* Likewise for OUT. Of course, OUT will never be equivalent to 923 an actual constant, but it might be equivalent to a memory location 924 (in the case of a parameter). */ 925 if (out != 0 && GET_CODE (out) == REG) 926 { 927 register int regno = REGNO (out); 928 929 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 930 && reg_equiv_constant[regno] != 0) 931 out = reg_equiv_constant[regno]; 932 } 933 934 /* If we have a read-write operand with an address side-effect, 935 change either IN or OUT so the side-effect happens only once. */ 936 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 937 { 938 if (GET_CODE (XEXP (in, 0)) == POST_INC 939 || GET_CODE (XEXP (in, 0)) == POST_DEC) 940 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0)); 941 if (GET_CODE (XEXP (in, 0)) == PRE_INC 942 || GET_CODE (XEXP (in, 0)) == PRE_DEC) 943 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0)); 944 } 945 946 /* If we are reloading a (SUBREG constant ...), really reload just the 947 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 948 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 949 a pseudo and hence will become a MEM) with M1 wider than M2 and the 950 register is a pseudo, also reload the inside expression. 951 For machines that extend byte loads, do this for any SUBREG of a pseudo 952 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 953 M2 is an integral mode that gets extended when loaded. 954 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 955 either M1 is not valid for R or M2 is wider than a word but we only 956 need one word to store an M2-sized quantity in R. 957 (However, if OUT is nonzero, we need to reload the reg *and* 958 the subreg, so do nothing here, and let following statement handle it.) 959 960 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 961 we can't handle it here because CONST_INT does not indicate a mode. 962 963 Similarly, we must reload the inside expression if we have a 964 STRICT_LOW_PART (presumably, in == out in the cas). 965 966 Also reload the inner expression if it does not require a secondary 967 reload but the SUBREG does. 968 969 Finally, reload the inner expression if it is a register that is in 970 the class whose registers cannot be referenced in a different size 971 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we 972 cannot reload just the inside since we might end up with the wrong 973 register class. But if it is inside a STRICT_LOW_PART, we have 974 no choice, so we hope we do get the right register class there. */ 975 976 if (in != 0 && GET_CODE (in) == SUBREG 977 && (SUBREG_WORD (in) == 0 || strict_low) 978#ifdef CLASS_CANNOT_CHANGE_SIZE 979 && class != CLASS_CANNOT_CHANGE_SIZE 980#endif 981 && (CONSTANT_P (SUBREG_REG (in)) 982 || GET_CODE (SUBREG_REG (in)) == PLUS 983 || strict_low 984 || (((GET_CODE (SUBREG_REG (in)) == REG 985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 986 || GET_CODE (SUBREG_REG (in)) == MEM) 987 && ((GET_MODE_SIZE (inmode) 988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 989#ifdef LOAD_EXTEND_OP 990 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 991 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 992 <= UNITS_PER_WORD) 993 && (GET_MODE_SIZE (inmode) 994 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 995 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 996 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 997#endif 998#ifdef WORD_REGISTER_OPERATIONS 999 || ((GET_MODE_SIZE (inmode) 1000 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 1001 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 1002 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 1003 / UNITS_PER_WORD))) 1004#endif 1005 )) 1006 || (GET_CODE (SUBREG_REG (in)) == REG 1007 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1008 /* The case where out is nonzero 1009 is handled differently in the following statement. */ 1010 && (out == 0 || SUBREG_WORD (in) == 0) 1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1013 > UNITS_PER_WORD) 1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1015 / UNITS_PER_WORD) 1016 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1017 GET_MODE (SUBREG_REG (in))))) 1018 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in)) 1019 + SUBREG_WORD (in)), 1020 inmode))) 1021#ifdef SECONDARY_INPUT_RELOAD_CLASS 1022 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1023 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1024 GET_MODE (SUBREG_REG (in)), 1025 SUBREG_REG (in)) 1026 == NO_REGS)) 1027#endif 1028#ifdef CLASS_CANNOT_CHANGE_SIZE 1029 || (GET_CODE (SUBREG_REG (in)) == REG 1030 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1031 && (TEST_HARD_REG_BIT 1032 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1033 REGNO (SUBREG_REG (in)))) 1034 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1035 != GET_MODE_SIZE (inmode))) 1036#endif 1037 )) 1038 { 1039 in_subreg_loc = inloc; 1040 inloc = &SUBREG_REG (in); 1041 in = *inloc; 1042#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1043 if (GET_CODE (in) == MEM) 1044 /* This is supposed to happen only for paradoxical subregs made by 1045 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1046 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1047 abort (); 1048#endif 1049 inmode = GET_MODE (in); 1050 } 1051 1052 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1053 either M1 is not valid for R or M2 is wider than a word but we only 1054 need one word to store an M2-sized quantity in R. 1055 1056 However, we must reload the inner reg *as well as* the subreg in 1057 that case. */ 1058 1059 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1060 code above. This can happen if SUBREG_WORD != 0. */ 1061 1062 if (in != 0 && GET_CODE (in) == SUBREG 1063 && (CONSTANT_P (SUBREG_REG (in)) 1064 || (GET_CODE (SUBREG_REG (in)) == REG 1065 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1066 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)) 1067 + SUBREG_WORD (in), 1068 inmode) 1069 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1070 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1071 > UNITS_PER_WORD) 1072 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1073 / UNITS_PER_WORD) 1074 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1075 GET_MODE (SUBREG_REG (in))))))))) 1076 { 1077 /* This relies on the fact that emit_reload_insns outputs the 1078 instructions for input reloads of type RELOAD_OTHER in the same 1079 order as the reloads. Thus if the outer reload is also of type 1080 RELOAD_OTHER, we are guaranteed that this inner reload will be 1081 output before the outer reload. */ 1082 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR, 1083 find_valid_class (inmode, SUBREG_WORD (in)), 1084 VOIDmode, VOIDmode, 0, 0, opnum, type); 1085 dont_remove_subreg = 1; 1086 } 1087 1088 /* Similarly for paradoxical and problematical SUBREGs on the output. 1089 Note that there is no reason we need worry about the previous value 1090 of SUBREG_REG (out); even if wider than out, 1091 storing in a subreg is entitled to clobber it all 1092 (except in the case of STRICT_LOW_PART, 1093 and in that case the constraint should label it input-output.) */ 1094 if (out != 0 && GET_CODE (out) == SUBREG 1095 && (SUBREG_WORD (out) == 0 || strict_low) 1096#ifdef CLASS_CANNOT_CHANGE_SIZE 1097 && class != CLASS_CANNOT_CHANGE_SIZE 1098#endif 1099 && (CONSTANT_P (SUBREG_REG (out)) 1100 || strict_low 1101 || (((GET_CODE (SUBREG_REG (out)) == REG 1102 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1103 || GET_CODE (SUBREG_REG (out)) == MEM) 1104 && ((GET_MODE_SIZE (outmode) 1105 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1106#ifdef WORD_REGISTER_OPERATIONS 1107 || ((GET_MODE_SIZE (outmode) 1108 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1109 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1110 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1111 / UNITS_PER_WORD))) 1112#endif 1113 )) 1114 || (GET_CODE (SUBREG_REG (out)) == REG 1115 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1116 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1117 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1118 > UNITS_PER_WORD) 1119 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1120 / UNITS_PER_WORD) 1121 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1122 GET_MODE (SUBREG_REG (out))))) 1123 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out)) 1124 + SUBREG_WORD (out)), 1125 outmode))) 1126#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1127 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1128 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1129 GET_MODE (SUBREG_REG (out)), 1130 SUBREG_REG (out)) 1131 == NO_REGS)) 1132#endif 1133#ifdef CLASS_CANNOT_CHANGE_SIZE 1134 || (GET_CODE (SUBREG_REG (out)) == REG 1135 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1136 && (TEST_HARD_REG_BIT 1137 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1138 REGNO (SUBREG_REG (out)))) 1139 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1140 != GET_MODE_SIZE (outmode))) 1141#endif 1142 )) 1143 { 1144 out_subreg_loc = outloc; 1145 outloc = &SUBREG_REG (out); 1146 out = *outloc; 1147#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1148 if (GET_CODE (out) == MEM 1149 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1150 abort (); 1151#endif 1152 outmode = GET_MODE (out); 1153 } 1154 1155 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1156 either M1 is not valid for R or M2 is wider than a word but we only 1157 need one word to store an M2-sized quantity in R. 1158 1159 However, we must reload the inner reg *as well as* the subreg in 1160 that case. In this case, the inner reg is an in-out reload. */ 1161 1162 if (out != 0 && GET_CODE (out) == SUBREG 1163 && GET_CODE (SUBREG_REG (out)) == REG 1164 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1165 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out), 1166 outmode) 1167 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1168 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1169 > UNITS_PER_WORD) 1170 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1171 / UNITS_PER_WORD) 1172 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1173 GET_MODE (SUBREG_REG (out))))))) 1174 { 1175 /* This relies on the fact that emit_reload_insns outputs the 1176 instructions for output reloads of type RELOAD_OTHER in reverse 1177 order of the reloads. Thus if the outer reload is also of type 1178 RELOAD_OTHER, we are guaranteed that this inner reload will be 1179 output after the outer reload. */ 1180 dont_remove_subreg = 1; 1181 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1182 &SUBREG_REG (out), 1183 find_valid_class (outmode, SUBREG_WORD (out)), 1184 VOIDmode, VOIDmode, 0, 0, 1185 opnum, RELOAD_OTHER); 1186 } 1187 1188 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1189 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1190 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1191 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1192 dont_share = 1; 1193 1194 /* If IN is a SUBREG of a hard register, make a new REG. This 1195 simplifies some of the cases below. */ 1196 1197 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1198 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1199 && ! dont_remove_subreg) 1200 in = gen_rtx_REG (GET_MODE (in), 1201 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in)); 1202 1203 /* Similarly for OUT. */ 1204 if (out != 0 && GET_CODE (out) == SUBREG 1205 && GET_CODE (SUBREG_REG (out)) == REG 1206 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1207 && ! dont_remove_subreg) 1208 out = gen_rtx_REG (GET_MODE (out), 1209 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out)); 1210 1211 /* Narrow down the class of register wanted if that is 1212 desirable on this machine for efficiency. */ 1213 if (in != 0) 1214 class = PREFERRED_RELOAD_CLASS (in, class); 1215 1216 /* Output reloads may need analogous treatment, different in detail. */ 1217#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1218 if (out != 0) 1219 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1220#endif 1221 1222 /* Make sure we use a class that can handle the actual pseudo 1223 inside any subreg. For example, on the 386, QImode regs 1224 can appear within SImode subregs. Although GENERAL_REGS 1225 can handle SImode, QImode needs a smaller class. */ 1226#ifdef LIMIT_RELOAD_CLASS 1227 if (in_subreg_loc) 1228 class = LIMIT_RELOAD_CLASS (inmode, class); 1229 else if (in != 0 && GET_CODE (in) == SUBREG) 1230 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1231 1232 if (out_subreg_loc) 1233 class = LIMIT_RELOAD_CLASS (outmode, class); 1234 if (out != 0 && GET_CODE (out) == SUBREG) 1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1236#endif 1237 1238 /* Verify that this class is at least possible for the mode that 1239 is specified. */ 1240 if (this_insn_is_asm) 1241 { 1242 enum machine_mode mode; 1243 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1244 mode = inmode; 1245 else 1246 mode = outmode; 1247 if (mode == VOIDmode) 1248 { 1249 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1250 mode = word_mode; 1251 if (in != 0) 1252 inmode = word_mode; 1253 if (out != 0) 1254 outmode = word_mode; 1255 } 1256 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1257 if (HARD_REGNO_MODE_OK (i, mode) 1258 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1259 { 1260 int nregs = HARD_REGNO_NREGS (i, mode); 1261 1262 int j; 1263 for (j = 1; j < nregs; j++) 1264 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1265 break; 1266 if (j == nregs) 1267 break; 1268 } 1269 if (i == FIRST_PSEUDO_REGISTER) 1270 { 1271 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1272 class = ALL_REGS; 1273 } 1274 } 1275 1276 /* Optional output reloads are always OK even if we have no register class, 1277 since the function of these reloads is only to have spill_reg_store etc. 1278 set, so that the storing insn can be deleted later. */ 1279 if (class == NO_REGS 1280 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1281 abort (); 1282 1283 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1284 1285 if (i == n_reloads) 1286 { 1287 /* See if we need a secondary reload register to move between CLASS 1288 and IN or CLASS and OUT. Get the icode and push any required reloads 1289 needed for each of them if so. */ 1290 1291#ifdef SECONDARY_INPUT_RELOAD_CLASS 1292 if (in != 0) 1293 secondary_in_reload 1294 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1295 &secondary_in_icode); 1296#endif 1297 1298#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1299 if (out != 0 && GET_CODE (out) != SCRATCH) 1300 secondary_out_reload 1301 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1302 type, &secondary_out_icode); 1303#endif 1304 1305 /* We found no existing reload suitable for re-use. 1306 So add an additional reload. */ 1307 1308#ifdef SECONDARY_MEMORY_NEEDED 1309 /* If a memory location is needed for the copy, make one. */ 1310 if (in != 0 && GET_CODE (in) == REG 1311 && REGNO (in) < FIRST_PSEUDO_REGISTER 1312 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1313 class, inmode)) 1314 get_secondary_mem (in, inmode, opnum, type); 1315#endif 1316 1317 i = n_reloads; 1318 reload_in[i] = in; 1319 reload_out[i] = out; 1320 reload_reg_class[i] = class; 1321 reload_inmode[i] = inmode; 1322 reload_outmode[i] = outmode; 1323 reload_reg_rtx[i] = 0; 1324 reload_optional[i] = optional; 1325 reload_nongroup[i] = 0; 1326 reload_inc[i] = 0; 1327 reload_nocombine[i] = 0; 1328 reload_in_reg[i] = inloc ? *inloc : 0; 1329 reload_out_reg[i] = outloc ? *outloc : 0; 1330 reload_opnum[i] = opnum; 1331 reload_when_needed[i] = type; 1332 reload_secondary_in_reload[i] = secondary_in_reload; 1333 reload_secondary_out_reload[i] = secondary_out_reload; 1334 reload_secondary_in_icode[i] = secondary_in_icode; 1335 reload_secondary_out_icode[i] = secondary_out_icode; 1336 reload_secondary_p[i] = 0; 1337 1338 n_reloads++; 1339 1340#ifdef SECONDARY_MEMORY_NEEDED 1341 if (out != 0 && GET_CODE (out) == REG 1342 && REGNO (out) < FIRST_PSEUDO_REGISTER 1343 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1344 outmode)) 1345 get_secondary_mem (out, outmode, opnum, type); 1346#endif 1347 } 1348 else 1349 { 1350 /* We are reusing an existing reload, 1351 but we may have additional information for it. 1352 For example, we may now have both IN and OUT 1353 while the old one may have just one of them. */ 1354 1355 /* The modes can be different. If they are, we want to reload in 1356 the larger mode, so that the value is valid for both modes. */ 1357 if (inmode != VOIDmode 1358 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i])) 1359 reload_inmode[i] = inmode; 1360 if (outmode != VOIDmode 1361 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i])) 1362 reload_outmode[i] = outmode; 1363 if (in != 0) 1364 { 1365 rtx in_reg = inloc ? *inloc : 0; 1366 /* If we merge reloads for two distinct rtl expressions that 1367 are identical in content, there might be duplicate address 1368 reloads. Remove the extra set now, so that if we later find 1369 that we can inherit this reload, we can get rid of the 1370 address reloads altogether. 1371 1372 Do not do this if both reloads are optional since the result 1373 would be an optional reload which could potentially leave 1374 unresolved address replacements. 1375 1376 It is not sufficient to call transfer_replacements since 1377 choose_reload_regs will remove the replacements for address 1378 reloads of inherited reloads which results in the same 1379 problem. */ 1380 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]) 1381 && ! (reload_optional[i] && optional)) 1382 { 1383 /* We must keep the address reload with the lower operand 1384 number alive. */ 1385 if (opnum > reload_opnum[i]) 1386 { 1387 remove_address_replacements (in); 1388 in = reload_in[i]; 1389 in_reg = reload_in_reg[i]; 1390 } 1391 else 1392 remove_address_replacements (reload_in[i]); 1393 } 1394 reload_in[i] = in; 1395 reload_in_reg[i] = in_reg; 1396 } 1397 if (out != 0) 1398 { 1399 reload_out[i] = out; 1400 reload_out_reg[i] = outloc ? *outloc : 0; 1401 } 1402 if (reg_class_subset_p (class, reload_reg_class[i])) 1403 reload_reg_class[i] = class; 1404 reload_optional[i] &= optional; 1405 if (MERGE_TO_OTHER (type, reload_when_needed[i], 1406 opnum, reload_opnum[i])) 1407 reload_when_needed[i] = RELOAD_OTHER; 1408 reload_opnum[i] = MIN (reload_opnum[i], opnum); 1409 } 1410 1411 /* If the ostensible rtx being reload differs from the rtx found 1412 in the location to substitute, this reload is not safe to combine 1413 because we cannot reliably tell whether it appears in the insn. */ 1414 1415 if (in != 0 && in != *inloc) 1416 reload_nocombine[i] = 1; 1417 1418#if 0 1419 /* This was replaced by changes in find_reloads_address_1 and the new 1420 function inc_for_reload, which go with a new meaning of reload_inc. */ 1421 1422 /* If this is an IN/OUT reload in an insn that sets the CC, 1423 it must be for an autoincrement. It doesn't work to store 1424 the incremented value after the insn because that would clobber the CC. 1425 So we must do the increment of the value reloaded from, 1426 increment it, store it back, then decrement again. */ 1427 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1428 { 1429 out = 0; 1430 reload_out[i] = 0; 1431 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in); 1432 /* If we did not find a nonzero amount-to-increment-by, 1433 that contradicts the belief that IN is being incremented 1434 in an address in this insn. */ 1435 if (reload_inc[i] == 0) 1436 abort (); 1437 } 1438#endif 1439 1440 /* If we will replace IN and OUT with the reload-reg, 1441 record where they are located so that substitution need 1442 not do a tree walk. */ 1443 1444 if (replace_reloads) 1445 { 1446 if (inloc != 0) 1447 { 1448 register struct replacement *r = &replacements[n_replacements++]; 1449 r->what = i; 1450 r->subreg_loc = in_subreg_loc; 1451 r->where = inloc; 1452 r->mode = inmode; 1453 } 1454 if (outloc != 0 && outloc != inloc) 1455 { 1456 register struct replacement *r = &replacements[n_replacements++]; 1457 r->what = i; 1458 r->where = outloc; 1459 r->subreg_loc = out_subreg_loc; 1460 r->mode = outmode; 1461 } 1462 } 1463 1464 /* If this reload is just being introduced and it has both 1465 an incoming quantity and an outgoing quantity that are 1466 supposed to be made to match, see if either one of the two 1467 can serve as the place to reload into. 1468 1469 If one of them is acceptable, set reload_reg_rtx[i] 1470 to that one. */ 1471 1472 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0) 1473 { 1474 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc, 1475 inmode, outmode, 1476 reload_reg_class[i], i, 1477 earlyclobber_operand_p (out)); 1478 1479 /* If the outgoing register already contains the same value 1480 as the incoming one, we can dispense with loading it. 1481 The easiest way to tell the caller that is to give a phony 1482 value for the incoming operand (same as outgoing one). */ 1483 if (reload_reg_rtx[i] == out 1484 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1485 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1486 static_reload_reg_p, i, inmode)) 1487 reload_in[i] = out; 1488 } 1489 1490 /* If this is an input reload and the operand contains a register that 1491 dies in this insn and is used nowhere else, see if it is the right class 1492 to be used for this reload. Use it if so. (This occurs most commonly 1493 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1494 this if it is also an output reload that mentions the register unless 1495 the output is a SUBREG that clobbers an entire register. 1496 1497 Note that the operand might be one of the spill regs, if it is a 1498 pseudo reg and we are in a block where spilling has not taken place. 1499 But if there is no spilling in this block, that is OK. 1500 An explicitly used hard reg cannot be a spill reg. */ 1501 1502 if (reload_reg_rtx[i] == 0 && in != 0) 1503 { 1504 rtx note; 1505 int regno; 1506 1507 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1508 if (REG_NOTE_KIND (note) == REG_DEAD 1509 && GET_CODE (XEXP (note, 0)) == REG 1510 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1511 && reg_mentioned_p (XEXP (note, 0), in) 1512 && ! refers_to_regno_for_reload_p (regno, 1513 (regno 1514 + HARD_REGNO_NREGS (regno, 1515 inmode)), 1516 PATTERN (this_insn), inloc) 1517 /* If this is also an output reload, IN cannot be used as 1518 the reload register if it is set in this insn unless IN 1519 is also OUT. */ 1520 && (out == 0 || in == out 1521 || ! hard_reg_set_here_p (regno, 1522 (regno 1523 + HARD_REGNO_NREGS (regno, 1524 inmode)), 1525 PATTERN (this_insn))) 1526 /* ??? Why is this code so different from the previous? 1527 Is there any simple coherent way to describe the two together? 1528 What's going on here. */ 1529 && (in != out 1530 || (GET_CODE (in) == SUBREG 1531 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1532 / UNITS_PER_WORD) 1533 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1534 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1535 /* Make sure the operand fits in the reg that dies. */ 1536 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1537 && HARD_REGNO_MODE_OK (regno, inmode) 1538 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1539 && HARD_REGNO_MODE_OK (regno, outmode)) 1540 { 1541 unsigned int offs; 1542 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1543 HARD_REGNO_NREGS (regno, outmode)); 1544 1545 for (offs = 0; offs < nregs; offs++) 1546 if (fixed_regs[regno + offs] 1547 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1548 regno + offs)) 1549 break; 1550 1551 if (offs == nregs) 1552 { 1553 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno); 1554 break; 1555 } 1556 } 1557 } 1558 1559 if (out) 1560 output_reloadnum = i; 1561 1562 return i; 1563} 1564 1565/* Record an additional place we must replace a value 1566 for which we have already recorded a reload. 1567 RELOADNUM is the value returned by push_reload 1568 when the reload was recorded. 1569 This is used in insn patterns that use match_dup. */ 1570 1571static void 1572push_replacement (loc, reloadnum, mode) 1573 rtx *loc; 1574 int reloadnum; 1575 enum machine_mode mode; 1576{ 1577 if (replace_reloads) 1578 { 1579 register struct replacement *r = &replacements[n_replacements++]; 1580 r->what = reloadnum; 1581 r->where = loc; 1582 r->subreg_loc = 0; 1583 r->mode = mode; 1584 } 1585} 1586 1587/* Transfer all replacements that used to be in reload FROM to be in 1588 reload TO. */ 1589 1590void 1591transfer_replacements (to, from) 1592 int to, from; 1593{ 1594 int i; 1595 1596 for (i = 0; i < n_replacements; i++) 1597 if (replacements[i].what == from) 1598 replacements[i].what = to; 1599} 1600 1601/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1602 or a subpart of it. If we have any replacements registered for IN_RTX, 1603 cancel the reloads that were supposed to load them. 1604 Return non-zero if we canceled any reloads. */ 1605int 1606remove_address_replacements (in_rtx) 1607 rtx in_rtx; 1608{ 1609 int i, j; 1610 char reload_flags[MAX_RELOADS]; 1611 int something_changed = 0; 1612 1613 bzero (reload_flags, sizeof reload_flags); 1614 for (i = 0, j = 0; i < n_replacements; i++) 1615 { 1616 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1617 reload_flags[replacements[i].what] |= 1; 1618 else 1619 { 1620 replacements[j++] = replacements[i]; 1621 reload_flags[replacements[i].what] |= 2; 1622 } 1623 } 1624 /* Note that the following store must be done before the recursive calls. */ 1625 n_replacements = j; 1626 1627 for (i = n_reloads - 1; i >= 0; i--) 1628 { 1629 if (reload_flags[i] == 1) 1630 { 1631 deallocate_reload_reg (i); 1632 remove_address_replacements (reload_in[i]); 1633 reload_in[i] = 0; 1634 something_changed = 1; 1635 } 1636 } 1637 return something_changed; 1638} 1639 1640/* Return non-zero if IN contains a piece of rtl that has the address LOC */ 1641static int 1642loc_mentioned_in_p (loc, in) 1643 rtx *loc, in; 1644{ 1645 enum rtx_code code = GET_CODE (in); 1646 char *fmt = GET_RTX_FORMAT (code); 1647 int i, j; 1648 1649 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1650 { 1651 if (loc == &XEXP (in, i)) 1652 return 1; 1653 if (fmt[i] == 'e') 1654 { 1655 if (loc_mentioned_in_p (loc, XEXP (in, i))) 1656 return 1; 1657 } 1658 else if (fmt[i] == 'E') 1659 for (j = XVECLEN (in, i) - 1; i >= 0; i--) 1660 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j))) 1661 return 1; 1662 } 1663 return 0; 1664} 1665 1666/* If there is only one output reload, and it is not for an earlyclobber 1667 operand, try to combine it with a (logically unrelated) input reload 1668 to reduce the number of reload registers needed. 1669 1670 This is safe if the input reload does not appear in 1671 the value being output-reloaded, because this implies 1672 it is not needed any more once the original insn completes. 1673 1674 If that doesn't work, see we can use any of the registers that 1675 die in this insn as a reload register. We can if it is of the right 1676 class and does not appear in the value being output-reloaded. */ 1677 1678static void 1679combine_reloads () 1680{ 1681 int i; 1682 int output_reload = -1; 1683 int secondary_out = -1; 1684 rtx note; 1685 1686 /* Find the output reload; return unless there is exactly one 1687 and that one is mandatory. */ 1688 1689 for (i = 0; i < n_reloads; i++) 1690 if (reload_out[i] != 0) 1691 { 1692 if (output_reload >= 0) 1693 return; 1694 output_reload = i; 1695 } 1696 1697 if (output_reload < 0 || reload_optional[output_reload]) 1698 return; 1699 1700 /* An input-output reload isn't combinable. */ 1701 1702 if (reload_in[output_reload] != 0) 1703 return; 1704 1705 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1706 if (earlyclobber_operand_p (reload_out[output_reload])) 1707 return; 1708 1709 /* Check each input reload; can we combine it? */ 1710 1711 for (i = 0; i < n_reloads; i++) 1712 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] 1713 /* Life span of this reload must not extend past main insn. */ 1714 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS 1715 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS 1716 && reload_when_needed[i] != RELOAD_OTHER 1717 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i]) 1718 == CLASS_MAX_NREGS (reload_reg_class[output_reload], 1719 reload_outmode[output_reload])) 1720 && reload_inc[i] == 0 1721 && reload_reg_rtx[i] == 0 1722#ifdef SECONDARY_MEMORY_NEEDED 1723 /* Don't combine two reloads with different secondary 1724 memory locations. */ 1725 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0 1726 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0 1727 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]], 1728 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]])) 1729#endif 1730 && (SMALL_REGISTER_CLASSES 1731 ? (reload_reg_class[i] == reload_reg_class[output_reload]) 1732 : (reg_class_subset_p (reload_reg_class[i], 1733 reload_reg_class[output_reload]) 1734 || reg_class_subset_p (reload_reg_class[output_reload], 1735 reload_reg_class[i]))) 1736 && (MATCHES (reload_in[i], reload_out[output_reload]) 1737 /* Args reversed because the first arg seems to be 1738 the one that we imagine being modified 1739 while the second is the one that might be affected. */ 1740 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload], 1741 reload_in[i]) 1742 /* However, if the input is a register that appears inside 1743 the output, then we also can't share. 1744 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1745 If the same reload reg is used for both reg 69 and the 1746 result to be stored in memory, then that result 1747 will clobber the address of the memory ref. */ 1748 && ! (GET_CODE (reload_in[i]) == REG 1749 && reg_overlap_mentioned_for_reload_p (reload_in[i], 1750 reload_out[output_reload])))) 1751 && (reg_class_size[(int) reload_reg_class[i]] 1752 || SMALL_REGISTER_CLASSES) 1753 /* We will allow making things slightly worse by combining an 1754 input and an output, but no worse than that. */ 1755 && (reload_when_needed[i] == RELOAD_FOR_INPUT 1756 || reload_when_needed[i] == RELOAD_FOR_OUTPUT)) 1757 { 1758 int j; 1759 1760 /* We have found a reload to combine with! */ 1761 reload_out[i] = reload_out[output_reload]; 1762 reload_out_reg[i] = reload_out_reg[output_reload]; 1763 reload_outmode[i] = reload_outmode[output_reload]; 1764 /* Mark the old output reload as inoperative. */ 1765 reload_out[output_reload] = 0; 1766 /* The combined reload is needed for the entire insn. */ 1767 reload_when_needed[i] = RELOAD_OTHER; 1768 /* If the output reload had a secondary reload, copy it. */ 1769 if (reload_secondary_out_reload[output_reload] != -1) 1770 { 1771 reload_secondary_out_reload[i] 1772 = reload_secondary_out_reload[output_reload]; 1773 reload_secondary_out_icode[i] 1774 = reload_secondary_out_icode[output_reload]; 1775 } 1776 1777#ifdef SECONDARY_MEMORY_NEEDED 1778 /* Copy any secondary MEM. */ 1779 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0) 1780 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] 1781 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]; 1782#endif 1783 /* If required, minimize the register class. */ 1784 if (reg_class_subset_p (reload_reg_class[output_reload], 1785 reload_reg_class[i])) 1786 reload_reg_class[i] = reload_reg_class[output_reload]; 1787 1788 /* Transfer all replacements from the old reload to the combined. */ 1789 for (j = 0; j < n_replacements; j++) 1790 if (replacements[j].what == output_reload) 1791 replacements[j].what = i; 1792 1793 return; 1794 } 1795 1796 /* If this insn has only one operand that is modified or written (assumed 1797 to be the first), it must be the one corresponding to this reload. It 1798 is safe to use anything that dies in this insn for that output provided 1799 that it does not occur in the output (we already know it isn't an 1800 earlyclobber. If this is an asm insn, give up. */ 1801 1802 if (INSN_CODE (this_insn) == -1) 1803 return; 1804 1805 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++) 1806 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '=' 1807 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+') 1808 return; 1809 1810 /* See if some hard register that dies in this insn and is not used in 1811 the output is the right class. Only works if the register we pick 1812 up can fully hold our output reload. */ 1813 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1814 if (REG_NOTE_KIND (note) == REG_DEAD 1815 && GET_CODE (XEXP (note, 0)) == REG 1816 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1817 reload_out[output_reload]) 1818 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1819 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1820 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]], 1821 REGNO (XEXP (note, 0))) 1822 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1823 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1824 /* Ensure that a secondary or tertiary reload for this output 1825 won't want this register. */ 1826 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1 1827 || (! (TEST_HARD_REG_BIT 1828 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1829 REGNO (XEXP (note, 0)))) 1830 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1 1831 || ! (TEST_HARD_REG_BIT 1832 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1833 REGNO (XEXP (note, 0))))))) 1834 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1835 { 1836 reload_reg_rtx[output_reload] 1837 = gen_rtx_REG (reload_outmode[output_reload], 1838 REGNO (XEXP (note, 0))); 1839 return; 1840 } 1841} 1842 1843/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1844 See if one of IN and OUT is a register that may be used; 1845 this is desirable since a spill-register won't be needed. 1846 If so, return the register rtx that proves acceptable. 1847 1848 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1849 CLASS is the register class required for the reload. 1850 1851 If FOR_REAL is >= 0, it is the number of the reload, 1852 and in some cases when it can be discovered that OUT doesn't need 1853 to be computed, clear out reload_out[FOR_REAL]. 1854 1855 If FOR_REAL is -1, this should not be done, because this call 1856 is just to see if a register can be found, not to find and install it. 1857 1858 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1859 puts an additional constraint on being able to use IN for OUT since 1860 IN must not appear elsewhere in the insn (it is assumed that IN itself 1861 is safe from the earlyclobber). */ 1862 1863static rtx 1864find_dummy_reload (real_in, real_out, inloc, outloc, 1865 inmode, outmode, class, for_real, earlyclobber) 1866 rtx real_in, real_out; 1867 rtx *inloc, *outloc; 1868 enum machine_mode inmode, outmode; 1869 enum reg_class class; 1870 int for_real; 1871 int earlyclobber; 1872{ 1873 rtx in = real_in; 1874 rtx out = real_out; 1875 int in_offset = 0; 1876 int out_offset = 0; 1877 rtx value = 0; 1878 1879 /* If operands exceed a word, we can't use either of them 1880 unless they have the same size. */ 1881 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1882 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1883 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1884 return 0; 1885 1886 /* Find the inside of any subregs. */ 1887 while (GET_CODE (out) == SUBREG) 1888 { 1889 out_offset = SUBREG_WORD (out); 1890 out = SUBREG_REG (out); 1891 } 1892 while (GET_CODE (in) == SUBREG) 1893 { 1894 in_offset = SUBREG_WORD (in); 1895 in = SUBREG_REG (in); 1896 } 1897 1898 /* Narrow down the reg class, the same way push_reload will; 1899 otherwise we might find a dummy now, but push_reload won't. */ 1900 class = PREFERRED_RELOAD_CLASS (in, class); 1901 1902 /* See if OUT will do. */ 1903 if (GET_CODE (out) == REG 1904 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1905 { 1906 register int regno = REGNO (out) + out_offset; 1907 int nwords = HARD_REGNO_NREGS (regno, outmode); 1908 rtx saved_rtx; 1909 1910 /* When we consider whether the insn uses OUT, 1911 ignore references within IN. They don't prevent us 1912 from copying IN into OUT, because those refs would 1913 move into the insn that reloads IN. 1914 1915 However, we only ignore IN in its role as this reload. 1916 If the insn uses IN elsewhere and it contains OUT, 1917 that counts. We can't be sure it's the "same" operand 1918 so it might not go through this reload. */ 1919 saved_rtx = *inloc; 1920 *inloc = const0_rtx; 1921 1922 if (regno < FIRST_PSEUDO_REGISTER 1923 /* A fixed reg that can overlap other regs better not be used 1924 for reloading in any way. */ 1925#ifdef OVERLAPPING_REGNO_P 1926 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno)) 1927#endif 1928 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1929 PATTERN (this_insn), outloc)) 1930 { 1931 int i; 1932 for (i = 0; i < nwords; i++) 1933 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1934 regno + i)) 1935 break; 1936 1937 if (i == nwords) 1938 { 1939 if (GET_CODE (real_out) == REG) 1940 value = real_out; 1941 else 1942 value = gen_rtx_REG (outmode, regno); 1943 } 1944 } 1945 1946 *inloc = saved_rtx; 1947 } 1948 1949 /* Consider using IN if OUT was not acceptable 1950 or if OUT dies in this insn (like the quotient in a divmod insn). 1951 We can't use IN unless it is dies in this insn, 1952 which means we must know accurately which hard regs are live. 1953 Also, the result can't go in IN if IN is used within OUT, 1954 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1955 if (hard_regs_live_known 1956 && GET_CODE (in) == REG 1957 && REGNO (in) < FIRST_PSEUDO_REGISTER 1958 && (value == 0 1959 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1960 && find_reg_note (this_insn, REG_DEAD, real_in) 1961 && !fixed_regs[REGNO (in)] 1962 && HARD_REGNO_MODE_OK (REGNO (in), 1963 /* The only case where out and real_out might 1964 have different modes is where real_out 1965 is a subreg, and in that case, out 1966 has a real mode. */ 1967 (GET_MODE (out) != VOIDmode 1968 ? GET_MODE (out) : outmode))) 1969 { 1970 register int regno = REGNO (in) + in_offset; 1971 int nwords = HARD_REGNO_NREGS (regno, inmode); 1972 1973 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR) 1974 && ! hard_reg_set_here_p (regno, regno + nwords, 1975 PATTERN (this_insn)) 1976 && (! earlyclobber 1977 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1978 PATTERN (this_insn), inloc))) 1979 { 1980 int i; 1981 for (i = 0; i < nwords; i++) 1982 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1983 regno + i)) 1984 break; 1985 1986 if (i == nwords) 1987 { 1988 /* If we were going to use OUT as the reload reg 1989 and changed our mind, it means OUT is a dummy that 1990 dies here. So don't bother copying value to it. */ 1991 if (for_real >= 0 && value == real_out) 1992 reload_out[for_real] = 0; 1993 if (GET_CODE (real_in) == REG) 1994 value = real_in; 1995 else 1996 value = gen_rtx_REG (inmode, regno); 1997 } 1998 } 1999 } 2000 2001 return value; 2002} 2003 2004/* This page contains subroutines used mainly for determining 2005 whether the IN or an OUT of a reload can serve as the 2006 reload register. */ 2007 2008/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 2009 2010int 2011earlyclobber_operand_p (x) 2012 rtx x; 2013{ 2014 int i; 2015 2016 for (i = 0; i < n_earlyclobbers; i++) 2017 if (reload_earlyclobbers[i] == x) 2018 return 1; 2019 2020 return 0; 2021} 2022 2023/* Return 1 if expression X alters a hard reg in the range 2024 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2025 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2026 X should be the body of an instruction. */ 2027 2028static int 2029hard_reg_set_here_p (beg_regno, end_regno, x) 2030 register int beg_regno, end_regno; 2031 rtx x; 2032{ 2033 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2034 { 2035 register rtx op0 = SET_DEST (x); 2036 while (GET_CODE (op0) == SUBREG) 2037 op0 = SUBREG_REG (op0); 2038 if (GET_CODE (op0) == REG) 2039 { 2040 register int r = REGNO (op0); 2041 /* See if this reg overlaps range under consideration. */ 2042 if (r < end_regno 2043 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2044 return 1; 2045 } 2046 } 2047 else if (GET_CODE (x) == PARALLEL) 2048 { 2049 register int i = XVECLEN (x, 0) - 1; 2050 for (; i >= 0; i--) 2051 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2052 return 1; 2053 } 2054 2055 return 0; 2056} 2057 2058/* Return 1 if ADDR is a valid memory address for mode MODE, 2059 and check that each pseudo reg has the proper kind of 2060 hard reg. */ 2061 2062int 2063strict_memory_address_p (mode, addr) 2064 enum machine_mode mode; 2065 register rtx addr; 2066{ 2067 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2068 return 0; 2069 2070 win: 2071 return 1; 2072} 2073 2074/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2075 if they are the same hard reg, and has special hacks for 2076 autoincrement and autodecrement. 2077 This is specifically intended for find_reloads to use 2078 in determining whether two operands match. 2079 X is the operand whose number is the lower of the two. 2080 2081 The value is 2 if Y contains a pre-increment that matches 2082 a non-incrementing address in X. */ 2083 2084/* ??? To be completely correct, we should arrange to pass 2085 for X the output operand and for Y the input operand. 2086 For now, we assume that the output operand has the lower number 2087 because that is natural in (SET output (... input ...)). */ 2088 2089int 2090operands_match_p (x, y) 2091 register rtx x, y; 2092{ 2093 register int i; 2094 register RTX_CODE code = GET_CODE (x); 2095 register char *fmt; 2096 int success_2; 2097 2098 if (x == y) 2099 return 1; 2100 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2101 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2102 && GET_CODE (SUBREG_REG (y)) == REG))) 2103 { 2104 register int j; 2105 2106 if (code == SUBREG) 2107 { 2108 i = REGNO (SUBREG_REG (x)); 2109 if (i >= FIRST_PSEUDO_REGISTER) 2110 goto slow; 2111 i += SUBREG_WORD (x); 2112 } 2113 else 2114 i = REGNO (x); 2115 2116 if (GET_CODE (y) == SUBREG) 2117 { 2118 j = REGNO (SUBREG_REG (y)); 2119 if (j >= FIRST_PSEUDO_REGISTER) 2120 goto slow; 2121 j += SUBREG_WORD (y); 2122 } 2123 else 2124 j = REGNO (y); 2125 2126 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2127 multiple hard register group, so that for example (reg:DI 0) and 2128 (reg:SI 1) will be considered the same register. */ 2129 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2130 && i < FIRST_PSEUDO_REGISTER) 2131 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2132 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2133 && j < FIRST_PSEUDO_REGISTER) 2134 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2135 2136 return i == j; 2137 } 2138 /* If two operands must match, because they are really a single 2139 operand of an assembler insn, then two postincrements are invalid 2140 because the assembler insn would increment only once. 2141 On the other hand, an postincrement matches ordinary indexing 2142 if the postincrement is the output operand. */ 2143 if (code == POST_DEC || code == POST_INC) 2144 return operands_match_p (XEXP (x, 0), y); 2145 /* Two preincrements are invalid 2146 because the assembler insn would increment only once. 2147 On the other hand, an preincrement matches ordinary indexing 2148 if the preincrement is the input operand. 2149 In this case, return 2, since some callers need to do special 2150 things when this happens. */ 2151 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC) 2152 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2153 2154 slow: 2155 2156 /* Now we have disposed of all the cases 2157 in which different rtx codes can match. */ 2158 if (code != GET_CODE (y)) 2159 return 0; 2160 if (code == LABEL_REF) 2161 return XEXP (x, 0) == XEXP (y, 0); 2162 if (code == SYMBOL_REF) 2163 return XSTR (x, 0) == XSTR (y, 0); 2164 2165 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2166 2167 if (GET_MODE (x) != GET_MODE (y)) 2168 return 0; 2169 2170 /* Compare the elements. If any pair of corresponding elements 2171 fail to match, return 0 for the whole things. */ 2172 2173 success_2 = 0; 2174 fmt = GET_RTX_FORMAT (code); 2175 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2176 { 2177 int val, j; 2178 switch (fmt[i]) 2179 { 2180 case 'w': 2181 if (XWINT (x, i) != XWINT (y, i)) 2182 return 0; 2183 break; 2184 2185 case 'i': 2186 if (XINT (x, i) != XINT (y, i)) 2187 return 0; 2188 break; 2189 2190 case 'e': 2191 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2192 if (val == 0) 2193 return 0; 2194 /* If any subexpression returns 2, 2195 we should return 2 if we are successful. */ 2196 if (val == 2) 2197 success_2 = 1; 2198 break; 2199 2200 case '0': 2201 break; 2202 2203 case 'E': 2204 if (XVECLEN (x, i) != XVECLEN (y, i)) 2205 return 0; 2206 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2207 { 2208 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2209 if (val == 0) 2210 return 0; 2211 if (val == 2) 2212 success_2 = 1; 2213 } 2214 break; 2215 2216 /* It is believed that rtx's at this level will never 2217 contain anything but integers and other rtx's, 2218 except for within LABEL_REFs and SYMBOL_REFs. */ 2219 default: 2220 abort (); 2221 } 2222 } 2223 return 1 + success_2; 2224} 2225 2226/* Describe the range of registers or memory referenced by X. 2227 If X is a register, set REG_FLAG and put the first register 2228 number into START and the last plus one into END. 2229 If X is a memory reference, put a base address into BASE 2230 and a range of integer offsets into START and END. 2231 If X is pushing on the stack, we can assume it causes no trouble, 2232 so we set the SAFE field. */ 2233 2234static struct decomposition 2235decompose (x) 2236 rtx x; 2237{ 2238 struct decomposition val; 2239 int all_const = 0; 2240 2241 val.reg_flag = 0; 2242 val.safe = 0; 2243 val.base = 0; 2244 if (GET_CODE (x) == MEM) 2245 { 2246 rtx base, offset = 0; 2247 rtx addr = XEXP (x, 0); 2248 2249 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2250 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2251 { 2252 val.base = XEXP (addr, 0); 2253 val.start = - GET_MODE_SIZE (GET_MODE (x)); 2254 val.end = GET_MODE_SIZE (GET_MODE (x)); 2255 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2256 return val; 2257 } 2258 2259 if (GET_CODE (addr) == CONST) 2260 { 2261 addr = XEXP (addr, 0); 2262 all_const = 1; 2263 } 2264 if (GET_CODE (addr) == PLUS) 2265 { 2266 if (CONSTANT_P (XEXP (addr, 0))) 2267 { 2268 base = XEXP (addr, 1); 2269 offset = XEXP (addr, 0); 2270 } 2271 else if (CONSTANT_P (XEXP (addr, 1))) 2272 { 2273 base = XEXP (addr, 0); 2274 offset = XEXP (addr, 1); 2275 } 2276 } 2277 2278 if (offset == 0) 2279 { 2280 base = addr; 2281 offset = const0_rtx; 2282 } 2283 if (GET_CODE (offset) == CONST) 2284 offset = XEXP (offset, 0); 2285 if (GET_CODE (offset) == PLUS) 2286 { 2287 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2288 { 2289 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2290 offset = XEXP (offset, 0); 2291 } 2292 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2293 { 2294 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2295 offset = XEXP (offset, 1); 2296 } 2297 else 2298 { 2299 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2300 offset = const0_rtx; 2301 } 2302 } 2303 else if (GET_CODE (offset) != CONST_INT) 2304 { 2305 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2306 offset = const0_rtx; 2307 } 2308 2309 if (all_const && GET_CODE (base) == PLUS) 2310 base = gen_rtx_CONST (GET_MODE (base), base); 2311 2312 if (GET_CODE (offset) != CONST_INT) 2313 abort (); 2314 2315 val.start = INTVAL (offset); 2316 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2317 val.base = base; 2318 return val; 2319 } 2320 else if (GET_CODE (x) == REG) 2321 { 2322 val.reg_flag = 1; 2323 val.start = true_regnum (x); 2324 if (val.start < 0) 2325 { 2326 /* A pseudo with no hard reg. */ 2327 val.start = REGNO (x); 2328 val.end = val.start + 1; 2329 } 2330 else 2331 /* A hard reg. */ 2332 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2333 } 2334 else if (GET_CODE (x) == SUBREG) 2335 { 2336 if (GET_CODE (SUBREG_REG (x)) != REG) 2337 /* This could be more precise, but it's good enough. */ 2338 return decompose (SUBREG_REG (x)); 2339 val.reg_flag = 1; 2340 val.start = true_regnum (x); 2341 if (val.start < 0) 2342 return decompose (SUBREG_REG (x)); 2343 else 2344 /* A hard reg. */ 2345 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2346 } 2347 else if (CONSTANT_P (x) 2348 /* This hasn't been assigned yet, so it can't conflict yet. */ 2349 || GET_CODE (x) == SCRATCH) 2350 val.safe = 1; 2351 else 2352 abort (); 2353 return val; 2354} 2355 2356/* Return 1 if altering Y will not modify the value of X. 2357 Y is also described by YDATA, which should be decompose (Y). */ 2358 2359static int 2360immune_p (x, y, ydata) 2361 rtx x, y; 2362 struct decomposition ydata; 2363{ 2364 struct decomposition xdata; 2365 2366 if (ydata.reg_flag) 2367 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR); 2368 if (ydata.safe) 2369 return 1; 2370 2371 if (GET_CODE (y) != MEM) 2372 abort (); 2373 /* If Y is memory and X is not, Y can't affect X. */ 2374 if (GET_CODE (x) != MEM) 2375 return 1; 2376 2377 xdata = decompose (x); 2378 2379 if (! rtx_equal_p (xdata.base, ydata.base)) 2380 { 2381 /* If bases are distinct symbolic constants, there is no overlap. */ 2382 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2383 return 1; 2384 /* Constants and stack slots never overlap. */ 2385 if (CONSTANT_P (xdata.base) 2386 && (ydata.base == frame_pointer_rtx 2387 || ydata.base == hard_frame_pointer_rtx 2388 || ydata.base == stack_pointer_rtx)) 2389 return 1; 2390 if (CONSTANT_P (ydata.base) 2391 && (xdata.base == frame_pointer_rtx 2392 || xdata.base == hard_frame_pointer_rtx 2393 || xdata.base == stack_pointer_rtx)) 2394 return 1; 2395 /* If either base is variable, we don't know anything. */ 2396 return 0; 2397 } 2398 2399 2400 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2401} 2402 2403/* Similar, but calls decompose. */ 2404 2405int 2406safe_from_earlyclobber (op, clobber) 2407 rtx op, clobber; 2408{ 2409 struct decomposition early_data; 2410 2411 early_data = decompose (clobber); 2412 return immune_p (op, clobber, early_data); 2413} 2414 2415/* Main entry point of this file: search the body of INSN 2416 for values that need reloading and record them with push_reload. 2417 REPLACE nonzero means record also where the values occur 2418 so that subst_reloads can be used. 2419 2420 IND_LEVELS says how many levels of indirection are supported by this 2421 machine; a value of zero means that a memory reference is not a valid 2422 memory address. 2423 2424 LIVE_KNOWN says we have valid information about which hard 2425 regs are live at each point in the program; this is true when 2426 we are called from global_alloc but false when stupid register 2427 allocation has been done. 2428 2429 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2430 which is nonnegative if the reg has been commandeered for reloading into. 2431 It is copied into STATIC_RELOAD_REG_P and referenced from there 2432 by various subroutines. 2433 2434 Return TRUE if some operands need to be changed, because of swapping 2435 commutative operands, reg_equiv_address substitution, or whatever. */ 2436 2437int 2438find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2439 rtx insn; 2440 int replace, ind_levels; 2441 int live_known; 2442 short *reload_reg_p; 2443{ 2444#ifdef REGISTER_CONSTRAINTS 2445 2446 register int insn_code_number; 2447 register int i, j; 2448 int noperands; 2449 /* These start out as the constraints for the insn 2450 and they are chewed up as we consider alternatives. */ 2451 char *constraints[MAX_RECOG_OPERANDS]; 2452 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2453 a register. */ 2454 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2455 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2456 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2457 int address_reloaded[MAX_RECOG_OPERANDS]; 2458 /* Value of enum reload_type to use for operand. */ 2459 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2460 /* Value of enum reload_type to use within address of operand. */ 2461 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2462 /* Save the usage of each operand. */ 2463 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2464 int no_input_reloads = 0, no_output_reloads = 0; 2465 int n_alternatives; 2466 int this_alternative[MAX_RECOG_OPERANDS]; 2467 char this_alternative_win[MAX_RECOG_OPERANDS]; 2468 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2469 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2470 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2471 int swapped; 2472 int goal_alternative[MAX_RECOG_OPERANDS]; 2473 int this_alternative_number; 2474 int goal_alternative_number; 2475 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2476 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2477 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2478 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2479 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2480 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2481 int goal_alternative_swapped; 2482 int best; 2483 int commutative; 2484 int changed; 2485 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2486 rtx substed_operand[MAX_RECOG_OPERANDS]; 2487 rtx body = PATTERN (insn); 2488 rtx set = single_set (insn); 2489 int goal_earlyclobber, this_earlyclobber; 2490 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2491 int retval = 0; 2492 /* Cache the last regno for the last pseudo we did an output reload 2493 for in case the next insn uses it. */ 2494 static int last_output_reload_regno = -1; 2495 2496 this_insn = insn; 2497 n_reloads = 0; 2498 n_replacements = 0; 2499 n_earlyclobbers = 0; 2500 replace_reloads = replace; 2501 hard_regs_live_known = live_known; 2502 static_reload_reg_p = reload_reg_p; 2503 2504 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2505 neither are insns that SET cc0. Insns that use CC0 are not allowed 2506 to have any input reloads. */ 2507 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2508 no_output_reloads = 1; 2509 2510#ifdef HAVE_cc0 2511 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2512 no_input_reloads = 1; 2513 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2514 no_output_reloads = 1; 2515#endif 2516 2517#ifdef SECONDARY_MEMORY_NEEDED 2518 /* The eliminated forms of any secondary memory locations are per-insn, so 2519 clear them out here. */ 2520 2521 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim); 2522#endif 2523 2524 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2525 is cheap to move between them. If it is not, there may not be an insn 2526 to do the copy, so we may need a reload. */ 2527 if (GET_CODE (body) == SET 2528 && GET_CODE (SET_DEST (body)) == REG 2529 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2530 && GET_CODE (SET_SRC (body)) == REG 2531 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2532 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2533 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2534 return 0; 2535 2536 extract_insn (insn); 2537 2538 noperands = reload_n_operands = recog_n_operands; 2539 n_alternatives = recog_n_alternatives; 2540 2541 /* Just return "no reloads" if insn has no operands with constraints. */ 2542 if (noperands == 0 || n_alternatives == 0) 2543 return 0; 2544 2545 insn_code_number = INSN_CODE (insn); 2546 this_insn_is_asm = insn_code_number < 0; 2547 2548 bcopy ((char *) recog_operand_mode, (char *) operand_mode, 2549 noperands * sizeof (enum machine_mode)); 2550 bcopy ((char *) recog_constraints, (char *) constraints, 2551 noperands * sizeof (char *)); 2552 2553 commutative = -1; 2554 2555 /* If we will need to know, later, whether some pair of operands 2556 are the same, we must compare them now and save the result. 2557 Reloading the base and index registers will clobber them 2558 and afterward they will fail to match. */ 2559 2560 for (i = 0; i < noperands; i++) 2561 { 2562 register char *p; 2563 register int c; 2564 2565 substed_operand[i] = recog_operand[i]; 2566 p = constraints[i]; 2567 2568 modified[i] = RELOAD_READ; 2569 2570 /* Scan this operand's constraint to see if it is an output operand, 2571 an in-out operand, is commutative, or should match another. */ 2572 2573 while ((c = *p++)) 2574 { 2575 if (c == '=') 2576 modified[i] = RELOAD_WRITE; 2577 else if (c == '+') 2578 modified[i] = RELOAD_READ_WRITE; 2579 else if (c == '%') 2580 { 2581 /* The last operand should not be marked commutative. */ 2582 if (i == noperands - 1) 2583 abort (); 2584 2585 commutative = i; 2586 } 2587 else if (c >= '0' && c <= '9') 2588 { 2589 c -= '0'; 2590 operands_match[c][i] 2591 = operands_match_p (recog_operand[c], recog_operand[i]); 2592 2593 /* An operand may not match itself. */ 2594 if (c == i) 2595 abort (); 2596 2597 /* If C can be commuted with C+1, and C might need to match I, 2598 then C+1 might also need to match I. */ 2599 if (commutative >= 0) 2600 { 2601 if (c == commutative || c == commutative + 1) 2602 { 2603 int other = c + (c == commutative ? 1 : -1); 2604 operands_match[other][i] 2605 = operands_match_p (recog_operand[other], recog_operand[i]); 2606 } 2607 if (i == commutative || i == commutative + 1) 2608 { 2609 int other = i + (i == commutative ? 1 : -1); 2610 operands_match[c][other] 2611 = operands_match_p (recog_operand[c], recog_operand[other]); 2612 } 2613 /* Note that C is supposed to be less than I. 2614 No need to consider altering both C and I because in 2615 that case we would alter one into the other. */ 2616 } 2617 } 2618 } 2619 } 2620 2621 /* Examine each operand that is a memory reference or memory address 2622 and reload parts of the addresses into index registers. 2623 Also here any references to pseudo regs that didn't get hard regs 2624 but are equivalent to constants get replaced in the insn itself 2625 with those constants. Nobody will ever see them again. 2626 2627 Finally, set up the preferred classes of each operand. */ 2628 2629 for (i = 0; i < noperands; i++) 2630 { 2631 register RTX_CODE code = GET_CODE (recog_operand[i]); 2632 2633 address_reloaded[i] = 0; 2634 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2635 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2636 : RELOAD_OTHER); 2637 address_type[i] 2638 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2639 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2640 : RELOAD_OTHER); 2641 2642 if (*constraints[i] == 0) 2643 /* Ignore things like match_operator operands. */ 2644 ; 2645 else if (constraints[i][0] == 'p') 2646 { 2647 find_reloads_address (VOIDmode, NULL_PTR, 2648 recog_operand[i], recog_operand_loc[i], 2649 i, operand_type[i], ind_levels, insn); 2650 2651 /* If we now have a simple operand where we used to have a 2652 PLUS or MULT, re-recognize and try again. */ 2653 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o' 2654 || GET_CODE (*recog_operand_loc[i]) == SUBREG) 2655 && (GET_CODE (recog_operand[i]) == MULT 2656 || GET_CODE (recog_operand[i]) == PLUS)) 2657 { 2658 INSN_CODE (insn) = -1; 2659 retval = find_reloads (insn, replace, ind_levels, live_known, 2660 reload_reg_p); 2661 return retval; 2662 } 2663 2664 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2665 } 2666 else if (code == MEM) 2667 { 2668 address_reloaded[i] 2669 = find_reloads_address (GET_MODE (recog_operand[i]), 2670 recog_operand_loc[i], 2671 XEXP (recog_operand[i], 0), 2672 &XEXP (recog_operand[i], 0), 2673 i, address_type[i], ind_levels, insn); 2674 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2675 } 2676 else if (code == SUBREG) 2677 { 2678 rtx reg = SUBREG_REG (recog_operand[i]); 2679 rtx op 2680 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2681 ind_levels, 2682 set != 0 2683 && &SET_DEST (set) == recog_operand_loc[i], 2684 insn); 2685 2686 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2687 that didn't get a hard register, emit a USE with a REG_EQUAL 2688 note in front so that we might inherit a previous, possibly 2689 wider reload. */ 2690 2691 if (replace 2692 && GET_CODE (op) == MEM 2693 && GET_CODE (reg) == REG 2694 && (GET_MODE_SIZE (GET_MODE (reg)) 2695 >= GET_MODE_SIZE (GET_MODE (op)))) 2696 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn)) 2697 = gen_rtx_EXPR_LIST (REG_EQUAL, 2698 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX); 2699 2700 substed_operand[i] = recog_operand[i] = op; 2701 } 2702 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2703 /* We can get a PLUS as an "operand" as a result of register 2704 elimination. See eliminate_regs and gen_reload. We handle 2705 a unary operator by reloading the operand. */ 2706 substed_operand[i] = recog_operand[i] 2707 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2708 ind_levels, 0, insn); 2709 else if (code == REG) 2710 { 2711 /* This is equivalent to calling find_reloads_toplev. 2712 The code is duplicated for speed. 2713 When we find a pseudo always equivalent to a constant, 2714 we replace it by the constant. We must be sure, however, 2715 that we don't try to replace it in the insn in which it 2716 is being set. */ 2717 register int regno = REGNO (recog_operand[i]); 2718 if (reg_equiv_constant[regno] != 0 2719 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i])) 2720 { 2721 /* Record the existing mode so that the check if constants are 2722 allowed will work when operand_mode isn't specified. */ 2723 2724 if (operand_mode[i] == VOIDmode) 2725 operand_mode[i] = GET_MODE (recog_operand[i]); 2726 2727 substed_operand[i] = recog_operand[i] 2728 = reg_equiv_constant[regno]; 2729 } 2730 if (reg_equiv_memory_loc[regno] != 0 2731 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2732 /* We need not give a valid is_set_dest argument since the case 2733 of a constant equivalence was checked above. */ 2734 substed_operand[i] = recog_operand[i] 2735 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2736 ind_levels, 0, insn); 2737 } 2738 /* If the operand is still a register (we didn't replace it with an 2739 equivalent), get the preferred class to reload it into. */ 2740 code = GET_CODE (recog_operand[i]); 2741 preferred_class[i] 2742 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) 2743 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS); 2744 pref_or_nothing[i] 2745 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER 2746 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS); 2747 } 2748 2749#ifdef HAVE_cc0 2750 /* If we made any reloads for addresses, see if they violate a 2751 "no input reloads" requirement for this insn. */ 2752 if (no_input_reloads) 2753 for (i = 0; i < n_reloads; i++) 2754 if (reload_in[i] != 0) 2755 abort (); 2756#endif 2757 2758 /* If this is simply a copy from operand 1 to operand 0, merge the 2759 preferred classes for the operands. */ 2760 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set) 2761 && recog_operand[1] == SET_SRC (set)) 2762 { 2763 preferred_class[0] = preferred_class[1] 2764 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2765 pref_or_nothing[0] |= pref_or_nothing[1]; 2766 pref_or_nothing[1] |= pref_or_nothing[0]; 2767 } 2768 2769 /* Now see what we need for pseudo-regs that didn't get hard regs 2770 or got the wrong kind of hard reg. For this, we must consider 2771 all the operands together against the register constraints. */ 2772 2773 best = MAX_RECOG_OPERANDS * 2 + 600; 2774 2775 swapped = 0; 2776 goal_alternative_swapped = 0; 2777 try_swapped: 2778 2779 /* The constraints are made of several alternatives. 2780 Each operand's constraint looks like foo,bar,... with commas 2781 separating the alternatives. The first alternatives for all 2782 operands go together, the second alternatives go together, etc. 2783 2784 First loop over alternatives. */ 2785 2786 for (this_alternative_number = 0; 2787 this_alternative_number < n_alternatives; 2788 this_alternative_number++) 2789 { 2790 /* Loop over operands for one constraint alternative. */ 2791 /* LOSERS counts those that don't fit this alternative 2792 and would require loading. */ 2793 int losers = 0; 2794 /* BAD is set to 1 if it some operand can't fit this alternative 2795 even after reloading. */ 2796 int bad = 0; 2797 /* REJECT is a count of how undesirable this alternative says it is 2798 if any reloading is required. If the alternative matches exactly 2799 then REJECT is ignored, but otherwise it gets this much 2800 counted against it in addition to the reloading needed. Each 2801 ? counts three times here since we want the disparaging caused by 2802 a bad register class to only count 1/3 as much. */ 2803 int reject = 0; 2804 2805 this_earlyclobber = 0; 2806 2807 for (i = 0; i < noperands; i++) 2808 { 2809 register char *p = constraints[i]; 2810 register int win = 0; 2811 /* 0 => this operand can be reloaded somehow for this alternative */ 2812 int badop = 1; 2813 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2814 int winreg = 0; 2815 int c; 2816 register rtx operand = recog_operand[i]; 2817 int offset = 0; 2818 /* Nonzero means this is a MEM that must be reloaded into a reg 2819 regardless of what the constraint says. */ 2820 int force_reload = 0; 2821 int offmemok = 0; 2822 /* Nonzero if a constant forced into memory would be OK for this 2823 operand. */ 2824 int constmemok = 0; 2825 int earlyclobber = 0; 2826 2827 /* If the predicate accepts a unary operator, it means that 2828 we need to reload the operand, but do not do this for 2829 match_operator and friends. */ 2830 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2831 operand = XEXP (operand, 0); 2832 2833 /* If the operand is a SUBREG, extract 2834 the REG or MEM (or maybe even a constant) within. 2835 (Constants can occur as a result of reg_equiv_constant.) */ 2836 2837 while (GET_CODE (operand) == SUBREG) 2838 { 2839 offset += SUBREG_WORD (operand); 2840 operand = SUBREG_REG (operand); 2841 /* Force reload if this is a constant or PLUS or if there may 2842 be a problem accessing OPERAND in the outer mode. */ 2843 if (CONSTANT_P (operand) 2844 || GET_CODE (operand) == PLUS 2845 /* We must force a reload of paradoxical SUBREGs 2846 of a MEM because the alignment of the inner value 2847 may not be enough to do the outer reference. On 2848 big-endian machines, it may also reference outside 2849 the object. 2850 2851 On machines that extend byte operations and we have a 2852 SUBREG where both the inner and outer modes are no wider 2853 than a word and the inner mode is narrower, is integral, 2854 and gets extended when loaded from memory, combine.c has 2855 made assumptions about the behavior of the machine in such 2856 register access. If the data is, in fact, in memory we 2857 must always load using the size assumed to be in the 2858 register and let the insn do the different-sized 2859 accesses. 2860 2861 This is doubly true if WORD_REGISTER_OPERATIONS. In 2862 this case eliminate_regs has left non-paradoxical 2863 subregs for push_reloads to see. Make sure it does 2864 by forcing the reload. 2865 2866 ??? When is it right at this stage to have a subreg 2867 of a mem that is _not_ to be handled specialy? IMO 2868 those should have been reduced to just a mem. */ 2869 || ((GET_CODE (operand) == MEM 2870 || (GET_CODE (operand)== REG 2871 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2872#ifndef WORD_REGISTER_OPERATIONS 2873 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2874 < BIGGEST_ALIGNMENT) 2875 && (GET_MODE_SIZE (operand_mode[i]) 2876 > GET_MODE_SIZE (GET_MODE (operand)))) 2877 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2878#ifdef LOAD_EXTEND_OP 2879 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2880 && (GET_MODE_SIZE (GET_MODE (operand)) 2881 <= UNITS_PER_WORD) 2882 && (GET_MODE_SIZE (operand_mode[i]) 2883 > GET_MODE_SIZE (GET_MODE (operand))) 2884 && INTEGRAL_MODE_P (GET_MODE (operand)) 2885 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2886#endif 2887 ) 2888#endif 2889 ) 2890 /* Subreg of a hard reg which can't handle the subreg's mode 2891 or which would handle that mode in the wrong number of 2892 registers for subregging to work. */ 2893 || (GET_CODE (operand) == REG 2894 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2895 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2896 && (GET_MODE_SIZE (GET_MODE (operand)) 2897 > UNITS_PER_WORD) 2898 && ((GET_MODE_SIZE (GET_MODE (operand)) 2899 / UNITS_PER_WORD) 2900 != HARD_REGNO_NREGS (REGNO (operand), 2901 GET_MODE (operand)))) 2902 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2903 operand_mode[i])))) 2904 force_reload = 1; 2905 } 2906 2907 this_alternative[i] = (int) NO_REGS; 2908 this_alternative_win[i] = 0; 2909 this_alternative_offmemok[i] = 0; 2910 this_alternative_earlyclobber[i] = 0; 2911 this_alternative_matches[i] = -1; 2912 2913 /* An empty constraint or empty alternative 2914 allows anything which matched the pattern. */ 2915 if (*p == 0 || *p == ',') 2916 win = 1, badop = 0; 2917 2918 /* Scan this alternative's specs for this operand; 2919 set WIN if the operand fits any letter in this alternative. 2920 Otherwise, clear BADOP if this operand could 2921 fit some letter after reloads, 2922 or set WINREG if this operand could fit after reloads 2923 provided the constraint allows some registers. */ 2924 2925 while (*p && (c = *p++) != ',') 2926 switch (c) 2927 { 2928 case '=': 2929 case '+': 2930 case '*': 2931 break; 2932 2933 case '%': 2934 /* The last operand should not be marked commutative. */ 2935 if (i != noperands - 1) 2936 commutative = i; 2937 break; 2938 2939 case '?': 2940 reject += 6; 2941 break; 2942 2943 case '!': 2944 reject = 600; 2945 break; 2946 2947 case '#': 2948 /* Ignore rest of this alternative as far as 2949 reloading is concerned. */ 2950 while (*p && *p != ',') p++; 2951 break; 2952 2953 case '0': 2954 case '1': 2955 case '2': 2956 case '3': 2957 case '4': 2958 c -= '0'; 2959 this_alternative_matches[i] = c; 2960 /* We are supposed to match a previous operand. 2961 If we do, we win if that one did. 2962 If we do not, count both of the operands as losers. 2963 (This is too conservative, since most of the time 2964 only a single reload insn will be needed to make 2965 the two operands win. As a result, this alternative 2966 may be rejected when it is actually desirable.) */ 2967 if ((swapped && (c != commutative || i != commutative + 1)) 2968 /* If we are matching as if two operands were swapped, 2969 also pretend that operands_match had been computed 2970 with swapped. 2971 But if I is the second of those and C is the first, 2972 don't exchange them, because operands_match is valid 2973 only on one side of its diagonal. */ 2974 ? (operands_match 2975 [(c == commutative || c == commutative + 1) 2976 ? 2*commutative + 1 - c : c] 2977 [(i == commutative || i == commutative + 1) 2978 ? 2*commutative + 1 - i : i]) 2979 : operands_match[c][i]) 2980 { 2981 /* If we are matching a non-offsettable address where an 2982 offsettable address was expected, then we must reject 2983 this combination, because we can't reload it. */ 2984 if (this_alternative_offmemok[c] 2985 && GET_CODE (recog_operand[c]) == MEM 2986 && this_alternative[c] == (int) NO_REGS 2987 && ! this_alternative_win[c]) 2988 bad = 1; 2989 2990 win = this_alternative_win[c]; 2991 } 2992 else 2993 { 2994 /* Operands don't match. */ 2995 rtx value; 2996 /* Retroactively mark the operand we had to match 2997 as a loser, if it wasn't already. */ 2998 if (this_alternative_win[c]) 2999 losers++; 3000 this_alternative_win[c] = 0; 3001 if (this_alternative[c] == (int) NO_REGS) 3002 bad = 1; 3003 /* But count the pair only once in the total badness of 3004 this alternative, if the pair can be a dummy reload. */ 3005 value 3006 = find_dummy_reload (recog_operand[i], recog_operand[c], 3007 recog_operand_loc[i], recog_operand_loc[c], 3008 operand_mode[i], operand_mode[c], 3009 this_alternative[c], -1, 3010 this_alternative_earlyclobber[c]); 3011 3012 if (value != 0) 3013 losers--; 3014 } 3015 /* This can be fixed with reloads if the operand 3016 we are supposed to match can be fixed with reloads. */ 3017 badop = 0; 3018 this_alternative[i] = this_alternative[c]; 3019 3020 /* If we have to reload this operand and some previous 3021 operand also had to match the same thing as this 3022 operand, we don't know how to do that. So reject this 3023 alternative. */ 3024 if (! win || force_reload) 3025 for (j = 0; j < i; j++) 3026 if (this_alternative_matches[j] 3027 == this_alternative_matches[i]) 3028 badop = 1; 3029 3030 break; 3031 3032 case 'p': 3033 /* All necessary reloads for an address_operand 3034 were handled in find_reloads_address. */ 3035 this_alternative[i] = (int) BASE_REG_CLASS; 3036 win = 1; 3037 break; 3038 3039 case 'm': 3040 if (force_reload) 3041 break; 3042 if (GET_CODE (operand) == MEM 3043 || (GET_CODE (operand) == REG 3044 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3045 && reg_renumber[REGNO (operand)] < 0)) 3046 win = 1; 3047 if (CONSTANT_P (operand) 3048 /* force_const_mem does not accept HIGH. */ 3049 && GET_CODE (operand) != HIGH) 3050 badop = 0; 3051 constmemok = 1; 3052 break; 3053 3054 case '<': 3055 if (GET_CODE (operand) == MEM 3056 && ! address_reloaded[i] 3057 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3058 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3059 win = 1; 3060 break; 3061 3062 case '>': 3063 if (GET_CODE (operand) == MEM 3064 && ! address_reloaded[i] 3065 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3066 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3067 win = 1; 3068 break; 3069 3070 /* Memory operand whose address is not offsettable. */ 3071 case 'V': 3072 if (force_reload) 3073 break; 3074 if (GET_CODE (operand) == MEM 3075 && ! (ind_levels ? offsettable_memref_p (operand) 3076 : offsettable_nonstrict_memref_p (operand)) 3077 /* Certain mem addresses will become offsettable 3078 after they themselves are reloaded. This is important; 3079 we don't want our own handling of unoffsettables 3080 to override the handling of reg_equiv_address. */ 3081 && !(GET_CODE (XEXP (operand, 0)) == REG 3082 && (ind_levels == 0 3083 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3084 win = 1; 3085 break; 3086 3087 /* Memory operand whose address is offsettable. */ 3088 case 'o': 3089 if (force_reload) 3090 break; 3091 if ((GET_CODE (operand) == MEM 3092 /* If IND_LEVELS, find_reloads_address won't reload a 3093 pseudo that didn't get a hard reg, so we have to 3094 reject that case. */ 3095 && ((ind_levels ? offsettable_memref_p (operand) 3096 : offsettable_nonstrict_memref_p (operand)) 3097 /* A reloaded address is offsettable because it is now 3098 just a simple register indirect. */ 3099 || address_reloaded[i])) 3100 || (GET_CODE (operand) == REG 3101 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3102 && reg_renumber[REGNO (operand)] < 0 3103 /* If reg_equiv_address is nonzero, we will be 3104 loading it into a register; hence it will be 3105 offsettable, but we cannot say that reg_equiv_mem 3106 is offsettable without checking. */ 3107 && ((reg_equiv_mem[REGNO (operand)] != 0 3108 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3109 || (reg_equiv_address[REGNO (operand)] != 0)))) 3110 win = 1; 3111 /* force_const_mem does not accept HIGH. */ 3112 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3113 || GET_CODE (operand) == MEM) 3114 badop = 0; 3115 constmemok = 1; 3116 offmemok = 1; 3117 break; 3118 3119 case '&': 3120 /* Output operand that is stored before the need for the 3121 input operands (and their index registers) is over. */ 3122 earlyclobber = 1, this_earlyclobber = 1; 3123 break; 3124 3125 case 'E': 3126#ifndef REAL_ARITHMETIC 3127 /* Match any floating double constant, but only if 3128 we can examine the bits of it reliably. */ 3129 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3130 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3131 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3132 break; 3133#endif 3134 if (GET_CODE (operand) == CONST_DOUBLE) 3135 win = 1; 3136 break; 3137 3138 case 'F': 3139 if (GET_CODE (operand) == CONST_DOUBLE) 3140 win = 1; 3141 break; 3142 3143 case 'G': 3144 case 'H': 3145 if (GET_CODE (operand) == CONST_DOUBLE 3146 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3147 win = 1; 3148 break; 3149 3150 case 's': 3151 if (GET_CODE (operand) == CONST_INT 3152 || (GET_CODE (operand) == CONST_DOUBLE 3153 && GET_MODE (operand) == VOIDmode)) 3154 break; 3155 case 'i': 3156 if (CONSTANT_P (operand) 3157#ifdef LEGITIMATE_PIC_OPERAND_P 3158 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3159#endif 3160 ) 3161 win = 1; 3162 break; 3163 3164 case 'n': 3165 if (GET_CODE (operand) == CONST_INT 3166 || (GET_CODE (operand) == CONST_DOUBLE 3167 && GET_MODE (operand) == VOIDmode)) 3168 win = 1; 3169 break; 3170 3171 case 'I': 3172 case 'J': 3173 case 'K': 3174 case 'L': 3175 case 'M': 3176 case 'N': 3177 case 'O': 3178 case 'P': 3179 if (GET_CODE (operand) == CONST_INT 3180 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3181 win = 1; 3182 break; 3183 3184 case 'X': 3185 win = 1; 3186 break; 3187 3188 case 'g': 3189 if (! force_reload 3190 /* A PLUS is never a valid operand, but reload can make 3191 it from a register when eliminating registers. */ 3192 && GET_CODE (operand) != PLUS 3193 /* A SCRATCH is not a valid operand. */ 3194 && GET_CODE (operand) != SCRATCH 3195#ifdef LEGITIMATE_PIC_OPERAND_P 3196 && (! CONSTANT_P (operand) 3197 || ! flag_pic 3198 || LEGITIMATE_PIC_OPERAND_P (operand)) 3199#endif 3200 && (GENERAL_REGS == ALL_REGS 3201 || GET_CODE (operand) != REG 3202 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3203 && reg_renumber[REGNO (operand)] < 0))) 3204 win = 1; 3205 /* Drop through into 'r' case */ 3206 3207 case 'r': 3208 this_alternative[i] 3209 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3210 goto reg; 3211 3212#ifdef EXTRA_CONSTRAINT 3213 case 'Q': 3214 case 'R': 3215 case 'S': 3216 case 'T': 3217 case 'U': 3218 if (EXTRA_CONSTRAINT (operand, c)) 3219 win = 1; 3220 break; 3221#endif 3222 3223 default: 3224 this_alternative[i] 3225 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3226 3227 reg: 3228 if (GET_MODE (operand) == BLKmode) 3229 break; 3230 winreg = 1; 3231 if (GET_CODE (operand) == REG 3232 && reg_fits_class_p (operand, this_alternative[i], 3233 offset, GET_MODE (recog_operand[i]))) 3234 win = 1; 3235 break; 3236 } 3237 3238 constraints[i] = p; 3239 3240 /* If this operand could be handled with a reg, 3241 and some reg is allowed, then this operand can be handled. */ 3242 if (winreg && this_alternative[i] != (int) NO_REGS) 3243 badop = 0; 3244 3245 /* Record which operands fit this alternative. */ 3246 this_alternative_earlyclobber[i] = earlyclobber; 3247 if (win && ! force_reload) 3248 this_alternative_win[i] = 1; 3249 else 3250 { 3251 int const_to_mem = 0; 3252 3253 this_alternative_offmemok[i] = offmemok; 3254 losers++; 3255 if (badop) 3256 bad = 1; 3257 /* Alternative loses if it has no regs for a reg operand. */ 3258 if (GET_CODE (operand) == REG 3259 && this_alternative[i] == (int) NO_REGS 3260 && this_alternative_matches[i] < 0) 3261 bad = 1; 3262 3263#if 0 3264 /* If this is a pseudo-register that is set in the previous 3265 insns, there's a good chance that it will already be in a 3266 spill register and we can use that spill register. So 3267 make this case cheaper. 3268 3269 Disabled for egcs. egcs has better inheritance code and 3270 this change causes problems with the improved reload 3271 inheritance code. */ 3272 if (GET_CODE (operand) == REG 3273 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3274 && REGNO (operand) == last_output_reload_regno) 3275 reject--; 3276#endif 3277 3278 /* If this is a constant that is reloaded into the desired 3279 class by copying it to memory first, count that as another 3280 reload. This is consistent with other code and is 3281 required to avoid choosing another alternative when 3282 the constant is moved into memory by this function on 3283 an early reload pass. Note that the test here is 3284 precisely the same as in the code below that calls 3285 force_const_mem. */ 3286 if (CONSTANT_P (operand) 3287 /* force_const_mem does not accept HIGH. */ 3288 && GET_CODE (operand) != HIGH 3289 && ((PREFERRED_RELOAD_CLASS (operand, 3290 (enum reg_class) this_alternative[i]) 3291 == NO_REGS) 3292 || no_input_reloads) 3293 && operand_mode[i] != VOIDmode) 3294 { 3295 const_to_mem = 1; 3296 if (this_alternative[i] != (int) NO_REGS) 3297 losers++; 3298 } 3299 3300 /* If we can't reload this value at all, reject this 3301 alternative. Note that we could also lose due to 3302 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3303 here. */ 3304 3305 if (! CONSTANT_P (operand) 3306 && (enum reg_class) this_alternative[i] != NO_REGS 3307 && (PREFERRED_RELOAD_CLASS (operand, 3308 (enum reg_class) this_alternative[i]) 3309 == NO_REGS)) 3310 bad = 1; 3311 3312 /* Alternative loses if it requires a type of reload not 3313 permitted for this insn. We can always reload SCRATCH 3314 and objects with a REG_UNUSED note. */ 3315 else if (GET_CODE (operand) != SCRATCH 3316 && modified[i] != RELOAD_READ && no_output_reloads 3317 && ! find_reg_note (insn, REG_UNUSED, operand)) 3318 bad = 1; 3319 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3320 && ! const_to_mem) 3321 bad = 1; 3322 3323 3324 /* We prefer to reload pseudos over reloading other things, 3325 since such reloads may be able to be eliminated later. 3326 If we are reloading a SCRATCH, we won't be generating any 3327 insns, just using a register, so it is also preferred. 3328 So bump REJECT in other cases. Don't do this in the 3329 case where we are forcing a constant into memory and 3330 it will then win since we don't want to have a different 3331 alternative match then. */ 3332 if (! (GET_CODE (operand) == REG 3333 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3334 && GET_CODE (operand) != SCRATCH 3335 && ! (const_to_mem && constmemok)) 3336 reject += 2; 3337 3338 /* Input reloads can be inherited more often than output 3339 reloads can be removed, so penalize output reloads. */ 3340 if (operand_type[i] != RELOAD_FOR_INPUT 3341 && GET_CODE (operand) != SCRATCH) 3342 reject++; 3343 } 3344 3345 /* If this operand is a pseudo register that didn't get a hard 3346 reg and this alternative accepts some register, see if the 3347 class that we want is a subset of the preferred class for this 3348 register. If not, but it intersects that class, use the 3349 preferred class instead. If it does not intersect the preferred 3350 class, show that usage of this alternative should be discouraged; 3351 it will be discouraged more still if the register is `preferred 3352 or nothing'. We do this because it increases the chance of 3353 reusing our spill register in a later insn and avoiding a pair 3354 of memory stores and loads. 3355 3356 Don't bother with this if this alternative will accept this 3357 operand. 3358 3359 Don't do this for a multiword operand, since it is only a 3360 small win and has the risk of requiring more spill registers, 3361 which could cause a large loss. 3362 3363 Don't do this if the preferred class has only one register 3364 because we might otherwise exhaust the class. */ 3365 3366 3367 if (! win && this_alternative[i] != (int) NO_REGS 3368 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3369 && reg_class_size[(int) preferred_class[i]] > 1) 3370 { 3371 if (! reg_class_subset_p (this_alternative[i], 3372 preferred_class[i])) 3373 { 3374 /* Since we don't have a way of forming the intersection, 3375 we just do something special if the preferred class 3376 is a subset of the class we have; that's the most 3377 common case anyway. */ 3378 if (reg_class_subset_p (preferred_class[i], 3379 this_alternative[i])) 3380 this_alternative[i] = (int) preferred_class[i]; 3381 else 3382 reject += (2 + 2 * pref_or_nothing[i]); 3383 } 3384 } 3385 } 3386 3387 /* Now see if any output operands that are marked "earlyclobber" 3388 in this alternative conflict with any input operands 3389 or any memory addresses. */ 3390 3391 for (i = 0; i < noperands; i++) 3392 if (this_alternative_earlyclobber[i] 3393 && this_alternative_win[i]) 3394 { 3395 struct decomposition early_data; 3396 3397 early_data = decompose (recog_operand[i]); 3398 3399 if (modified[i] == RELOAD_READ) 3400 abort (); 3401 3402 if (this_alternative[i] == NO_REGS) 3403 { 3404 this_alternative_earlyclobber[i] = 0; 3405 if (this_insn_is_asm) 3406 error_for_asm (this_insn, 3407 "`&' constraint used with no register class"); 3408 else 3409 abort (); 3410 } 3411 3412 for (j = 0; j < noperands; j++) 3413 /* Is this an input operand or a memory ref? */ 3414 if ((GET_CODE (recog_operand[j]) == MEM 3415 || modified[j] != RELOAD_WRITE) 3416 && j != i 3417 /* Ignore things like match_operator operands. */ 3418 && *recog_constraints[j] != 0 3419 /* Don't count an input operand that is constrained to match 3420 the early clobber operand. */ 3421 && ! (this_alternative_matches[j] == i 3422 && rtx_equal_p (recog_operand[i], recog_operand[j])) 3423 /* Is it altered by storing the earlyclobber operand? */ 3424 && !immune_p (recog_operand[j], recog_operand[i], early_data)) 3425 { 3426 /* If the output is in a single-reg class, 3427 it's costly to reload it, so reload the input instead. */ 3428 if (reg_class_size[this_alternative[i]] == 1 3429 && (GET_CODE (recog_operand[j]) == REG 3430 || GET_CODE (recog_operand[j]) == SUBREG)) 3431 { 3432 losers++; 3433 this_alternative_win[j] = 0; 3434 } 3435 else 3436 break; 3437 } 3438 /* If an earlyclobber operand conflicts with something, 3439 it must be reloaded, so request this and count the cost. */ 3440 if (j != noperands) 3441 { 3442 losers++; 3443 this_alternative_win[i] = 0; 3444 for (j = 0; j < noperands; j++) 3445 if (this_alternative_matches[j] == i 3446 && this_alternative_win[j]) 3447 { 3448 this_alternative_win[j] = 0; 3449 losers++; 3450 } 3451 } 3452 } 3453 3454 /* If one alternative accepts all the operands, no reload required, 3455 choose that alternative; don't consider the remaining ones. */ 3456 if (losers == 0) 3457 { 3458 /* Unswap these so that they are never swapped at `finish'. */ 3459 if (commutative >= 0) 3460 { 3461 recog_operand[commutative] = substed_operand[commutative]; 3462 recog_operand[commutative + 1] 3463 = substed_operand[commutative + 1]; 3464 } 3465 for (i = 0; i < noperands; i++) 3466 { 3467 goal_alternative_win[i] = 1; 3468 goal_alternative[i] = this_alternative[i]; 3469 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3470 goal_alternative_matches[i] = this_alternative_matches[i]; 3471 goal_alternative_earlyclobber[i] 3472 = this_alternative_earlyclobber[i]; 3473 } 3474 goal_alternative_number = this_alternative_number; 3475 goal_alternative_swapped = swapped; 3476 goal_earlyclobber = this_earlyclobber; 3477 goto finish; 3478 } 3479 3480 /* REJECT, set by the ! and ? constraint characters and when a register 3481 would be reloaded into a non-preferred class, discourages the use of 3482 this alternative for a reload goal. REJECT is incremented by six 3483 for each ? and two for each non-preferred class. */ 3484 losers = losers * 6 + reject; 3485 3486 /* If this alternative can be made to work by reloading, 3487 and it needs less reloading than the others checked so far, 3488 record it as the chosen goal for reloading. */ 3489 if (! bad && best > losers) 3490 { 3491 for (i = 0; i < noperands; i++) 3492 { 3493 goal_alternative[i] = this_alternative[i]; 3494 goal_alternative_win[i] = this_alternative_win[i]; 3495 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3496 goal_alternative_matches[i] = this_alternative_matches[i]; 3497 goal_alternative_earlyclobber[i] 3498 = this_alternative_earlyclobber[i]; 3499 } 3500 goal_alternative_swapped = swapped; 3501 best = losers; 3502 goal_alternative_number = this_alternative_number; 3503 goal_earlyclobber = this_earlyclobber; 3504 } 3505 } 3506 3507 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3508 then we need to try each alternative twice, 3509 the second time matching those two operands 3510 as if we had exchanged them. 3511 To do this, really exchange them in operands. 3512 3513 If we have just tried the alternatives the second time, 3514 return operands to normal and drop through. */ 3515 3516 if (commutative >= 0) 3517 { 3518 swapped = !swapped; 3519 if (swapped) 3520 { 3521 register enum reg_class tclass; 3522 register int t; 3523 3524 recog_operand[commutative] = substed_operand[commutative + 1]; 3525 recog_operand[commutative + 1] = substed_operand[commutative]; 3526 3527 tclass = preferred_class[commutative]; 3528 preferred_class[commutative] = preferred_class[commutative + 1]; 3529 preferred_class[commutative + 1] = tclass; 3530 3531 t = pref_or_nothing[commutative]; 3532 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3533 pref_or_nothing[commutative + 1] = t; 3534 3535 bcopy ((char *) recog_constraints, (char *) constraints, 3536 noperands * sizeof (char *)); 3537 goto try_swapped; 3538 } 3539 else 3540 { 3541 recog_operand[commutative] = substed_operand[commutative]; 3542 recog_operand[commutative + 1] = substed_operand[commutative + 1]; 3543 } 3544 } 3545 3546 /* The operands don't meet the constraints. 3547 goal_alternative describes the alternative 3548 that we could reach by reloading the fewest operands. 3549 Reload so as to fit it. */ 3550 3551 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3552 { 3553 /* No alternative works with reloads?? */ 3554 if (insn_code_number >= 0) 3555 fatal_insn ("Unable to generate reloads for:", insn); 3556 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3557 /* Avoid further trouble with this insn. */ 3558 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3559 n_reloads = 0; 3560 return 0; 3561 } 3562 3563 /* Jump to `finish' from above if all operands are valid already. 3564 In that case, goal_alternative_win is all 1. */ 3565 finish: 3566 3567 /* Right now, for any pair of operands I and J that are required to match, 3568 with I < J, 3569 goal_alternative_matches[J] is I. 3570 Set up goal_alternative_matched as the inverse function: 3571 goal_alternative_matched[I] = J. */ 3572 3573 for (i = 0; i < noperands; i++) 3574 goal_alternative_matched[i] = -1; 3575 3576 for (i = 0; i < noperands; i++) 3577 if (! goal_alternative_win[i] 3578 && goal_alternative_matches[i] >= 0) 3579 goal_alternative_matched[goal_alternative_matches[i]] = i; 3580 3581 /* If the best alternative is with operands 1 and 2 swapped, 3582 consider them swapped before reporting the reloads. Update the 3583 operand numbers of any reloads already pushed. */ 3584 3585 if (goal_alternative_swapped) 3586 { 3587 register rtx tem; 3588 3589 tem = substed_operand[commutative]; 3590 substed_operand[commutative] = substed_operand[commutative + 1]; 3591 substed_operand[commutative + 1] = tem; 3592 tem = recog_operand[commutative]; 3593 recog_operand[commutative] = recog_operand[commutative + 1]; 3594 recog_operand[commutative + 1] = tem; 3595 tem = *recog_operand_loc[commutative]; 3596 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1]; 3597 *recog_operand_loc[commutative+1] = tem; 3598 3599 for (i = 0; i < n_reloads; i++) 3600 { 3601 if (reload_opnum[i] == commutative) 3602 reload_opnum[i] = commutative + 1; 3603 else if (reload_opnum[i] == commutative + 1) 3604 reload_opnum[i] = commutative; 3605 } 3606 } 3607 3608 for (i = 0; i < noperands; i++) 3609 { 3610 operand_reloadnum[i] = -1; 3611 3612 /* If this is an earlyclobber operand, we need to widen the scope. 3613 The reload must remain valid from the start of the insn being 3614 reloaded until after the operand is stored into its destination. 3615 We approximate this with RELOAD_OTHER even though we know that we 3616 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3617 3618 One special case that is worth checking is when we have an 3619 output that is earlyclobber but isn't used past the insn (typically 3620 a SCRATCH). In this case, we only need have the reload live 3621 through the insn itself, but not for any of our input or output 3622 reloads. 3623 But we must not accidentally narrow the scope of an existing 3624 RELOAD_OTHER reload - leave these alone. 3625 3626 In any case, anything needed to address this operand can remain 3627 however they were previously categorized. */ 3628 3629 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3630 operand_type[i] 3631 = (find_reg_note (insn, REG_UNUSED, recog_operand[i]) 3632 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3633 } 3634 3635 /* Any constants that aren't allowed and can't be reloaded 3636 into registers are here changed into memory references. */ 3637 for (i = 0; i < noperands; i++) 3638 if (! goal_alternative_win[i] 3639 && CONSTANT_P (recog_operand[i]) 3640 /* force_const_mem does not accept HIGH. */ 3641 && GET_CODE (recog_operand[i]) != HIGH 3642 && ((PREFERRED_RELOAD_CLASS (recog_operand[i], 3643 (enum reg_class) goal_alternative[i]) 3644 == NO_REGS) 3645 || no_input_reloads) 3646 && operand_mode[i] != VOIDmode) 3647 { 3648 substed_operand[i] = recog_operand[i] 3649 = find_reloads_toplev (force_const_mem (operand_mode[i], 3650 recog_operand[i]), 3651 i, address_type[i], ind_levels, 0, insn); 3652 if (alternative_allows_memconst (recog_constraints[i], 3653 goal_alternative_number)) 3654 goal_alternative_win[i] = 1; 3655 } 3656 3657 /* Record the values of the earlyclobber operands for the caller. */ 3658 if (goal_earlyclobber) 3659 for (i = 0; i < noperands; i++) 3660 if (goal_alternative_earlyclobber[i]) 3661 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i]; 3662 3663 /* Now record reloads for all the operands that need them. */ 3664 last_output_reload_regno = -1; 3665 for (i = 0; i < noperands; i++) 3666 if (! goal_alternative_win[i]) 3667 { 3668 /* Operands that match previous ones have already been handled. */ 3669 if (goal_alternative_matches[i] >= 0) 3670 ; 3671 /* Handle an operand with a nonoffsettable address 3672 appearing where an offsettable address will do 3673 by reloading the address into a base register. 3674 3675 ??? We can also do this when the operand is a register and 3676 reg_equiv_mem is not offsettable, but this is a bit tricky, 3677 so we don't bother with it. It may not be worth doing. */ 3678 else if (goal_alternative_matched[i] == -1 3679 && goal_alternative_offmemok[i] 3680 && GET_CODE (recog_operand[i]) == MEM) 3681 { 3682 operand_reloadnum[i] 3683 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX, 3684 &XEXP (recog_operand[i], 0), NULL_PTR, 3685 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)), 3686 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3687 reload_inc[operand_reloadnum[i]] 3688 = GET_MODE_SIZE (GET_MODE (recog_operand[i])); 3689 3690 /* If this operand is an output, we will have made any 3691 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3692 now we are treating part of the operand as an input, so 3693 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3694 3695 if (modified[i] == RELOAD_WRITE) 3696 { 3697 for (j = 0; j < n_reloads; j++) 3698 { 3699 if (reload_opnum[j] == i) 3700 { 3701 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS) 3702 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS; 3703 else if (reload_when_needed[j] 3704 == RELOAD_FOR_OUTADDR_ADDRESS) 3705 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS; 3706 } 3707 } 3708 } 3709 } 3710 else if (goal_alternative_matched[i] == -1) 3711 { 3712 operand_reloadnum[i] 3713 = push_reload ((modified[i] != RELOAD_WRITE 3714 ? recog_operand[i] : 0), 3715 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3716 (modified[i] != RELOAD_WRITE 3717 ? recog_operand_loc[i] : 0), 3718 (modified[i] != RELOAD_READ 3719 ? recog_operand_loc[i] : 0), 3720 (enum reg_class) goal_alternative[i], 3721 (modified[i] == RELOAD_WRITE 3722 ? VOIDmode : operand_mode[i]), 3723 (modified[i] == RELOAD_READ 3724 ? VOIDmode : operand_mode[i]), 3725 (insn_code_number < 0 ? 0 3726 : insn_operand_strict_low[insn_code_number][i]), 3727 0, i, operand_type[i]); 3728 if (modified[i] != RELOAD_READ 3729 && GET_CODE (recog_operand[i]) == REG) 3730 last_output_reload_regno = REGNO (recog_operand[i]); 3731 } 3732 /* In a matching pair of operands, one must be input only 3733 and the other must be output only. 3734 Pass the input operand as IN and the other as OUT. */ 3735 else if (modified[i] == RELOAD_READ 3736 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3737 { 3738 operand_reloadnum[i] 3739 = push_reload (recog_operand[i], 3740 recog_operand[goal_alternative_matched[i]], 3741 recog_operand_loc[i], 3742 recog_operand_loc[goal_alternative_matched[i]], 3743 (enum reg_class) goal_alternative[i], 3744 operand_mode[i], 3745 operand_mode[goal_alternative_matched[i]], 3746 0, 0, i, RELOAD_OTHER); 3747 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3748 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG) 3749 last_output_reload_regno 3750 = REGNO (recog_operand[goal_alternative_matched[i]]); 3751 } 3752 else if (modified[i] == RELOAD_WRITE 3753 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3754 { 3755 operand_reloadnum[goal_alternative_matched[i]] 3756 = push_reload (recog_operand[goal_alternative_matched[i]], 3757 recog_operand[i], 3758 recog_operand_loc[goal_alternative_matched[i]], 3759 recog_operand_loc[i], 3760 (enum reg_class) goal_alternative[i], 3761 operand_mode[goal_alternative_matched[i]], 3762 operand_mode[i], 3763 0, 0, i, RELOAD_OTHER); 3764 operand_reloadnum[i] = output_reloadnum; 3765 if (GET_CODE (recog_operand[i]) == REG) 3766 last_output_reload_regno = REGNO (recog_operand[i]); 3767 } 3768 else if (insn_code_number >= 0) 3769 abort (); 3770 else 3771 { 3772 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3773 /* Avoid further trouble with this insn. */ 3774 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3775 n_reloads = 0; 3776 return 0; 3777 } 3778 } 3779 else if (goal_alternative_matched[i] < 0 3780 && goal_alternative_matches[i] < 0 3781 && optimize) 3782 { 3783 /* For each non-matching operand that's a MEM or a pseudo-register 3784 that didn't get a hard register, make an optional reload. 3785 This may get done even if the insn needs no reloads otherwise. */ 3786 3787 rtx operand = recog_operand[i]; 3788 3789 while (GET_CODE (operand) == SUBREG) 3790 operand = XEXP (operand, 0); 3791 if ((GET_CODE (operand) == MEM 3792 || (GET_CODE (operand) == REG 3793 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3794 /* If this is only for an output, the optional reload would not 3795 actually cause us to use a register now, just note that 3796 something is stored here. */ 3797 && ((enum reg_class) goal_alternative[i] != NO_REGS 3798 || modified[i] == RELOAD_WRITE) 3799 && ! no_input_reloads 3800 /* An optional output reload might allow to delete INSN later. 3801 We mustn't make in-out reloads on insns that are not permitted 3802 output reloads. 3803 If this is an asm, we can't delete it; we must not even call 3804 push_reload for an optional output reload in this case, 3805 because we can't be sure that the constraint allows a register, 3806 and push_reload verifies the constraints for asms. */ 3807 && (modified[i] == RELOAD_READ 3808 || (! no_output_reloads && ! this_insn_is_asm))) 3809 operand_reloadnum[i] 3810 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, 3811 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3812 (modified[i] != RELOAD_WRITE 3813 ? recog_operand_loc[i] : 0), 3814 (modified[i] != RELOAD_READ 3815 ? recog_operand_loc[i] : 0), 3816 (enum reg_class) goal_alternative[i], 3817 (modified[i] == RELOAD_WRITE 3818 ? VOIDmode : operand_mode[i]), 3819 (modified[i] == RELOAD_READ 3820 ? VOIDmode : operand_mode[i]), 3821 (insn_code_number < 0 ? 0 3822 : insn_operand_strict_low[insn_code_number][i]), 3823 1, i, operand_type[i]); 3824 /* If a memory reference remains (either as a MEM or a pseudo that 3825 did not get a hard register), yet we can't make an optional 3826 reload, check if this is actually a pseudo register reference; 3827 we then need to emit a USE and/or a CLOBBER so that reload 3828 inheritance will do the right thing. */ 3829 else if (replace 3830 && (GET_CODE (operand) == MEM 3831 || (GET_CODE (operand) == REG 3832 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3833 && reg_renumber [REGNO (operand)] < 0))) 3834 { 3835 operand = *recog_operand_loc[i]; 3836 3837 while (GET_CODE (operand) == SUBREG) 3838 operand = XEXP (operand, 0); 3839 if (GET_CODE (operand) == REG) 3840 { 3841 if (modified[i] != RELOAD_WRITE) 3842 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn); 3843 if (modified[i] != RELOAD_READ) 3844 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3845 } 3846 } 3847 } 3848 else if (goal_alternative_matches[i] >= 0 3849 && goal_alternative_win[goal_alternative_matches[i]] 3850 && modified[i] == RELOAD_READ 3851 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3852 && ! no_input_reloads && ! no_output_reloads 3853 && optimize) 3854 { 3855 /* Similarly, make an optional reload for a pair of matching 3856 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3857 3858 rtx operand = recog_operand[i]; 3859 3860 while (GET_CODE (operand) == SUBREG) 3861 operand = XEXP (operand, 0); 3862 if ((GET_CODE (operand) == MEM 3863 || (GET_CODE (operand) == REG 3864 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3865 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3866 != NO_REGS)) 3867 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3868 = push_reload (recog_operand[goal_alternative_matches[i]], 3869 recog_operand[i], 3870 recog_operand_loc[goal_alternative_matches[i]], 3871 recog_operand_loc[i], 3872 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3873 operand_mode[goal_alternative_matches[i]], 3874 operand_mode[i], 3875 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3876 } 3877 3878 /* Perform whatever substitutions on the operands we are supposed 3879 to make due to commutativity or replacement of registers 3880 with equivalent constants or memory slots. */ 3881 3882 for (i = 0; i < noperands; i++) 3883 { 3884 /* We only do this on the last pass through reload, because it is 3885 possible for some data (like reg_equiv_address) to be changed during 3886 later passes. Moreover, we loose the opportunity to get a useful 3887 reload_{in,out}_reg when we do these replacements. */ 3888 3889 if (replace) 3890 { 3891 rtx substitution = substed_operand[i]; 3892 3893 *recog_operand_loc[i] = substitution; 3894 3895 /* If we're replacing an operand with a LABEL_REF, we need 3896 to make sure that there's a REG_LABEL note attached to 3897 this instruction. */ 3898 if (GET_CODE (insn) != JUMP_INSN 3899 && GET_CODE (substitution) == LABEL_REF 3900 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3901 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, 3902 XEXP (substitution, 0), 3903 REG_NOTES (insn)); 3904 } 3905 else 3906 retval |= (substed_operand[i] != *recog_operand_loc[i]); 3907 } 3908 3909 /* If this insn pattern contains any MATCH_DUP's, make sure that 3910 they will be substituted if the operands they match are substituted. 3911 Also do now any substitutions we already did on the operands. 3912 3913 Don't do this if we aren't making replacements because we might be 3914 propagating things allocated by frame pointer elimination into places 3915 it doesn't expect. */ 3916 3917 if (insn_code_number >= 0 && replace) 3918 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) 3919 { 3920 int opno = recog_dup_num[i]; 3921 *recog_dup_loc[i] = *recog_operand_loc[opno]; 3922 if (operand_reloadnum[opno] >= 0) 3923 push_replacement (recog_dup_loc[i], operand_reloadnum[opno], 3924 insn_operand_mode[insn_code_number][opno]); 3925 } 3926 3927#if 0 3928 /* This loses because reloading of prior insns can invalidate the equivalence 3929 (or at least find_equiv_reg isn't smart enough to find it any more), 3930 causing this insn to need more reload regs than it needed before. 3931 It may be too late to make the reload regs available. 3932 Now this optimization is done safely in choose_reload_regs. */ 3933 3934 /* For each reload of a reg into some other class of reg, 3935 search for an existing equivalent reg (same value now) in the right class. 3936 We can use it as long as we don't need to change its contents. */ 3937 for (i = 0; i < n_reloads; i++) 3938 if (reload_reg_rtx[i] == 0 3939 && reload_in[i] != 0 3940 && GET_CODE (reload_in[i]) == REG 3941 && reload_out[i] == 0) 3942 { 3943 reload_reg_rtx[i] 3944 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1, 3945 static_reload_reg_p, 0, reload_inmode[i]); 3946 /* Prevent generation of insn to load the value 3947 because the one we found already has the value. */ 3948 if (reload_reg_rtx[i]) 3949 reload_in[i] = reload_reg_rtx[i]; 3950 } 3951#endif 3952 3953 /* Perhaps an output reload can be combined with another 3954 to reduce needs by one. */ 3955 if (!goal_earlyclobber) 3956 combine_reloads (); 3957 3958 /* If we have a pair of reloads for parts of an address, they are reloading 3959 the same object, the operands themselves were not reloaded, and they 3960 are for two operands that are supposed to match, merge the reloads and 3961 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3962 3963 for (i = 0; i < n_reloads; i++) 3964 { 3965 int k; 3966 3967 for (j = i + 1; j < n_reloads; j++) 3968 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3969 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 3970 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3971 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3972 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS 3973 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS 3974 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS 3975 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS) 3976 && rtx_equal_p (reload_in[i], reload_in[j]) 3977 && (operand_reloadnum[reload_opnum[i]] < 0 3978 || reload_optional[operand_reloadnum[reload_opnum[i]]]) 3979 && (operand_reloadnum[reload_opnum[j]] < 0 3980 || reload_optional[operand_reloadnum[reload_opnum[j]]]) 3981 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j] 3982 || (goal_alternative_matches[reload_opnum[j]] 3983 == reload_opnum[i]))) 3984 { 3985 for (k = 0; k < n_replacements; k++) 3986 if (replacements[k].what == j) 3987 replacements[k].what = i; 3988 3989 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3990 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3991 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 3992 else 3993 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 3994 reload_in[j] = 0; 3995 } 3996 } 3997 3998 /* Scan all the reloads and update their type. 3999 If a reload is for the address of an operand and we didn't reload 4000 that operand, change the type. Similarly, change the operand number 4001 of a reload when two operands match. If a reload is optional, treat it 4002 as though the operand isn't reloaded. 4003 4004 ??? This latter case is somewhat odd because if we do the optional 4005 reload, it means the object is hanging around. Thus we need only 4006 do the address reload if the optional reload was NOT done. 4007 4008 Change secondary reloads to be the address type of their operand, not 4009 the normal type. 4010 4011 If an operand's reload is now RELOAD_OTHER, change any 4012 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4013 RELOAD_FOR_OTHER_ADDRESS. */ 4014 4015 for (i = 0; i < n_reloads; i++) 4016 { 4017 if (reload_secondary_p[i] 4018 && reload_when_needed[i] == operand_type[reload_opnum[i]]) 4019 reload_when_needed[i] = address_type[reload_opnum[i]]; 4020 4021 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4022 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4023 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4024 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4025 && (operand_reloadnum[reload_opnum[i]] < 0 4026 || reload_optional[operand_reloadnum[reload_opnum[i]]])) 4027 { 4028 /* If we have a secondary reload to go along with this reload, 4029 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4030 4031 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4032 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4033 && reload_secondary_in_reload[i] != -1) 4034 { 4035 int secondary_in_reload = reload_secondary_in_reload[i]; 4036 4037 reload_when_needed[secondary_in_reload] 4038 = RELOAD_FOR_OPADDR_ADDR; 4039 4040 /* If there's a tertiary reload we have to change it also. */ 4041 if (secondary_in_reload > 0 4042 && reload_secondary_in_reload[secondary_in_reload] != -1) 4043 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] 4044 = RELOAD_FOR_OPADDR_ADDR; 4045 } 4046 4047 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4048 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4049 && reload_secondary_out_reload[i] != -1) 4050 { 4051 int secondary_out_reload = reload_secondary_out_reload[i]; 4052 4053 reload_when_needed[secondary_out_reload] 4054 = RELOAD_FOR_OPADDR_ADDR; 4055 4056 /* If there's a tertiary reload we have to change it also. */ 4057 if (secondary_out_reload 4058 && reload_secondary_out_reload[secondary_out_reload] != -1) 4059 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] 4060 = RELOAD_FOR_OPADDR_ADDR; 4061 } 4062 4063 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4064 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4065 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 4066 else 4067 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 4068 } 4069 4070 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4071 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4072 && operand_reloadnum[reload_opnum[i]] >= 0 4073 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] 4074 == RELOAD_OTHER)) 4075 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS; 4076 4077 if (goal_alternative_matches[reload_opnum[i]] >= 0) 4078 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]]; 4079 } 4080 4081 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4082 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4083 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4084 4085 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4086 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4087 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4088 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4089 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4090 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4091 This is complicated by the fact that a single operand can have more 4092 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4093 choose_reload_regs without affecting code quality, and cases that 4094 actually fail are extremely rare, so it turns out to be better to fix 4095 the problem here by not generating cases that choose_reload_regs will 4096 fail for. */ 4097 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4098 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4099 a single operand. 4100 We can reduce the register pressure by exploiting that a 4101 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4102 does not conflict with any of them, if it is only used for the first of 4103 the RELOAD_FOR_X_ADDRESS reloads. */ 4104 { 4105 int first_op_addr_num = -2; 4106 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4107 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4108 int need_change= 0; 4109 /* We use last_op_addr_reload and the contents of the above arrays 4110 first as flags - -2 means no instance encountered, -1 means exactly 4111 one instance encountered. 4112 If more than one instance has been encountered, we store the reload 4113 number of the first reload of the kind in question; reload numbers 4114 are known to be non-negative. */ 4115 for (i = 0; i < noperands; i++) 4116 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4117 for (i = n_reloads - 1; i >= 0; i--) 4118 { 4119 switch (reload_when_needed[i]) 4120 { 4121 case RELOAD_FOR_OPERAND_ADDRESS: 4122 if (++first_op_addr_num >= 0) 4123 { 4124 first_op_addr_num = i; 4125 need_change = 1; 4126 } 4127 break; 4128 case RELOAD_FOR_INPUT_ADDRESS: 4129 if (++first_inpaddr_num[reload_opnum[i]] >= 0) 4130 { 4131 first_inpaddr_num[reload_opnum[i]] = i; 4132 need_change = 1; 4133 } 4134 break; 4135 case RELOAD_FOR_OUTPUT_ADDRESS: 4136 if (++first_outpaddr_num[reload_opnum[i]] >= 0) 4137 { 4138 first_outpaddr_num[reload_opnum[i]] = i; 4139 need_change = 1; 4140 } 4141 break; 4142 default: 4143 break; 4144 } 4145 } 4146 4147 if (need_change) 4148 { 4149 for (i = 0; i < n_reloads; i++) 4150 { 4151 int first_num, type; 4152 4153 switch (reload_when_needed[i]) 4154 { 4155 case RELOAD_FOR_OPADDR_ADDR: 4156 first_num = first_op_addr_num; 4157 type = RELOAD_FOR_OPERAND_ADDRESS; 4158 break; 4159 case RELOAD_FOR_INPADDR_ADDRESS: 4160 first_num = first_inpaddr_num[reload_opnum[i]]; 4161 type = RELOAD_FOR_INPUT_ADDRESS; 4162 break; 4163 case RELOAD_FOR_OUTADDR_ADDRESS: 4164 first_num = first_outpaddr_num[reload_opnum[i]]; 4165 type = RELOAD_FOR_OUTPUT_ADDRESS; 4166 break; 4167 default: 4168 continue; 4169 } 4170 if (first_num < 0) 4171 continue; 4172 else if (i > first_num) 4173 reload_when_needed[i] = type; 4174 else 4175 { 4176 /* Check if the only TYPE reload that uses reload I is 4177 reload FIRST_NUM. */ 4178 for (j = n_reloads - 1; j > first_num; j--) 4179 { 4180 if (reload_when_needed[j] == type 4181 && (reload_secondary_p[i] 4182 ? reload_secondary_in_reload[j] == i 4183 : reg_mentioned_p (reload_in[i], reload_in[j]))) 4184 { 4185 reload_when_needed[i] = type; 4186 break; 4187 } 4188 } 4189 } 4190 } 4191 } 4192 } 4193 4194 /* See if we have any reloads that are now allowed to be merged 4195 because we've changed when the reload is needed to 4196 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4197 check for the most common cases. */ 4198 4199 for (i = 0; i < n_reloads; i++) 4200 if (reload_in[i] != 0 && reload_out[i] == 0 4201 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS 4202 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR 4203 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS)) 4204 for (j = 0; j < n_reloads; j++) 4205 if (i != j && reload_in[j] != 0 && reload_out[j] == 0 4206 && reload_when_needed[j] == reload_when_needed[i] 4207 && MATCHES (reload_in[i], reload_in[j]) 4208 && reload_reg_class[i] == reload_reg_class[j] 4209 && !reload_nocombine[i] && !reload_nocombine[j] 4210 && reload_reg_rtx[i] == reload_reg_rtx[j]) 4211 { 4212 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]); 4213 transfer_replacements (i, j); 4214 reload_in[j] = 0; 4215 } 4216 4217 /* Set which reloads must use registers not used in any group. Start 4218 with those that conflict with a group and then include ones that 4219 conflict with ones that are already known to conflict with a group. */ 4220 4221 changed = 0; 4222 for (i = 0; i < n_reloads; i++) 4223 { 4224 enum machine_mode mode = reload_inmode[i]; 4225 enum reg_class class = reload_reg_class[i]; 4226 int size; 4227 4228 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4229 mode = reload_outmode[i]; 4230 size = CLASS_MAX_NREGS (class, mode); 4231 4232 if (size == 1) 4233 for (j = 0; j < n_reloads; j++) 4234 if ((CLASS_MAX_NREGS (reload_reg_class[j], 4235 (GET_MODE_SIZE (reload_outmode[j]) 4236 > GET_MODE_SIZE (reload_inmode[j])) 4237 ? reload_outmode[j] : reload_inmode[j]) 4238 > 1) 4239 && !reload_optional[j] 4240 && (reload_in[j] != 0 || reload_out[j] != 0 4241 || reload_secondary_p[j]) 4242 && reloads_conflict (i, j) 4243 && reg_classes_intersect_p (class, reload_reg_class[j])) 4244 { 4245 reload_nongroup[i] = 1; 4246 changed = 1; 4247 break; 4248 } 4249 } 4250 4251 while (changed) 4252 { 4253 changed = 0; 4254 4255 for (i = 0; i < n_reloads; i++) 4256 { 4257 enum machine_mode mode = reload_inmode[i]; 4258 enum reg_class class = reload_reg_class[i]; 4259 int size; 4260 4261 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4262 mode = reload_outmode[i]; 4263 size = CLASS_MAX_NREGS (class, mode); 4264 4265 if (! reload_nongroup[i] && size == 1) 4266 for (j = 0; j < n_reloads; j++) 4267 if (reload_nongroup[j] 4268 && reloads_conflict (i, j) 4269 && reg_classes_intersect_p (class, reload_reg_class[j])) 4270 { 4271 reload_nongroup[i] = 1; 4272 changed = 1; 4273 break; 4274 } 4275 } 4276 } 4277 4278#else /* no REGISTER_CONSTRAINTS */ 4279 int noperands; 4280 int insn_code_number; 4281 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */ 4282 register int i; 4283 rtx body = PATTERN (insn); 4284 int retval = 0; 4285 4286 n_reloads = 0; 4287 n_replacements = 0; 4288 n_earlyclobbers = 0; 4289 replace_reloads = replace; 4290 this_insn = insn; 4291 4292 extract_insn (insn); 4293 4294 noperands = reload_n_operands = recog_n_operands; 4295 4296 /* Return if the insn needs no reload processing. */ 4297 if (noperands == 0) 4298 return; 4299 4300 for (i = 0; i < noperands; i++) 4301 { 4302 register RTX_CODE code = GET_CODE (recog_operand[i]); 4303 int is_set_dest = GET_CODE (body) == SET && (i == 0); 4304 4305 if (insn_code_number >= 0) 4306 if (insn_operand_address_p[insn_code_number][i]) 4307 find_reloads_address (VOIDmode, NULL_PTR, 4308 recog_operand[i], recog_operand_loc[i], 4309 i, RELOAD_FOR_INPUT, ind_levels, insn); 4310 4311 /* In these cases, we can't tell if the operand is an input 4312 or an output, so be conservative. In practice it won't be 4313 problem. */ 4314 4315 if (code == MEM) 4316 find_reloads_address (GET_MODE (recog_operand[i]), 4317 recog_operand_loc[i], 4318 XEXP (recog_operand[i], 0), 4319 &XEXP (recog_operand[i], 0), 4320 i, RELOAD_OTHER, ind_levels, insn); 4321 if (code == SUBREG) 4322 recog_operand[i] = *recog_operand_loc[i] 4323 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER, 4324 ind_levels, is_set_dest); 4325 if (code == REG) 4326 { 4327 register int regno = REGNO (recog_operand[i]); 4328 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4329 recog_operand[i] = *recog_operand_loc[i] 4330 = reg_equiv_constant[regno]; 4331#if 0 /* This might screw code in reload1.c to delete prior output-reload 4332 that feeds this insn. */ 4333 if (reg_equiv_mem[regno] != 0) 4334 recog_operand[i] = *recog_operand_loc[i] 4335 = reg_equiv_mem[regno]; 4336#endif 4337 } 4338 } 4339 4340 /* Perhaps an output reload can be combined with another 4341 to reduce needs by one. */ 4342 if (!goal_earlyclobber) 4343 combine_reloads (); 4344#endif /* no REGISTER_CONSTRAINTS */ 4345 return retval; 4346} 4347 4348/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4349 accepts a memory operand with constant address. */ 4350 4351static int 4352alternative_allows_memconst (constraint, altnum) 4353 const char *constraint; 4354 int altnum; 4355{ 4356 register int c; 4357 /* Skip alternatives before the one requested. */ 4358 while (altnum > 0) 4359 { 4360 while (*constraint++ != ','); 4361 altnum--; 4362 } 4363 /* Scan the requested alternative for 'm' or 'o'. 4364 If one of them is present, this alternative accepts memory constants. */ 4365 while ((c = *constraint++) && c != ',' && c != '#') 4366 if (c == 'm' || c == 'o') 4367 return 1; 4368 return 0; 4369} 4370 4371/* Scan X for memory references and scan the addresses for reloading. 4372 Also checks for references to "constant" regs that we want to eliminate 4373 and replaces them with the values they stand for. 4374 We may alter X destructively if it contains a reference to such. 4375 If X is just a constant reg, we return the equivalent value 4376 instead of X. 4377 4378 IND_LEVELS says how many levels of indirect addressing this machine 4379 supports. 4380 4381 OPNUM and TYPE identify the purpose of the reload. 4382 4383 IS_SET_DEST is true if X is the destination of a SET, which is not 4384 appropriate to be replaced by a constant. 4385 4386 INSN, if nonzero, is the insn in which we do the reload. It is used 4387 to determine if we may generate output reloads, and where to put USEs 4388 for pseudos that we have to replace with stack slots. */ 4389 4390static rtx 4391find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn) 4392 rtx x; 4393 int opnum; 4394 enum reload_type type; 4395 int ind_levels; 4396 int is_set_dest; 4397 rtx insn; 4398{ 4399 register RTX_CODE code = GET_CODE (x); 4400 4401 register char *fmt = GET_RTX_FORMAT (code); 4402 register int i; 4403 int copied; 4404 4405 if (code == REG) 4406 { 4407 /* This code is duplicated for speed in find_reloads. */ 4408 register int regno = REGNO (x); 4409 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4410 x = reg_equiv_constant[regno]; 4411#if 0 4412/* This creates (subreg (mem...)) which would cause an unnecessary 4413 reload of the mem. */ 4414 else if (reg_equiv_mem[regno] != 0) 4415 x = reg_equiv_mem[regno]; 4416#endif 4417 else if (reg_equiv_memory_loc[regno] 4418 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4419 { 4420 rtx mem = make_memloc (x, regno); 4421 if (reg_equiv_address[regno] 4422 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4423 { 4424 /* If this is not a toplevel operand, find_reloads doesn't see 4425 this substitution. We have to emit a USE of the pseudo so 4426 that delete_output_reload can see it. */ 4427 if (replace_reloads && recog_operand[opnum] != x) 4428 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn); 4429 x = mem; 4430 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4431 opnum, type, ind_levels, insn); 4432 } 4433 } 4434 return x; 4435 } 4436 if (code == MEM) 4437 { 4438 rtx tem = x; 4439 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4440 opnum, type, ind_levels, insn); 4441 return tem; 4442 } 4443 4444 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4445 { 4446 /* Check for SUBREG containing a REG that's equivalent to a constant. 4447 If the constant has a known value, truncate it right now. 4448 Similarly if we are extracting a single-word of a multi-word 4449 constant. If the constant is symbolic, allow it to be substituted 4450 normally. push_reload will strip the subreg later. If the 4451 constant is VOIDmode, abort because we will lose the mode of 4452 the register (this should never happen because one of the cases 4453 above should handle it). */ 4454 4455 register int regno = REGNO (SUBREG_REG (x)); 4456 rtx tem; 4457 4458 if (subreg_lowpart_p (x) 4459 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4460 && reg_equiv_constant[regno] != 0 4461 && (tem = gen_lowpart_common (GET_MODE (x), 4462 reg_equiv_constant[regno])) != 0) 4463 return tem; 4464 4465 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4466 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4467 && reg_equiv_constant[regno] != 0 4468 && (tem = operand_subword (reg_equiv_constant[regno], 4469 SUBREG_WORD (x), 0, 4470 GET_MODE (SUBREG_REG (x)))) != 0) 4471 { 4472 /* TEM is now a word sized constant for the bits from X that 4473 we wanted. However, TEM may be the wrong representation. 4474 4475 Use gen_lowpart_common to convert a CONST_INT into a 4476 CONST_DOUBLE and vice versa as needed according to by the mode 4477 of the SUBREG. */ 4478 tem = gen_lowpart_common (GET_MODE (x), tem); 4479 if (!tem) 4480 abort (); 4481 return tem; 4482 } 4483 4484 /* If the SUBREG is wider than a word, the above test will fail. 4485 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4486 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4487 a 32 bit target. We still can - and have to - handle this 4488 for non-paradoxical subregs of CONST_INTs. */ 4489 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4490 && reg_equiv_constant[regno] != 0 4491 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4492 && (GET_MODE_SIZE (GET_MODE (x)) 4493 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4494 { 4495 int shift = SUBREG_WORD (x) * BITS_PER_WORD; 4496 if (WORDS_BIG_ENDIAN) 4497 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4498 - GET_MODE_BITSIZE (GET_MODE (x)) 4499 - shift); 4500 /* Here we use the knowledge that CONST_INTs have a 4501 HOST_WIDE_INT field. */ 4502 if (shift >= HOST_BITS_PER_WIDE_INT) 4503 shift = HOST_BITS_PER_WIDE_INT - 1; 4504 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4505 } 4506 4507 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4508 && reg_equiv_constant[regno] != 0 4509 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4510 abort (); 4511 4512 /* If the subreg contains a reg that will be converted to a mem, 4513 convert the subreg to a narrower memref now. 4514 Otherwise, we would get (subreg (mem ...) ...), 4515 which would force reload of the mem. 4516 4517 We also need to do this if there is an equivalent MEM that is 4518 not offsettable. In that case, alter_subreg would produce an 4519 invalid address on big-endian machines. 4520 4521 For machines that extend byte loads, we must not reload using 4522 a wider mode if we have a paradoxical SUBREG. find_reloads will 4523 force a reload in that case. So we should not do anything here. */ 4524 4525 else if (regno >= FIRST_PSEUDO_REGISTER 4526#ifdef LOAD_EXTEND_OP 4527 && (GET_MODE_SIZE (GET_MODE (x)) 4528 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4529#endif 4530 && (reg_equiv_address[regno] != 0 4531 || (reg_equiv_mem[regno] != 0 4532 && (! strict_memory_address_p (GET_MODE (x), 4533 XEXP (reg_equiv_mem[regno], 0)) 4534 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4535 || num_not_at_initial_offset)))) 4536 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4537 insn); 4538 } 4539 4540 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4541 { 4542 if (fmt[i] == 'e') 4543 { 4544 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4545 ind_levels, is_set_dest, insn); 4546 /* If we have replaced a reg with it's equivalent memory loc - 4547 that can still be handled here e.g. if it's in a paradoxical 4548 subreg - we must make the change in a copy, rather than using 4549 a destructive change. This way, find_reloads can still elect 4550 not to do the change. */ 4551 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4552 { 4553 x = shallow_copy_rtx (x); 4554 copied = 1; 4555 } 4556 XEXP (x, i) = new_part; 4557 } 4558 } 4559 return x; 4560} 4561 4562/* Return a mem ref for the memory equivalent of reg REGNO. 4563 This mem ref is not shared with anything. */ 4564 4565static rtx 4566make_memloc (ad, regno) 4567 rtx ad; 4568 int regno; 4569{ 4570 /* We must rerun eliminate_regs, in case the elimination 4571 offsets have changed. */ 4572 rtx tem 4573 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4574 4575 /* If TEM might contain a pseudo, we must copy it to avoid 4576 modifying it when we do the substitution for the reload. */ 4577 if (rtx_varies_p (tem)) 4578 tem = copy_rtx (tem); 4579 4580 tem = gen_rtx_MEM (GET_MODE (ad), tem); 4581 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 4582 return tem; 4583} 4584 4585/* Record all reloads needed for handling memory address AD 4586 which appears in *LOC in a memory reference to mode MODE 4587 which itself is found in location *MEMREFLOC. 4588 Note that we take shortcuts assuming that no multi-reg machine mode 4589 occurs as part of an address. 4590 4591 OPNUM and TYPE specify the purpose of this reload. 4592 4593 IND_LEVELS says how many levels of indirect addressing this machine 4594 supports. 4595 4596 INSN, if nonzero, is the insn in which we do the reload. It is used 4597 to determine if we may generate output reloads, and where to put USEs 4598 for pseudos that we have to replace with stack slots. 4599 4600 Value is nonzero if this address is reloaded or replaced as a whole. 4601 This is interesting to the caller if the address is an autoincrement. 4602 4603 Note that there is no verification that the address will be valid after 4604 this routine does its work. Instead, we rely on the fact that the address 4605 was valid when reload started. So we need only undo things that reload 4606 could have broken. These are wrong register types, pseudos not allocated 4607 to a hard register, and frame pointer elimination. */ 4608 4609static int 4610find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4611 enum machine_mode mode; 4612 rtx *memrefloc; 4613 rtx ad; 4614 rtx *loc; 4615 int opnum; 4616 enum reload_type type; 4617 int ind_levels; 4618 rtx insn; 4619{ 4620 register int regno; 4621 int removed_and = 0; 4622 rtx tem; 4623 4624 /* If the address is a register, see if it is a legitimate address and 4625 reload if not. We first handle the cases where we need not reload 4626 or where we must reload in a non-standard way. */ 4627 4628 if (GET_CODE (ad) == REG) 4629 { 4630 regno = REGNO (ad); 4631 4632 if (reg_equiv_constant[regno] != 0 4633 && strict_memory_address_p (mode, reg_equiv_constant[regno])) 4634 { 4635 *loc = ad = reg_equiv_constant[regno]; 4636 return 0; 4637 } 4638 4639 tem = reg_equiv_memory_loc[regno]; 4640 if (tem != 0) 4641 { 4642 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4643 { 4644 tem = make_memloc (ad, regno); 4645 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4646 { 4647 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0), 4648 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4649 ind_levels, insn); 4650 } 4651 /* We can avoid a reload if the register's equivalent memory 4652 expression is valid as an indirect memory address. 4653 But not all addresses are valid in a mem used as an indirect 4654 address: only reg or reg+constant. */ 4655 4656 if (ind_levels > 0 4657 && strict_memory_address_p (mode, tem) 4658 && (GET_CODE (XEXP (tem, 0)) == REG 4659 || (GET_CODE (XEXP (tem, 0)) == PLUS 4660 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4661 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4662 { 4663 /* TEM is not the same as what we'll be replacing the 4664 pseudo with after reload, put a USE in front of INSN 4665 in the final reload pass. */ 4666 if (replace_reloads 4667 && num_not_at_initial_offset 4668 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4669 { 4670 *loc = tem; 4671 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 4672 /* This doesn't really count as replacing the address 4673 as a whole, since it is still a memory access. */ 4674 } 4675 return 0; 4676 } 4677 ad = tem; 4678 } 4679 } 4680 4681 /* The only remaining case where we can avoid a reload is if this is a 4682 hard register that is valid as a base register and which is not the 4683 subject of a CLOBBER in this insn. */ 4684 4685 else if (regno < FIRST_PSEUDO_REGISTER 4686 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4687 && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0)) 4688 return 0; 4689 4690 /* If we do not have one of the cases above, we must do the reload. */ 4691 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS, 4692 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4693 return 1; 4694 } 4695 4696 if (strict_memory_address_p (mode, ad)) 4697 { 4698 /* The address appears valid, so reloads are not needed. 4699 But the address may contain an eliminable register. 4700 This can happen because a machine with indirect addressing 4701 may consider a pseudo register by itself a valid address even when 4702 it has failed to get a hard reg. 4703 So do a tree-walk to find and eliminate all such regs. */ 4704 4705 /* But first quickly dispose of a common case. */ 4706 if (GET_CODE (ad) == PLUS 4707 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4708 && GET_CODE (XEXP (ad, 0)) == REG 4709 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4710 return 0; 4711 4712 subst_reg_equivs_changed = 0; 4713 *loc = subst_reg_equivs (ad, insn); 4714 4715 if (! subst_reg_equivs_changed) 4716 return 0; 4717 4718 /* Check result for validity after substitution. */ 4719 if (strict_memory_address_p (mode, ad)) 4720 return 0; 4721 } 4722 4723#ifdef LEGITIMIZE_RELOAD_ADDRESS 4724 do 4725 { 4726 if (memrefloc) 4727 { 4728 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4729 ind_levels, win); 4730 } 4731 break; 4732 win: 4733 *memrefloc = copy_rtx (*memrefloc); 4734 XEXP (*memrefloc, 0) = ad; 4735 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4736 return 1; 4737 } 4738 while (0); 4739#endif 4740 4741 /* The address is not valid. We have to figure out why. First see if 4742 we have an outer AND and remove it if so. Then analyze what's inside. */ 4743 4744 if (GET_CODE (ad) == AND) 4745 { 4746 removed_and = 1; 4747 loc = &XEXP (ad, 0); 4748 ad = *loc; 4749 } 4750 4751 /* One possibility for why the address is invalid is that it is itself 4752 a MEM. This can happen when the frame pointer is being eliminated, a 4753 pseudo is not allocated to a hard register, and the offset between the 4754 frame and stack pointers is not its initial value. In that case the 4755 pseudo will have been replaced by a MEM referring to the 4756 stack pointer. */ 4757 if (GET_CODE (ad) == MEM) 4758 { 4759 /* First ensure that the address in this MEM is valid. Then, unless 4760 indirect addresses are valid, reload the MEM into a register. */ 4761 tem = ad; 4762 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4763 opnum, ADDR_TYPE (type), 4764 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4765 4766 /* If tem was changed, then we must create a new memory reference to 4767 hold it and store it back into memrefloc. */ 4768 if (tem != ad && memrefloc) 4769 { 4770 *memrefloc = copy_rtx (*memrefloc); 4771 copy_replacements (tem, XEXP (*memrefloc, 0)); 4772 loc = &XEXP (*memrefloc, 0); 4773 if (removed_and) 4774 loc = &XEXP (*loc, 0); 4775 } 4776 4777 /* Check similar cases as for indirect addresses as above except 4778 that we can allow pseudos and a MEM since they should have been 4779 taken care of above. */ 4780 4781 if (ind_levels == 0 4782 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4783 || GET_CODE (XEXP (tem, 0)) == MEM 4784 || ! (GET_CODE (XEXP (tem, 0)) == REG 4785 || (GET_CODE (XEXP (tem, 0)) == PLUS 4786 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4787 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4788 { 4789 /* Must use TEM here, not AD, since it is the one that will 4790 have any subexpressions reloaded, if needed. */ 4791 push_reload (tem, NULL_RTX, loc, NULL_PTR, 4792 BASE_REG_CLASS, GET_MODE (tem), 4793 VOIDmode, 0, 4794 0, opnum, type); 4795 return ! removed_and; 4796 } 4797 else 4798 return 0; 4799 } 4800 4801 /* If we have address of a stack slot but it's not valid because the 4802 displacement is too large, compute the sum in a register. 4803 Handle all base registers here, not just fp/ap/sp, because on some 4804 targets (namely SH) we can also get too large displacements from 4805 big-endian corrections. */ 4806 else if (GET_CODE (ad) == PLUS 4807 && GET_CODE (XEXP (ad, 0)) == REG 4808 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4809 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4810 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4811 { 4812 /* Unshare the MEM rtx so we can safely alter it. */ 4813 if (memrefloc) 4814 { 4815 *memrefloc = copy_rtx (*memrefloc); 4816 loc = &XEXP (*memrefloc, 0); 4817 if (removed_and) 4818 loc = &XEXP (*loc, 0); 4819 } 4820 4821 if (double_reg_address_ok) 4822 { 4823 /* Unshare the sum as well. */ 4824 *loc = ad = copy_rtx (ad); 4825 4826 /* Reload the displacement into an index reg. 4827 We assume the frame pointer or arg pointer is a base reg. */ 4828 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4829 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4830 type, ind_levels); 4831 return 0; 4832 } 4833 else 4834 { 4835 /* If the sum of two regs is not necessarily valid, 4836 reload the sum into a base reg. 4837 That will at least work. */ 4838 find_reloads_address_part (ad, loc, BASE_REG_CLASS, 4839 Pmode, opnum, type, ind_levels); 4840 } 4841 return ! removed_and; 4842 } 4843 4844 /* If we have an indexed stack slot, there are three possible reasons why 4845 it might be invalid: The index might need to be reloaded, the address 4846 might have been made by frame pointer elimination and hence have a 4847 constant out of range, or both reasons might apply. 4848 4849 We can easily check for an index needing reload, but even if that is the 4850 case, we might also have an invalid constant. To avoid making the 4851 conservative assumption and requiring two reloads, we see if this address 4852 is valid when not interpreted strictly. If it is, the only problem is 4853 that the index needs a reload and find_reloads_address_1 will take care 4854 of it. 4855 4856 There is still a case when we might generate an extra reload, 4857 however. In certain cases eliminate_regs will return a MEM for a REG 4858 (see the code there for details). In those cases, memory_address_p 4859 applied to our address will return 0 so we will think that our offset 4860 must be too large. But it might indeed be valid and the only problem 4861 is that a MEM is present where a REG should be. This case should be 4862 very rare and there doesn't seem to be any way to avoid it. 4863 4864 If we decide to do something here, it must be that 4865 `double_reg_address_ok' is true and that this address rtl was made by 4866 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4867 rework the sum so that the reload register will be added to the index. 4868 This is safe because we know the address isn't shared. 4869 4870 We check for fp/ap/sp as both the first and second operand of the 4871 innermost PLUS. */ 4872 4873 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4874 && GET_CODE (XEXP (ad, 0)) == PLUS 4875 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4876#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4877 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4878#endif 4879#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4880 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4881#endif 4882 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4883 && ! memory_address_p (mode, ad)) 4884 { 4885 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4886 plus_constant (XEXP (XEXP (ad, 0), 0), 4887 INTVAL (XEXP (ad, 1))), 4888 XEXP (XEXP (ad, 0), 1)); 4889 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS, 4890 GET_MODE (ad), opnum, type, ind_levels); 4891 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4892 type, 0, insn); 4893 4894 return 0; 4895 } 4896 4897 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4898 && GET_CODE (XEXP (ad, 0)) == PLUS 4899 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4900#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4901 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4902#endif 4903#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4904 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4905#endif 4906 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4907 && ! memory_address_p (mode, ad)) 4908 { 4909 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4910 XEXP (XEXP (ad, 0), 0), 4911 plus_constant (XEXP (XEXP (ad, 0), 1), 4912 INTVAL (XEXP (ad, 1)))); 4913 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS, 4914 GET_MODE (ad), opnum, type, ind_levels); 4915 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4916 type, 0, insn); 4917 4918 return 0; 4919 } 4920 4921 /* See if address becomes valid when an eliminable register 4922 in a sum is replaced. */ 4923 4924 tem = ad; 4925 if (GET_CODE (ad) == PLUS) 4926 tem = subst_indexed_address (ad); 4927 if (tem != ad && strict_memory_address_p (mode, tem)) 4928 { 4929 /* Ok, we win that way. Replace any additional eliminable 4930 registers. */ 4931 4932 subst_reg_equivs_changed = 0; 4933 tem = subst_reg_equivs (tem, insn); 4934 4935 /* Make sure that didn't make the address invalid again. */ 4936 4937 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4938 { 4939 *loc = tem; 4940 return 0; 4941 } 4942 } 4943 4944 /* If constants aren't valid addresses, reload the constant address 4945 into a register. */ 4946 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4947 { 4948 /* If AD is in address in the constant pool, the MEM rtx may be shared. 4949 Unshare it so we can safely alter it. */ 4950 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4951 && CONSTANT_POOL_ADDRESS_P (ad)) 4952 { 4953 *memrefloc = copy_rtx (*memrefloc); 4954 loc = &XEXP (*memrefloc, 0); 4955 if (removed_and) 4956 loc = &XEXP (*loc, 0); 4957 } 4958 4959 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type, 4960 ind_levels); 4961 return ! removed_and; 4962 } 4963 4964 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4965 insn); 4966} 4967 4968/* Find all pseudo regs appearing in AD 4969 that are eliminable in favor of equivalent values 4970 and do not have hard regs; replace them by their equivalents. 4971 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4972 front of it for pseudos that we have to replace with stack slots. */ 4973 4974static rtx 4975subst_reg_equivs (ad, insn) 4976 rtx ad; 4977 rtx insn; 4978{ 4979 register RTX_CODE code = GET_CODE (ad); 4980 register int i; 4981 register char *fmt; 4982 4983 switch (code) 4984 { 4985 case HIGH: 4986 case CONST_INT: 4987 case CONST: 4988 case CONST_DOUBLE: 4989 case SYMBOL_REF: 4990 case LABEL_REF: 4991 case PC: 4992 case CC0: 4993 return ad; 4994 4995 case REG: 4996 { 4997 register int regno = REGNO (ad); 4998 4999 if (reg_equiv_constant[regno] != 0) 5000 { 5001 subst_reg_equivs_changed = 1; 5002 return reg_equiv_constant[regno]; 5003 } 5004 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 5005 { 5006 rtx mem = make_memloc (ad, regno); 5007 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 5008 { 5009 subst_reg_equivs_changed = 1; 5010 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 5011 return mem; 5012 } 5013 } 5014 } 5015 return ad; 5016 5017 case PLUS: 5018 /* Quickly dispose of a common case. */ 5019 if (XEXP (ad, 0) == frame_pointer_rtx 5020 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 5021 return ad; 5022 break; 5023 5024 default: 5025 break; 5026 } 5027 5028 fmt = GET_RTX_FORMAT (code); 5029 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5030 if (fmt[i] == 'e') 5031 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5032 return ad; 5033} 5034 5035/* Compute the sum of X and Y, making canonicalizations assumed in an 5036 address, namely: sum constant integers, surround the sum of two 5037 constants with a CONST, put the constant as the second operand, and 5038 group the constant on the outermost sum. 5039 5040 This routine assumes both inputs are already in canonical form. */ 5041 5042rtx 5043form_sum (x, y) 5044 rtx x, y; 5045{ 5046 rtx tem; 5047 enum machine_mode mode = GET_MODE (x); 5048 5049 if (mode == VOIDmode) 5050 mode = GET_MODE (y); 5051 5052 if (mode == VOIDmode) 5053 mode = Pmode; 5054 5055 if (GET_CODE (x) == CONST_INT) 5056 return plus_constant (y, INTVAL (x)); 5057 else if (GET_CODE (y) == CONST_INT) 5058 return plus_constant (x, INTVAL (y)); 5059 else if (CONSTANT_P (x)) 5060 tem = x, x = y, y = tem; 5061 5062 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5063 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5064 5065 /* Note that if the operands of Y are specified in the opposite 5066 order in the recursive calls below, infinite recursion will occur. */ 5067 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5068 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5069 5070 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5071 constant will have been placed second. */ 5072 if (CONSTANT_P (x) && CONSTANT_P (y)) 5073 { 5074 if (GET_CODE (x) == CONST) 5075 x = XEXP (x, 0); 5076 if (GET_CODE (y) == CONST) 5077 y = XEXP (y, 0); 5078 5079 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5080 } 5081 5082 return gen_rtx_PLUS (mode, x, y); 5083} 5084 5085/* If ADDR is a sum containing a pseudo register that should be 5086 replaced with a constant (from reg_equiv_constant), 5087 return the result of doing so, and also apply the associative 5088 law so that the result is more likely to be a valid address. 5089 (But it is not guaranteed to be one.) 5090 5091 Note that at most one register is replaced, even if more are 5092 replaceable. Also, we try to put the result into a canonical form 5093 so it is more likely to be a valid address. 5094 5095 In all other cases, return ADDR. */ 5096 5097static rtx 5098subst_indexed_address (addr) 5099 rtx addr; 5100{ 5101 rtx op0 = 0, op1 = 0, op2 = 0; 5102 rtx tem; 5103 int regno; 5104 5105 if (GET_CODE (addr) == PLUS) 5106 { 5107 /* Try to find a register to replace. */ 5108 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5109 if (GET_CODE (op0) == REG 5110 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5111 && reg_renumber[regno] < 0 5112 && reg_equiv_constant[regno] != 0) 5113 op0 = reg_equiv_constant[regno]; 5114 else if (GET_CODE (op1) == REG 5115 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5116 && reg_renumber[regno] < 0 5117 && reg_equiv_constant[regno] != 0) 5118 op1 = reg_equiv_constant[regno]; 5119 else if (GET_CODE (op0) == PLUS 5120 && (tem = subst_indexed_address (op0)) != op0) 5121 op0 = tem; 5122 else if (GET_CODE (op1) == PLUS 5123 && (tem = subst_indexed_address (op1)) != op1) 5124 op1 = tem; 5125 else 5126 return addr; 5127 5128 /* Pick out up to three things to add. */ 5129 if (GET_CODE (op1) == PLUS) 5130 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5131 else if (GET_CODE (op0) == PLUS) 5132 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5133 5134 /* Compute the sum. */ 5135 if (op2 != 0) 5136 op1 = form_sum (op1, op2); 5137 if (op1 != 0) 5138 op0 = form_sum (op0, op1); 5139 5140 return op0; 5141 } 5142 return addr; 5143} 5144 5145/* Record the pseudo registers we must reload into hard registers in a 5146 subexpression of a would-be memory address, X referring to a value 5147 in mode MODE. (This function is not called if the address we find 5148 is strictly valid.) 5149 5150 CONTEXT = 1 means we are considering regs as index regs, 5151 = 0 means we are considering them as base regs. 5152 5153 OPNUM and TYPE specify the purpose of any reloads made. 5154 5155 IND_LEVELS says how many levels of indirect addressing are 5156 supported at this point in the address. 5157 5158 INSN, if nonzero, is the insn in which we do the reload. It is used 5159 to determine if we may generate output reloads. 5160 5161 We return nonzero if X, as a whole, is reloaded or replaced. */ 5162 5163/* Note that we take shortcuts assuming that no multi-reg machine mode 5164 occurs as part of an address. 5165 Also, this is not fully machine-customizable; it works for machines 5166 such as vaxes and 68000's and 32000's, but other possible machines 5167 could have addressing modes that this does not handle right. */ 5168 5169static int 5170find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5171 enum machine_mode mode; 5172 rtx x; 5173 int context; 5174 rtx *loc; 5175 int opnum; 5176 enum reload_type type; 5177 int ind_levels; 5178 rtx insn; 5179{ 5180 register RTX_CODE code = GET_CODE (x); 5181 5182 switch (code) 5183 { 5184 case PLUS: 5185 { 5186 register rtx orig_op0 = XEXP (x, 0); 5187 register rtx orig_op1 = XEXP (x, 1); 5188 register RTX_CODE code0 = GET_CODE (orig_op0); 5189 register RTX_CODE code1 = GET_CODE (orig_op1); 5190 register rtx op0 = orig_op0; 5191 register rtx op1 = orig_op1; 5192 5193 if (GET_CODE (op0) == SUBREG) 5194 { 5195 op0 = SUBREG_REG (op0); 5196 code0 = GET_CODE (op0); 5197 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5198 op0 = gen_rtx_REG (word_mode, 5199 REGNO (op0) + SUBREG_WORD (orig_op0)); 5200 } 5201 5202 if (GET_CODE (op1) == SUBREG) 5203 { 5204 op1 = SUBREG_REG (op1); 5205 code1 = GET_CODE (op1); 5206 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5207 op1 = gen_rtx_REG (GET_MODE (op1), 5208 REGNO (op1) + SUBREG_WORD (orig_op1)); 5209 } 5210 5211 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5212 || code0 == ZERO_EXTEND || code1 == MEM) 5213 { 5214 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5215 type, ind_levels, insn); 5216 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5217 type, ind_levels, insn); 5218 } 5219 5220 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5221 || code1 == ZERO_EXTEND || code0 == MEM) 5222 { 5223 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5224 type, ind_levels, insn); 5225 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5226 type, ind_levels, insn); 5227 } 5228 5229 else if (code0 == CONST_INT || code0 == CONST 5230 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5231 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5232 type, ind_levels, insn); 5233 5234 else if (code1 == CONST_INT || code1 == CONST 5235 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5236 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5237 type, ind_levels, insn); 5238 5239 else if (code0 == REG && code1 == REG) 5240 { 5241 if (REG_OK_FOR_INDEX_P (op0) 5242 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5243 return 0; 5244 else if (REG_OK_FOR_INDEX_P (op1) 5245 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5246 return 0; 5247 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5248 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5249 type, ind_levels, insn); 5250 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5251 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5252 type, ind_levels, insn); 5253 else if (REG_OK_FOR_INDEX_P (op1)) 5254 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5255 type, ind_levels, insn); 5256 else if (REG_OK_FOR_INDEX_P (op0)) 5257 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5258 type, ind_levels, insn); 5259 else 5260 { 5261 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5262 type, ind_levels, insn); 5263 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5264 type, ind_levels, insn); 5265 } 5266 } 5267 5268 else if (code0 == REG) 5269 { 5270 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5271 type, ind_levels, insn); 5272 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5273 type, ind_levels, insn); 5274 } 5275 5276 else if (code1 == REG) 5277 { 5278 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5279 type, ind_levels, insn); 5280 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5281 type, ind_levels, insn); 5282 } 5283 } 5284 5285 return 0; 5286 5287 case POST_INC: 5288 case POST_DEC: 5289 case PRE_INC: 5290 case PRE_DEC: 5291 if (GET_CODE (XEXP (x, 0)) == REG) 5292 { 5293 register int regno = REGNO (XEXP (x, 0)); 5294 int value = 0; 5295 rtx x_orig = x; 5296 5297 /* A register that is incremented cannot be constant! */ 5298 if (regno >= FIRST_PSEUDO_REGISTER 5299 && reg_equiv_constant[regno] != 0) 5300 abort (); 5301 5302 /* Handle a register that is equivalent to a memory location 5303 which cannot be addressed directly. */ 5304 if (reg_equiv_memory_loc[regno] != 0 5305 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5306 { 5307 rtx tem = make_memloc (XEXP (x, 0), regno); 5308 if (reg_equiv_address[regno] 5309 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5310 { 5311 /* First reload the memory location's address. 5312 We can't use ADDR_TYPE (type) here, because we need to 5313 write back the value after reading it, hence we actually 5314 need two registers. */ 5315 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5316 &XEXP (tem, 0), opnum, type, 5317 ind_levels, insn); 5318 /* Put this inside a new increment-expression. */ 5319 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5320 /* Proceed to reload that, as if it contained a register. */ 5321 } 5322 } 5323 5324 /* If we have a hard register that is ok as an index, 5325 don't make a reload. If an autoincrement of a nice register 5326 isn't "valid", it must be that no autoincrement is "valid". 5327 If that is true and something made an autoincrement anyway, 5328 this must be a special context where one is allowed. 5329 (For example, a "push" instruction.) 5330 We can't improve this address, so leave it alone. */ 5331 5332 /* Otherwise, reload the autoincrement into a suitable hard reg 5333 and record how much to increment by. */ 5334 5335 if (reg_renumber[regno] >= 0) 5336 regno = reg_renumber[regno]; 5337 if ((regno >= FIRST_PSEUDO_REGISTER 5338 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5339 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5340 { 5341#ifdef AUTO_INC_DEC 5342 register rtx link; 5343#endif 5344 int reloadnum; 5345 5346 /* If we can output the register afterwards, do so, this 5347 saves the extra update. 5348 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5349 CALL_INSN - and it does not set CC0. 5350 But don't do this if we cannot directly address the 5351 memory location, since this will make it harder to 5352 reuse address reloads, and increases register pressure. 5353 Also don't do this if we can probably update x directly. */ 5354 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5355 ? XEXP (x, 0) 5356 : reg_equiv_mem[regno]); 5357 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5358 if (insn && GET_CODE (insn) == INSN && equiv 5359 && memory_operand (equiv, GET_MODE (equiv)) 5360#ifdef HAVE_cc0 5361 && ! sets_cc0_p (PATTERN (insn)) 5362#endif 5363 && ! (icode != CODE_FOR_nothing 5364 && (*insn_operand_predicate[icode][0]) (equiv, Pmode) 5365 && (*insn_operand_predicate[icode][1]) (equiv, Pmode))) 5366 { 5367 /* We use the original pseudo for loc, so that 5368 emit_reload_insns() knows which pseudo this 5369 reload refers to and updates the pseudo rtx, not 5370 its equivalent memory location, as well as the 5371 corresponding entry in reg_last_reload_reg. */ 5372 loc = &XEXP (x_orig, 0); 5373 x = XEXP (x, 0); 5374 reloadnum 5375 = push_reload (x, x, loc, loc, 5376 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5377 GET_MODE (x), GET_MODE (x), 0, 0, 5378 opnum, RELOAD_OTHER); 5379 5380 } 5381 else 5382 { 5383 reloadnum 5384 = push_reload (x, NULL_RTX, loc, NULL_PTR, 5385 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5386 GET_MODE (x), GET_MODE (x), 0, 0, 5387 opnum, type); 5388 reload_inc[reloadnum] 5389 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5390 5391 value = 1; 5392 } 5393 5394#ifdef AUTO_INC_DEC 5395 /* Update the REG_INC notes. */ 5396 5397 for (link = REG_NOTES (this_insn); 5398 link; link = XEXP (link, 1)) 5399 if (REG_NOTE_KIND (link) == REG_INC 5400 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0))) 5401 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5402#endif 5403 } 5404 return value; 5405 } 5406 5407 else if (GET_CODE (XEXP (x, 0)) == MEM) 5408 { 5409 /* This is probably the result of a substitution, by eliminate_regs, 5410 of an equivalent address for a pseudo that was not allocated to a 5411 hard register. Verify that the specified address is valid and 5412 reload it into a register. */ 5413 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5414 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5415 register rtx link; 5416 int reloadnum; 5417 5418 /* Since we know we are going to reload this item, don't decrement 5419 for the indirection level. 5420 5421 Note that this is actually conservative: it would be slightly 5422 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5423 reload1.c here. */ 5424 /* We can't use ADDR_TYPE (type) here, because we need to 5425 write back the value after reading it, hence we actually 5426 need two registers. */ 5427 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5428 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5429 opnum, type, ind_levels, insn); 5430 5431 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR, 5432 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5433 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5434 reload_inc[reloadnum] 5435 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5436 5437 link = FIND_REG_INC_NOTE (this_insn, tem); 5438 if (link != 0) 5439 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5440 5441 return 1; 5442 } 5443 return 0; 5444 5445 case MEM: 5446 /* This is probably the result of a substitution, by eliminate_regs, of 5447 an equivalent address for a pseudo that was not allocated to a hard 5448 register. Verify that the specified address is valid and reload it 5449 into a register. 5450 5451 Since we know we are going to reload this item, don't decrement for 5452 the indirection level. 5453 5454 Note that this is actually conservative: it would be slightly more 5455 efficient to use the value of SPILL_INDIRECT_LEVELS from 5456 reload1.c here. */ 5457 5458 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5459 opnum, ADDR_TYPE (type), ind_levels, insn); 5460 push_reload (*loc, NULL_RTX, loc, NULL_PTR, 5461 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5462 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5463 return 1; 5464 5465 case REG: 5466 { 5467 register int regno = REGNO (x); 5468 5469 if (reg_equiv_constant[regno] != 0) 5470 { 5471 find_reloads_address_part (reg_equiv_constant[regno], loc, 5472 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5473 GET_MODE (x), opnum, type, ind_levels); 5474 return 1; 5475 } 5476 5477#if 0 /* This might screw code in reload1.c to delete prior output-reload 5478 that feeds this insn. */ 5479 if (reg_equiv_mem[regno] != 0) 5480 { 5481 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR, 5482 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5483 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5484 return 1; 5485 } 5486#endif 5487 5488 if (reg_equiv_memory_loc[regno] 5489 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5490 { 5491 rtx tem = make_memloc (x, regno); 5492 if (reg_equiv_address[regno] != 0 5493 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5494 { 5495 x = tem; 5496 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5497 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5498 ind_levels, insn); 5499 } 5500 } 5501 5502 if (reg_renumber[regno] >= 0) 5503 regno = reg_renumber[regno]; 5504 5505 if ((regno >= FIRST_PSEUDO_REGISTER 5506 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5507 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5508 { 5509 push_reload (x, NULL_RTX, loc, NULL_PTR, 5510 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5511 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5512 return 1; 5513 } 5514 5515 /* If a register appearing in an address is the subject of a CLOBBER 5516 in this insn, reload it into some other register to be safe. 5517 The CLOBBER is supposed to make the register unavailable 5518 from before this insn to after it. */ 5519 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5520 { 5521 push_reload (x, NULL_RTX, loc, NULL_PTR, 5522 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5523 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5524 return 1; 5525 } 5526 } 5527 return 0; 5528 5529 case SUBREG: 5530 if (GET_CODE (SUBREG_REG (x)) == REG) 5531 { 5532 /* If this is a SUBREG of a hard register and the resulting register 5533 is of the wrong class, reload the whole SUBREG. This avoids 5534 needless copies if SUBREG_REG is multi-word. */ 5535 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5536 { 5537 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5538 5539 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5540 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5541 { 5542 push_reload (x, NULL_RTX, loc, NULL_PTR, 5543 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5544 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5545 return 1; 5546 } 5547 } 5548 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5549 is larger than the class size, then reload the whole SUBREG. */ 5550 else 5551 { 5552 enum reg_class class = (context ? INDEX_REG_CLASS 5553 : BASE_REG_CLASS); 5554 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5555 > reg_class_size[class]) 5556 { 5557 x = find_reloads_subreg_address (x, 0, opnum, type, 5558 ind_levels, insn); 5559 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5560 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5561 return 1; 5562 } 5563 } 5564 } 5565 break; 5566 5567 default: 5568 break; 5569 } 5570 5571 { 5572 register char *fmt = GET_RTX_FORMAT (code); 5573 register int i; 5574 5575 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5576 { 5577 if (fmt[i] == 'e') 5578 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5579 opnum, type, ind_levels, insn); 5580 } 5581 } 5582 5583 return 0; 5584} 5585 5586/* X, which is found at *LOC, is a part of an address that needs to be 5587 reloaded into a register of class CLASS. If X is a constant, or if 5588 X is a PLUS that contains a constant, check that the constant is a 5589 legitimate operand and that we are supposed to be able to load 5590 it into the register. 5591 5592 If not, force the constant into memory and reload the MEM instead. 5593 5594 MODE is the mode to use, in case X is an integer constant. 5595 5596 OPNUM and TYPE describe the purpose of any reloads made. 5597 5598 IND_LEVELS says how many levels of indirect addressing this machine 5599 supports. */ 5600 5601static void 5602find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5603 rtx x; 5604 rtx *loc; 5605 enum reg_class class; 5606 enum machine_mode mode; 5607 int opnum; 5608 enum reload_type type; 5609 int ind_levels; 5610{ 5611 if (CONSTANT_P (x) 5612 && (! LEGITIMATE_CONSTANT_P (x) 5613 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5614 { 5615 rtx tem; 5616 5617 /* If this is a CONST_INT, it could have been created by a 5618 plus_constant call in eliminate_regs, which means it may be 5619 on the reload_obstack. reload_obstack will be freed later, so 5620 we can't allow such RTL to be put in the constant pool. There 5621 is code in force_const_mem to check for this case, but it doesn't 5622 work because we have already popped off the reload_obstack, so 5623 rtl_obstack == saveable_obstack is true at this point. */ 5624 if (GET_CODE (x) == CONST_INT) 5625 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x))); 5626 else 5627 tem = x = force_const_mem (mode, x); 5628 5629 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5630 opnum, type, ind_levels, 0); 5631 } 5632 5633 else if (GET_CODE (x) == PLUS 5634 && CONSTANT_P (XEXP (x, 1)) 5635 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5636 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5637 { 5638 rtx tem; 5639 5640 /* See comment above. */ 5641 if (GET_CODE (XEXP (x, 1)) == CONST_INT) 5642 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1)))); 5643 else 5644 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5645 5646 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5647 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5648 opnum, type, ind_levels, 0); 5649 } 5650 5651 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5652 mode, VOIDmode, 0, 0, opnum, type); 5653} 5654 5655/* X, a subreg of a pseudo, is a part of an address that needs to be 5656 reloaded. 5657 5658 If the pseudo is equivalent to a memory location that cannot be directly 5659 addressed, make the necessary address reloads. 5660 5661 If address reloads have been necessary, or if the address is changed 5662 by register elimination, return the rtx of the memory location; 5663 otherwise, return X. 5664 5665 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5666 memory location. 5667 5668 OPNUM and TYPE identify the purpose of the reload. 5669 5670 IND_LEVELS says how many levels of indirect addressing are 5671 supported at this point in the address. 5672 5673 INSN, if nonzero, is the insn in which we do the reload. It is used 5674 to determine where to put USEs for pseudos that we have to replace with 5675 stack slots. */ 5676 5677static rtx 5678find_reloads_subreg_address (x, force_replace, opnum, type, 5679 ind_levels, insn) 5680 rtx x; 5681 int force_replace; 5682 int opnum; 5683 enum reload_type type; 5684 int ind_levels; 5685 rtx insn; 5686{ 5687 int regno = REGNO (SUBREG_REG (x)); 5688 5689 if (reg_equiv_memory_loc[regno]) 5690 { 5691 /* If the address is not directly addressable, or if the address is not 5692 offsettable, then it must be replaced. */ 5693 if (! force_replace 5694 && (reg_equiv_address[regno] 5695 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5696 force_replace = 1; 5697 5698 if (force_replace || num_not_at_initial_offset) 5699 { 5700 rtx tem = make_memloc (SUBREG_REG (x), regno); 5701 5702 /* If the address changes because of register elimination, then 5703 it must be replaced. */ 5704 if (force_replace 5705 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5706 { 5707 int offset = SUBREG_WORD (x) * UNITS_PER_WORD; 5708 5709 if (BYTES_BIG_ENDIAN) 5710 { 5711 int size; 5712 5713 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5714 offset += MIN (size, UNITS_PER_WORD); 5715 size = GET_MODE_SIZE (GET_MODE (x)); 5716 offset -= MIN (size, UNITS_PER_WORD); 5717 } 5718 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5719 PUT_MODE (tem, GET_MODE (x)); 5720 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5721 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5722 ind_levels, insn); 5723 /* If this is not a toplevel operand, find_reloads doesn't see 5724 this substitution. We have to emit a USE of the pseudo so 5725 that delete_output_reload can see it. */ 5726 if (replace_reloads && recog_operand[opnum] != x) 5727 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn); 5728 x = tem; 5729 } 5730 } 5731 } 5732 return x; 5733} 5734 5735/* Substitute into the current INSN the registers into which we have reloaded 5736 the things that need reloading. The array `replacements' 5737 says contains the locations of all pointers that must be changed 5738 and says what to replace them with. 5739 5740 Return the rtx that X translates into; usually X, but modified. */ 5741 5742void 5743subst_reloads () 5744{ 5745 register int i; 5746 5747 for (i = 0; i < n_replacements; i++) 5748 { 5749 register struct replacement *r = &replacements[i]; 5750 register rtx reloadreg = reload_reg_rtx[r->what]; 5751 if (reloadreg) 5752 { 5753 /* Encapsulate RELOADREG so its machine mode matches what 5754 used to be there. Note that gen_lowpart_common will 5755 do the wrong thing if RELOADREG is multi-word. RELOADREG 5756 will always be a REG here. */ 5757 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5758 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5759 5760 /* If we are putting this into a SUBREG and RELOADREG is a 5761 SUBREG, we would be making nested SUBREGs, so we have to fix 5762 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5763 5764 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5765 { 5766 if (GET_MODE (*r->subreg_loc) 5767 == GET_MODE (SUBREG_REG (reloadreg))) 5768 *r->subreg_loc = SUBREG_REG (reloadreg); 5769 else 5770 { 5771 *r->where = SUBREG_REG (reloadreg); 5772 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg); 5773 } 5774 } 5775 else 5776 *r->where = reloadreg; 5777 } 5778 /* If reload got no reg and isn't optional, something's wrong. */ 5779 else if (! reload_optional[r->what]) 5780 abort (); 5781 } 5782} 5783 5784/* Make a copy of any replacements being done into X and move those copies 5785 to locations in Y, a copy of X. We only look at the highest level of 5786 the RTL. */ 5787 5788void 5789copy_replacements (x, y) 5790 rtx x; 5791 rtx y; 5792{ 5793 int i, j; 5794 enum rtx_code code = GET_CODE (x); 5795 char *fmt = GET_RTX_FORMAT (code); 5796 struct replacement *r; 5797 5798 /* We can't support X being a SUBREG because we might then need to know its 5799 location if something inside it was replaced. */ 5800 if (code == SUBREG) 5801 abort (); 5802 5803 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5804 if (fmt[i] == 'e') 5805 for (j = 0; j < n_replacements; j++) 5806 { 5807 if (replacements[j].subreg_loc == &XEXP (x, i)) 5808 { 5809 r = &replacements[n_replacements++]; 5810 r->where = replacements[j].where; 5811 r->subreg_loc = &XEXP (y, i); 5812 r->what = replacements[j].what; 5813 r->mode = replacements[j].mode; 5814 } 5815 else if (replacements[j].where == &XEXP (x, i)) 5816 { 5817 r = &replacements[n_replacements++]; 5818 r->where = &XEXP (y, i); 5819 r->subreg_loc = 0; 5820 r->what = replacements[j].what; 5821 r->mode = replacements[j].mode; 5822 } 5823 } 5824} 5825 5826/* Change any replacements being done to *X to be done to *Y */ 5827 5828void 5829move_replacements (x, y) 5830 rtx *x; 5831 rtx *y; 5832{ 5833 int i; 5834 5835 for (i = 0; i < n_replacements; i++) 5836 if (replacements[i].subreg_loc == x) 5837 replacements[i].subreg_loc = y; 5838 else if (replacements[i].where == x) 5839 { 5840 replacements[i].where = y; 5841 replacements[i].subreg_loc = 0; 5842 } 5843} 5844 5845/* If LOC was scheduled to be replaced by something, return the replacement. 5846 Otherwise, return *LOC. */ 5847 5848rtx 5849find_replacement (loc) 5850 rtx *loc; 5851{ 5852 struct replacement *r; 5853 5854 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 5855 { 5856 rtx reloadreg = reload_reg_rtx[r->what]; 5857 5858 if (reloadreg && r->where == loc) 5859 { 5860 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 5861 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5862 5863 return reloadreg; 5864 } 5865 else if (reloadreg && r->subreg_loc == loc) 5866 { 5867 /* RELOADREG must be either a REG or a SUBREG. 5868 5869 ??? Is it actually still ever a SUBREG? If so, why? */ 5870 5871 if (GET_CODE (reloadreg) == REG) 5872 return gen_rtx_REG (GET_MODE (*loc), 5873 REGNO (reloadreg) + SUBREG_WORD (*loc)); 5874 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 5875 return reloadreg; 5876 else 5877 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 5878 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc)); 5879 } 5880 } 5881 5882 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 5883 what's inside and make a new rtl if so. */ 5884 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 5885 || GET_CODE (*loc) == MULT) 5886 { 5887 rtx x = find_replacement (&XEXP (*loc, 0)); 5888 rtx y = find_replacement (&XEXP (*loc, 1)); 5889 5890 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 5891 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 5892 } 5893 5894 return *loc; 5895} 5896 5897/* Return nonzero if register in range [REGNO, ENDREGNO) 5898 appears either explicitly or implicitly in X 5899 other than being stored into (except for earlyclobber operands). 5900 5901 References contained within the substructure at LOC do not count. 5902 LOC may be zero, meaning don't ignore anything. 5903 5904 This is similar to refers_to_regno_p in rtlanal.c except that we 5905 look at equivalences for pseudos that didn't get hard registers. */ 5906 5907int 5908refers_to_regno_for_reload_p (regno, endregno, x, loc) 5909 int regno, endregno; 5910 rtx x; 5911 rtx *loc; 5912{ 5913 register int i; 5914 register RTX_CODE code; 5915 register char *fmt; 5916 5917 if (x == 0) 5918 return 0; 5919 5920 repeat: 5921 code = GET_CODE (x); 5922 5923 switch (code) 5924 { 5925 case REG: 5926 i = REGNO (x); 5927 5928 /* If this is a pseudo, a hard register must not have been allocated. 5929 X must therefore either be a constant or be in memory. */ 5930 if (i >= FIRST_PSEUDO_REGISTER) 5931 { 5932 if (reg_equiv_memory_loc[i]) 5933 return refers_to_regno_for_reload_p (regno, endregno, 5934 reg_equiv_memory_loc[i], 5935 NULL_PTR); 5936 5937 if (reg_equiv_constant[i]) 5938 return 0; 5939 5940 abort (); 5941 } 5942 5943 return (endregno > i 5944 && regno < i + (i < FIRST_PSEUDO_REGISTER 5945 ? HARD_REGNO_NREGS (i, GET_MODE (x)) 5946 : 1)); 5947 5948 case SUBREG: 5949 /* If this is a SUBREG of a hard reg, we can see exactly which 5950 registers are being modified. Otherwise, handle normally. */ 5951 if (GET_CODE (SUBREG_REG (x)) == REG 5952 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5953 { 5954 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5955 int inner_endregno 5956 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 5957 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 5958 5959 return endregno > inner_regno && regno < inner_endregno; 5960 } 5961 break; 5962 5963 case CLOBBER: 5964 case SET: 5965 if (&SET_DEST (x) != loc 5966 /* Note setting a SUBREG counts as referring to the REG it is in for 5967 a pseudo but not for hard registers since we can 5968 treat each word individually. */ 5969 && ((GET_CODE (SET_DEST (x)) == SUBREG 5970 && loc != &SUBREG_REG (SET_DEST (x)) 5971 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 5972 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 5973 && refers_to_regno_for_reload_p (regno, endregno, 5974 SUBREG_REG (SET_DEST (x)), 5975 loc)) 5976 /* If the output is an earlyclobber operand, this is 5977 a conflict. */ 5978 || ((GET_CODE (SET_DEST (x)) != REG 5979 || earlyclobber_operand_p (SET_DEST (x))) 5980 && refers_to_regno_for_reload_p (regno, endregno, 5981 SET_DEST (x), loc)))) 5982 return 1; 5983 5984 if (code == CLOBBER || loc == &SET_SRC (x)) 5985 return 0; 5986 x = SET_SRC (x); 5987 goto repeat; 5988 5989 default: 5990 break; 5991 } 5992 5993 /* X does not match, so try its subexpressions. */ 5994 5995 fmt = GET_RTX_FORMAT (code); 5996 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5997 { 5998 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 5999 { 6000 if (i == 0) 6001 { 6002 x = XEXP (x, 0); 6003 goto repeat; 6004 } 6005 else 6006 if (refers_to_regno_for_reload_p (regno, endregno, 6007 XEXP (x, i), loc)) 6008 return 1; 6009 } 6010 else if (fmt[i] == 'E') 6011 { 6012 register int j; 6013 for (j = XVECLEN (x, i) - 1; j >=0; j--) 6014 if (loc != &XVECEXP (x, i, j) 6015 && refers_to_regno_for_reload_p (regno, endregno, 6016 XVECEXP (x, i, j), loc)) 6017 return 1; 6018 } 6019 } 6020 return 0; 6021} 6022 6023/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6024 we check if any register number in X conflicts with the relevant register 6025 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6026 contains a MEM (we don't bother checking for memory addresses that can't 6027 conflict because we expect this to be a rare case. 6028 6029 This function is similar to reg_overlap_mention_p in rtlanal.c except 6030 that we look at equivalences for pseudos that didn't get hard registers. */ 6031 6032int 6033reg_overlap_mentioned_for_reload_p (x, in) 6034 rtx x, in; 6035{ 6036 int regno, endregno; 6037 6038 /* Overly conservative. */ 6039 if (GET_CODE (x) == STRICT_LOW_PART) 6040 x = XEXP (x, 0); 6041 6042 /* If either argument is a constant, then modifying X can not affect IN. */ 6043 if (CONSTANT_P (x) || CONSTANT_P (in)) 6044 return 0; 6045 else if (GET_CODE (x) == SUBREG) 6046 { 6047 regno = REGNO (SUBREG_REG (x)); 6048 if (regno < FIRST_PSEUDO_REGISTER) 6049 regno += SUBREG_WORD (x); 6050 } 6051 else if (GET_CODE (x) == REG) 6052 { 6053 regno = REGNO (x); 6054 6055 /* If this is a pseudo, it must not have been assigned a hard register. 6056 Therefore, it must either be in memory or be a constant. */ 6057 6058 if (regno >= FIRST_PSEUDO_REGISTER) 6059 { 6060 if (reg_equiv_memory_loc[regno]) 6061 return refers_to_mem_for_reload_p (in); 6062 else if (reg_equiv_constant[regno]) 6063 return 0; 6064 abort (); 6065 } 6066 } 6067 else if (GET_CODE (x) == MEM) 6068 return refers_to_mem_for_reload_p (in); 6069 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6070 || GET_CODE (x) == CC0) 6071 return reg_mentioned_p (x, in); 6072 else 6073 abort (); 6074 6075 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6076 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6077 6078 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR); 6079} 6080 6081/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6082 registers. */ 6083 6084int 6085refers_to_mem_for_reload_p (x) 6086 rtx x; 6087{ 6088 char *fmt; 6089 int i; 6090 6091 if (GET_CODE (x) == MEM) 6092 return 1; 6093 6094 if (GET_CODE (x) == REG) 6095 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6096 && reg_equiv_memory_loc[REGNO (x)]); 6097 6098 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6099 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6100 if (fmt[i] == 'e' 6101 && (GET_CODE (XEXP (x, i)) == MEM 6102 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6103 return 1; 6104 6105 return 0; 6106} 6107 6108/* Check the insns before INSN to see if there is a suitable register 6109 containing the same value as GOAL. 6110 If OTHER is -1, look for a register in class CLASS. 6111 Otherwise, just see if register number OTHER shares GOAL's value. 6112 6113 Return an rtx for the register found, or zero if none is found. 6114 6115 If RELOAD_REG_P is (short *)1, 6116 we reject any hard reg that appears in reload_reg_rtx 6117 because such a hard reg is also needed coming into this insn. 6118 6119 If RELOAD_REG_P is any other nonzero value, 6120 it is a vector indexed by hard reg number 6121 and we reject any hard reg whose element in the vector is nonnegative 6122 as well as any that appears in reload_reg_rtx. 6123 6124 If GOAL is zero, then GOALREG is a register number; we look 6125 for an equivalent for that register. 6126 6127 MODE is the machine mode of the value we want an equivalence for. 6128 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6129 6130 This function is used by jump.c as well as in the reload pass. 6131 6132 If GOAL is the sum of the stack pointer and a constant, we treat it 6133 as if it were a constant except that sp is required to be unchanging. */ 6134 6135rtx 6136find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6137 register rtx goal; 6138 rtx insn; 6139 enum reg_class class; 6140 register int other; 6141 short *reload_reg_p; 6142 int goalreg; 6143 enum machine_mode mode; 6144{ 6145 register rtx p = insn; 6146 rtx goaltry, valtry, value, where; 6147 register rtx pat; 6148 register int regno = -1; 6149 int valueno; 6150 int goal_mem = 0; 6151 int goal_const = 0; 6152 int goal_mem_addr_varies = 0; 6153 int need_stable_sp = 0; 6154 int nregs; 6155 int valuenregs; 6156 6157 if (goal == 0) 6158 regno = goalreg; 6159 else if (GET_CODE (goal) == REG) 6160 regno = REGNO (goal); 6161 else if (GET_CODE (goal) == MEM) 6162 { 6163 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6164 if (MEM_VOLATILE_P (goal)) 6165 return 0; 6166 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6167 return 0; 6168 /* An address with side effects must be reexecuted. */ 6169 switch (code) 6170 { 6171 case POST_INC: 6172 case PRE_INC: 6173 case POST_DEC: 6174 case PRE_DEC: 6175 return 0; 6176 default: 6177 break; 6178 } 6179 goal_mem = 1; 6180 } 6181 else if (CONSTANT_P (goal)) 6182 goal_const = 1; 6183 else if (GET_CODE (goal) == PLUS 6184 && XEXP (goal, 0) == stack_pointer_rtx 6185 && CONSTANT_P (XEXP (goal, 1))) 6186 goal_const = need_stable_sp = 1; 6187 else if (GET_CODE (goal) == PLUS 6188 && XEXP (goal, 0) == frame_pointer_rtx 6189 && CONSTANT_P (XEXP (goal, 1))) 6190 goal_const = 1; 6191 else 6192 return 0; 6193 6194 /* On some machines, certain regs must always be rejected 6195 because they don't behave the way ordinary registers do. */ 6196 6197#ifdef OVERLAPPING_REGNO_P 6198 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6199 && OVERLAPPING_REGNO_P (regno)) 6200 return 0; 6201#endif 6202 6203 /* Scan insns back from INSN, looking for one that copies 6204 a value into or out of GOAL. 6205 Stop and give up if we reach a label. */ 6206 6207 while (1) 6208 { 6209 p = PREV_INSN (p); 6210 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6211 return 0; 6212 if (GET_CODE (p) == INSN 6213 /* If we don't want spill regs ... */ 6214 && (! (reload_reg_p != 0 6215 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6216 /* ... then ignore insns introduced by reload; they aren't useful 6217 and can cause results in reload_as_needed to be different 6218 from what they were when calculating the need for spills. 6219 If we notice an input-reload insn here, we will reject it below, 6220 but it might hide a usable equivalent. That makes bad code. 6221 It may even abort: perhaps no reg was spilled for this insn 6222 because it was assumed we would find that equivalent. */ 6223 || INSN_UID (p) < reload_first_uid)) 6224 { 6225 rtx tem; 6226 pat = single_set (p); 6227 /* First check for something that sets some reg equal to GOAL. */ 6228 if (pat != 0 6229 && ((regno >= 0 6230 && true_regnum (SET_SRC (pat)) == regno 6231 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6232 || 6233 (regno >= 0 6234 && true_regnum (SET_DEST (pat)) == regno 6235 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6236 || 6237 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6238 /* When looking for stack pointer + const, 6239 make sure we don't use a stack adjust. */ 6240 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6241 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6242 || (goal_mem 6243 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6244 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6245 || (goal_mem 6246 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6247 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6248 /* If we are looking for a constant, 6249 and something equivalent to that constant was copied 6250 into a reg, we can use that reg. */ 6251 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6252 NULL_RTX)) 6253 && rtx_equal_p (XEXP (tem, 0), goal) 6254 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6255 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6256 NULL_RTX)) 6257 && GET_CODE (SET_DEST (pat)) == REG 6258 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6259 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6260 && GET_CODE (goal) == CONST_INT 6261 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0, 6262 VOIDmode)) 6263 && rtx_equal_p (goal, goaltry) 6264 && (valtry = operand_subword (SET_DEST (pat), 0, 0, 6265 VOIDmode)) 6266 && (valueno = true_regnum (valtry)) >= 0) 6267 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6268 NULL_RTX)) 6269 && GET_CODE (SET_DEST (pat)) == REG 6270 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6271 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6272 && GET_CODE (goal) == CONST_INT 6273 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6274 VOIDmode)) 6275 && rtx_equal_p (goal, goaltry) 6276 && (valtry 6277 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6278 && (valueno = true_regnum (valtry)) >= 0))) 6279 { 6280 if (other >= 0) 6281 { 6282 if (valueno != other) 6283 continue; 6284 } 6285 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6286 continue; 6287 else 6288 { 6289 int i; 6290 6291 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6292 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6293 valueno + i)) 6294 break; 6295 if (i >= 0) 6296 continue; 6297 } 6298 value = valtry; 6299 where = p; 6300 break; 6301 } 6302 } 6303 } 6304 6305 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6306 (or copying VALUE into GOAL, if GOAL is also a register). 6307 Now verify that VALUE is really valid. */ 6308 6309 /* VALUENO is the register number of VALUE; a hard register. */ 6310 6311 /* Don't try to re-use something that is killed in this insn. We want 6312 to be able to trust REG_UNUSED notes. */ 6313 if (find_reg_note (where, REG_UNUSED, value)) 6314 return 0; 6315 6316 /* If we propose to get the value from the stack pointer or if GOAL is 6317 a MEM based on the stack pointer, we need a stable SP. */ 6318 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6319 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6320 goal))) 6321 need_stable_sp = 1; 6322 6323 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6324 if (GET_MODE (value) != mode) 6325 return 0; 6326 6327 /* Reject VALUE if it was loaded from GOAL 6328 and is also a register that appears in the address of GOAL. */ 6329 6330 if (goal_mem && value == SET_DEST (single_set (where)) 6331 && refers_to_regno_for_reload_p (valueno, 6332 (valueno 6333 + HARD_REGNO_NREGS (valueno, mode)), 6334 goal, NULL_PTR)) 6335 return 0; 6336 6337 /* Reject registers that overlap GOAL. */ 6338 6339 if (!goal_mem && !goal_const 6340 && regno + HARD_REGNO_NREGS (regno, mode) > valueno 6341 && regno < valueno + HARD_REGNO_NREGS (valueno, mode)) 6342 return 0; 6343 6344 nregs = HARD_REGNO_NREGS (regno, mode); 6345 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6346 6347 /* Reject VALUE if it is one of the regs reserved for reloads. 6348 Reload1 knows how to reuse them anyway, and it would get 6349 confused if we allocated one without its knowledge. 6350 (Now that insns introduced by reload are ignored above, 6351 this case shouldn't happen, but I'm not positive.) */ 6352 6353 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6354 { 6355 int i; 6356 for (i = 0; i < valuenregs; ++i) 6357 if (reload_reg_p[valueno + i] >= 0) 6358 return 0; 6359 } 6360 6361 /* On some machines, certain regs must always be rejected 6362 because they don't behave the way ordinary registers do. */ 6363 6364#ifdef OVERLAPPING_REGNO_P 6365 if (OVERLAPPING_REGNO_P (valueno)) 6366 return 0; 6367#endif 6368 6369 /* Reject VALUE if it is a register being used for an input reload 6370 even if it is not one of those reserved. */ 6371 6372 if (reload_reg_p != 0) 6373 { 6374 int i; 6375 for (i = 0; i < n_reloads; i++) 6376 if (reload_reg_rtx[i] != 0 && reload_in[i]) 6377 { 6378 int regno1 = REGNO (reload_reg_rtx[i]); 6379 int nregs1 = HARD_REGNO_NREGS (regno1, 6380 GET_MODE (reload_reg_rtx[i])); 6381 if (regno1 < valueno + valuenregs 6382 && regno1 + nregs1 > valueno) 6383 return 0; 6384 } 6385 } 6386 6387 if (goal_mem) 6388 /* We must treat frame pointer as varying here, 6389 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6390 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6391 6392 /* Now verify that the values of GOAL and VALUE remain unaltered 6393 until INSN is reached. */ 6394 6395 p = insn; 6396 while (1) 6397 { 6398 p = PREV_INSN (p); 6399 if (p == where) 6400 return value; 6401 6402 /* Don't trust the conversion past a function call 6403 if either of the two is in a call-clobbered register, or memory. */ 6404 if (GET_CODE (p) == CALL_INSN) 6405 { 6406 int i; 6407 6408 if (goal_mem || need_stable_sp) 6409 return 0; 6410 6411 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6412 for (i = 0; i < nregs; ++i) 6413 if (call_used_regs[regno + i]) 6414 return 0; 6415 6416 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6417 for (i = 0; i < valuenregs; ++i) 6418 if (call_used_regs[valueno + i]) 6419 return 0; 6420 } 6421 6422#ifdef NON_SAVING_SETJMP 6423 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE 6424 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) 6425 return 0; 6426#endif 6427 6428#ifdef INSN_CLOBBERS_REGNO_P 6429 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 6430 && INSN_CLOBBERS_REGNO_P (p, valueno)) 6431 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6432 && INSN_CLOBBERS_REGNO_P (p, regno))) 6433 return 0; 6434#endif 6435 6436 if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 6437 { 6438 pat = PATTERN (p); 6439 6440 /* Watch out for unspec_volatile, and volatile asms. */ 6441 if (volatile_insn_p (pat)) 6442 return 0; 6443 6444 /* If this insn P stores in either GOAL or VALUE, return 0. 6445 If GOAL is a memory ref and this insn writes memory, return 0. 6446 If GOAL is a memory ref and its address is not constant, 6447 and this insn P changes a register used in GOAL, return 0. */ 6448 6449 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6450 { 6451 register rtx dest = SET_DEST (pat); 6452 while (GET_CODE (dest) == SUBREG 6453 || GET_CODE (dest) == ZERO_EXTRACT 6454 || GET_CODE (dest) == SIGN_EXTRACT 6455 || GET_CODE (dest) == STRICT_LOW_PART) 6456 dest = XEXP (dest, 0); 6457 if (GET_CODE (dest) == REG) 6458 { 6459 register int xregno = REGNO (dest); 6460 int xnregs; 6461 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6462 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6463 else 6464 xnregs = 1; 6465 if (xregno < regno + nregs && xregno + xnregs > regno) 6466 return 0; 6467 if (xregno < valueno + valuenregs 6468 && xregno + xnregs > valueno) 6469 return 0; 6470 if (goal_mem_addr_varies 6471 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6472 return 0; 6473 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6474 return 0; 6475 } 6476 else if (goal_mem && GET_CODE (dest) == MEM 6477 && ! push_operand (dest, GET_MODE (dest))) 6478 return 0; 6479 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6480 && reg_equiv_memory_loc[regno] != 0) 6481 return 0; 6482 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6483 return 0; 6484 } 6485 else if (GET_CODE (pat) == PARALLEL) 6486 { 6487 register int i; 6488 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6489 { 6490 register rtx v1 = XVECEXP (pat, 0, i); 6491 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6492 { 6493 register rtx dest = SET_DEST (v1); 6494 while (GET_CODE (dest) == SUBREG 6495 || GET_CODE (dest) == ZERO_EXTRACT 6496 || GET_CODE (dest) == SIGN_EXTRACT 6497 || GET_CODE (dest) == STRICT_LOW_PART) 6498 dest = XEXP (dest, 0); 6499 if (GET_CODE (dest) == REG) 6500 { 6501 register int xregno = REGNO (dest); 6502 int xnregs; 6503 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6504 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6505 else 6506 xnregs = 1; 6507 if (xregno < regno + nregs 6508 && xregno + xnregs > regno) 6509 return 0; 6510 if (xregno < valueno + valuenregs 6511 && xregno + xnregs > valueno) 6512 return 0; 6513 if (goal_mem_addr_varies 6514 && reg_overlap_mentioned_for_reload_p (dest, 6515 goal)) 6516 return 0; 6517 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6518 return 0; 6519 } 6520 else if (goal_mem && GET_CODE (dest) == MEM 6521 && ! push_operand (dest, GET_MODE (dest))) 6522 return 0; 6523 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6524 && reg_equiv_memory_loc[regno] != 0) 6525 return 0; 6526 else if (need_stable_sp 6527 && push_operand (dest, GET_MODE (dest))) 6528 return 0; 6529 } 6530 } 6531 } 6532 6533 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6534 { 6535 rtx link; 6536 6537 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6538 link = XEXP (link, 1)) 6539 { 6540 pat = XEXP (link, 0); 6541 if (GET_CODE (pat) == CLOBBER) 6542 { 6543 register rtx dest = SET_DEST (pat); 6544 while (GET_CODE (dest) == SUBREG 6545 || GET_CODE (dest) == ZERO_EXTRACT 6546 || GET_CODE (dest) == SIGN_EXTRACT 6547 || GET_CODE (dest) == STRICT_LOW_PART) 6548 dest = XEXP (dest, 0); 6549 if (GET_CODE (dest) == REG) 6550 { 6551 register int xregno = REGNO (dest); 6552 int xnregs; 6553 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6554 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6555 else 6556 xnregs = 1; 6557 if (xregno < regno + nregs 6558 && xregno + xnregs > regno) 6559 return 0; 6560 if (xregno < valueno + valuenregs 6561 && xregno + xnregs > valueno) 6562 return 0; 6563 if (goal_mem_addr_varies 6564 && reg_overlap_mentioned_for_reload_p (dest, 6565 goal)) 6566 return 0; 6567 } 6568 else if (goal_mem && GET_CODE (dest) == MEM 6569 && ! push_operand (dest, GET_MODE (dest))) 6570 return 0; 6571 else if (need_stable_sp 6572 && push_operand (dest, GET_MODE (dest))) 6573 return 0; 6574 } 6575 } 6576 } 6577 6578#ifdef AUTO_INC_DEC 6579 /* If this insn auto-increments or auto-decrements 6580 either regno or valueno, return 0 now. 6581 If GOAL is a memory ref and its address is not constant, 6582 and this insn P increments a register used in GOAL, return 0. */ 6583 { 6584 register rtx link; 6585 6586 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6587 if (REG_NOTE_KIND (link) == REG_INC 6588 && GET_CODE (XEXP (link, 0)) == REG) 6589 { 6590 register int incno = REGNO (XEXP (link, 0)); 6591 if (incno < regno + nregs && incno >= regno) 6592 return 0; 6593 if (incno < valueno + valuenregs && incno >= valueno) 6594 return 0; 6595 if (goal_mem_addr_varies 6596 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6597 goal)) 6598 return 0; 6599 } 6600 } 6601#endif 6602 } 6603 } 6604} 6605 6606/* Find a place where INCED appears in an increment or decrement operator 6607 within X, and return the amount INCED is incremented or decremented by. 6608 The value is always positive. */ 6609 6610static int 6611find_inc_amount (x, inced) 6612 rtx x, inced; 6613{ 6614 register enum rtx_code code = GET_CODE (x); 6615 register char *fmt; 6616 register int i; 6617 6618 if (code == MEM) 6619 { 6620 register rtx addr = XEXP (x, 0); 6621 if ((GET_CODE (addr) == PRE_DEC 6622 || GET_CODE (addr) == POST_DEC 6623 || GET_CODE (addr) == PRE_INC 6624 || GET_CODE (addr) == POST_INC) 6625 && XEXP (addr, 0) == inced) 6626 return GET_MODE_SIZE (GET_MODE (x)); 6627 } 6628 6629 fmt = GET_RTX_FORMAT (code); 6630 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6631 { 6632 if (fmt[i] == 'e') 6633 { 6634 register int tem = find_inc_amount (XEXP (x, i), inced); 6635 if (tem != 0) 6636 return tem; 6637 } 6638 if (fmt[i] == 'E') 6639 { 6640 register int j; 6641 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6642 { 6643 register int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6644 if (tem != 0) 6645 return tem; 6646 } 6647 } 6648 } 6649 6650 return 0; 6651} 6652 6653/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */ 6654 6655int 6656regno_clobbered_p (regno, insn, mode, sets) 6657 int regno; 6658 rtx insn; 6659 enum machine_mode mode; 6660 int sets; 6661{ 6662 int nregs = HARD_REGNO_NREGS (regno, mode); 6663 int endregno = regno + nregs; 6664 6665 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6666 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6667 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6668 { 6669 int test = REGNO (XEXP (PATTERN (insn), 0)); 6670 6671 return test >= regno && test < endregno; 6672 } 6673 6674 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6675 { 6676 int i = XVECLEN (PATTERN (insn), 0) - 1; 6677 6678 for (; i >= 0; i--) 6679 { 6680 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6681 if ((GET_CODE (elt) == CLOBBER 6682 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6683 && GET_CODE (XEXP (elt, 0)) == REG) 6684 { 6685 int test = REGNO (XEXP (elt, 0)); 6686 6687 if (test >= regno && test < endregno) 6688 return 1; 6689 } 6690 } 6691 } 6692 6693 return 0; 6694} 6695 6696static char *reload_when_needed_name[] = 6697{ 6698 "RELOAD_FOR_INPUT", 6699 "RELOAD_FOR_OUTPUT", 6700 "RELOAD_FOR_INSN", 6701 "RELOAD_FOR_INPUT_ADDRESS", 6702 "RELOAD_FOR_INPADDR_ADDRESS", 6703 "RELOAD_FOR_OUTPUT_ADDRESS", 6704 "RELOAD_FOR_OUTADDR_ADDRESS", 6705 "RELOAD_FOR_OPERAND_ADDRESS", 6706 "RELOAD_FOR_OPADDR_ADDR", 6707 "RELOAD_OTHER", 6708 "RELOAD_FOR_OTHER_ADDRESS" 6709}; 6710 6711static char *reg_class_names[] = REG_CLASS_NAMES; 6712 6713/* These functions are used to print the variables set by 'find_reloads' */ 6714 6715void 6716debug_reload_to_stream (f) 6717 FILE *f; 6718{ 6719 int r; 6720 char *prefix; 6721 6722 if (! f) 6723 f = stderr; 6724 for (r = 0; r < n_reloads; r++) 6725 { 6726 fprintf (f, "Reload %d: ", r); 6727 6728 if (reload_in[r] != 0) 6729 { 6730 fprintf (f, "reload_in (%s) = ", 6731 GET_MODE_NAME (reload_inmode[r])); 6732 print_inline_rtx (f, reload_in[r], 24); 6733 fprintf (f, "\n\t"); 6734 } 6735 6736 if (reload_out[r] != 0) 6737 { 6738 fprintf (f, "reload_out (%s) = ", 6739 GET_MODE_NAME (reload_outmode[r])); 6740 print_inline_rtx (f, reload_out[r], 24); 6741 fprintf (f, "\n\t"); 6742 } 6743 6744 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]); 6745 6746 fprintf (f, "%s (opnum = %d)", 6747 reload_when_needed_name[(int) reload_when_needed[r]], 6748 reload_opnum[r]); 6749 6750 if (reload_optional[r]) 6751 fprintf (f, ", optional"); 6752 6753 if (reload_nongroup[r]) 6754 fprintf (stderr, ", nongroup"); 6755 6756 if (reload_inc[r] != 0) 6757 fprintf (f, ", inc by %d", reload_inc[r]); 6758 6759 if (reload_nocombine[r]) 6760 fprintf (f, ", can't combine"); 6761 6762 if (reload_secondary_p[r]) 6763 fprintf (f, ", secondary_reload_p"); 6764 6765 if (reload_in_reg[r] != 0) 6766 { 6767 fprintf (f, "\n\treload_in_reg: "); 6768 print_inline_rtx (f, reload_in_reg[r], 24); 6769 } 6770 6771 if (reload_out_reg[r] != 0) 6772 { 6773 fprintf (f, "\n\treload_out_reg: "); 6774 print_inline_rtx (f, reload_out_reg[r], 24); 6775 } 6776 6777 if (reload_reg_rtx[r] != 0) 6778 { 6779 fprintf (f, "\n\treload_reg_rtx: "); 6780 print_inline_rtx (f, reload_reg_rtx[r], 24); 6781 } 6782 6783 prefix = "\n\t"; 6784 if (reload_secondary_in_reload[r] != -1) 6785 { 6786 fprintf (f, "%ssecondary_in_reload = %d", 6787 prefix, reload_secondary_in_reload[r]); 6788 prefix = ", "; 6789 } 6790 6791 if (reload_secondary_out_reload[r] != -1) 6792 fprintf (f, "%ssecondary_out_reload = %d\n", 6793 prefix, reload_secondary_out_reload[r]); 6794 6795 prefix = "\n\t"; 6796 if (reload_secondary_in_icode[r] != CODE_FOR_nothing) 6797 { 6798 fprintf (stderr, "%ssecondary_in_icode = %s", prefix, 6799 insn_name[reload_secondary_in_icode[r]]); 6800 prefix = ", "; 6801 } 6802 6803 if (reload_secondary_out_icode[r] != CODE_FOR_nothing) 6804 fprintf (stderr, "%ssecondary_out_icode = %s", prefix, 6805 insn_name[reload_secondary_out_icode[r]]); 6806 6807 fprintf (f, "\n"); 6808 } 6809} 6810 6811void 6812debug_reload () 6813{ 6814 debug_reload_to_stream (stderr); 6815} 6816