reload.c revision 107604
1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 2, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING. If not, write to the Free 19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2002111-1307, USA. */ 21 22/* This file contains subroutines used only from the file reload1.c. 23 It knows how to scan one insn for operands and values 24 that need to be copied into registers to make valid code. 25 It also finds other operands and values which are valid 26 but for which equivalent values in registers exist and 27 ought to be used instead. 28 29 Before processing the first insn of the function, call `init_reload'. 30 31 To scan an insn, call `find_reloads'. This does two things: 32 1. sets up tables describing which values must be reloaded 33 for this insn, and what kind of hard regs they must be reloaded into; 34 2. optionally record the locations where those values appear in 35 the data, so they can be replaced properly later. 36 This is done only if the second arg to `find_reloads' is nonzero. 37 38 The third arg to `find_reloads' specifies the number of levels 39 of indirect addressing supported by the machine. If it is zero, 40 indirect addressing is not valid. If it is one, (MEM (REG n)) 41 is valid even if (REG n) did not get a hard register; if it is two, 42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 43 hard register, and similarly for higher values. 44 45 Then you must choose the hard regs to reload those pseudo regs into, 46 and generate appropriate load insns before this insn and perhaps 47 also store insns after this insn. Set up the array `reload_reg_rtx' 48 to contain the REG rtx's for the registers you used. In some 49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 50 for certain reloads. Then that tells you which register to use, 51 so you do not need to allocate one. But you still do need to add extra 52 instructions to copy the value into and out of that register. 53 54 Finally you must call `subst_reloads' to substitute the reload reg rtx's 55 into the locations already recorded. 56 57NOTE SIDE EFFECTS: 58 59 find_reloads can alter the operands of the instruction it is called on. 60 61 1. Two operands of any sort may be interchanged, if they are in a 62 commutative instruction. 63 This happens only if find_reloads thinks the instruction will compile 64 better that way. 65 66 2. Pseudo-registers that are equivalent to constants are replaced 67 with those constants if they are not in hard registers. 68 691 happens every time find_reloads is called. 702 happens only when REPLACE is 1, which is only when 71actually doing the reloads, not when just counting them. 72 73Using a reload register for several reloads in one insn: 74 75When an insn has reloads, it is considered as having three parts: 76the input reloads, the insn itself after reloading, and the output reloads. 77Reloads of values used in memory addresses are often needed for only one part. 78 79When this is so, reload_when_needed records which part needs the reload. 80Two reloads for different parts of the insn can share the same reload 81register. 82 83When a reload is used for addresses in multiple parts, or when it is 84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 85a register with any other reload. */ 86 87#define REG_OK_STRICT 88 89#include "config.h" 90#include "system.h" 91#include "rtl.h" 92#include "tm_p.h" 93#include "insn-config.h" 94#include "expr.h" 95#include "optabs.h" 96#include "recog.h" 97#include "reload.h" 98#include "regs.h" 99#include "hard-reg-set.h" 100#include "flags.h" 101#include "real.h" 102#include "output.h" 103#include "function.h" 104#include "toplev.h" 105 106#ifndef REGISTER_MOVE_COST 107#define REGISTER_MOVE_COST(m, x, y) 2 108#endif 109 110#ifndef REGNO_MODE_OK_FOR_BASE_P 111#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 112#endif 113 114#ifndef REG_MODE_OK_FOR_BASE_P 115#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 116#endif 117 118/* All reloads of the current insn are recorded here. See reload.h for 119 comments. */ 120int n_reloads; 121struct reload rld[MAX_RELOADS]; 122 123/* All the "earlyclobber" operands of the current insn 124 are recorded here. */ 125int n_earlyclobbers; 126rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 127 128int reload_n_operands; 129 130/* Replacing reloads. 131 132 If `replace_reloads' is nonzero, then as each reload is recorded 133 an entry is made for it in the table `replacements'. 134 Then later `subst_reloads' can look through that table and 135 perform all the replacements needed. */ 136 137/* Nonzero means record the places to replace. */ 138static int replace_reloads; 139 140/* Each replacement is recorded with a structure like this. */ 141struct replacement 142{ 143 rtx *where; /* Location to store in */ 144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 145 a SUBREG; 0 otherwise. */ 146 int what; /* which reload this is for */ 147 enum machine_mode mode; /* mode it must have */ 148}; 149 150static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 151 152/* Number of replacements currently recorded. */ 153static int n_replacements; 154 155/* Used to track what is modified by an operand. */ 156struct decomposition 157{ 158 int reg_flag; /* Nonzero if referencing a register. */ 159 int safe; /* Nonzero if this can't conflict with anything. */ 160 rtx base; /* Base address for MEM. */ 161 HOST_WIDE_INT start; /* Starting offset or register number. */ 162 HOST_WIDE_INT end; /* Ending offset or register number. */ 163}; 164 165#ifdef SECONDARY_MEMORY_NEEDED 166 167/* Save MEMs needed to copy from one class of registers to another. One MEM 168 is used per mode, but normally only one or two modes are ever used. 169 170 We keep two versions, before and after register elimination. The one 171 after register elimination is record separately for each operand. This 172 is done in case the address is not valid to be sure that we separately 173 reload each. */ 174 175static rtx secondary_memlocs[NUM_MACHINE_MODES]; 176static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 177#endif 178 179/* The instruction we are doing reloads for; 180 so we can test whether a register dies in it. */ 181static rtx this_insn; 182 183/* Nonzero if this instruction is a user-specified asm with operands. */ 184static int this_insn_is_asm; 185 186/* If hard_regs_live_known is nonzero, 187 we can tell which hard regs are currently live, 188 at least enough to succeed in choosing dummy reloads. */ 189static int hard_regs_live_known; 190 191/* Indexed by hard reg number, 192 element is nonnegative if hard reg has been spilled. 193 This vector is passed to `find_reloads' as an argument 194 and is not changed here. */ 195static short *static_reload_reg_p; 196 197/* Set to 1 in subst_reg_equivs if it changes anything. */ 198static int subst_reg_equivs_changed; 199 200/* On return from push_reload, holds the reload-number for the OUT 201 operand, which can be different for that from the input operand. */ 202static int output_reloadnum; 203 204 /* Compare two RTX's. */ 205#define MATCHES(x, y) \ 206 (x == y || (x != 0 && (GET_CODE (x) == REG \ 207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 208 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 209 210 /* Indicates if two reloads purposes are for similar enough things that we 211 can merge their reloads. */ 212#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 214 || ((when1) == (when2) && (op1) == (op2)) \ 215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 219 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 220 221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 222#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 223 ((when1) != (when2) \ 224 || ! ((op1) == (op2) \ 225 || (when1) == RELOAD_FOR_INPUT \ 226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 227 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 228 229 /* If we are going to reload an address, compute the reload type to 230 use. */ 231#define ADDR_TYPE(type) \ 232 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 233 ? RELOAD_FOR_INPADDR_ADDRESS \ 234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 235 ? RELOAD_FOR_OUTADDR_ADDRESS \ 236 : (type))) 237 238#ifdef HAVE_SECONDARY_RELOADS 239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class, 240 enum machine_mode, enum reload_type, 241 enum insn_code *)); 242#endif 243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int, 244 unsigned int)); 245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode)); 246static void push_replacement PARAMS ((rtx *, int, enum machine_mode)); 247static void combine_reloads PARAMS ((void)); 248static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class, 249 enum reload_type, int, int)); 250static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *, 251 enum machine_mode, enum machine_mode, 252 enum reg_class, int, int)); 253static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx)); 254static struct decomposition decompose PARAMS ((rtx)); 255static int immune_p PARAMS ((rtx, rtx, struct decomposition)); 256static int alternative_allows_memconst PARAMS ((const char *, int)); 257static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int, 258 int, rtx, int *)); 259static rtx make_memloc PARAMS ((rtx, int)); 260static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *, 261 int, enum reload_type, int, rtx)); 262static rtx subst_reg_equivs PARAMS ((rtx, rtx)); 263static rtx subst_indexed_address PARAMS ((rtx)); 264static void update_auto_inc_notes PARAMS ((rtx, int, int)); 265static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *, 266 int, enum reload_type,int, rtx)); 267static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class, 268 enum machine_mode, int, 269 enum reload_type, int)); 270static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, 271 enum reload_type, int, rtx)); 272static void copy_replacements_1 PARAMS ((rtx *, rtx *, int)); 273static int find_inc_amount PARAMS ((rtx, rtx)); 274 275#ifdef HAVE_SECONDARY_RELOADS 276 277/* Determine if any secondary reloads are needed for loading (if IN_P is 278 non-zero) or storing (if IN_P is zero) X to or from a reload register of 279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 280 are needed, push them. 281 282 Return the reload number of the secondary reload we made, or -1 if 283 we didn't need one. *PICODE is set to the insn_code to use if we do 284 need a secondary reload. */ 285 286static int 287push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 288 type, picode) 289 int in_p; 290 rtx x; 291 int opnum; 292 int optional; 293 enum reg_class reload_class; 294 enum machine_mode reload_mode; 295 enum reload_type type; 296 enum insn_code *picode; 297{ 298 enum reg_class class = NO_REGS; 299 enum machine_mode mode = reload_mode; 300 enum insn_code icode = CODE_FOR_nothing; 301 enum reg_class t_class = NO_REGS; 302 enum machine_mode t_mode = VOIDmode; 303 enum insn_code t_icode = CODE_FOR_nothing; 304 enum reload_type secondary_type; 305 int s_reload, t_reload = -1; 306 307 if (type == RELOAD_FOR_INPUT_ADDRESS 308 || type == RELOAD_FOR_OUTPUT_ADDRESS 309 || type == RELOAD_FOR_INPADDR_ADDRESS 310 || type == RELOAD_FOR_OUTADDR_ADDRESS) 311 secondary_type = type; 312 else 313 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 314 315 *picode = CODE_FOR_nothing; 316 317 /* If X is a paradoxical SUBREG, use the inner value to determine both the 318 mode and object being reloaded. */ 319 if (GET_CODE (x) == SUBREG 320 && (GET_MODE_SIZE (GET_MODE (x)) 321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 322 { 323 x = SUBREG_REG (x); 324 reload_mode = GET_MODE (x); 325 } 326 327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 328 is still a pseudo-register by now, it *must* have an equivalent MEM 329 but we don't want to assume that), use that equivalent when seeing if 330 a secondary reload is needed since whether or not a reload is needed 331 might be sensitive to the form of the MEM. */ 332 333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 334 && reg_equiv_mem[REGNO (x)] != 0) 335 x = reg_equiv_mem[REGNO (x)]; 336 337#ifdef SECONDARY_INPUT_RELOAD_CLASS 338 if (in_p) 339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 340#endif 341 342#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 343 if (! in_p) 344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 345#endif 346 347 /* If we don't need any secondary registers, done. */ 348 if (class == NO_REGS) 349 return -1; 350 351 /* Get a possible insn to use. If the predicate doesn't accept X, don't 352 use the insn. */ 353 354 icode = (in_p ? reload_in_optab[(int) reload_mode] 355 : reload_out_optab[(int) reload_mode]); 356 357 if (icode != CODE_FOR_nothing 358 && insn_data[(int) icode].operand[in_p].predicate 359 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode))) 360 icode = CODE_FOR_nothing; 361 362 /* If we will be using an insn, see if it can directly handle the reload 363 register we will be using. If it can, the secondary reload is for a 364 scratch register. If it can't, we will use the secondary reload for 365 an intermediate register and require a tertiary reload for the scratch 366 register. */ 367 368 if (icode != CODE_FOR_nothing) 369 { 370 /* If IN_P is non-zero, the reload register will be the output in 371 operand 0. If IN_P is zero, the reload register will be the input 372 in operand 1. Outputs should have an initial "=", which we must 373 skip. */ 374 375 enum reg_class insn_class; 376 377 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0) 378 insn_class = ALL_REGS; 379 else 380 { 381 char insn_letter 382 = insn_data[(int) icode].operand[!in_p].constraint[in_p]; 383 insn_class 384 = (insn_letter == 'r' ? GENERAL_REGS 385 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 386 387 if (insn_class == NO_REGS) 388 abort (); 389 if (in_p 390 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=') 391 abort (); 392 } 393 394 /* The scratch register's constraint must start with "=&". */ 395 if (insn_data[(int) icode].operand[2].constraint[0] != '=' 396 || insn_data[(int) icode].operand[2].constraint[1] != '&') 397 abort (); 398 399 if (reg_class_subset_p (reload_class, insn_class)) 400 mode = insn_data[(int) icode].operand[2].mode; 401 else 402 { 403 char t_letter = insn_data[(int) icode].operand[2].constraint[2]; 404 class = insn_class; 405 t_mode = insn_data[(int) icode].operand[2].mode; 406 t_class = (t_letter == 'r' ? GENERAL_REGS 407 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 408 t_icode = icode; 409 icode = CODE_FOR_nothing; 410 } 411 } 412 413 /* This case isn't valid, so fail. Reload is allowed to use the same 414 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 415 in the case of a secondary register, we actually need two different 416 registers for correct code. We fail here to prevent the possibility of 417 silently generating incorrect code later. 418 419 The convention is that secondary input reloads are valid only if the 420 secondary_class is different from class. If you have such a case, you 421 can not use secondary reloads, you must work around the problem some 422 other way. 423 424 Allow this when a reload_in/out pattern is being used. I.e. assume 425 that the generated code handles this case. */ 426 427 if (in_p && class == reload_class && icode == CODE_FOR_nothing 428 && t_icode == CODE_FOR_nothing) 429 abort (); 430 431 /* If we need a tertiary reload, see if we have one we can reuse or else 432 make a new one. */ 433 434 if (t_class != NO_REGS) 435 { 436 for (t_reload = 0; t_reload < n_reloads; t_reload++) 437 if (rld[t_reload].secondary_p 438 && (reg_class_subset_p (t_class, rld[t_reload].class) 439 || reg_class_subset_p (rld[t_reload].class, t_class)) 440 && ((in_p && rld[t_reload].inmode == t_mode) 441 || (! in_p && rld[t_reload].outmode == t_mode)) 442 && ((in_p && (rld[t_reload].secondary_in_icode 443 == CODE_FOR_nothing)) 444 || (! in_p &&(rld[t_reload].secondary_out_icode 445 == CODE_FOR_nothing))) 446 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 447 && MERGABLE_RELOADS (secondary_type, 448 rld[t_reload].when_needed, 449 opnum, rld[t_reload].opnum)) 450 { 451 if (in_p) 452 rld[t_reload].inmode = t_mode; 453 if (! in_p) 454 rld[t_reload].outmode = t_mode; 455 456 if (reg_class_subset_p (t_class, rld[t_reload].class)) 457 rld[t_reload].class = t_class; 458 459 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum); 460 rld[t_reload].optional &= optional; 461 rld[t_reload].secondary_p = 1; 462 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed, 463 opnum, rld[t_reload].opnum)) 464 rld[t_reload].when_needed = RELOAD_OTHER; 465 } 466 467 if (t_reload == n_reloads) 468 { 469 /* We need to make a new tertiary reload for this register class. */ 470 rld[t_reload].in = rld[t_reload].out = 0; 471 rld[t_reload].class = t_class; 472 rld[t_reload].inmode = in_p ? t_mode : VOIDmode; 473 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode; 474 rld[t_reload].reg_rtx = 0; 475 rld[t_reload].optional = optional; 476 rld[t_reload].inc = 0; 477 /* Maybe we could combine these, but it seems too tricky. */ 478 rld[t_reload].nocombine = 1; 479 rld[t_reload].in_reg = 0; 480 rld[t_reload].out_reg = 0; 481 rld[t_reload].opnum = opnum; 482 rld[t_reload].when_needed = secondary_type; 483 rld[t_reload].secondary_in_reload = -1; 484 rld[t_reload].secondary_out_reload = -1; 485 rld[t_reload].secondary_in_icode = CODE_FOR_nothing; 486 rld[t_reload].secondary_out_icode = CODE_FOR_nothing; 487 rld[t_reload].secondary_p = 1; 488 489 n_reloads++; 490 } 491 } 492 493 /* See if we can reuse an existing secondary reload. */ 494 for (s_reload = 0; s_reload < n_reloads; s_reload++) 495 if (rld[s_reload].secondary_p 496 && (reg_class_subset_p (class, rld[s_reload].class) 497 || reg_class_subset_p (rld[s_reload].class, class)) 498 && ((in_p && rld[s_reload].inmode == mode) 499 || (! in_p && rld[s_reload].outmode == mode)) 500 && ((in_p && rld[s_reload].secondary_in_reload == t_reload) 501 || (! in_p && rld[s_reload].secondary_out_reload == t_reload)) 502 && ((in_p && rld[s_reload].secondary_in_icode == t_icode) 503 || (! in_p && rld[s_reload].secondary_out_icode == t_icode)) 504 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 505 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed, 506 opnum, rld[s_reload].opnum)) 507 { 508 if (in_p) 509 rld[s_reload].inmode = mode; 510 if (! in_p) 511 rld[s_reload].outmode = mode; 512 513 if (reg_class_subset_p (class, rld[s_reload].class)) 514 rld[s_reload].class = class; 515 516 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum); 517 rld[s_reload].optional &= optional; 518 rld[s_reload].secondary_p = 1; 519 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed, 520 opnum, rld[s_reload].opnum)) 521 rld[s_reload].when_needed = RELOAD_OTHER; 522 } 523 524 if (s_reload == n_reloads) 525 { 526#ifdef SECONDARY_MEMORY_NEEDED 527 /* If we need a memory location to copy between the two reload regs, 528 set it up now. Note that we do the input case before making 529 the reload and the output case after. This is due to the 530 way reloads are output. */ 531 532 if (in_p && icode == CODE_FOR_nothing 533 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 534 { 535 get_secondary_mem (x, reload_mode, opnum, type); 536 537 /* We may have just added new reloads. Make sure we add 538 the new reload at the end. */ 539 s_reload = n_reloads; 540 } 541#endif 542 543 /* We need to make a new secondary reload for this register class. */ 544 rld[s_reload].in = rld[s_reload].out = 0; 545 rld[s_reload].class = class; 546 547 rld[s_reload].inmode = in_p ? mode : VOIDmode; 548 rld[s_reload].outmode = ! in_p ? mode : VOIDmode; 549 rld[s_reload].reg_rtx = 0; 550 rld[s_reload].optional = optional; 551 rld[s_reload].inc = 0; 552 /* Maybe we could combine these, but it seems too tricky. */ 553 rld[s_reload].nocombine = 1; 554 rld[s_reload].in_reg = 0; 555 rld[s_reload].out_reg = 0; 556 rld[s_reload].opnum = opnum; 557 rld[s_reload].when_needed = secondary_type; 558 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1; 559 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1; 560 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing; 561 rld[s_reload].secondary_out_icode 562 = ! in_p ? t_icode : CODE_FOR_nothing; 563 rld[s_reload].secondary_p = 1; 564 565 n_reloads++; 566 567#ifdef SECONDARY_MEMORY_NEEDED 568 if (! in_p && icode == CODE_FOR_nothing 569 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 570 get_secondary_mem (x, mode, opnum, type); 571#endif 572 } 573 574 *picode = icode; 575 return s_reload; 576} 577#endif /* HAVE_SECONDARY_RELOADS */ 578 579#ifdef SECONDARY_MEMORY_NEEDED 580 581/* Return a memory location that will be used to copy X in mode MODE. 582 If we haven't already made a location for this mode in this insn, 583 call find_reloads_address on the location being returned. */ 584 585rtx 586get_secondary_mem (x, mode, opnum, type) 587 rtx x ATTRIBUTE_UNUSED; 588 enum machine_mode mode; 589 int opnum; 590 enum reload_type type; 591{ 592 rtx loc; 593 int mem_valid; 594 595 /* By default, if MODE is narrower than a word, widen it to a word. 596 This is required because most machines that require these memory 597 locations do not support short load and stores from all registers 598 (e.g., FP registers). */ 599 600#ifdef SECONDARY_MEMORY_NEEDED_MODE 601 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 602#else 603 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode)) 604 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 605#endif 606 607 /* If we already have made a MEM for this operand in MODE, return it. */ 608 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 609 return secondary_memlocs_elim[(int) mode][opnum]; 610 611 /* If this is the first time we've tried to get a MEM for this mode, 612 allocate a new one. `something_changed' in reload will get set 613 by noticing that the frame size has changed. */ 614 615 if (secondary_memlocs[(int) mode] == 0) 616 { 617#ifdef SECONDARY_MEMORY_NEEDED_RTX 618 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 619#else 620 secondary_memlocs[(int) mode] 621 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 622#endif 623 } 624 625 /* Get a version of the address doing any eliminations needed. If that 626 didn't give us a new MEM, make a new one if it isn't valid. */ 627 628 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 629 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 630 631 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 632 loc = copy_rtx (loc); 633 634 /* The only time the call below will do anything is if the stack 635 offset is too large. In that case IND_LEVELS doesn't matter, so we 636 can just pass a zero. Adjust the type to be the address of the 637 corresponding object. If the address was valid, save the eliminated 638 address. If it wasn't valid, we need to make a reload each time, so 639 don't save it. */ 640 641 if (! mem_valid) 642 { 643 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 644 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 645 : RELOAD_OTHER); 646 647 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0), 648 opnum, type, 0, 0); 649 } 650 651 secondary_memlocs_elim[(int) mode][opnum] = loc; 652 return loc; 653} 654 655/* Clear any secondary memory locations we've made. */ 656 657void 658clear_secondary_mem () 659{ 660 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs); 661} 662#endif /* SECONDARY_MEMORY_NEEDED */ 663 664/* Find the largest class for which every register number plus N is valid in 665 M1 (if in range) and is cheap to move into REGNO. 666 Abort if no such class exists. */ 667 668static enum reg_class 669find_valid_class (m1, n, dest_regno) 670 enum machine_mode m1 ATTRIBUTE_UNUSED; 671 int n; 672 unsigned int dest_regno; 673{ 674 int best_cost = -1; 675 int class; 676 int regno; 677 enum reg_class best_class = NO_REGS; 678 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno); 679 unsigned int best_size = 0; 680 int cost; 681 682 for (class = 1; class < N_REG_CLASSES; class++) 683 { 684 int bad = 0; 685 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 686 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 687 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 688 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 689 bad = 1; 690 691 if (bad) 692 continue; 693 cost = REGISTER_MOVE_COST (m1, class, dest_class); 694 695 if ((reg_class_size[class] > best_size 696 && (best_cost < 0 || best_cost >= cost)) 697 || best_cost > cost) 698 { 699 best_class = class; 700 best_size = reg_class_size[class]; 701 best_cost = REGISTER_MOVE_COST (m1, class, dest_class); 702 } 703 } 704 705 if (best_size == 0) 706 abort (); 707 708 return best_class; 709} 710 711/* Return the number of a previously made reload that can be combined with 712 a new one, or n_reloads if none of the existing reloads can be used. 713 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 714 push_reload, they determine the kind of the new reload that we try to 715 combine. P_IN points to the corresponding value of IN, which can be 716 modified by this function. 717 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 718 719static int 720find_reusable_reload (p_in, out, class, type, opnum, dont_share) 721 rtx *p_in, out; 722 enum reg_class class; 723 enum reload_type type; 724 int opnum, dont_share; 725{ 726 rtx in = *p_in; 727 int i; 728 /* We can't merge two reloads if the output of either one is 729 earlyclobbered. */ 730 731 if (earlyclobber_operand_p (out)) 732 return n_reloads; 733 734 /* We can use an existing reload if the class is right 735 and at least one of IN and OUT is a match 736 and the other is at worst neutral. 737 (A zero compared against anything is neutral.) 738 739 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 740 for the same thing since that can cause us to need more reload registers 741 than we otherwise would. */ 742 743 for (i = 0; i < n_reloads; i++) 744 if ((reg_class_subset_p (class, rld[i].class) 745 || reg_class_subset_p (rld[i].class, class)) 746 /* If the existing reload has a register, it must fit our class. */ 747 && (rld[i].reg_rtx == 0 748 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 749 true_regnum (rld[i].reg_rtx))) 750 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share 751 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out))) 752 || (out != 0 && MATCHES (rld[i].out, out) 753 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in)))) 754 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 755 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 756 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum)) 757 return i; 758 759 /* Reloading a plain reg for input can match a reload to postincrement 760 that reg, since the postincrement's value is the right value. 761 Likewise, it can match a preincrement reload, since we regard 762 the preincrementation as happening before any ref in this insn 763 to that register. */ 764 for (i = 0; i < n_reloads; i++) 765 if ((reg_class_subset_p (class, rld[i].class) 766 || reg_class_subset_p (rld[i].class, class)) 767 /* If the existing reload has a register, it must fit our 768 class. */ 769 && (rld[i].reg_rtx == 0 770 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 771 true_regnum (rld[i].reg_rtx))) 772 && out == 0 && rld[i].out == 0 && rld[i].in != 0 773 && ((GET_CODE (in) == REG 774 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a' 775 && MATCHES (XEXP (rld[i].in, 0), in)) 776 || (GET_CODE (rld[i].in) == REG 777 && GET_RTX_CLASS (GET_CODE (in)) == 'a' 778 && MATCHES (XEXP (in, 0), rld[i].in))) 779 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 780 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 781 && MERGABLE_RELOADS (type, rld[i].when_needed, 782 opnum, rld[i].opnum)) 783 { 784 /* Make sure reload_in ultimately has the increment, 785 not the plain register. */ 786 if (GET_CODE (in) == REG) 787 *p_in = rld[i].in; 788 return i; 789 } 790 return n_reloads; 791} 792 793/* Return nonzero if X is a SUBREG which will require reloading of its 794 SUBREG_REG expression. */ 795 796static int 797reload_inner_reg_of_subreg (x, mode) 798 rtx x; 799 enum machine_mode mode; 800{ 801 rtx inner; 802 803 /* Only SUBREGs are problematical. */ 804 if (GET_CODE (x) != SUBREG) 805 return 0; 806 807 inner = SUBREG_REG (x); 808 809 /* If INNER is a constant or PLUS, then INNER must be reloaded. */ 810 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS) 811 return 1; 812 813 /* If INNER is not a hard register, then INNER will not need to 814 be reloaded. */ 815 if (GET_CODE (inner) != REG 816 || REGNO (inner) >= FIRST_PSEUDO_REGISTER) 817 return 0; 818 819 /* If INNER is not ok for MODE, then INNER will need reloading. */ 820 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode)) 821 return 1; 822 823 /* If the outer part is a word or smaller, INNER larger than a 824 word and the number of regs for INNER is not the same as the 825 number of words in INNER, then INNER will need reloading. */ 826 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 827 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD 828 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD) 829 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner)))); 830} 831 832/* Record one reload that needs to be performed. 833 IN is an rtx saying where the data are to be found before this instruction. 834 OUT says where they must be stored after the instruction. 835 (IN is zero for data not read, and OUT is zero for data not written.) 836 INLOC and OUTLOC point to the places in the instructions where 837 IN and OUT were found. 838 If IN and OUT are both non-zero, it means the same register must be used 839 to reload both IN and OUT. 840 841 CLASS is a register class required for the reloaded data. 842 INMODE is the machine mode that the instruction requires 843 for the reg that replaces IN and OUTMODE is likewise for OUT. 844 845 If IN is zero, then OUT's location and mode should be passed as 846 INLOC and INMODE. 847 848 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 849 850 OPTIONAL nonzero means this reload does not need to be performed: 851 it can be discarded if that is more convenient. 852 853 OPNUM and TYPE say what the purpose of this reload is. 854 855 The return value is the reload-number for this reload. 856 857 If both IN and OUT are nonzero, in some rare cases we might 858 want to make two separate reloads. (Actually we never do this now.) 859 Therefore, the reload-number for OUT is stored in 860 output_reloadnum when we return; the return value applies to IN. 861 Usually (presently always), when IN and OUT are nonzero, 862 the two reload-numbers are equal, but the caller should be careful to 863 distinguish them. */ 864 865int 866push_reload (in, out, inloc, outloc, class, 867 inmode, outmode, strict_low, optional, opnum, type) 868 rtx in, out; 869 rtx *inloc, *outloc; 870 enum reg_class class; 871 enum machine_mode inmode, outmode; 872 int strict_low; 873 int optional; 874 int opnum; 875 enum reload_type type; 876{ 877 int i; 878 int dont_share = 0; 879 int dont_remove_subreg = 0; 880 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 881 int secondary_in_reload = -1, secondary_out_reload = -1; 882 enum insn_code secondary_in_icode = CODE_FOR_nothing; 883 enum insn_code secondary_out_icode = CODE_FOR_nothing; 884 885 /* INMODE and/or OUTMODE could be VOIDmode if no mode 886 has been specified for the operand. In that case, 887 use the operand's mode as the mode to reload. */ 888 if (inmode == VOIDmode && in != 0) 889 inmode = GET_MODE (in); 890 if (outmode == VOIDmode && out != 0) 891 outmode = GET_MODE (out); 892 893 /* If IN is a pseudo register everywhere-equivalent to a constant, and 894 it is not in a hard register, reload straight from the constant, 895 since we want to get rid of such pseudo registers. 896 Often this is done earlier, but not always in find_reloads_address. */ 897 if (in != 0 && GET_CODE (in) == REG) 898 { 899 int regno = REGNO (in); 900 901 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 902 && reg_equiv_constant[regno] != 0) 903 in = reg_equiv_constant[regno]; 904 } 905 906 /* Likewise for OUT. Of course, OUT will never be equivalent to 907 an actual constant, but it might be equivalent to a memory location 908 (in the case of a parameter). */ 909 if (out != 0 && GET_CODE (out) == REG) 910 { 911 int regno = REGNO (out); 912 913 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 914 && reg_equiv_constant[regno] != 0) 915 out = reg_equiv_constant[regno]; 916 } 917 918 /* If we have a read-write operand with an address side-effect, 919 change either IN or OUT so the side-effect happens only once. */ 920 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 921 switch (GET_CODE (XEXP (in, 0))) 922 { 923 case POST_INC: case POST_DEC: case POST_MODIFY: 924 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0)); 925 break; 926 927 case PRE_INC: case PRE_DEC: case PRE_MODIFY: 928 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0)); 929 break; 930 931 default: 932 break; 933 } 934 935 /* If we are reloading a (SUBREG constant ...), really reload just the 936 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 937 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 938 a pseudo and hence will become a MEM) with M1 wider than M2 and the 939 register is a pseudo, also reload the inside expression. 940 For machines that extend byte loads, do this for any SUBREG of a pseudo 941 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 942 M2 is an integral mode that gets extended when loaded. 943 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 944 either M1 is not valid for R or M2 is wider than a word but we only 945 need one word to store an M2-sized quantity in R. 946 (However, if OUT is nonzero, we need to reload the reg *and* 947 the subreg, so do nothing here, and let following statement handle it.) 948 949 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 950 we can't handle it here because CONST_INT does not indicate a mode. 951 952 Similarly, we must reload the inside expression if we have a 953 STRICT_LOW_PART (presumably, in == out in the cas). 954 955 Also reload the inner expression if it does not require a secondary 956 reload but the SUBREG does. 957 958 Finally, reload the inner expression if it is a register that is in 959 the class whose registers cannot be referenced in a different size 960 and M1 is not the same size as M2. If subreg_lowpart_p is false, we 961 cannot reload just the inside since we might end up with the wrong 962 register class. But if it is inside a STRICT_LOW_PART, we have 963 no choice, so we hope we do get the right register class there. */ 964 965 if (in != 0 && GET_CODE (in) == SUBREG 966 && (subreg_lowpart_p (in) || strict_low) 967#ifdef CLASS_CANNOT_CHANGE_MODE 968 && (class != CLASS_CANNOT_CHANGE_MODE 969 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode)) 970#endif 971 && (CONSTANT_P (SUBREG_REG (in)) 972 || GET_CODE (SUBREG_REG (in)) == PLUS 973 || strict_low 974 || (((GET_CODE (SUBREG_REG (in)) == REG 975 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 976 || GET_CODE (SUBREG_REG (in)) == MEM) 977 && ((GET_MODE_SIZE (inmode) 978 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 979#ifdef LOAD_EXTEND_OP 980 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 981 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 982 <= UNITS_PER_WORD) 983 && (GET_MODE_SIZE (inmode) 984 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 985 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 986 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 987#endif 988#ifdef WORD_REGISTER_OPERATIONS 989 || ((GET_MODE_SIZE (inmode) 990 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 991 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 992 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 993 / UNITS_PER_WORD))) 994#endif 995 )) 996 || (GET_CODE (SUBREG_REG (in)) == REG 997 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 998 /* The case where out is nonzero 999 is handled differently in the following statement. */ 1000 && (out == 0 || subreg_lowpart_p (in)) 1001 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1002 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1003 > UNITS_PER_WORD) 1004 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1005 / UNITS_PER_WORD) 1006 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1007 GET_MODE (SUBREG_REG (in))))) 1008 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode))) 1009#ifdef SECONDARY_INPUT_RELOAD_CLASS 1010 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1011 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1012 GET_MODE (SUBREG_REG (in)), 1013 SUBREG_REG (in)) 1014 == NO_REGS)) 1015#endif 1016#ifdef CLASS_CANNOT_CHANGE_MODE 1017 || (GET_CODE (SUBREG_REG (in)) == REG 1018 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1019 && (TEST_HARD_REG_BIT 1020 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1021 REGNO (SUBREG_REG (in)))) 1022 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), 1023 inmode)) 1024#endif 1025 )) 1026 { 1027 in_subreg_loc = inloc; 1028 inloc = &SUBREG_REG (in); 1029 in = *inloc; 1030#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1031 if (GET_CODE (in) == MEM) 1032 /* This is supposed to happen only for paradoxical subregs made by 1033 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1034 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1035 abort (); 1036#endif 1037 inmode = GET_MODE (in); 1038 } 1039 1040 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1041 either M1 is not valid for R or M2 is wider than a word but we only 1042 need one word to store an M2-sized quantity in R. 1043 1044 However, we must reload the inner reg *as well as* the subreg in 1045 that case. */ 1046 1047 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1048 code above. This can happen if SUBREG_BYTE != 0. */ 1049 1050 if (in != 0 && reload_inner_reg_of_subreg (in, inmode)) 1051 { 1052 enum reg_class in_class = class; 1053 1054 if (GET_CODE (SUBREG_REG (in)) == REG) 1055 in_class 1056 = find_valid_class (inmode, 1057 subreg_regno_offset (REGNO (SUBREG_REG (in)), 1058 GET_MODE (SUBREG_REG (in)), 1059 SUBREG_BYTE (in), 1060 GET_MODE (in)), 1061 REGNO (SUBREG_REG (in))); 1062 1063 /* This relies on the fact that emit_reload_insns outputs the 1064 instructions for input reloads of type RELOAD_OTHER in the same 1065 order as the reloads. Thus if the outer reload is also of type 1066 RELOAD_OTHER, we are guaranteed that this inner reload will be 1067 output before the outer reload. */ 1068 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0, 1069 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type); 1070 dont_remove_subreg = 1; 1071 } 1072 1073 /* Similarly for paradoxical and problematical SUBREGs on the output. 1074 Note that there is no reason we need worry about the previous value 1075 of SUBREG_REG (out); even if wider than out, 1076 storing in a subreg is entitled to clobber it all 1077 (except in the case of STRICT_LOW_PART, 1078 and in that case the constraint should label it input-output.) */ 1079 if (out != 0 && GET_CODE (out) == SUBREG 1080 && (subreg_lowpart_p (out) || strict_low) 1081#ifdef CLASS_CANNOT_CHANGE_MODE 1082 && (class != CLASS_CANNOT_CHANGE_MODE 1083 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1084 outmode)) 1085#endif 1086 && (CONSTANT_P (SUBREG_REG (out)) 1087 || strict_low 1088 || (((GET_CODE (SUBREG_REG (out)) == REG 1089 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1090 || GET_CODE (SUBREG_REG (out)) == MEM) 1091 && ((GET_MODE_SIZE (outmode) 1092 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1093#ifdef WORD_REGISTER_OPERATIONS 1094 || ((GET_MODE_SIZE (outmode) 1095 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1096 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1097 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1098 / UNITS_PER_WORD))) 1099#endif 1100 )) 1101 || (GET_CODE (SUBREG_REG (out)) == REG 1102 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1103 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1104 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1105 > UNITS_PER_WORD) 1106 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1107 / UNITS_PER_WORD) 1108 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1109 GET_MODE (SUBREG_REG (out))))) 1110 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode))) 1111#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1112 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1113 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1114 GET_MODE (SUBREG_REG (out)), 1115 SUBREG_REG (out)) 1116 == NO_REGS)) 1117#endif 1118#ifdef CLASS_CANNOT_CHANGE_MODE 1119 || (GET_CODE (SUBREG_REG (out)) == REG 1120 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1121 && (TEST_HARD_REG_BIT 1122 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1123 REGNO (SUBREG_REG (out)))) 1124 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1125 outmode)) 1126#endif 1127 )) 1128 { 1129 out_subreg_loc = outloc; 1130 outloc = &SUBREG_REG (out); 1131 out = *outloc; 1132#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1133 if (GET_CODE (out) == MEM 1134 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1135 abort (); 1136#endif 1137 outmode = GET_MODE (out); 1138 } 1139 1140 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1141 either M1 is not valid for R or M2 is wider than a word but we only 1142 need one word to store an M2-sized quantity in R. 1143 1144 However, we must reload the inner reg *as well as* the subreg in 1145 that case. In this case, the inner reg is an in-out reload. */ 1146 1147 if (out != 0 && reload_inner_reg_of_subreg (out, outmode)) 1148 { 1149 /* This relies on the fact that emit_reload_insns outputs the 1150 instructions for output reloads of type RELOAD_OTHER in reverse 1151 order of the reloads. Thus if the outer reload is also of type 1152 RELOAD_OTHER, we are guaranteed that this inner reload will be 1153 output after the outer reload. */ 1154 dont_remove_subreg = 1; 1155 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1156 &SUBREG_REG (out), 1157 find_valid_class (outmode, 1158 subreg_regno_offset (REGNO (SUBREG_REG (out)), 1159 GET_MODE (SUBREG_REG (out)), 1160 SUBREG_BYTE (out), 1161 GET_MODE (out)), 1162 REGNO (SUBREG_REG (out))), 1163 VOIDmode, VOIDmode, 0, 0, 1164 opnum, RELOAD_OTHER); 1165 } 1166 1167 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1168 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1169 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1170 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1171 dont_share = 1; 1172 1173 /* If IN is a SUBREG of a hard register, make a new REG. This 1174 simplifies some of the cases below. */ 1175 1176 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1177 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1178 && ! dont_remove_subreg) 1179 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in)); 1180 1181 /* Similarly for OUT. */ 1182 if (out != 0 && GET_CODE (out) == SUBREG 1183 && GET_CODE (SUBREG_REG (out)) == REG 1184 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1185 && ! dont_remove_subreg) 1186 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out)); 1187 1188 /* Narrow down the class of register wanted if that is 1189 desirable on this machine for efficiency. */ 1190 if (in != 0) 1191 class = PREFERRED_RELOAD_CLASS (in, class); 1192 1193 /* Output reloads may need analogous treatment, different in detail. */ 1194#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1195 if (out != 0) 1196 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1197#endif 1198 1199 /* Make sure we use a class that can handle the actual pseudo 1200 inside any subreg. For example, on the 386, QImode regs 1201 can appear within SImode subregs. Although GENERAL_REGS 1202 can handle SImode, QImode needs a smaller class. */ 1203#ifdef LIMIT_RELOAD_CLASS 1204 if (in_subreg_loc) 1205 class = LIMIT_RELOAD_CLASS (inmode, class); 1206 else if (in != 0 && GET_CODE (in) == SUBREG) 1207 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1208 1209 if (out_subreg_loc) 1210 class = LIMIT_RELOAD_CLASS (outmode, class); 1211 if (out != 0 && GET_CODE (out) == SUBREG) 1212 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1213#endif 1214 1215 /* Verify that this class is at least possible for the mode that 1216 is specified. */ 1217 if (this_insn_is_asm) 1218 { 1219 enum machine_mode mode; 1220 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1221 mode = inmode; 1222 else 1223 mode = outmode; 1224 if (mode == VOIDmode) 1225 { 1226 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1227 mode = word_mode; 1228 if (in != 0) 1229 inmode = word_mode; 1230 if (out != 0) 1231 outmode = word_mode; 1232 } 1233 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1234 if (HARD_REGNO_MODE_OK (i, mode) 1235 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1236 { 1237 int nregs = HARD_REGNO_NREGS (i, mode); 1238 1239 int j; 1240 for (j = 1; j < nregs; j++) 1241 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1242 break; 1243 if (j == nregs) 1244 break; 1245 } 1246 if (i == FIRST_PSEUDO_REGISTER) 1247 { 1248 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1249 class = ALL_REGS; 1250 } 1251 } 1252 1253 /* Optional output reloads are always OK even if we have no register class, 1254 since the function of these reloads is only to have spill_reg_store etc. 1255 set, so that the storing insn can be deleted later. */ 1256 if (class == NO_REGS 1257 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1258 abort (); 1259 1260 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1261 1262 if (i == n_reloads) 1263 { 1264 /* See if we need a secondary reload register to move between CLASS 1265 and IN or CLASS and OUT. Get the icode and push any required reloads 1266 needed for each of them if so. */ 1267 1268#ifdef SECONDARY_INPUT_RELOAD_CLASS 1269 if (in != 0) 1270 secondary_in_reload 1271 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1272 &secondary_in_icode); 1273#endif 1274 1275#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1276 if (out != 0 && GET_CODE (out) != SCRATCH) 1277 secondary_out_reload 1278 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1279 type, &secondary_out_icode); 1280#endif 1281 1282 /* We found no existing reload suitable for re-use. 1283 So add an additional reload. */ 1284 1285#ifdef SECONDARY_MEMORY_NEEDED 1286 { 1287 int regnum; 1288 1289 /* If a memory location is needed for the copy, make one. */ 1290 if (in != 0 1291 && ((regnum = true_regnum (in)) >= 0) 1292 && regnum < FIRST_PSEUDO_REGISTER 1293 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (regnum), 1294 class, inmode)) 1295 get_secondary_mem (in, inmode, opnum, type); 1296 } 1297#endif 1298 1299 i = n_reloads; 1300 rld[i].in = in; 1301 rld[i].out = out; 1302 rld[i].class = class; 1303 rld[i].inmode = inmode; 1304 rld[i].outmode = outmode; 1305 rld[i].reg_rtx = 0; 1306 rld[i].optional = optional; 1307 rld[i].inc = 0; 1308 rld[i].nocombine = 0; 1309 rld[i].in_reg = inloc ? *inloc : 0; 1310 rld[i].out_reg = outloc ? *outloc : 0; 1311 rld[i].opnum = opnum; 1312 rld[i].when_needed = type; 1313 rld[i].secondary_in_reload = secondary_in_reload; 1314 rld[i].secondary_out_reload = secondary_out_reload; 1315 rld[i].secondary_in_icode = secondary_in_icode; 1316 rld[i].secondary_out_icode = secondary_out_icode; 1317 rld[i].secondary_p = 0; 1318 1319 n_reloads++; 1320 1321#ifdef SECONDARY_MEMORY_NEEDED 1322 { 1323 int regnum; 1324 1325 if (out != 0 1326 && ((regnum = true_regnum (out)) >= 0) 1327 && regnum < FIRST_PSEUDO_REGISTER 1328 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (regnum), 1329 outmode)) 1330 get_secondary_mem (out, outmode, opnum, type); 1331 } 1332#endif 1333 } 1334 else 1335 { 1336 /* We are reusing an existing reload, 1337 but we may have additional information for it. 1338 For example, we may now have both IN and OUT 1339 while the old one may have just one of them. */ 1340 1341 /* The modes can be different. If they are, we want to reload in 1342 the larger mode, so that the value is valid for both modes. */ 1343 if (inmode != VOIDmode 1344 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode)) 1345 rld[i].inmode = inmode; 1346 if (outmode != VOIDmode 1347 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode)) 1348 rld[i].outmode = outmode; 1349 if (in != 0) 1350 { 1351 rtx in_reg = inloc ? *inloc : 0; 1352 /* If we merge reloads for two distinct rtl expressions that 1353 are identical in content, there might be duplicate address 1354 reloads. Remove the extra set now, so that if we later find 1355 that we can inherit this reload, we can get rid of the 1356 address reloads altogether. 1357 1358 Do not do this if both reloads are optional since the result 1359 would be an optional reload which could potentially leave 1360 unresolved address replacements. 1361 1362 It is not sufficient to call transfer_replacements since 1363 choose_reload_regs will remove the replacements for address 1364 reloads of inherited reloads which results in the same 1365 problem. */ 1366 if (rld[i].in != in && rtx_equal_p (in, rld[i].in) 1367 && ! (rld[i].optional && optional)) 1368 { 1369 /* We must keep the address reload with the lower operand 1370 number alive. */ 1371 if (opnum > rld[i].opnum) 1372 { 1373 remove_address_replacements (in); 1374 in = rld[i].in; 1375 in_reg = rld[i].in_reg; 1376 } 1377 else 1378 remove_address_replacements (rld[i].in); 1379 } 1380 rld[i].in = in; 1381 rld[i].in_reg = in_reg; 1382 } 1383 if (out != 0) 1384 { 1385 rld[i].out = out; 1386 rld[i].out_reg = outloc ? *outloc : 0; 1387 } 1388 if (reg_class_subset_p (class, rld[i].class)) 1389 rld[i].class = class; 1390 rld[i].optional &= optional; 1391 if (MERGE_TO_OTHER (type, rld[i].when_needed, 1392 opnum, rld[i].opnum)) 1393 rld[i].when_needed = RELOAD_OTHER; 1394 rld[i].opnum = MIN (rld[i].opnum, opnum); 1395 } 1396 1397 /* If the ostensible rtx being reloaded differs from the rtx found 1398 in the location to substitute, this reload is not safe to combine 1399 because we cannot reliably tell whether it appears in the insn. */ 1400 1401 if (in != 0 && in != *inloc) 1402 rld[i].nocombine = 1; 1403 1404#if 0 1405 /* This was replaced by changes in find_reloads_address_1 and the new 1406 function inc_for_reload, which go with a new meaning of reload_inc. */ 1407 1408 /* If this is an IN/OUT reload in an insn that sets the CC, 1409 it must be for an autoincrement. It doesn't work to store 1410 the incremented value after the insn because that would clobber the CC. 1411 So we must do the increment of the value reloaded from, 1412 increment it, store it back, then decrement again. */ 1413 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1414 { 1415 out = 0; 1416 rld[i].out = 0; 1417 rld[i].inc = find_inc_amount (PATTERN (this_insn), in); 1418 /* If we did not find a nonzero amount-to-increment-by, 1419 that contradicts the belief that IN is being incremented 1420 in an address in this insn. */ 1421 if (rld[i].inc == 0) 1422 abort (); 1423 } 1424#endif 1425 1426 /* If we will replace IN and OUT with the reload-reg, 1427 record where they are located so that substitution need 1428 not do a tree walk. */ 1429 1430 if (replace_reloads) 1431 { 1432 if (inloc != 0) 1433 { 1434 struct replacement *r = &replacements[n_replacements++]; 1435 r->what = i; 1436 r->subreg_loc = in_subreg_loc; 1437 r->where = inloc; 1438 r->mode = inmode; 1439 } 1440 if (outloc != 0 && outloc != inloc) 1441 { 1442 struct replacement *r = &replacements[n_replacements++]; 1443 r->what = i; 1444 r->where = outloc; 1445 r->subreg_loc = out_subreg_loc; 1446 r->mode = outmode; 1447 } 1448 } 1449 1450 /* If this reload is just being introduced and it has both 1451 an incoming quantity and an outgoing quantity that are 1452 supposed to be made to match, see if either one of the two 1453 can serve as the place to reload into. 1454 1455 If one of them is acceptable, set rld[i].reg_rtx 1456 to that one. */ 1457 1458 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0) 1459 { 1460 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc, 1461 inmode, outmode, 1462 rld[i].class, i, 1463 earlyclobber_operand_p (out)); 1464 1465 /* If the outgoing register already contains the same value 1466 as the incoming one, we can dispense with loading it. 1467 The easiest way to tell the caller that is to give a phony 1468 value for the incoming operand (same as outgoing one). */ 1469 if (rld[i].reg_rtx == out 1470 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1471 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1472 static_reload_reg_p, i, inmode)) 1473 rld[i].in = out; 1474 } 1475 1476 /* If this is an input reload and the operand contains a register that 1477 dies in this insn and is used nowhere else, see if it is the right class 1478 to be used for this reload. Use it if so. (This occurs most commonly 1479 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1480 this if it is also an output reload that mentions the register unless 1481 the output is a SUBREG that clobbers an entire register. 1482 1483 Note that the operand might be one of the spill regs, if it is a 1484 pseudo reg and we are in a block where spilling has not taken place. 1485 But if there is no spilling in this block, that is OK. 1486 An explicitly used hard reg cannot be a spill reg. */ 1487 1488 if (rld[i].reg_rtx == 0 && in != 0) 1489 { 1490 rtx note; 1491 int regno; 1492 enum machine_mode rel_mode = inmode; 1493 1494 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode)) 1495 rel_mode = outmode; 1496 1497 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1498 if (REG_NOTE_KIND (note) == REG_DEAD 1499 && GET_CODE (XEXP (note, 0)) == REG 1500 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1501 && reg_mentioned_p (XEXP (note, 0), in) 1502 && ! refers_to_regno_for_reload_p (regno, 1503 (regno 1504 + HARD_REGNO_NREGS (regno, 1505 rel_mode)), 1506 PATTERN (this_insn), inloc) 1507 /* If this is also an output reload, IN cannot be used as 1508 the reload register if it is set in this insn unless IN 1509 is also OUT. */ 1510 && (out == 0 || in == out 1511 || ! hard_reg_set_here_p (regno, 1512 (regno 1513 + HARD_REGNO_NREGS (regno, 1514 rel_mode)), 1515 PATTERN (this_insn))) 1516 /* ??? Why is this code so different from the previous? 1517 Is there any simple coherent way to describe the two together? 1518 What's going on here. */ 1519 && (in != out 1520 || (GET_CODE (in) == SUBREG 1521 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1522 / UNITS_PER_WORD) 1523 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1524 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1525 /* Make sure the operand fits in the reg that dies. */ 1526 && (GET_MODE_SIZE (rel_mode) 1527 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))) 1528 && HARD_REGNO_MODE_OK (regno, inmode) 1529 && HARD_REGNO_MODE_OK (regno, outmode)) 1530 { 1531 unsigned int offs; 1532 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1533 HARD_REGNO_NREGS (regno, outmode)); 1534 1535 for (offs = 0; offs < nregs; offs++) 1536 if (fixed_regs[regno + offs] 1537 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1538 regno + offs)) 1539 break; 1540 1541 if (offs == nregs) 1542 { 1543 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno); 1544 break; 1545 } 1546 } 1547 } 1548 1549 if (out) 1550 output_reloadnum = i; 1551 1552 return i; 1553} 1554 1555/* Record an additional place we must replace a value 1556 for which we have already recorded a reload. 1557 RELOADNUM is the value returned by push_reload 1558 when the reload was recorded. 1559 This is used in insn patterns that use match_dup. */ 1560 1561static void 1562push_replacement (loc, reloadnum, mode) 1563 rtx *loc; 1564 int reloadnum; 1565 enum machine_mode mode; 1566{ 1567 if (replace_reloads) 1568 { 1569 struct replacement *r = &replacements[n_replacements++]; 1570 r->what = reloadnum; 1571 r->where = loc; 1572 r->subreg_loc = 0; 1573 r->mode = mode; 1574 } 1575} 1576 1577/* Transfer all replacements that used to be in reload FROM to be in 1578 reload TO. */ 1579 1580void 1581transfer_replacements (to, from) 1582 int to, from; 1583{ 1584 int i; 1585 1586 for (i = 0; i < n_replacements; i++) 1587 if (replacements[i].what == from) 1588 replacements[i].what = to; 1589} 1590 1591/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1592 or a subpart of it. If we have any replacements registered for IN_RTX, 1593 cancel the reloads that were supposed to load them. 1594 Return non-zero if we canceled any reloads. */ 1595int 1596remove_address_replacements (in_rtx) 1597 rtx in_rtx; 1598{ 1599 int i, j; 1600 char reload_flags[MAX_RELOADS]; 1601 int something_changed = 0; 1602 1603 memset (reload_flags, 0, sizeof reload_flags); 1604 for (i = 0, j = 0; i < n_replacements; i++) 1605 { 1606 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1607 reload_flags[replacements[i].what] |= 1; 1608 else 1609 { 1610 replacements[j++] = replacements[i]; 1611 reload_flags[replacements[i].what] |= 2; 1612 } 1613 } 1614 /* Note that the following store must be done before the recursive calls. */ 1615 n_replacements = j; 1616 1617 for (i = n_reloads - 1; i >= 0; i--) 1618 { 1619 if (reload_flags[i] == 1) 1620 { 1621 deallocate_reload_reg (i); 1622 remove_address_replacements (rld[i].in); 1623 rld[i].in = 0; 1624 something_changed = 1; 1625 } 1626 } 1627 return something_changed; 1628} 1629 1630/* If there is only one output reload, and it is not for an earlyclobber 1631 operand, try to combine it with a (logically unrelated) input reload 1632 to reduce the number of reload registers needed. 1633 1634 This is safe if the input reload does not appear in 1635 the value being output-reloaded, because this implies 1636 it is not needed any more once the original insn completes. 1637 1638 If that doesn't work, see we can use any of the registers that 1639 die in this insn as a reload register. We can if it is of the right 1640 class and does not appear in the value being output-reloaded. */ 1641 1642static void 1643combine_reloads () 1644{ 1645 int i; 1646 int output_reload = -1; 1647 int secondary_out = -1; 1648 rtx note; 1649 1650 /* Find the output reload; return unless there is exactly one 1651 and that one is mandatory. */ 1652 1653 for (i = 0; i < n_reloads; i++) 1654 if (rld[i].out != 0) 1655 { 1656 if (output_reload >= 0) 1657 return; 1658 output_reload = i; 1659 } 1660 1661 if (output_reload < 0 || rld[output_reload].optional) 1662 return; 1663 1664 /* An input-output reload isn't combinable. */ 1665 1666 if (rld[output_reload].in != 0) 1667 return; 1668 1669 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1670 if (earlyclobber_operand_p (rld[output_reload].out)) 1671 return; 1672 1673 /* If there is a reload for part of the address of this operand, we would 1674 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend 1675 its life to the point where doing this combine would not lower the 1676 number of spill registers needed. */ 1677 for (i = 0; i < n_reloads; i++) 1678 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 1679 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 1680 && rld[i].opnum == rld[output_reload].opnum) 1681 return; 1682 1683 /* Check each input reload; can we combine it? */ 1684 1685 for (i = 0; i < n_reloads; i++) 1686 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine 1687 /* Life span of this reload must not extend past main insn. */ 1688 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 1689 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 1690 && rld[i].when_needed != RELOAD_OTHER 1691 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode) 1692 == CLASS_MAX_NREGS (rld[output_reload].class, 1693 rld[output_reload].outmode)) 1694 && rld[i].inc == 0 1695 && rld[i].reg_rtx == 0 1696#ifdef SECONDARY_MEMORY_NEEDED 1697 /* Don't combine two reloads with different secondary 1698 memory locations. */ 1699 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0 1700 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0 1701 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum], 1702 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum])) 1703#endif 1704 && (SMALL_REGISTER_CLASSES 1705 ? (rld[i].class == rld[output_reload].class) 1706 : (reg_class_subset_p (rld[i].class, 1707 rld[output_reload].class) 1708 || reg_class_subset_p (rld[output_reload].class, 1709 rld[i].class))) 1710 && (MATCHES (rld[i].in, rld[output_reload].out) 1711 /* Args reversed because the first arg seems to be 1712 the one that we imagine being modified 1713 while the second is the one that might be affected. */ 1714 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out, 1715 rld[i].in) 1716 /* However, if the input is a register that appears inside 1717 the output, then we also can't share. 1718 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1719 If the same reload reg is used for both reg 69 and the 1720 result to be stored in memory, then that result 1721 will clobber the address of the memory ref. */ 1722 && ! (GET_CODE (rld[i].in) == REG 1723 && reg_overlap_mentioned_for_reload_p (rld[i].in, 1724 rld[output_reload].out)))) 1725 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode) 1726 && (reg_class_size[(int) rld[i].class] 1727 || SMALL_REGISTER_CLASSES) 1728 /* We will allow making things slightly worse by combining an 1729 input and an output, but no worse than that. */ 1730 && (rld[i].when_needed == RELOAD_FOR_INPUT 1731 || rld[i].when_needed == RELOAD_FOR_OUTPUT)) 1732 { 1733 int j; 1734 1735 /* We have found a reload to combine with! */ 1736 rld[i].out = rld[output_reload].out; 1737 rld[i].out_reg = rld[output_reload].out_reg; 1738 rld[i].outmode = rld[output_reload].outmode; 1739 /* Mark the old output reload as inoperative. */ 1740 rld[output_reload].out = 0; 1741 /* The combined reload is needed for the entire insn. */ 1742 rld[i].when_needed = RELOAD_OTHER; 1743 /* If the output reload had a secondary reload, copy it. */ 1744 if (rld[output_reload].secondary_out_reload != -1) 1745 { 1746 rld[i].secondary_out_reload 1747 = rld[output_reload].secondary_out_reload; 1748 rld[i].secondary_out_icode 1749 = rld[output_reload].secondary_out_icode; 1750 } 1751 1752#ifdef SECONDARY_MEMORY_NEEDED 1753 /* Copy any secondary MEM. */ 1754 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0) 1755 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] 1756 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]; 1757#endif 1758 /* If required, minimize the register class. */ 1759 if (reg_class_subset_p (rld[output_reload].class, 1760 rld[i].class)) 1761 rld[i].class = rld[output_reload].class; 1762 1763 /* Transfer all replacements from the old reload to the combined. */ 1764 for (j = 0; j < n_replacements; j++) 1765 if (replacements[j].what == output_reload) 1766 replacements[j].what = i; 1767 1768 return; 1769 } 1770 1771 /* If this insn has only one operand that is modified or written (assumed 1772 to be the first), it must be the one corresponding to this reload. It 1773 is safe to use anything that dies in this insn for that output provided 1774 that it does not occur in the output (we already know it isn't an 1775 earlyclobber. If this is an asm insn, give up. */ 1776 1777 if (INSN_CODE (this_insn) == -1) 1778 return; 1779 1780 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++) 1781 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '=' 1782 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+') 1783 return; 1784 1785 /* See if some hard register that dies in this insn and is not used in 1786 the output is the right class. Only works if the register we pick 1787 up can fully hold our output reload. */ 1788 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1789 if (REG_NOTE_KIND (note) == REG_DEAD 1790 && GET_CODE (XEXP (note, 0)) == REG 1791 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1792 rld[output_reload].out) 1793 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1794 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1795 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class], 1796 REGNO (XEXP (note, 0))) 1797 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1798 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1799 /* Ensure that a secondary or tertiary reload for this output 1800 won't want this register. */ 1801 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1 1802 || (! (TEST_HARD_REG_BIT 1803 (reg_class_contents[(int) rld[secondary_out].class], 1804 REGNO (XEXP (note, 0)))) 1805 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1 1806 || ! (TEST_HARD_REG_BIT 1807 (reg_class_contents[(int) rld[secondary_out].class], 1808 REGNO (XEXP (note, 0))))))) 1809 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1810 { 1811 rld[output_reload].reg_rtx 1812 = gen_rtx_REG (rld[output_reload].outmode, 1813 REGNO (XEXP (note, 0))); 1814 return; 1815 } 1816} 1817 1818/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1819 See if one of IN and OUT is a register that may be used; 1820 this is desirable since a spill-register won't be needed. 1821 If so, return the register rtx that proves acceptable. 1822 1823 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1824 CLASS is the register class required for the reload. 1825 1826 If FOR_REAL is >= 0, it is the number of the reload, 1827 and in some cases when it can be discovered that OUT doesn't need 1828 to be computed, clear out rld[FOR_REAL].out. 1829 1830 If FOR_REAL is -1, this should not be done, because this call 1831 is just to see if a register can be found, not to find and install it. 1832 1833 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1834 puts an additional constraint on being able to use IN for OUT since 1835 IN must not appear elsewhere in the insn (it is assumed that IN itself 1836 is safe from the earlyclobber). */ 1837 1838static rtx 1839find_dummy_reload (real_in, real_out, inloc, outloc, 1840 inmode, outmode, class, for_real, earlyclobber) 1841 rtx real_in, real_out; 1842 rtx *inloc, *outloc; 1843 enum machine_mode inmode, outmode; 1844 enum reg_class class; 1845 int for_real; 1846 int earlyclobber; 1847{ 1848 rtx in = real_in; 1849 rtx out = real_out; 1850 int in_offset = 0; 1851 int out_offset = 0; 1852 rtx value = 0; 1853 1854 /* If operands exceed a word, we can't use either of them 1855 unless they have the same size. */ 1856 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1857 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1858 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1859 return 0; 1860 1861 /* Note that {in,out}_offset are needed only when 'in' or 'out' 1862 respectively refers to a hard register. */ 1863 1864 /* Find the inside of any subregs. */ 1865 while (GET_CODE (out) == SUBREG) 1866 { 1867 if (GET_CODE (SUBREG_REG (out)) == REG 1868 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) 1869 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)), 1870 GET_MODE (SUBREG_REG (out)), 1871 SUBREG_BYTE (out), 1872 GET_MODE (out)); 1873 out = SUBREG_REG (out); 1874 } 1875 while (GET_CODE (in) == SUBREG) 1876 { 1877 if (GET_CODE (SUBREG_REG (in)) == REG 1878 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) 1879 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)), 1880 GET_MODE (SUBREG_REG (in)), 1881 SUBREG_BYTE (in), 1882 GET_MODE (in)); 1883 in = SUBREG_REG (in); 1884 } 1885 1886 /* Narrow down the reg class, the same way push_reload will; 1887 otherwise we might find a dummy now, but push_reload won't. */ 1888 class = PREFERRED_RELOAD_CLASS (in, class); 1889 1890 /* See if OUT will do. */ 1891 if (GET_CODE (out) == REG 1892 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1893 { 1894 unsigned int regno = REGNO (out) + out_offset; 1895 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode); 1896 rtx saved_rtx; 1897 1898 /* When we consider whether the insn uses OUT, 1899 ignore references within IN. They don't prevent us 1900 from copying IN into OUT, because those refs would 1901 move into the insn that reloads IN. 1902 1903 However, we only ignore IN in its role as this reload. 1904 If the insn uses IN elsewhere and it contains OUT, 1905 that counts. We can't be sure it's the "same" operand 1906 so it might not go through this reload. */ 1907 saved_rtx = *inloc; 1908 *inloc = const0_rtx; 1909 1910 if (regno < FIRST_PSEUDO_REGISTER 1911 && HARD_REGNO_MODE_OK (regno, outmode) 1912 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1913 PATTERN (this_insn), outloc)) 1914 { 1915 unsigned int i; 1916 1917 for (i = 0; i < nwords; i++) 1918 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1919 regno + i)) 1920 break; 1921 1922 if (i == nwords) 1923 { 1924 if (GET_CODE (real_out) == REG) 1925 value = real_out; 1926 else 1927 value = gen_rtx_REG (outmode, regno); 1928 } 1929 } 1930 1931 *inloc = saved_rtx; 1932 } 1933 1934 /* Consider using IN if OUT was not acceptable 1935 or if OUT dies in this insn (like the quotient in a divmod insn). 1936 We can't use IN unless it is dies in this insn, 1937 which means we must know accurately which hard regs are live. 1938 Also, the result can't go in IN if IN is used within OUT, 1939 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1940 if (hard_regs_live_known 1941 && GET_CODE (in) == REG 1942 && REGNO (in) < FIRST_PSEUDO_REGISTER 1943 && (value == 0 1944 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1945 && find_reg_note (this_insn, REG_DEAD, real_in) 1946 && !fixed_regs[REGNO (in)] 1947 && HARD_REGNO_MODE_OK (REGNO (in), 1948 /* The only case where out and real_out might 1949 have different modes is where real_out 1950 is a subreg, and in that case, out 1951 has a real mode. */ 1952 (GET_MODE (out) != VOIDmode 1953 ? GET_MODE (out) : outmode))) 1954 { 1955 unsigned int regno = REGNO (in) + in_offset; 1956 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode); 1957 1958 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0) 1959 && ! hard_reg_set_here_p (regno, regno + nwords, 1960 PATTERN (this_insn)) 1961 && (! earlyclobber 1962 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1963 PATTERN (this_insn), inloc))) 1964 { 1965 unsigned int i; 1966 1967 for (i = 0; i < nwords; i++) 1968 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1969 regno + i)) 1970 break; 1971 1972 if (i == nwords) 1973 { 1974 /* If we were going to use OUT as the reload reg 1975 and changed our mind, it means OUT is a dummy that 1976 dies here. So don't bother copying value to it. */ 1977 if (for_real >= 0 && value == real_out) 1978 rld[for_real].out = 0; 1979 if (GET_CODE (real_in) == REG) 1980 value = real_in; 1981 else 1982 value = gen_rtx_REG (inmode, regno); 1983 } 1984 } 1985 } 1986 1987 return value; 1988} 1989 1990/* This page contains subroutines used mainly for determining 1991 whether the IN or an OUT of a reload can serve as the 1992 reload register. */ 1993 1994/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1995 1996int 1997earlyclobber_operand_p (x) 1998 rtx x; 1999{ 2000 int i; 2001 2002 for (i = 0; i < n_earlyclobbers; i++) 2003 if (reload_earlyclobbers[i] == x) 2004 return 1; 2005 2006 return 0; 2007} 2008 2009/* Return 1 if expression X alters a hard reg in the range 2010 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2011 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2012 X should be the body of an instruction. */ 2013 2014static int 2015hard_reg_set_here_p (beg_regno, end_regno, x) 2016 unsigned int beg_regno, end_regno; 2017 rtx x; 2018{ 2019 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2020 { 2021 rtx op0 = SET_DEST (x); 2022 2023 while (GET_CODE (op0) == SUBREG) 2024 op0 = SUBREG_REG (op0); 2025 if (GET_CODE (op0) == REG) 2026 { 2027 unsigned int r = REGNO (op0); 2028 2029 /* See if this reg overlaps range under consideration. */ 2030 if (r < end_regno 2031 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2032 return 1; 2033 } 2034 } 2035 else if (GET_CODE (x) == PARALLEL) 2036 { 2037 int i = XVECLEN (x, 0) - 1; 2038 2039 for (; i >= 0; i--) 2040 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2041 return 1; 2042 } 2043 2044 return 0; 2045} 2046 2047/* Return 1 if ADDR is a valid memory address for mode MODE, 2048 and check that each pseudo reg has the proper kind of 2049 hard reg. */ 2050 2051int 2052strict_memory_address_p (mode, addr) 2053 enum machine_mode mode ATTRIBUTE_UNUSED; 2054 rtx addr; 2055{ 2056 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2057 return 0; 2058 2059 win: 2060 return 1; 2061} 2062 2063/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2064 if they are the same hard reg, and has special hacks for 2065 autoincrement and autodecrement. 2066 This is specifically intended for find_reloads to use 2067 in determining whether two operands match. 2068 X is the operand whose number is the lower of the two. 2069 2070 The value is 2 if Y contains a pre-increment that matches 2071 a non-incrementing address in X. */ 2072 2073/* ??? To be completely correct, we should arrange to pass 2074 for X the output operand and for Y the input operand. 2075 For now, we assume that the output operand has the lower number 2076 because that is natural in (SET output (... input ...)). */ 2077 2078int 2079operands_match_p (x, y) 2080 rtx x, y; 2081{ 2082 int i; 2083 RTX_CODE code = GET_CODE (x); 2084 const char *fmt; 2085 int success_2; 2086 2087 if (x == y) 2088 return 1; 2089 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2090 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2091 && GET_CODE (SUBREG_REG (y)) == REG))) 2092 { 2093 int j; 2094 2095 if (code == SUBREG) 2096 { 2097 i = REGNO (SUBREG_REG (x)); 2098 if (i >= FIRST_PSEUDO_REGISTER) 2099 goto slow; 2100 i += subreg_regno_offset (REGNO (SUBREG_REG (x)), 2101 GET_MODE (SUBREG_REG (x)), 2102 SUBREG_BYTE (x), 2103 GET_MODE (x)); 2104 } 2105 else 2106 i = REGNO (x); 2107 2108 if (GET_CODE (y) == SUBREG) 2109 { 2110 j = REGNO (SUBREG_REG (y)); 2111 if (j >= FIRST_PSEUDO_REGISTER) 2112 goto slow; 2113 j += subreg_regno_offset (REGNO (SUBREG_REG (y)), 2114 GET_MODE (SUBREG_REG (y)), 2115 SUBREG_BYTE (y), 2116 GET_MODE (y)); 2117 } 2118 else 2119 j = REGNO (y); 2120 2121 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2122 multiple hard register group, so that for example (reg:DI 0) and 2123 (reg:SI 1) will be considered the same register. */ 2124 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2125 && i < FIRST_PSEUDO_REGISTER) 2126 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2127 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2128 && j < FIRST_PSEUDO_REGISTER) 2129 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2130 2131 return i == j; 2132 } 2133 /* If two operands must match, because they are really a single 2134 operand of an assembler insn, then two postincrements are invalid 2135 because the assembler insn would increment only once. 2136 On the other hand, an postincrement matches ordinary indexing 2137 if the postincrement is the output operand. */ 2138 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY) 2139 return operands_match_p (XEXP (x, 0), y); 2140 /* Two preincrements are invalid 2141 because the assembler insn would increment only once. 2142 On the other hand, an preincrement matches ordinary indexing 2143 if the preincrement is the input operand. 2144 In this case, return 2, since some callers need to do special 2145 things when this happens. */ 2146 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC 2147 || GET_CODE (y) == PRE_MODIFY) 2148 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2149 2150 slow: 2151 2152 /* Now we have disposed of all the cases 2153 in which different rtx codes can match. */ 2154 if (code != GET_CODE (y)) 2155 return 0; 2156 if (code == LABEL_REF) 2157 return XEXP (x, 0) == XEXP (y, 0); 2158 if (code == SYMBOL_REF) 2159 return XSTR (x, 0) == XSTR (y, 0); 2160 2161 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2162 2163 if (GET_MODE (x) != GET_MODE (y)) 2164 return 0; 2165 2166 /* Compare the elements. If any pair of corresponding elements 2167 fail to match, return 0 for the whole things. */ 2168 2169 success_2 = 0; 2170 fmt = GET_RTX_FORMAT (code); 2171 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2172 { 2173 int val, j; 2174 switch (fmt[i]) 2175 { 2176 case 'w': 2177 if (XWINT (x, i) != XWINT (y, i)) 2178 return 0; 2179 break; 2180 2181 case 'i': 2182 if (XINT (x, i) != XINT (y, i)) 2183 return 0; 2184 break; 2185 2186 case 'e': 2187 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2188 if (val == 0) 2189 return 0; 2190 /* If any subexpression returns 2, 2191 we should return 2 if we are successful. */ 2192 if (val == 2) 2193 success_2 = 1; 2194 break; 2195 2196 case '0': 2197 break; 2198 2199 case 'E': 2200 if (XVECLEN (x, i) != XVECLEN (y, i)) 2201 return 0; 2202 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2203 { 2204 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2205 if (val == 0) 2206 return 0; 2207 if (val == 2) 2208 success_2 = 1; 2209 } 2210 break; 2211 2212 /* It is believed that rtx's at this level will never 2213 contain anything but integers and other rtx's, 2214 except for within LABEL_REFs and SYMBOL_REFs. */ 2215 default: 2216 abort (); 2217 } 2218 } 2219 return 1 + success_2; 2220} 2221 2222/* Describe the range of registers or memory referenced by X. 2223 If X is a register, set REG_FLAG and put the first register 2224 number into START and the last plus one into END. 2225 If X is a memory reference, put a base address into BASE 2226 and a range of integer offsets into START and END. 2227 If X is pushing on the stack, we can assume it causes no trouble, 2228 so we set the SAFE field. */ 2229 2230static struct decomposition 2231decompose (x) 2232 rtx x; 2233{ 2234 struct decomposition val; 2235 int all_const = 0; 2236 2237 val.reg_flag = 0; 2238 val.safe = 0; 2239 val.base = 0; 2240 if (GET_CODE (x) == MEM) 2241 { 2242 rtx base = NULL_RTX, offset = 0; 2243 rtx addr = XEXP (x, 0); 2244 2245 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2246 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2247 { 2248 val.base = XEXP (addr, 0); 2249 val.start = -GET_MODE_SIZE (GET_MODE (x)); 2250 val.end = GET_MODE_SIZE (GET_MODE (x)); 2251 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2252 return val; 2253 } 2254 2255 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY) 2256 { 2257 if (GET_CODE (XEXP (addr, 1)) == PLUS 2258 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 2259 && CONSTANT_P (XEXP (XEXP (addr, 1), 1))) 2260 { 2261 val.base = XEXP (addr, 0); 2262 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1)); 2263 val.end = INTVAL (XEXP (XEXP (addr, 1), 1)); 2264 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2265 return val; 2266 } 2267 } 2268 2269 if (GET_CODE (addr) == CONST) 2270 { 2271 addr = XEXP (addr, 0); 2272 all_const = 1; 2273 } 2274 if (GET_CODE (addr) == PLUS) 2275 { 2276 if (CONSTANT_P (XEXP (addr, 0))) 2277 { 2278 base = XEXP (addr, 1); 2279 offset = XEXP (addr, 0); 2280 } 2281 else if (CONSTANT_P (XEXP (addr, 1))) 2282 { 2283 base = XEXP (addr, 0); 2284 offset = XEXP (addr, 1); 2285 } 2286 } 2287 2288 if (offset == 0) 2289 { 2290 base = addr; 2291 offset = const0_rtx; 2292 } 2293 if (GET_CODE (offset) == CONST) 2294 offset = XEXP (offset, 0); 2295 if (GET_CODE (offset) == PLUS) 2296 { 2297 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2298 { 2299 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2300 offset = XEXP (offset, 0); 2301 } 2302 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2303 { 2304 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2305 offset = XEXP (offset, 1); 2306 } 2307 else 2308 { 2309 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2310 offset = const0_rtx; 2311 } 2312 } 2313 else if (GET_CODE (offset) != CONST_INT) 2314 { 2315 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2316 offset = const0_rtx; 2317 } 2318 2319 if (all_const && GET_CODE (base) == PLUS) 2320 base = gen_rtx_CONST (GET_MODE (base), base); 2321 2322 if (GET_CODE (offset) != CONST_INT) 2323 abort (); 2324 2325 val.start = INTVAL (offset); 2326 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2327 val.base = base; 2328 return val; 2329 } 2330 else if (GET_CODE (x) == REG) 2331 { 2332 val.reg_flag = 1; 2333 val.start = true_regnum (x); 2334 if (val.start < 0) 2335 { 2336 /* A pseudo with no hard reg. */ 2337 val.start = REGNO (x); 2338 val.end = val.start + 1; 2339 } 2340 else 2341 /* A hard reg. */ 2342 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2343 } 2344 else if (GET_CODE (x) == SUBREG) 2345 { 2346 if (GET_CODE (SUBREG_REG (x)) != REG) 2347 /* This could be more precise, but it's good enough. */ 2348 return decompose (SUBREG_REG (x)); 2349 val.reg_flag = 1; 2350 val.start = true_regnum (x); 2351 if (val.start < 0) 2352 return decompose (SUBREG_REG (x)); 2353 else 2354 /* A hard reg. */ 2355 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2356 } 2357 else if (CONSTANT_P (x) 2358 /* This hasn't been assigned yet, so it can't conflict yet. */ 2359 || GET_CODE (x) == SCRATCH) 2360 val.safe = 1; 2361 else 2362 abort (); 2363 return val; 2364} 2365 2366/* Return 1 if altering Y will not modify the value of X. 2367 Y is also described by YDATA, which should be decompose (Y). */ 2368 2369static int 2370immune_p (x, y, ydata) 2371 rtx x, y; 2372 struct decomposition ydata; 2373{ 2374 struct decomposition xdata; 2375 2376 if (ydata.reg_flag) 2377 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0); 2378 if (ydata.safe) 2379 return 1; 2380 2381 if (GET_CODE (y) != MEM) 2382 abort (); 2383 /* If Y is memory and X is not, Y can't affect X. */ 2384 if (GET_CODE (x) != MEM) 2385 return 1; 2386 2387 xdata = decompose (x); 2388 2389 if (! rtx_equal_p (xdata.base, ydata.base)) 2390 { 2391 /* If bases are distinct symbolic constants, there is no overlap. */ 2392 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2393 return 1; 2394 /* Constants and stack slots never overlap. */ 2395 if (CONSTANT_P (xdata.base) 2396 && (ydata.base == frame_pointer_rtx 2397 || ydata.base == hard_frame_pointer_rtx 2398 || ydata.base == stack_pointer_rtx)) 2399 return 1; 2400 if (CONSTANT_P (ydata.base) 2401 && (xdata.base == frame_pointer_rtx 2402 || xdata.base == hard_frame_pointer_rtx 2403 || xdata.base == stack_pointer_rtx)) 2404 return 1; 2405 /* If either base is variable, we don't know anything. */ 2406 return 0; 2407 } 2408 2409 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2410} 2411 2412/* Similar, but calls decompose. */ 2413 2414int 2415safe_from_earlyclobber (op, clobber) 2416 rtx op, clobber; 2417{ 2418 struct decomposition early_data; 2419 2420 early_data = decompose (clobber); 2421 return immune_p (op, clobber, early_data); 2422} 2423 2424/* Main entry point of this file: search the body of INSN 2425 for values that need reloading and record them with push_reload. 2426 REPLACE nonzero means record also where the values occur 2427 so that subst_reloads can be used. 2428 2429 IND_LEVELS says how many levels of indirection are supported by this 2430 machine; a value of zero means that a memory reference is not a valid 2431 memory address. 2432 2433 LIVE_KNOWN says we have valid information about which hard 2434 regs are live at each point in the program; this is true when 2435 we are called from global_alloc but false when stupid register 2436 allocation has been done. 2437 2438 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2439 which is nonnegative if the reg has been commandeered for reloading into. 2440 It is copied into STATIC_RELOAD_REG_P and referenced from there 2441 by various subroutines. 2442 2443 Return TRUE if some operands need to be changed, because of swapping 2444 commutative operands, reg_equiv_address substitution, or whatever. */ 2445 2446int 2447find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2448 rtx insn; 2449 int replace, ind_levels; 2450 int live_known; 2451 short *reload_reg_p; 2452{ 2453 int insn_code_number; 2454 int i, j; 2455 int noperands; 2456 /* These start out as the constraints for the insn 2457 and they are chewed up as we consider alternatives. */ 2458 char *constraints[MAX_RECOG_OPERANDS]; 2459 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2460 a register. */ 2461 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2462 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2463 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2464 int address_reloaded[MAX_RECOG_OPERANDS]; 2465 /* Value of enum reload_type to use for operand. */ 2466 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2467 /* Value of enum reload_type to use within address of operand. */ 2468 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2469 /* Save the usage of each operand. */ 2470 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2471 int no_input_reloads = 0, no_output_reloads = 0; 2472 int n_alternatives; 2473 int this_alternative[MAX_RECOG_OPERANDS]; 2474 char this_alternative_match_win[MAX_RECOG_OPERANDS]; 2475 char this_alternative_win[MAX_RECOG_OPERANDS]; 2476 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2477 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2478 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2479 int swapped; 2480 int goal_alternative[MAX_RECOG_OPERANDS]; 2481 int this_alternative_number; 2482 int goal_alternative_number = 0; 2483 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2484 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2485 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2486 char goal_alternative_match_win[MAX_RECOG_OPERANDS]; 2487 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2488 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2489 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2490 int goal_alternative_swapped; 2491 int best; 2492 int commutative; 2493 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2494 rtx substed_operand[MAX_RECOG_OPERANDS]; 2495 rtx body = PATTERN (insn); 2496 rtx set = single_set (insn); 2497 int goal_earlyclobber = 0, this_earlyclobber; 2498 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2499 int retval = 0; 2500 2501 this_insn = insn; 2502 n_reloads = 0; 2503 n_replacements = 0; 2504 n_earlyclobbers = 0; 2505 replace_reloads = replace; 2506 hard_regs_live_known = live_known; 2507 static_reload_reg_p = reload_reg_p; 2508 2509 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2510 neither are insns that SET cc0. Insns that use CC0 are not allowed 2511 to have any input reloads. */ 2512 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2513 no_output_reloads = 1; 2514 2515#ifdef HAVE_cc0 2516 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2517 no_input_reloads = 1; 2518 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2519 no_output_reloads = 1; 2520#endif 2521 2522#ifdef SECONDARY_MEMORY_NEEDED 2523 /* The eliminated forms of any secondary memory locations are per-insn, so 2524 clear them out here. */ 2525 2526 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim); 2527#endif 2528 2529 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2530 is cheap to move between them. If it is not, there may not be an insn 2531 to do the copy, so we may need a reload. */ 2532 if (GET_CODE (body) == SET 2533 && GET_CODE (SET_DEST (body)) == REG 2534 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2535 && GET_CODE (SET_SRC (body)) == REG 2536 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2537 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)), 2538 REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2539 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2540 return 0; 2541 2542 extract_insn (insn); 2543 2544 noperands = reload_n_operands = recog_data.n_operands; 2545 n_alternatives = recog_data.n_alternatives; 2546 2547 /* Just return "no reloads" if insn has no operands with constraints. */ 2548 if (noperands == 0 || n_alternatives == 0) 2549 return 0; 2550 2551 insn_code_number = INSN_CODE (insn); 2552 this_insn_is_asm = insn_code_number < 0; 2553 2554 memcpy (operand_mode, recog_data.operand_mode, 2555 noperands * sizeof (enum machine_mode)); 2556 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *)); 2557 2558 commutative = -1; 2559 2560 /* If we will need to know, later, whether some pair of operands 2561 are the same, we must compare them now and save the result. 2562 Reloading the base and index registers will clobber them 2563 and afterward they will fail to match. */ 2564 2565 for (i = 0; i < noperands; i++) 2566 { 2567 char *p; 2568 int c; 2569 2570 substed_operand[i] = recog_data.operand[i]; 2571 p = constraints[i]; 2572 2573 modified[i] = RELOAD_READ; 2574 2575 /* Scan this operand's constraint to see if it is an output operand, 2576 an in-out operand, is commutative, or should match another. */ 2577 2578 while ((c = *p++)) 2579 { 2580 if (c == '=') 2581 modified[i] = RELOAD_WRITE; 2582 else if (c == '+') 2583 modified[i] = RELOAD_READ_WRITE; 2584 else if (c == '%') 2585 { 2586 /* The last operand should not be marked commutative. */ 2587 if (i == noperands - 1) 2588 abort (); 2589 2590 commutative = i; 2591 } 2592 else if (ISDIGIT (c)) 2593 { 2594 c = strtoul (p - 1, &p, 10); 2595 2596 operands_match[c][i] 2597 = operands_match_p (recog_data.operand[c], 2598 recog_data.operand[i]); 2599 2600 /* An operand may not match itself. */ 2601 if (c == i) 2602 abort (); 2603 2604 /* If C can be commuted with C+1, and C might need to match I, 2605 then C+1 might also need to match I. */ 2606 if (commutative >= 0) 2607 { 2608 if (c == commutative || c == commutative + 1) 2609 { 2610 int other = c + (c == commutative ? 1 : -1); 2611 operands_match[other][i] 2612 = operands_match_p (recog_data.operand[other], 2613 recog_data.operand[i]); 2614 } 2615 if (i == commutative || i == commutative + 1) 2616 { 2617 int other = i + (i == commutative ? 1 : -1); 2618 operands_match[c][other] 2619 = operands_match_p (recog_data.operand[c], 2620 recog_data.operand[other]); 2621 } 2622 /* Note that C is supposed to be less than I. 2623 No need to consider altering both C and I because in 2624 that case we would alter one into the other. */ 2625 } 2626 } 2627 } 2628 } 2629 2630 /* Examine each operand that is a memory reference or memory address 2631 and reload parts of the addresses into index registers. 2632 Also here any references to pseudo regs that didn't get hard regs 2633 but are equivalent to constants get replaced in the insn itself 2634 with those constants. Nobody will ever see them again. 2635 2636 Finally, set up the preferred classes of each operand. */ 2637 2638 for (i = 0; i < noperands; i++) 2639 { 2640 RTX_CODE code = GET_CODE (recog_data.operand[i]); 2641 2642 address_reloaded[i] = 0; 2643 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2644 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2645 : RELOAD_OTHER); 2646 address_type[i] 2647 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2648 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2649 : RELOAD_OTHER); 2650 2651 if (*constraints[i] == 0) 2652 /* Ignore things like match_operator operands. */ 2653 ; 2654 else if (constraints[i][0] == 'p') 2655 { 2656 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0, 2657 recog_data.operand[i], 2658 recog_data.operand_loc[i], 2659 i, operand_type[i], ind_levels, insn); 2660 2661 /* If we now have a simple operand where we used to have a 2662 PLUS or MULT, re-recognize and try again. */ 2663 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o' 2664 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2665 && (GET_CODE (recog_data.operand[i]) == MULT 2666 || GET_CODE (recog_data.operand[i]) == PLUS)) 2667 { 2668 INSN_CODE (insn) = -1; 2669 retval = find_reloads (insn, replace, ind_levels, live_known, 2670 reload_reg_p); 2671 return retval; 2672 } 2673 2674 recog_data.operand[i] = *recog_data.operand_loc[i]; 2675 substed_operand[i] = recog_data.operand[i]; 2676 } 2677 else if (code == MEM) 2678 { 2679 address_reloaded[i] 2680 = find_reloads_address (GET_MODE (recog_data.operand[i]), 2681 recog_data.operand_loc[i], 2682 XEXP (recog_data.operand[i], 0), 2683 &XEXP (recog_data.operand[i], 0), 2684 i, address_type[i], ind_levels, insn); 2685 recog_data.operand[i] = *recog_data.operand_loc[i]; 2686 substed_operand[i] = recog_data.operand[i]; 2687 } 2688 else if (code == SUBREG) 2689 { 2690 rtx reg = SUBREG_REG (recog_data.operand[i]); 2691 rtx op 2692 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2693 ind_levels, 2694 set != 0 2695 && &SET_DEST (set) == recog_data.operand_loc[i], 2696 insn, 2697 &address_reloaded[i]); 2698 2699 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2700 that didn't get a hard register, emit a USE with a REG_EQUAL 2701 note in front so that we might inherit a previous, possibly 2702 wider reload. */ 2703 2704 if (replace 2705 && GET_CODE (op) == MEM 2706 && GET_CODE (reg) == REG 2707 && (GET_MODE_SIZE (GET_MODE (reg)) 2708 >= GET_MODE_SIZE (GET_MODE (op)))) 2709 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), 2710 insn), 2711 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]); 2712 2713 substed_operand[i] = recog_data.operand[i] = op; 2714 } 2715 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2716 /* We can get a PLUS as an "operand" as a result of register 2717 elimination. See eliminate_regs and gen_reload. We handle 2718 a unary operator by reloading the operand. */ 2719 substed_operand[i] = recog_data.operand[i] 2720 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2721 ind_levels, 0, insn, 2722 &address_reloaded[i]); 2723 else if (code == REG) 2724 { 2725 /* This is equivalent to calling find_reloads_toplev. 2726 The code is duplicated for speed. 2727 When we find a pseudo always equivalent to a constant, 2728 we replace it by the constant. We must be sure, however, 2729 that we don't try to replace it in the insn in which it 2730 is being set. */ 2731 int regno = REGNO (recog_data.operand[i]); 2732 if (reg_equiv_constant[regno] != 0 2733 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i])) 2734 { 2735 /* Record the existing mode so that the check if constants are 2736 allowed will work when operand_mode isn't specified. */ 2737 2738 if (operand_mode[i] == VOIDmode) 2739 operand_mode[i] = GET_MODE (recog_data.operand[i]); 2740 2741 substed_operand[i] = recog_data.operand[i] 2742 = reg_equiv_constant[regno]; 2743 } 2744 if (reg_equiv_memory_loc[regno] != 0 2745 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2746 /* We need not give a valid is_set_dest argument since the case 2747 of a constant equivalence was checked above. */ 2748 substed_operand[i] = recog_data.operand[i] 2749 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2750 ind_levels, 0, insn, 2751 &address_reloaded[i]); 2752 } 2753 /* If the operand is still a register (we didn't replace it with an 2754 equivalent), get the preferred class to reload it into. */ 2755 code = GET_CODE (recog_data.operand[i]); 2756 preferred_class[i] 2757 = ((code == REG && REGNO (recog_data.operand[i]) 2758 >= FIRST_PSEUDO_REGISTER) 2759 ? reg_preferred_class (REGNO (recog_data.operand[i])) 2760 : NO_REGS); 2761 pref_or_nothing[i] 2762 = (code == REG 2763 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER 2764 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS); 2765 } 2766 2767 /* If this is simply a copy from operand 1 to operand 0, merge the 2768 preferred classes for the operands. */ 2769 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set) 2770 && recog_data.operand[1] == SET_SRC (set)) 2771 { 2772 preferred_class[0] = preferred_class[1] 2773 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2774 pref_or_nothing[0] |= pref_or_nothing[1]; 2775 pref_or_nothing[1] |= pref_or_nothing[0]; 2776 } 2777 2778 /* Now see what we need for pseudo-regs that didn't get hard regs 2779 or got the wrong kind of hard reg. For this, we must consider 2780 all the operands together against the register constraints. */ 2781 2782 best = MAX_RECOG_OPERANDS * 2 + 600; 2783 2784 swapped = 0; 2785 goal_alternative_swapped = 0; 2786 try_swapped: 2787 2788 /* The constraints are made of several alternatives. 2789 Each operand's constraint looks like foo,bar,... with commas 2790 separating the alternatives. The first alternatives for all 2791 operands go together, the second alternatives go together, etc. 2792 2793 First loop over alternatives. */ 2794 2795 for (this_alternative_number = 0; 2796 this_alternative_number < n_alternatives; 2797 this_alternative_number++) 2798 { 2799 /* Loop over operands for one constraint alternative. */ 2800 /* LOSERS counts those that don't fit this alternative 2801 and would require loading. */ 2802 int losers = 0; 2803 /* BAD is set to 1 if it some operand can't fit this alternative 2804 even after reloading. */ 2805 int bad = 0; 2806 /* REJECT is a count of how undesirable this alternative says it is 2807 if any reloading is required. If the alternative matches exactly 2808 then REJECT is ignored, but otherwise it gets this much 2809 counted against it in addition to the reloading needed. Each 2810 ? counts three times here since we want the disparaging caused by 2811 a bad register class to only count 1/3 as much. */ 2812 int reject = 0; 2813 2814 this_earlyclobber = 0; 2815 2816 for (i = 0; i < noperands; i++) 2817 { 2818 char *p = constraints[i]; 2819 int win = 0; 2820 int did_match = 0; 2821 /* 0 => this operand can be reloaded somehow for this alternative. */ 2822 int badop = 1; 2823 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2824 int winreg = 0; 2825 int c; 2826 rtx operand = recog_data.operand[i]; 2827 int offset = 0; 2828 /* Nonzero means this is a MEM that must be reloaded into a reg 2829 regardless of what the constraint says. */ 2830 int force_reload = 0; 2831 int offmemok = 0; 2832 /* Nonzero if a constant forced into memory would be OK for this 2833 operand. */ 2834 int constmemok = 0; 2835 int earlyclobber = 0; 2836 2837 /* If the predicate accepts a unary operator, it means that 2838 we need to reload the operand, but do not do this for 2839 match_operator and friends. */ 2840 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2841 operand = XEXP (operand, 0); 2842 2843 /* If the operand is a SUBREG, extract 2844 the REG or MEM (or maybe even a constant) within. 2845 (Constants can occur as a result of reg_equiv_constant.) */ 2846 2847 while (GET_CODE (operand) == SUBREG) 2848 { 2849 /* Offset only matters when operand is a REG and 2850 it is a hard reg. This is because it is passed 2851 to reg_fits_class_p if it is a REG and all pseudos 2852 return 0 from that function. */ 2853 if (GET_CODE (SUBREG_REG (operand)) == REG 2854 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER) 2855 { 2856 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)), 2857 GET_MODE (SUBREG_REG (operand)), 2858 SUBREG_BYTE (operand), 2859 GET_MODE (operand)); 2860 } 2861 operand = SUBREG_REG (operand); 2862 /* Force reload if this is a constant or PLUS or if there may 2863 be a problem accessing OPERAND in the outer mode. */ 2864 if (CONSTANT_P (operand) 2865 || GET_CODE (operand) == PLUS 2866 /* We must force a reload of paradoxical SUBREGs 2867 of a MEM because the alignment of the inner value 2868 may not be enough to do the outer reference. On 2869 big-endian machines, it may also reference outside 2870 the object. 2871 2872 On machines that extend byte operations and we have a 2873 SUBREG where both the inner and outer modes are no wider 2874 than a word and the inner mode is narrower, is integral, 2875 and gets extended when loaded from memory, combine.c has 2876 made assumptions about the behavior of the machine in such 2877 register access. If the data is, in fact, in memory we 2878 must always load using the size assumed to be in the 2879 register and let the insn do the different-sized 2880 accesses. 2881 2882 This is doubly true if WORD_REGISTER_OPERATIONS. In 2883 this case eliminate_regs has left non-paradoxical 2884 subregs for push_reloads to see. Make sure it does 2885 by forcing the reload. 2886 2887 ??? When is it right at this stage to have a subreg 2888 of a mem that is _not_ to be handled specialy? IMO 2889 those should have been reduced to just a mem. */ 2890 || ((GET_CODE (operand) == MEM 2891 || (GET_CODE (operand)== REG 2892 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2893#ifndef WORD_REGISTER_OPERATIONS 2894 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2895 < BIGGEST_ALIGNMENT) 2896 && (GET_MODE_SIZE (operand_mode[i]) 2897 > GET_MODE_SIZE (GET_MODE (operand)))) 2898 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2899#ifdef LOAD_EXTEND_OP 2900 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2901 && (GET_MODE_SIZE (GET_MODE (operand)) 2902 <= UNITS_PER_WORD) 2903 && (GET_MODE_SIZE (operand_mode[i]) 2904 > GET_MODE_SIZE (GET_MODE (operand))) 2905 && INTEGRAL_MODE_P (GET_MODE (operand)) 2906 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2907#endif 2908 ) 2909#endif 2910 ) 2911 /* This following hunk of code should no longer be 2912 needed at all with SUBREG_BYTE. If you need this 2913 code back, please explain to me why so I can 2914 fix the real problem. -DaveM */ 2915#if 0 2916 /* Subreg of a hard reg which can't handle the subreg's mode 2917 or which would handle that mode in the wrong number of 2918 registers for subregging to work. */ 2919 || (GET_CODE (operand) == REG 2920 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2921 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2922 && (GET_MODE_SIZE (GET_MODE (operand)) 2923 > UNITS_PER_WORD) 2924 && ((GET_MODE_SIZE (GET_MODE (operand)) 2925 / UNITS_PER_WORD) 2926 != HARD_REGNO_NREGS (REGNO (operand), 2927 GET_MODE (operand)))) 2928 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2929 operand_mode[i]))) 2930#endif 2931 ) 2932 force_reload = 1; 2933 } 2934 2935 this_alternative[i] = (int) NO_REGS; 2936 this_alternative_win[i] = 0; 2937 this_alternative_match_win[i] = 0; 2938 this_alternative_offmemok[i] = 0; 2939 this_alternative_earlyclobber[i] = 0; 2940 this_alternative_matches[i] = -1; 2941 2942 /* An empty constraint or empty alternative 2943 allows anything which matched the pattern. */ 2944 if (*p == 0 || *p == ',') 2945 win = 1, badop = 0; 2946 2947 /* Scan this alternative's specs for this operand; 2948 set WIN if the operand fits any letter in this alternative. 2949 Otherwise, clear BADOP if this operand could 2950 fit some letter after reloads, 2951 or set WINREG if this operand could fit after reloads 2952 provided the constraint allows some registers. */ 2953 2954 while (*p && (c = *p++) != ',') 2955 switch (c) 2956 { 2957 case '=': case '+': case '*': 2958 break; 2959 2960 case '%': 2961 /* The last operand should not be marked commutative. */ 2962 if (i != noperands - 1) 2963 commutative = i; 2964 break; 2965 2966 case '?': 2967 reject += 6; 2968 break; 2969 2970 case '!': 2971 reject = 600; 2972 break; 2973 2974 case '#': 2975 /* Ignore rest of this alternative as far as 2976 reloading is concerned. */ 2977 while (*p && *p != ',') 2978 p++; 2979 break; 2980 2981 case '0': case '1': case '2': case '3': case '4': 2982 case '5': case '6': case '7': case '8': case '9': 2983 c = strtoul (p - 1, &p, 10); 2984 2985 this_alternative_matches[i] = c; 2986 /* We are supposed to match a previous operand. 2987 If we do, we win if that one did. 2988 If we do not, count both of the operands as losers. 2989 (This is too conservative, since most of the time 2990 only a single reload insn will be needed to make 2991 the two operands win. As a result, this alternative 2992 may be rejected when it is actually desirable.) */ 2993 if ((swapped && (c != commutative || i != commutative + 1)) 2994 /* If we are matching as if two operands were swapped, 2995 also pretend that operands_match had been computed 2996 with swapped. 2997 But if I is the second of those and C is the first, 2998 don't exchange them, because operands_match is valid 2999 only on one side of its diagonal. */ 3000 ? (operands_match 3001 [(c == commutative || c == commutative + 1) 3002 ? 2 * commutative + 1 - c : c] 3003 [(i == commutative || i == commutative + 1) 3004 ? 2 * commutative + 1 - i : i]) 3005 : operands_match[c][i]) 3006 { 3007 /* If we are matching a non-offsettable address where an 3008 offsettable address was expected, then we must reject 3009 this combination, because we can't reload it. */ 3010 if (this_alternative_offmemok[c] 3011 && GET_CODE (recog_data.operand[c]) == MEM 3012 && this_alternative[c] == (int) NO_REGS 3013 && ! this_alternative_win[c]) 3014 bad = 1; 3015 3016 did_match = this_alternative_win[c]; 3017 } 3018 else 3019 { 3020 /* Operands don't match. */ 3021 rtx value; 3022 /* Retroactively mark the operand we had to match 3023 as a loser, if it wasn't already. */ 3024 if (this_alternative_win[c]) 3025 losers++; 3026 this_alternative_win[c] = 0; 3027 if (this_alternative[c] == (int) NO_REGS) 3028 bad = 1; 3029 /* But count the pair only once in the total badness of 3030 this alternative, if the pair can be a dummy reload. */ 3031 value 3032 = find_dummy_reload (recog_data.operand[i], 3033 recog_data.operand[c], 3034 recog_data.operand_loc[i], 3035 recog_data.operand_loc[c], 3036 operand_mode[i], operand_mode[c], 3037 this_alternative[c], -1, 3038 this_alternative_earlyclobber[c]); 3039 3040 if (value != 0) 3041 losers--; 3042 } 3043 /* This can be fixed with reloads if the operand 3044 we are supposed to match can be fixed with reloads. */ 3045 badop = 0; 3046 this_alternative[i] = this_alternative[c]; 3047 3048 /* If we have to reload this operand and some previous 3049 operand also had to match the same thing as this 3050 operand, we don't know how to do that. So reject this 3051 alternative. */ 3052 if (! did_match || force_reload) 3053 for (j = 0; j < i; j++) 3054 if (this_alternative_matches[j] 3055 == this_alternative_matches[i]) 3056 badop = 1; 3057 break; 3058 3059 case 'p': 3060 /* All necessary reloads for an address_operand 3061 were handled in find_reloads_address. */ 3062 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode); 3063 win = 1; 3064 badop = 0; 3065 break; 3066 3067 case 'm': 3068 if (force_reload) 3069 break; 3070 if (GET_CODE (operand) == MEM 3071 || (GET_CODE (operand) == REG 3072 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3073 && reg_renumber[REGNO (operand)] < 0)) 3074 win = 1; 3075 if (CONSTANT_P (operand) 3076 /* force_const_mem does not accept HIGH. */ 3077 && GET_CODE (operand) != HIGH) 3078 badop = 0; 3079 constmemok = 1; 3080 break; 3081 3082 case '<': 3083 if (GET_CODE (operand) == MEM 3084 && ! address_reloaded[i] 3085 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3086 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3087 win = 1; 3088 break; 3089 3090 case '>': 3091 if (GET_CODE (operand) == MEM 3092 && ! address_reloaded[i] 3093 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3094 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3095 win = 1; 3096 break; 3097 3098 /* Memory operand whose address is not offsettable. */ 3099 case 'V': 3100 if (force_reload) 3101 break; 3102 if (GET_CODE (operand) == MEM 3103 && ! (ind_levels ? offsettable_memref_p (operand) 3104 : offsettable_nonstrict_memref_p (operand)) 3105 /* Certain mem addresses will become offsettable 3106 after they themselves are reloaded. This is important; 3107 we don't want our own handling of unoffsettables 3108 to override the handling of reg_equiv_address. */ 3109 && !(GET_CODE (XEXP (operand, 0)) == REG 3110 && (ind_levels == 0 3111 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3112 win = 1; 3113 break; 3114 3115 /* Memory operand whose address is offsettable. */ 3116 case 'o': 3117 if (force_reload) 3118 break; 3119 if ((GET_CODE (operand) == MEM 3120 /* If IND_LEVELS, find_reloads_address won't reload a 3121 pseudo that didn't get a hard reg, so we have to 3122 reject that case. */ 3123 && ((ind_levels ? offsettable_memref_p (operand) 3124 : offsettable_nonstrict_memref_p (operand)) 3125 /* A reloaded address is offsettable because it is now 3126 just a simple register indirect. */ 3127 || address_reloaded[i])) 3128 || (GET_CODE (operand) == REG 3129 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3130 && reg_renumber[REGNO (operand)] < 0 3131 /* If reg_equiv_address is nonzero, we will be 3132 loading it into a register; hence it will be 3133 offsettable, but we cannot say that reg_equiv_mem 3134 is offsettable without checking. */ 3135 && ((reg_equiv_mem[REGNO (operand)] != 0 3136 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3137 || (reg_equiv_address[REGNO (operand)] != 0)))) 3138 win = 1; 3139 /* force_const_mem does not accept HIGH. */ 3140 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3141 || GET_CODE (operand) == MEM) 3142 badop = 0; 3143 constmemok = 1; 3144 offmemok = 1; 3145 break; 3146 3147 case '&': 3148 /* Output operand that is stored before the need for the 3149 input operands (and their index registers) is over. */ 3150 earlyclobber = 1, this_earlyclobber = 1; 3151 break; 3152 3153 case 'E': 3154#ifndef REAL_ARITHMETIC 3155 /* Match any floating double constant, but only if 3156 we can examine the bits of it reliably. */ 3157 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3158 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3159 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3160 break; 3161#endif 3162 if (GET_CODE (operand) == CONST_DOUBLE) 3163 win = 1; 3164 break; 3165 3166 case 'F': 3167 if (GET_CODE (operand) == CONST_DOUBLE) 3168 win = 1; 3169 break; 3170 3171 case 'G': 3172 case 'H': 3173 if (GET_CODE (operand) == CONST_DOUBLE 3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3175 win = 1; 3176 break; 3177 3178 case 's': 3179 if (GET_CODE (operand) == CONST_INT 3180 || (GET_CODE (operand) == CONST_DOUBLE 3181 && GET_MODE (operand) == VOIDmode)) 3182 break; 3183 case 'i': 3184 if (CONSTANT_P (operand) 3185#ifdef LEGITIMATE_PIC_OPERAND_P 3186 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3187#endif 3188 ) 3189 win = 1; 3190 break; 3191 3192 case 'n': 3193 if (GET_CODE (operand) == CONST_INT 3194 || (GET_CODE (operand) == CONST_DOUBLE 3195 && GET_MODE (operand) == VOIDmode)) 3196 win = 1; 3197 break; 3198 3199 case 'I': 3200 case 'J': 3201 case 'K': 3202 case 'L': 3203 case 'M': 3204 case 'N': 3205 case 'O': 3206 case 'P': 3207 if (GET_CODE (operand) == CONST_INT 3208 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3209 win = 1; 3210 break; 3211 3212 case 'X': 3213 win = 1; 3214 break; 3215 3216 case 'g': 3217 if (! force_reload 3218 /* A PLUS is never a valid operand, but reload can make 3219 it from a register when eliminating registers. */ 3220 && GET_CODE (operand) != PLUS 3221 /* A SCRATCH is not a valid operand. */ 3222 && GET_CODE (operand) != SCRATCH 3223#ifdef LEGITIMATE_PIC_OPERAND_P 3224 && (! CONSTANT_P (operand) 3225 || ! flag_pic 3226 || LEGITIMATE_PIC_OPERAND_P (operand)) 3227#endif 3228 && (GENERAL_REGS == ALL_REGS 3229 || GET_CODE (operand) != REG 3230 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3231 && reg_renumber[REGNO (operand)] < 0))) 3232 win = 1; 3233 /* Drop through into 'r' case. */ 3234 3235 case 'r': 3236 this_alternative[i] 3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3238 goto reg; 3239 3240 default: 3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS) 3242 { 3243#ifdef EXTRA_CONSTRAINT 3244 if (EXTRA_CONSTRAINT (operand, c)) 3245 win = 1; 3246#endif 3247 break; 3248 } 3249 3250 this_alternative[i] 3251 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3252 reg: 3253 if (GET_MODE (operand) == BLKmode) 3254 break; 3255 winreg = 1; 3256 if (GET_CODE (operand) == REG 3257 && reg_fits_class_p (operand, this_alternative[i], 3258 offset, GET_MODE (recog_data.operand[i]))) 3259 win = 1; 3260 break; 3261 } 3262 3263 constraints[i] = p; 3264 3265 /* If this operand could be handled with a reg, 3266 and some reg is allowed, then this operand can be handled. */ 3267 if (winreg && this_alternative[i] != (int) NO_REGS) 3268 badop = 0; 3269 3270 /* Record which operands fit this alternative. */ 3271 this_alternative_earlyclobber[i] = earlyclobber; 3272 if (win && ! force_reload) 3273 this_alternative_win[i] = 1; 3274 else if (did_match && ! force_reload) 3275 this_alternative_match_win[i] = 1; 3276 else 3277 { 3278 int const_to_mem = 0; 3279 3280 this_alternative_offmemok[i] = offmemok; 3281 losers++; 3282 if (badop) 3283 bad = 1; 3284 /* Alternative loses if it has no regs for a reg operand. */ 3285 if (GET_CODE (operand) == REG 3286 && this_alternative[i] == (int) NO_REGS 3287 && this_alternative_matches[i] < 0) 3288 bad = 1; 3289 3290 /* If this is a constant that is reloaded into the desired 3291 class by copying it to memory first, count that as another 3292 reload. This is consistent with other code and is 3293 required to avoid choosing another alternative when 3294 the constant is moved into memory by this function on 3295 an early reload pass. Note that the test here is 3296 precisely the same as in the code below that calls 3297 force_const_mem. */ 3298 if (CONSTANT_P (operand) 3299 /* force_const_mem does not accept HIGH. */ 3300 && GET_CODE (operand) != HIGH 3301 && ((PREFERRED_RELOAD_CLASS (operand, 3302 (enum reg_class) this_alternative[i]) 3303 == NO_REGS) 3304 || no_input_reloads) 3305 && operand_mode[i] != VOIDmode) 3306 { 3307 const_to_mem = 1; 3308 if (this_alternative[i] != (int) NO_REGS) 3309 losers++; 3310 } 3311 3312 /* If we can't reload this value at all, reject this 3313 alternative. Note that we could also lose due to 3314 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3315 here. */ 3316 3317 if (! CONSTANT_P (operand) 3318 && (enum reg_class) this_alternative[i] != NO_REGS 3319 && (PREFERRED_RELOAD_CLASS (operand, 3320 (enum reg_class) this_alternative[i]) 3321 == NO_REGS)) 3322 bad = 1; 3323 3324 /* Alternative loses if it requires a type of reload not 3325 permitted for this insn. We can always reload SCRATCH 3326 and objects with a REG_UNUSED note. */ 3327 else if (GET_CODE (operand) != SCRATCH 3328 && modified[i] != RELOAD_READ && no_output_reloads 3329 && ! find_reg_note (insn, REG_UNUSED, operand)) 3330 bad = 1; 3331 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3332 && ! const_to_mem) 3333 bad = 1; 3334 3335 /* We prefer to reload pseudos over reloading other things, 3336 since such reloads may be able to be eliminated later. 3337 If we are reloading a SCRATCH, we won't be generating any 3338 insns, just using a register, so it is also preferred. 3339 So bump REJECT in other cases. Don't do this in the 3340 case where we are forcing a constant into memory and 3341 it will then win since we don't want to have a different 3342 alternative match then. */ 3343 if (! (GET_CODE (operand) == REG 3344 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3345 && GET_CODE (operand) != SCRATCH 3346 && ! (const_to_mem && constmemok)) 3347 reject += 2; 3348 3349 /* Input reloads can be inherited more often than output 3350 reloads can be removed, so penalize output reloads. */ 3351 if (operand_type[i] != RELOAD_FOR_INPUT 3352 && GET_CODE (operand) != SCRATCH) 3353 reject++; 3354 } 3355 3356 /* If this operand is a pseudo register that didn't get a hard 3357 reg and this alternative accepts some register, see if the 3358 class that we want is a subset of the preferred class for this 3359 register. If not, but it intersects that class, use the 3360 preferred class instead. If it does not intersect the preferred 3361 class, show that usage of this alternative should be discouraged; 3362 it will be discouraged more still if the register is `preferred 3363 or nothing'. We do this because it increases the chance of 3364 reusing our spill register in a later insn and avoiding a pair 3365 of memory stores and loads. 3366 3367 Don't bother with this if this alternative will accept this 3368 operand. 3369 3370 Don't do this for a multiword operand, since it is only a 3371 small win and has the risk of requiring more spill registers, 3372 which could cause a large loss. 3373 3374 Don't do this if the preferred class has only one register 3375 because we might otherwise exhaust the class. */ 3376 3377 if (! win && ! did_match 3378 && this_alternative[i] != (int) NO_REGS 3379 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3380 && reg_class_size[(int) preferred_class[i]] > 1) 3381 { 3382 if (! reg_class_subset_p (this_alternative[i], 3383 preferred_class[i])) 3384 { 3385 /* Since we don't have a way of forming the intersection, 3386 we just do something special if the preferred class 3387 is a subset of the class we have; that's the most 3388 common case anyway. */ 3389 if (reg_class_subset_p (preferred_class[i], 3390 this_alternative[i])) 3391 this_alternative[i] = (int) preferred_class[i]; 3392 else 3393 reject += (2 + 2 * pref_or_nothing[i]); 3394 } 3395 } 3396 } 3397 3398 /* Now see if any output operands that are marked "earlyclobber" 3399 in this alternative conflict with any input operands 3400 or any memory addresses. */ 3401 3402 for (i = 0; i < noperands; i++) 3403 if (this_alternative_earlyclobber[i] 3404 && (this_alternative_win[i] || this_alternative_match_win[i])) 3405 { 3406 struct decomposition early_data; 3407 3408 early_data = decompose (recog_data.operand[i]); 3409 3410 if (modified[i] == RELOAD_READ) 3411 abort (); 3412 3413 if (this_alternative[i] == NO_REGS) 3414 { 3415 this_alternative_earlyclobber[i] = 0; 3416 if (this_insn_is_asm) 3417 error_for_asm (this_insn, 3418 "`&' constraint used with no register class"); 3419 else 3420 abort (); 3421 } 3422 3423 for (j = 0; j < noperands; j++) 3424 /* Is this an input operand or a memory ref? */ 3425 if ((GET_CODE (recog_data.operand[j]) == MEM 3426 || modified[j] != RELOAD_WRITE) 3427 && j != i 3428 /* Ignore things like match_operator operands. */ 3429 && *recog_data.constraints[j] != 0 3430 /* Don't count an input operand that is constrained to match 3431 the early clobber operand. */ 3432 && ! (this_alternative_matches[j] == i 3433 && rtx_equal_p (recog_data.operand[i], 3434 recog_data.operand[j])) 3435 /* Is it altered by storing the earlyclobber operand? */ 3436 && !immune_p (recog_data.operand[j], recog_data.operand[i], 3437 early_data)) 3438 { 3439 /* If the output is in a single-reg class, 3440 it's costly to reload it, so reload the input instead. */ 3441 if (reg_class_size[this_alternative[i]] == 1 3442 && (GET_CODE (recog_data.operand[j]) == REG 3443 || GET_CODE (recog_data.operand[j]) == SUBREG)) 3444 { 3445 losers++; 3446 this_alternative_win[j] = 0; 3447 this_alternative_match_win[j] = 0; 3448 } 3449 else 3450 break; 3451 } 3452 /* If an earlyclobber operand conflicts with something, 3453 it must be reloaded, so request this and count the cost. */ 3454 if (j != noperands) 3455 { 3456 losers++; 3457 this_alternative_win[i] = 0; 3458 this_alternative_match_win[j] = 0; 3459 for (j = 0; j < noperands; j++) 3460 if (this_alternative_matches[j] == i 3461 && this_alternative_match_win[j]) 3462 { 3463 this_alternative_win[j] = 0; 3464 this_alternative_match_win[j] = 0; 3465 losers++; 3466 } 3467 } 3468 } 3469 3470 /* If one alternative accepts all the operands, no reload required, 3471 choose that alternative; don't consider the remaining ones. */ 3472 if (losers == 0) 3473 { 3474 /* Unswap these so that they are never swapped at `finish'. */ 3475 if (commutative >= 0) 3476 { 3477 recog_data.operand[commutative] = substed_operand[commutative]; 3478 recog_data.operand[commutative + 1] 3479 = substed_operand[commutative + 1]; 3480 } 3481 for (i = 0; i < noperands; i++) 3482 { 3483 goal_alternative_win[i] = this_alternative_win[i]; 3484 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3485 goal_alternative[i] = this_alternative[i]; 3486 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3487 goal_alternative_matches[i] = this_alternative_matches[i]; 3488 goal_alternative_earlyclobber[i] 3489 = this_alternative_earlyclobber[i]; 3490 } 3491 goal_alternative_number = this_alternative_number; 3492 goal_alternative_swapped = swapped; 3493 goal_earlyclobber = this_earlyclobber; 3494 goto finish; 3495 } 3496 3497 /* REJECT, set by the ! and ? constraint characters and when a register 3498 would be reloaded into a non-preferred class, discourages the use of 3499 this alternative for a reload goal. REJECT is incremented by six 3500 for each ? and two for each non-preferred class. */ 3501 losers = losers * 6 + reject; 3502 3503 /* If this alternative can be made to work by reloading, 3504 and it needs less reloading than the others checked so far, 3505 record it as the chosen goal for reloading. */ 3506 if (! bad && best > losers) 3507 { 3508 for (i = 0; i < noperands; i++) 3509 { 3510 goal_alternative[i] = this_alternative[i]; 3511 goal_alternative_win[i] = this_alternative_win[i]; 3512 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3513 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3514 goal_alternative_matches[i] = this_alternative_matches[i]; 3515 goal_alternative_earlyclobber[i] 3516 = this_alternative_earlyclobber[i]; 3517 } 3518 goal_alternative_swapped = swapped; 3519 best = losers; 3520 goal_alternative_number = this_alternative_number; 3521 goal_earlyclobber = this_earlyclobber; 3522 } 3523 } 3524 3525 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3526 then we need to try each alternative twice, 3527 the second time matching those two operands 3528 as if we had exchanged them. 3529 To do this, really exchange them in operands. 3530 3531 If we have just tried the alternatives the second time, 3532 return operands to normal and drop through. */ 3533 3534 if (commutative >= 0) 3535 { 3536 swapped = !swapped; 3537 if (swapped) 3538 { 3539 enum reg_class tclass; 3540 int t; 3541 3542 recog_data.operand[commutative] = substed_operand[commutative + 1]; 3543 recog_data.operand[commutative + 1] = substed_operand[commutative]; 3544 /* Swap the duplicates too. */ 3545 for (i = 0; i < recog_data.n_dups; i++) 3546 if (recog_data.dup_num[i] == commutative 3547 || recog_data.dup_num[i] == commutative + 1) 3548 *recog_data.dup_loc[i] 3549 = recog_data.operand[(int) recog_data.dup_num[i]]; 3550 3551 tclass = preferred_class[commutative]; 3552 preferred_class[commutative] = preferred_class[commutative + 1]; 3553 preferred_class[commutative + 1] = tclass; 3554 3555 t = pref_or_nothing[commutative]; 3556 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3557 pref_or_nothing[commutative + 1] = t; 3558 3559 memcpy (constraints, recog_data.constraints, 3560 noperands * sizeof (char *)); 3561 goto try_swapped; 3562 } 3563 else 3564 { 3565 recog_data.operand[commutative] = substed_operand[commutative]; 3566 recog_data.operand[commutative + 1] 3567 = substed_operand[commutative + 1]; 3568 /* Unswap the duplicates too. */ 3569 for (i = 0; i < recog_data.n_dups; i++) 3570 if (recog_data.dup_num[i] == commutative 3571 || recog_data.dup_num[i] == commutative + 1) 3572 *recog_data.dup_loc[i] 3573 = recog_data.operand[(int) recog_data.dup_num[i]]; 3574 } 3575 } 3576 3577 /* The operands don't meet the constraints. 3578 goal_alternative describes the alternative 3579 that we could reach by reloading the fewest operands. 3580 Reload so as to fit it. */ 3581 3582 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3583 { 3584 /* No alternative works with reloads?? */ 3585 if (insn_code_number >= 0) 3586 fatal_insn ("unable to generate reloads for:", insn); 3587 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3588 /* Avoid further trouble with this insn. */ 3589 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3590 n_reloads = 0; 3591 return 0; 3592 } 3593 3594 /* Jump to `finish' from above if all operands are valid already. 3595 In that case, goal_alternative_win is all 1. */ 3596 finish: 3597 3598 /* Right now, for any pair of operands I and J that are required to match, 3599 with I < J, 3600 goal_alternative_matches[J] is I. 3601 Set up goal_alternative_matched as the inverse function: 3602 goal_alternative_matched[I] = J. */ 3603 3604 for (i = 0; i < noperands; i++) 3605 goal_alternative_matched[i] = -1; 3606 3607 for (i = 0; i < noperands; i++) 3608 if (! goal_alternative_win[i] 3609 && goal_alternative_matches[i] >= 0) 3610 goal_alternative_matched[goal_alternative_matches[i]] = i; 3611 3612 for (i = 0; i < noperands; i++) 3613 goal_alternative_win[i] |= goal_alternative_match_win[i]; 3614 3615 /* If the best alternative is with operands 1 and 2 swapped, 3616 consider them swapped before reporting the reloads. Update the 3617 operand numbers of any reloads already pushed. */ 3618 3619 if (goal_alternative_swapped) 3620 { 3621 rtx tem; 3622 3623 tem = substed_operand[commutative]; 3624 substed_operand[commutative] = substed_operand[commutative + 1]; 3625 substed_operand[commutative + 1] = tem; 3626 tem = recog_data.operand[commutative]; 3627 recog_data.operand[commutative] = recog_data.operand[commutative + 1]; 3628 recog_data.operand[commutative + 1] = tem; 3629 tem = *recog_data.operand_loc[commutative]; 3630 *recog_data.operand_loc[commutative] 3631 = *recog_data.operand_loc[commutative + 1]; 3632 *recog_data.operand_loc[commutative + 1] = tem; 3633 3634 for (i = 0; i < n_reloads; i++) 3635 { 3636 if (rld[i].opnum == commutative) 3637 rld[i].opnum = commutative + 1; 3638 else if (rld[i].opnum == commutative + 1) 3639 rld[i].opnum = commutative; 3640 } 3641 } 3642 3643 for (i = 0; i < noperands; i++) 3644 { 3645 operand_reloadnum[i] = -1; 3646 3647 /* If this is an earlyclobber operand, we need to widen the scope. 3648 The reload must remain valid from the start of the insn being 3649 reloaded until after the operand is stored into its destination. 3650 We approximate this with RELOAD_OTHER even though we know that we 3651 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3652 3653 One special case that is worth checking is when we have an 3654 output that is earlyclobber but isn't used past the insn (typically 3655 a SCRATCH). In this case, we only need have the reload live 3656 through the insn itself, but not for any of our input or output 3657 reloads. 3658 But we must not accidentally narrow the scope of an existing 3659 RELOAD_OTHER reload - leave these alone. 3660 3661 In any case, anything needed to address this operand can remain 3662 however they were previously categorized. */ 3663 3664 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3665 operand_type[i] 3666 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i]) 3667 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3668 } 3669 3670 /* Any constants that aren't allowed and can't be reloaded 3671 into registers are here changed into memory references. */ 3672 for (i = 0; i < noperands; i++) 3673 if (! goal_alternative_win[i] 3674 && CONSTANT_P (recog_data.operand[i]) 3675 /* force_const_mem does not accept HIGH. */ 3676 && GET_CODE (recog_data.operand[i]) != HIGH 3677 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i], 3678 (enum reg_class) goal_alternative[i]) 3679 == NO_REGS) 3680 || no_input_reloads) 3681 && operand_mode[i] != VOIDmode) 3682 { 3683 substed_operand[i] = recog_data.operand[i] 3684 = find_reloads_toplev (force_const_mem (operand_mode[i], 3685 recog_data.operand[i]), 3686 i, address_type[i], ind_levels, 0, insn, 3687 NULL); 3688 if (alternative_allows_memconst (recog_data.constraints[i], 3689 goal_alternative_number)) 3690 goal_alternative_win[i] = 1; 3691 } 3692 3693 /* Record the values of the earlyclobber operands for the caller. */ 3694 if (goal_earlyclobber) 3695 for (i = 0; i < noperands; i++) 3696 if (goal_alternative_earlyclobber[i]) 3697 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i]; 3698 3699 /* Now record reloads for all the operands that need them. */ 3700 for (i = 0; i < noperands; i++) 3701 if (! goal_alternative_win[i]) 3702 { 3703 /* Operands that match previous ones have already been handled. */ 3704 if (goal_alternative_matches[i] >= 0) 3705 ; 3706 /* Handle an operand with a nonoffsettable address 3707 appearing where an offsettable address will do 3708 by reloading the address into a base register. 3709 3710 ??? We can also do this when the operand is a register and 3711 reg_equiv_mem is not offsettable, but this is a bit tricky, 3712 so we don't bother with it. It may not be worth doing. */ 3713 else if (goal_alternative_matched[i] == -1 3714 && goal_alternative_offmemok[i] 3715 && GET_CODE (recog_data.operand[i]) == MEM) 3716 { 3717 operand_reloadnum[i] 3718 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX, 3719 &XEXP (recog_data.operand[i], 0), (rtx*) 0, 3720 MODE_BASE_REG_CLASS (VOIDmode), 3721 GET_MODE (XEXP (recog_data.operand[i], 0)), 3722 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3723 rld[operand_reloadnum[i]].inc 3724 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i])); 3725 3726 /* If this operand is an output, we will have made any 3727 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3728 now we are treating part of the operand as an input, so 3729 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3730 3731 if (modified[i] == RELOAD_WRITE) 3732 { 3733 for (j = 0; j < n_reloads; j++) 3734 { 3735 if (rld[j].opnum == i) 3736 { 3737 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS) 3738 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS; 3739 else if (rld[j].when_needed 3740 == RELOAD_FOR_OUTADDR_ADDRESS) 3741 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS; 3742 } 3743 } 3744 } 3745 } 3746 else if (goal_alternative_matched[i] == -1) 3747 { 3748 operand_reloadnum[i] 3749 = push_reload ((modified[i] != RELOAD_WRITE 3750 ? recog_data.operand[i] : 0), 3751 (modified[i] != RELOAD_READ 3752 ? recog_data.operand[i] : 0), 3753 (modified[i] != RELOAD_WRITE 3754 ? recog_data.operand_loc[i] : 0), 3755 (modified[i] != RELOAD_READ 3756 ? recog_data.operand_loc[i] : 0), 3757 (enum reg_class) goal_alternative[i], 3758 (modified[i] == RELOAD_WRITE 3759 ? VOIDmode : operand_mode[i]), 3760 (modified[i] == RELOAD_READ 3761 ? VOIDmode : operand_mode[i]), 3762 (insn_code_number < 0 ? 0 3763 : insn_data[insn_code_number].operand[i].strict_low), 3764 0, i, operand_type[i]); 3765 } 3766 /* In a matching pair of operands, one must be input only 3767 and the other must be output only. 3768 Pass the input operand as IN and the other as OUT. */ 3769 else if (modified[i] == RELOAD_READ 3770 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3771 { 3772 operand_reloadnum[i] 3773 = push_reload (recog_data.operand[i], 3774 recog_data.operand[goal_alternative_matched[i]], 3775 recog_data.operand_loc[i], 3776 recog_data.operand_loc[goal_alternative_matched[i]], 3777 (enum reg_class) goal_alternative[i], 3778 operand_mode[i], 3779 operand_mode[goal_alternative_matched[i]], 3780 0, 0, i, RELOAD_OTHER); 3781 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3782 } 3783 else if (modified[i] == RELOAD_WRITE 3784 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3785 { 3786 operand_reloadnum[goal_alternative_matched[i]] 3787 = push_reload (recog_data.operand[goal_alternative_matched[i]], 3788 recog_data.operand[i], 3789 recog_data.operand_loc[goal_alternative_matched[i]], 3790 recog_data.operand_loc[i], 3791 (enum reg_class) goal_alternative[i], 3792 operand_mode[goal_alternative_matched[i]], 3793 operand_mode[i], 3794 0, 0, i, RELOAD_OTHER); 3795 operand_reloadnum[i] = output_reloadnum; 3796 } 3797 else if (insn_code_number >= 0) 3798 abort (); 3799 else 3800 { 3801 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3802 /* Avoid further trouble with this insn. */ 3803 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3804 n_reloads = 0; 3805 return 0; 3806 } 3807 } 3808 else if (goal_alternative_matched[i] < 0 3809 && goal_alternative_matches[i] < 0 3810 && optimize) 3811 { 3812 /* For each non-matching operand that's a MEM or a pseudo-register 3813 that didn't get a hard register, make an optional reload. 3814 This may get done even if the insn needs no reloads otherwise. */ 3815 3816 rtx operand = recog_data.operand[i]; 3817 3818 while (GET_CODE (operand) == SUBREG) 3819 operand = SUBREG_REG (operand); 3820 if ((GET_CODE (operand) == MEM 3821 || (GET_CODE (operand) == REG 3822 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3823 /* If this is only for an output, the optional reload would not 3824 actually cause us to use a register now, just note that 3825 something is stored here. */ 3826 && ((enum reg_class) goal_alternative[i] != NO_REGS 3827 || modified[i] == RELOAD_WRITE) 3828 && ! no_input_reloads 3829 /* An optional output reload might allow to delete INSN later. 3830 We mustn't make in-out reloads on insns that are not permitted 3831 output reloads. 3832 If this is an asm, we can't delete it; we must not even call 3833 push_reload for an optional output reload in this case, 3834 because we can't be sure that the constraint allows a register, 3835 and push_reload verifies the constraints for asms. */ 3836 && (modified[i] == RELOAD_READ 3837 || (! no_output_reloads && ! this_insn_is_asm))) 3838 operand_reloadnum[i] 3839 = push_reload ((modified[i] != RELOAD_WRITE 3840 ? recog_data.operand[i] : 0), 3841 (modified[i] != RELOAD_READ 3842 ? recog_data.operand[i] : 0), 3843 (modified[i] != RELOAD_WRITE 3844 ? recog_data.operand_loc[i] : 0), 3845 (modified[i] != RELOAD_READ 3846 ? recog_data.operand_loc[i] : 0), 3847 (enum reg_class) goal_alternative[i], 3848 (modified[i] == RELOAD_WRITE 3849 ? VOIDmode : operand_mode[i]), 3850 (modified[i] == RELOAD_READ 3851 ? VOIDmode : operand_mode[i]), 3852 (insn_code_number < 0 ? 0 3853 : insn_data[insn_code_number].operand[i].strict_low), 3854 1, i, operand_type[i]); 3855 /* If a memory reference remains (either as a MEM or a pseudo that 3856 did not get a hard register), yet we can't make an optional 3857 reload, check if this is actually a pseudo register reference; 3858 we then need to emit a USE and/or a CLOBBER so that reload 3859 inheritance will do the right thing. */ 3860 else if (replace 3861 && (GET_CODE (operand) == MEM 3862 || (GET_CODE (operand) == REG 3863 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3864 && reg_renumber [REGNO (operand)] < 0))) 3865 { 3866 operand = *recog_data.operand_loc[i]; 3867 3868 while (GET_CODE (operand) == SUBREG) 3869 operand = SUBREG_REG (operand); 3870 if (GET_CODE (operand) == REG) 3871 { 3872 if (modified[i] != RELOAD_WRITE) 3873 /* We mark the USE with QImode so that we recognize 3874 it as one that can be safely deleted at the end 3875 of reload. */ 3876 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand), 3877 insn), QImode); 3878 if (modified[i] != RELOAD_READ) 3879 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3880 } 3881 } 3882 } 3883 else if (goal_alternative_matches[i] >= 0 3884 && goal_alternative_win[goal_alternative_matches[i]] 3885 && modified[i] == RELOAD_READ 3886 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3887 && ! no_input_reloads && ! no_output_reloads 3888 && optimize) 3889 { 3890 /* Similarly, make an optional reload for a pair of matching 3891 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3892 3893 rtx operand = recog_data.operand[i]; 3894 3895 while (GET_CODE (operand) == SUBREG) 3896 operand = SUBREG_REG (operand); 3897 if ((GET_CODE (operand) == MEM 3898 || (GET_CODE (operand) == REG 3899 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3900 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3901 != NO_REGS)) 3902 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3903 = push_reload (recog_data.operand[goal_alternative_matches[i]], 3904 recog_data.operand[i], 3905 recog_data.operand_loc[goal_alternative_matches[i]], 3906 recog_data.operand_loc[i], 3907 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3908 operand_mode[goal_alternative_matches[i]], 3909 operand_mode[i], 3910 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3911 } 3912 3913 /* Perform whatever substitutions on the operands we are supposed 3914 to make due to commutativity or replacement of registers 3915 with equivalent constants or memory slots. */ 3916 3917 for (i = 0; i < noperands; i++) 3918 { 3919 /* We only do this on the last pass through reload, because it is 3920 possible for some data (like reg_equiv_address) to be changed during 3921 later passes. Moreover, we loose the opportunity to get a useful 3922 reload_{in,out}_reg when we do these replacements. */ 3923 3924 if (replace) 3925 { 3926 rtx substitution = substed_operand[i]; 3927 3928 *recog_data.operand_loc[i] = substitution; 3929 3930 /* If we're replacing an operand with a LABEL_REF, we need 3931 to make sure that there's a REG_LABEL note attached to 3932 this instruction. */ 3933 if (GET_CODE (insn) != JUMP_INSN 3934 && GET_CODE (substitution) == LABEL_REF 3935 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3936 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 3937 XEXP (substitution, 0), 3938 REG_NOTES (insn)); 3939 } 3940 else 3941 retval |= (substed_operand[i] != *recog_data.operand_loc[i]); 3942 } 3943 3944 /* If this insn pattern contains any MATCH_DUP's, make sure that 3945 they will be substituted if the operands they match are substituted. 3946 Also do now any substitutions we already did on the operands. 3947 3948 Don't do this if we aren't making replacements because we might be 3949 propagating things allocated by frame pointer elimination into places 3950 it doesn't expect. */ 3951 3952 if (insn_code_number >= 0 && replace) 3953 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--) 3954 { 3955 int opno = recog_data.dup_num[i]; 3956 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno]; 3957 if (operand_reloadnum[opno] >= 0) 3958 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno], 3959 insn_data[insn_code_number].operand[opno].mode); 3960 } 3961 3962#if 0 3963 /* This loses because reloading of prior insns can invalidate the equivalence 3964 (or at least find_equiv_reg isn't smart enough to find it any more), 3965 causing this insn to need more reload regs than it needed before. 3966 It may be too late to make the reload regs available. 3967 Now this optimization is done safely in choose_reload_regs. */ 3968 3969 /* For each reload of a reg into some other class of reg, 3970 search for an existing equivalent reg (same value now) in the right class. 3971 We can use it as long as we don't need to change its contents. */ 3972 for (i = 0; i < n_reloads; i++) 3973 if (rld[i].reg_rtx == 0 3974 && rld[i].in != 0 3975 && GET_CODE (rld[i].in) == REG 3976 && rld[i].out == 0) 3977 { 3978 rld[i].reg_rtx 3979 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1, 3980 static_reload_reg_p, 0, rld[i].inmode); 3981 /* Prevent generation of insn to load the value 3982 because the one we found already has the value. */ 3983 if (rld[i].reg_rtx) 3984 rld[i].in = rld[i].reg_rtx; 3985 } 3986#endif 3987 3988 /* Perhaps an output reload can be combined with another 3989 to reduce needs by one. */ 3990 if (!goal_earlyclobber) 3991 combine_reloads (); 3992 3993 /* If we have a pair of reloads for parts of an address, they are reloading 3994 the same object, the operands themselves were not reloaded, and they 3995 are for two operands that are supposed to match, merge the reloads and 3996 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3997 3998 for (i = 0; i < n_reloads; i++) 3999 { 4000 int k; 4001 4002 for (j = i + 1; j < n_reloads; j++) 4003 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4004 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4005 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4006 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4007 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 4008 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4009 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4010 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4011 && rtx_equal_p (rld[i].in, rld[j].in) 4012 && (operand_reloadnum[rld[i].opnum] < 0 4013 || rld[operand_reloadnum[rld[i].opnum]].optional) 4014 && (operand_reloadnum[rld[j].opnum] < 0 4015 || rld[operand_reloadnum[rld[j].opnum]].optional) 4016 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum 4017 || (goal_alternative_matches[rld[j].opnum] 4018 == rld[i].opnum))) 4019 { 4020 for (k = 0; k < n_replacements; k++) 4021 if (replacements[k].what == j) 4022 replacements[k].what = i; 4023 4024 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4025 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4026 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4027 else 4028 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4029 rld[j].in = 0; 4030 } 4031 } 4032 4033 /* Scan all the reloads and update their type. 4034 If a reload is for the address of an operand and we didn't reload 4035 that operand, change the type. Similarly, change the operand number 4036 of a reload when two operands match. If a reload is optional, treat it 4037 as though the operand isn't reloaded. 4038 4039 ??? This latter case is somewhat odd because if we do the optional 4040 reload, it means the object is hanging around. Thus we need only 4041 do the address reload if the optional reload was NOT done. 4042 4043 Change secondary reloads to be the address type of their operand, not 4044 the normal type. 4045 4046 If an operand's reload is now RELOAD_OTHER, change any 4047 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4048 RELOAD_FOR_OTHER_ADDRESS. */ 4049 4050 for (i = 0; i < n_reloads; i++) 4051 { 4052 if (rld[i].secondary_p 4053 && rld[i].when_needed == operand_type[rld[i].opnum]) 4054 rld[i].when_needed = address_type[rld[i].opnum]; 4055 4056 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4057 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4058 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4059 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4060 && (operand_reloadnum[rld[i].opnum] < 0 4061 || rld[operand_reloadnum[rld[i].opnum]].optional)) 4062 { 4063 /* If we have a secondary reload to go along with this reload, 4064 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4065 4066 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4067 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4068 && rld[i].secondary_in_reload != -1) 4069 { 4070 int secondary_in_reload = rld[i].secondary_in_reload; 4071 4072 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4073 4074 /* If there's a tertiary reload we have to change it also. */ 4075 if (secondary_in_reload > 0 4076 && rld[secondary_in_reload].secondary_in_reload != -1) 4077 rld[rld[secondary_in_reload].secondary_in_reload].when_needed 4078 = RELOAD_FOR_OPADDR_ADDR; 4079 } 4080 4081 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4082 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4083 && rld[i].secondary_out_reload != -1) 4084 { 4085 int secondary_out_reload = rld[i].secondary_out_reload; 4086 4087 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4088 4089 /* If there's a tertiary reload we have to change it also. */ 4090 if (secondary_out_reload 4091 && rld[secondary_out_reload].secondary_out_reload != -1) 4092 rld[rld[secondary_out_reload].secondary_out_reload].when_needed 4093 = RELOAD_FOR_OPADDR_ADDR; 4094 } 4095 4096 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4097 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4098 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4099 else 4100 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4101 } 4102 4103 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4104 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4105 && operand_reloadnum[rld[i].opnum] >= 0 4106 && (rld[operand_reloadnum[rld[i].opnum]].when_needed 4107 == RELOAD_OTHER)) 4108 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS; 4109 4110 if (goal_alternative_matches[rld[i].opnum] >= 0) 4111 rld[i].opnum = goal_alternative_matches[rld[i].opnum]; 4112 } 4113 4114 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4115 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4116 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4117 4118 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4119 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4120 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4121 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4122 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4123 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4124 This is complicated by the fact that a single operand can have more 4125 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4126 choose_reload_regs without affecting code quality, and cases that 4127 actually fail are extremely rare, so it turns out to be better to fix 4128 the problem here by not generating cases that choose_reload_regs will 4129 fail for. */ 4130 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4131 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4132 a single operand. 4133 We can reduce the register pressure by exploiting that a 4134 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4135 does not conflict with any of them, if it is only used for the first of 4136 the RELOAD_FOR_X_ADDRESS reloads. */ 4137 { 4138 int first_op_addr_num = -2; 4139 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4140 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4141 int need_change = 0; 4142 /* We use last_op_addr_reload and the contents of the above arrays 4143 first as flags - -2 means no instance encountered, -1 means exactly 4144 one instance encountered. 4145 If more than one instance has been encountered, we store the reload 4146 number of the first reload of the kind in question; reload numbers 4147 are known to be non-negative. */ 4148 for (i = 0; i < noperands; i++) 4149 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4150 for (i = n_reloads - 1; i >= 0; i--) 4151 { 4152 switch (rld[i].when_needed) 4153 { 4154 case RELOAD_FOR_OPERAND_ADDRESS: 4155 if (++first_op_addr_num >= 0) 4156 { 4157 first_op_addr_num = i; 4158 need_change = 1; 4159 } 4160 break; 4161 case RELOAD_FOR_INPUT_ADDRESS: 4162 if (++first_inpaddr_num[rld[i].opnum] >= 0) 4163 { 4164 first_inpaddr_num[rld[i].opnum] = i; 4165 need_change = 1; 4166 } 4167 break; 4168 case RELOAD_FOR_OUTPUT_ADDRESS: 4169 if (++first_outpaddr_num[rld[i].opnum] >= 0) 4170 { 4171 first_outpaddr_num[rld[i].opnum] = i; 4172 need_change = 1; 4173 } 4174 break; 4175 default: 4176 break; 4177 } 4178 } 4179 4180 if (need_change) 4181 { 4182 for (i = 0; i < n_reloads; i++) 4183 { 4184 int first_num; 4185 enum reload_type type; 4186 4187 switch (rld[i].when_needed) 4188 { 4189 case RELOAD_FOR_OPADDR_ADDR: 4190 first_num = first_op_addr_num; 4191 type = RELOAD_FOR_OPERAND_ADDRESS; 4192 break; 4193 case RELOAD_FOR_INPADDR_ADDRESS: 4194 first_num = first_inpaddr_num[rld[i].opnum]; 4195 type = RELOAD_FOR_INPUT_ADDRESS; 4196 break; 4197 case RELOAD_FOR_OUTADDR_ADDRESS: 4198 first_num = first_outpaddr_num[rld[i].opnum]; 4199 type = RELOAD_FOR_OUTPUT_ADDRESS; 4200 break; 4201 default: 4202 continue; 4203 } 4204 if (first_num < 0) 4205 continue; 4206 else if (i > first_num) 4207 rld[i].when_needed = type; 4208 else 4209 { 4210 /* Check if the only TYPE reload that uses reload I is 4211 reload FIRST_NUM. */ 4212 for (j = n_reloads - 1; j > first_num; j--) 4213 { 4214 if (rld[j].when_needed == type 4215 && (rld[i].secondary_p 4216 ? rld[j].secondary_in_reload == i 4217 : reg_mentioned_p (rld[i].in, rld[j].in))) 4218 { 4219 rld[i].when_needed = type; 4220 break; 4221 } 4222 } 4223 } 4224 } 4225 } 4226 } 4227 4228 /* See if we have any reloads that are now allowed to be merged 4229 because we've changed when the reload is needed to 4230 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4231 check for the most common cases. */ 4232 4233 for (i = 0; i < n_reloads; i++) 4234 if (rld[i].in != 0 && rld[i].out == 0 4235 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS 4236 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR 4237 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 4238 for (j = 0; j < n_reloads; j++) 4239 if (i != j && rld[j].in != 0 && rld[j].out == 0 4240 && rld[j].when_needed == rld[i].when_needed 4241 && MATCHES (rld[i].in, rld[j].in) 4242 && rld[i].class == rld[j].class 4243 && !rld[i].nocombine && !rld[j].nocombine 4244 && rld[i].reg_rtx == rld[j].reg_rtx) 4245 { 4246 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum); 4247 transfer_replacements (i, j); 4248 rld[j].in = 0; 4249 } 4250 4251#ifdef HAVE_cc0 4252 /* If we made any reloads for addresses, see if they violate a 4253 "no input reloads" requirement for this insn. But loads that we 4254 do after the insn (such as for output addresses) are fine. */ 4255 if (no_input_reloads) 4256 for (i = 0; i < n_reloads; i++) 4257 if (rld[i].in != 0 4258 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 4259 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS) 4260 abort (); 4261#endif 4262 4263 /* Compute reload_mode and reload_nregs. */ 4264 for (i = 0; i < n_reloads; i++) 4265 { 4266 rld[i].mode 4267 = (rld[i].inmode == VOIDmode 4268 || (GET_MODE_SIZE (rld[i].outmode) 4269 > GET_MODE_SIZE (rld[i].inmode))) 4270 ? rld[i].outmode : rld[i].inmode; 4271 4272 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode); 4273 } 4274 4275 /* Special case a simple move with an input reload and a 4276 destination of a hard reg, if the hard reg is ok, use it. */ 4277 for (i = 0; i < n_reloads; i++) 4278 if (rld[i].when_needed == RELOAD_FOR_INPUT 4279 && GET_CODE (PATTERN (insn)) == SET 4280 && GET_CODE (SET_DEST (PATTERN (insn))) == REG 4281 && SET_SRC (PATTERN (insn)) == rld[i].in) 4282 { 4283 rtx dest = SET_DEST (PATTERN (insn)); 4284 unsigned int regno = REGNO (dest); 4285 4286 if (regno < FIRST_PSEUDO_REGISTER 4287 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno) 4288 && HARD_REGNO_MODE_OK (regno, rld[i].mode)) 4289 rld[i].reg_rtx = dest; 4290 } 4291 4292 return retval; 4293} 4294 4295/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4296 accepts a memory operand with constant address. */ 4297 4298static int 4299alternative_allows_memconst (constraint, altnum) 4300 const char *constraint; 4301 int altnum; 4302{ 4303 int c; 4304 /* Skip alternatives before the one requested. */ 4305 while (altnum > 0) 4306 { 4307 while (*constraint++ != ','); 4308 altnum--; 4309 } 4310 /* Scan the requested alternative for 'm' or 'o'. 4311 If one of them is present, this alternative accepts memory constants. */ 4312 while ((c = *constraint++) && c != ',' && c != '#') 4313 if (c == 'm' || c == 'o') 4314 return 1; 4315 return 0; 4316} 4317 4318/* Scan X for memory references and scan the addresses for reloading. 4319 Also checks for references to "constant" regs that we want to eliminate 4320 and replaces them with the values they stand for. 4321 We may alter X destructively if it contains a reference to such. 4322 If X is just a constant reg, we return the equivalent value 4323 instead of X. 4324 4325 IND_LEVELS says how many levels of indirect addressing this machine 4326 supports. 4327 4328 OPNUM and TYPE identify the purpose of the reload. 4329 4330 IS_SET_DEST is true if X is the destination of a SET, which is not 4331 appropriate to be replaced by a constant. 4332 4333 INSN, if nonzero, is the insn in which we do the reload. It is used 4334 to determine if we may generate output reloads, and where to put USEs 4335 for pseudos that we have to replace with stack slots. 4336 4337 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the 4338 result of find_reloads_address. */ 4339 4340static rtx 4341find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn, 4342 address_reloaded) 4343 rtx x; 4344 int opnum; 4345 enum reload_type type; 4346 int ind_levels; 4347 int is_set_dest; 4348 rtx insn; 4349 int *address_reloaded; 4350{ 4351 RTX_CODE code = GET_CODE (x); 4352 4353 const char *fmt = GET_RTX_FORMAT (code); 4354 int i; 4355 int copied; 4356 4357 if (code == REG) 4358 { 4359 /* This code is duplicated for speed in find_reloads. */ 4360 int regno = REGNO (x); 4361 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4362 x = reg_equiv_constant[regno]; 4363#if 0 4364 /* This creates (subreg (mem...)) which would cause an unnecessary 4365 reload of the mem. */ 4366 else if (reg_equiv_mem[regno] != 0) 4367 x = reg_equiv_mem[regno]; 4368#endif 4369 else if (reg_equiv_memory_loc[regno] 4370 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4371 { 4372 rtx mem = make_memloc (x, regno); 4373 if (reg_equiv_address[regno] 4374 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4375 { 4376 /* If this is not a toplevel operand, find_reloads doesn't see 4377 this substitution. We have to emit a USE of the pseudo so 4378 that delete_output_reload can see it. */ 4379 if (replace_reloads && recog_data.operand[opnum] != x) 4380 /* We mark the USE with QImode so that we recognize it 4381 as one that can be safely deleted at the end of 4382 reload. */ 4383 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn), 4384 QImode); 4385 x = mem; 4386 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4387 opnum, type, ind_levels, insn); 4388 if (address_reloaded) 4389 *address_reloaded = i; 4390 } 4391 } 4392 return x; 4393 } 4394 if (code == MEM) 4395 { 4396 rtx tem = x; 4397 4398 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4399 opnum, type, ind_levels, insn); 4400 if (address_reloaded) 4401 *address_reloaded = i; 4402 4403 return tem; 4404 } 4405 4406 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4407 { 4408 /* Check for SUBREG containing a REG that's equivalent to a constant. 4409 If the constant has a known value, truncate it right now. 4410 Similarly if we are extracting a single-word of a multi-word 4411 constant. If the constant is symbolic, allow it to be substituted 4412 normally. push_reload will strip the subreg later. If the 4413 constant is VOIDmode, abort because we will lose the mode of 4414 the register (this should never happen because one of the cases 4415 above should handle it). */ 4416 4417 int regno = REGNO (SUBREG_REG (x)); 4418 rtx tem; 4419 4420 if (subreg_lowpart_p (x) 4421 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4422 && reg_equiv_constant[regno] != 0 4423 && (tem = gen_lowpart_common (GET_MODE (x), 4424 reg_equiv_constant[regno])) != 0) 4425 return tem; 4426 4427 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4428 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4429 && reg_equiv_constant[regno] != 0 4430 && (tem = operand_subword (reg_equiv_constant[regno], 4431 SUBREG_BYTE (x) / UNITS_PER_WORD, 0, 4432 GET_MODE (SUBREG_REG (x)))) != 0) 4433 { 4434 /* TEM is now a word sized constant for the bits from X that 4435 we wanted. However, TEM may be the wrong representation. 4436 4437 Use gen_lowpart_common to convert a CONST_INT into a 4438 CONST_DOUBLE and vice versa as needed according to by the mode 4439 of the SUBREG. */ 4440 tem = gen_lowpart_common (GET_MODE (x), tem); 4441 if (!tem) 4442 abort (); 4443 return tem; 4444 } 4445 4446 /* If the SUBREG is wider than a word, the above test will fail. 4447 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4448 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4449 a 32 bit target. We still can - and have to - handle this 4450 for non-paradoxical subregs of CONST_INTs. */ 4451 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4452 && reg_equiv_constant[regno] != 0 4453 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4454 && (GET_MODE_SIZE (GET_MODE (x)) 4455 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4456 { 4457 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT; 4458 if (WORDS_BIG_ENDIAN) 4459 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4460 - GET_MODE_BITSIZE (GET_MODE (x)) 4461 - shift); 4462 /* Here we use the knowledge that CONST_INTs have a 4463 HOST_WIDE_INT field. */ 4464 if (shift >= HOST_BITS_PER_WIDE_INT) 4465 shift = HOST_BITS_PER_WIDE_INT - 1; 4466 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4467 } 4468 4469 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4470 && reg_equiv_constant[regno] != 0 4471 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4472 abort (); 4473 4474 /* If the subreg contains a reg that will be converted to a mem, 4475 convert the subreg to a narrower memref now. 4476 Otherwise, we would get (subreg (mem ...) ...), 4477 which would force reload of the mem. 4478 4479 We also need to do this if there is an equivalent MEM that is 4480 not offsettable. In that case, alter_subreg would produce an 4481 invalid address on big-endian machines. 4482 4483 For machines that extend byte loads, we must not reload using 4484 a wider mode if we have a paradoxical SUBREG. find_reloads will 4485 force a reload in that case. So we should not do anything here. */ 4486 4487 else if (regno >= FIRST_PSEUDO_REGISTER 4488#ifdef LOAD_EXTEND_OP 4489 && (GET_MODE_SIZE (GET_MODE (x)) 4490 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4491#endif 4492 && (reg_equiv_address[regno] != 0 4493 || (reg_equiv_mem[regno] != 0 4494 && (! strict_memory_address_p (GET_MODE (x), 4495 XEXP (reg_equiv_mem[regno], 0)) 4496 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4497 || num_not_at_initial_offset)))) 4498 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4499 insn); 4500 } 4501 4502 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4503 { 4504 if (fmt[i] == 'e') 4505 { 4506 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4507 ind_levels, is_set_dest, insn, 4508 address_reloaded); 4509 /* If we have replaced a reg with it's equivalent memory loc - 4510 that can still be handled here e.g. if it's in a paradoxical 4511 subreg - we must make the change in a copy, rather than using 4512 a destructive change. This way, find_reloads can still elect 4513 not to do the change. */ 4514 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4515 { 4516 x = shallow_copy_rtx (x); 4517 copied = 1; 4518 } 4519 XEXP (x, i) = new_part; 4520 } 4521 } 4522 return x; 4523} 4524 4525/* Return a mem ref for the memory equivalent of reg REGNO. 4526 This mem ref is not shared with anything. */ 4527 4528static rtx 4529make_memloc (ad, regno) 4530 rtx ad; 4531 int regno; 4532{ 4533 /* We must rerun eliminate_regs, in case the elimination 4534 offsets have changed. */ 4535 rtx tem 4536 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4537 4538 /* If TEM might contain a pseudo, we must copy it to avoid 4539 modifying it when we do the substitution for the reload. */ 4540 if (rtx_varies_p (tem, 0)) 4541 tem = copy_rtx (tem); 4542 4543 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem); 4544 tem = adjust_address_nv (tem, GET_MODE (ad), 0); 4545 4546 /* Copy the result if it's still the same as the equivalence, to avoid 4547 modifying it when we do the substitution for the reload. */ 4548 if (tem == reg_equiv_memory_loc[regno]) 4549 tem = copy_rtx (tem); 4550 return tem; 4551} 4552 4553/* Record all reloads needed for handling memory address AD 4554 which appears in *LOC in a memory reference to mode MODE 4555 which itself is found in location *MEMREFLOC. 4556 Note that we take shortcuts assuming that no multi-reg machine mode 4557 occurs as part of an address. 4558 4559 OPNUM and TYPE specify the purpose of this reload. 4560 4561 IND_LEVELS says how many levels of indirect addressing this machine 4562 supports. 4563 4564 INSN, if nonzero, is the insn in which we do the reload. It is used 4565 to determine if we may generate output reloads, and where to put USEs 4566 for pseudos that we have to replace with stack slots. 4567 4568 Value is nonzero if this address is reloaded or replaced as a whole. 4569 This is interesting to the caller if the address is an autoincrement. 4570 4571 Note that there is no verification that the address will be valid after 4572 this routine does its work. Instead, we rely on the fact that the address 4573 was valid when reload started. So we need only undo things that reload 4574 could have broken. These are wrong register types, pseudos not allocated 4575 to a hard register, and frame pointer elimination. */ 4576 4577static int 4578find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4579 enum machine_mode mode; 4580 rtx *memrefloc; 4581 rtx ad; 4582 rtx *loc; 4583 int opnum; 4584 enum reload_type type; 4585 int ind_levels; 4586 rtx insn; 4587{ 4588 int regno; 4589 int removed_and = 0; 4590 rtx tem; 4591 4592 /* If the address is a register, see if it is a legitimate address and 4593 reload if not. We first handle the cases where we need not reload 4594 or where we must reload in a non-standard way. */ 4595 4596 if (GET_CODE (ad) == REG) 4597 { 4598 regno = REGNO (ad); 4599 4600 /* If the register is equivalent to an invariant expression, substitute 4601 the invariant, and eliminate any eliminable register references. */ 4602 tem = reg_equiv_constant[regno]; 4603 if (tem != 0 4604 && (tem = eliminate_regs (tem, mode, insn)) 4605 && strict_memory_address_p (mode, tem)) 4606 { 4607 *loc = ad = tem; 4608 return 0; 4609 } 4610 4611 tem = reg_equiv_memory_loc[regno]; 4612 if (tem != 0) 4613 { 4614 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4615 { 4616 tem = make_memloc (ad, regno); 4617 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4618 { 4619 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0), 4620 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4621 ind_levels, insn); 4622 } 4623 /* We can avoid a reload if the register's equivalent memory 4624 expression is valid as an indirect memory address. 4625 But not all addresses are valid in a mem used as an indirect 4626 address: only reg or reg+constant. */ 4627 4628 if (ind_levels > 0 4629 && strict_memory_address_p (mode, tem) 4630 && (GET_CODE (XEXP (tem, 0)) == REG 4631 || (GET_CODE (XEXP (tem, 0)) == PLUS 4632 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4633 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4634 { 4635 /* TEM is not the same as what we'll be replacing the 4636 pseudo with after reload, put a USE in front of INSN 4637 in the final reload pass. */ 4638 if (replace_reloads 4639 && num_not_at_initial_offset 4640 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4641 { 4642 *loc = tem; 4643 /* We mark the USE with QImode so that we 4644 recognize it as one that can be safely 4645 deleted at the end of reload. */ 4646 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), 4647 insn), QImode); 4648 4649 /* This doesn't really count as replacing the address 4650 as a whole, since it is still a memory access. */ 4651 } 4652 return 0; 4653 } 4654 ad = tem; 4655 } 4656 } 4657 4658 /* The only remaining case where we can avoid a reload is if this is a 4659 hard register that is valid as a base register and which is not the 4660 subject of a CLOBBER in this insn. */ 4661 4662 else if (regno < FIRST_PSEUDO_REGISTER 4663 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4664 && ! regno_clobbered_p (regno, this_insn, mode, 0)) 4665 return 0; 4666 4667 /* If we do not have one of the cases above, we must do the reload. */ 4668 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode), 4669 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4670 return 1; 4671 } 4672 4673 if (strict_memory_address_p (mode, ad)) 4674 { 4675 /* The address appears valid, so reloads are not needed. 4676 But the address may contain an eliminable register. 4677 This can happen because a machine with indirect addressing 4678 may consider a pseudo register by itself a valid address even when 4679 it has failed to get a hard reg. 4680 So do a tree-walk to find and eliminate all such regs. */ 4681 4682 /* But first quickly dispose of a common case. */ 4683 if (GET_CODE (ad) == PLUS 4684 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4685 && GET_CODE (XEXP (ad, 0)) == REG 4686 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4687 return 0; 4688 4689 subst_reg_equivs_changed = 0; 4690 *loc = subst_reg_equivs (ad, insn); 4691 4692 if (! subst_reg_equivs_changed) 4693 return 0; 4694 4695 /* Check result for validity after substitution. */ 4696 if (strict_memory_address_p (mode, ad)) 4697 return 0; 4698 } 4699 4700#ifdef LEGITIMIZE_RELOAD_ADDRESS 4701 do 4702 { 4703 if (memrefloc) 4704 { 4705 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4706 ind_levels, win); 4707 } 4708 break; 4709 win: 4710 *memrefloc = copy_rtx (*memrefloc); 4711 XEXP (*memrefloc, 0) = ad; 4712 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4713 return 1; 4714 } 4715 while (0); 4716#endif 4717 4718 /* The address is not valid. We have to figure out why. First see if 4719 we have an outer AND and remove it if so. Then analyze what's inside. */ 4720 4721 if (GET_CODE (ad) == AND) 4722 { 4723 removed_and = 1; 4724 loc = &XEXP (ad, 0); 4725 ad = *loc; 4726 } 4727 4728 /* One possibility for why the address is invalid is that it is itself 4729 a MEM. This can happen when the frame pointer is being eliminated, a 4730 pseudo is not allocated to a hard register, and the offset between the 4731 frame and stack pointers is not its initial value. In that case the 4732 pseudo will have been replaced by a MEM referring to the 4733 stack pointer. */ 4734 if (GET_CODE (ad) == MEM) 4735 { 4736 /* First ensure that the address in this MEM is valid. Then, unless 4737 indirect addresses are valid, reload the MEM into a register. */ 4738 tem = ad; 4739 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4740 opnum, ADDR_TYPE (type), 4741 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4742 4743 /* If tem was changed, then we must create a new memory reference to 4744 hold it and store it back into memrefloc. */ 4745 if (tem != ad && memrefloc) 4746 { 4747 *memrefloc = copy_rtx (*memrefloc); 4748 copy_replacements (tem, XEXP (*memrefloc, 0)); 4749 loc = &XEXP (*memrefloc, 0); 4750 if (removed_and) 4751 loc = &XEXP (*loc, 0); 4752 } 4753 4754 /* Check similar cases as for indirect addresses as above except 4755 that we can allow pseudos and a MEM since they should have been 4756 taken care of above. */ 4757 4758 if (ind_levels == 0 4759 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4760 || GET_CODE (XEXP (tem, 0)) == MEM 4761 || ! (GET_CODE (XEXP (tem, 0)) == REG 4762 || (GET_CODE (XEXP (tem, 0)) == PLUS 4763 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4764 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4765 { 4766 /* Must use TEM here, not AD, since it is the one that will 4767 have any subexpressions reloaded, if needed. */ 4768 push_reload (tem, NULL_RTX, loc, (rtx*) 0, 4769 MODE_BASE_REG_CLASS (mode), GET_MODE (tem), 4770 VOIDmode, 0, 4771 0, opnum, type); 4772 return ! removed_and; 4773 } 4774 else 4775 return 0; 4776 } 4777 4778 /* If we have address of a stack slot but it's not valid because the 4779 displacement is too large, compute the sum in a register. 4780 Handle all base registers here, not just fp/ap/sp, because on some 4781 targets (namely SH) we can also get too large displacements from 4782 big-endian corrections. */ 4783 else if (GET_CODE (ad) == PLUS 4784 && GET_CODE (XEXP (ad, 0)) == REG 4785 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4786 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4787 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4788 { 4789 /* Unshare the MEM rtx so we can safely alter it. */ 4790 if (memrefloc) 4791 { 4792 *memrefloc = copy_rtx (*memrefloc); 4793 loc = &XEXP (*memrefloc, 0); 4794 if (removed_and) 4795 loc = &XEXP (*loc, 0); 4796 } 4797 4798 if (double_reg_address_ok) 4799 { 4800 /* Unshare the sum as well. */ 4801 *loc = ad = copy_rtx (ad); 4802 4803 /* Reload the displacement into an index reg. 4804 We assume the frame pointer or arg pointer is a base reg. */ 4805 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4806 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4807 type, ind_levels); 4808 return 0; 4809 } 4810 else 4811 { 4812 /* If the sum of two regs is not necessarily valid, 4813 reload the sum into a base reg. 4814 That will at least work. */ 4815 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4816 Pmode, opnum, type, ind_levels); 4817 } 4818 return ! removed_and; 4819 } 4820 4821 /* If we have an indexed stack slot, there are three possible reasons why 4822 it might be invalid: The index might need to be reloaded, the address 4823 might have been made by frame pointer elimination and hence have a 4824 constant out of range, or both reasons might apply. 4825 4826 We can easily check for an index needing reload, but even if that is the 4827 case, we might also have an invalid constant. To avoid making the 4828 conservative assumption and requiring two reloads, we see if this address 4829 is valid when not interpreted strictly. If it is, the only problem is 4830 that the index needs a reload and find_reloads_address_1 will take care 4831 of it. 4832 4833 If we decide to do something here, it must be that 4834 `double_reg_address_ok' is true and that this address rtl was made by 4835 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4836 rework the sum so that the reload register will be added to the index. 4837 This is safe because we know the address isn't shared. 4838 4839 We check for fp/ap/sp as both the first and second operand of the 4840 innermost PLUS. */ 4841 4842 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4843 && GET_CODE (XEXP (ad, 0)) == PLUS 4844 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4845#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4846 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4847#endif 4848#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4849 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4850#endif 4851 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4852 && ! memory_address_p (mode, ad)) 4853 { 4854 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4855 plus_constant (XEXP (XEXP (ad, 0), 0), 4856 INTVAL (XEXP (ad, 1))), 4857 XEXP (XEXP (ad, 0), 1)); 4858 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), 4859 MODE_BASE_REG_CLASS (mode), 4860 GET_MODE (ad), opnum, type, ind_levels); 4861 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4862 type, 0, insn); 4863 4864 return 0; 4865 } 4866 4867 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4868 && GET_CODE (XEXP (ad, 0)) == PLUS 4869 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4870#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4871 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4872#endif 4873#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4874 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4875#endif 4876 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4877 && ! memory_address_p (mode, ad)) 4878 { 4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4880 XEXP (XEXP (ad, 0), 0), 4881 plus_constant (XEXP (XEXP (ad, 0), 1), 4882 INTVAL (XEXP (ad, 1)))); 4883 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4884 MODE_BASE_REG_CLASS (mode), 4885 GET_MODE (ad), opnum, type, ind_levels); 4886 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4887 type, 0, insn); 4888 4889 return 0; 4890 } 4891 4892 /* See if address becomes valid when an eliminable register 4893 in a sum is replaced. */ 4894 4895 tem = ad; 4896 if (GET_CODE (ad) == PLUS) 4897 tem = subst_indexed_address (ad); 4898 if (tem != ad && strict_memory_address_p (mode, tem)) 4899 { 4900 /* Ok, we win that way. Replace any additional eliminable 4901 registers. */ 4902 4903 subst_reg_equivs_changed = 0; 4904 tem = subst_reg_equivs (tem, insn); 4905 4906 /* Make sure that didn't make the address invalid again. */ 4907 4908 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4909 { 4910 *loc = tem; 4911 return 0; 4912 } 4913 } 4914 4915 /* If constants aren't valid addresses, reload the constant address 4916 into a register. */ 4917 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4918 { 4919 /* If AD is an address in the constant pool, the MEM rtx may be shared. 4920 Unshare it so we can safely alter it. */ 4921 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4922 && CONSTANT_POOL_ADDRESS_P (ad)) 4923 { 4924 *memrefloc = copy_rtx (*memrefloc); 4925 loc = &XEXP (*memrefloc, 0); 4926 if (removed_and) 4927 loc = &XEXP (*loc, 0); 4928 } 4929 4930 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4931 Pmode, opnum, type, ind_levels); 4932 return ! removed_and; 4933 } 4934 4935 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4936 insn); 4937} 4938 4939/* Find all pseudo regs appearing in AD 4940 that are eliminable in favor of equivalent values 4941 and do not have hard regs; replace them by their equivalents. 4942 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4943 front of it for pseudos that we have to replace with stack slots. */ 4944 4945static rtx 4946subst_reg_equivs (ad, insn) 4947 rtx ad; 4948 rtx insn; 4949{ 4950 RTX_CODE code = GET_CODE (ad); 4951 int i; 4952 const char *fmt; 4953 4954 switch (code) 4955 { 4956 case HIGH: 4957 case CONST_INT: 4958 case CONST: 4959 case CONST_DOUBLE: 4960 case CONST_VECTOR: 4961 case SYMBOL_REF: 4962 case LABEL_REF: 4963 case PC: 4964 case CC0: 4965 return ad; 4966 4967 case REG: 4968 { 4969 int regno = REGNO (ad); 4970 4971 if (reg_equiv_constant[regno] != 0) 4972 { 4973 subst_reg_equivs_changed = 1; 4974 return reg_equiv_constant[regno]; 4975 } 4976 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 4977 { 4978 rtx mem = make_memloc (ad, regno); 4979 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 4980 { 4981 subst_reg_equivs_changed = 1; 4982 /* We mark the USE with QImode so that we recognize it 4983 as one that can be safely deleted at the end of 4984 reload. */ 4985 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn), 4986 QImode); 4987 return mem; 4988 } 4989 } 4990 } 4991 return ad; 4992 4993 case PLUS: 4994 /* Quickly dispose of a common case. */ 4995 if (XEXP (ad, 0) == frame_pointer_rtx 4996 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4997 return ad; 4998 break; 4999 5000 default: 5001 break; 5002 } 5003 5004 fmt = GET_RTX_FORMAT (code); 5005 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5006 if (fmt[i] == 'e') 5007 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5008 return ad; 5009} 5010 5011/* Compute the sum of X and Y, making canonicalizations assumed in an 5012 address, namely: sum constant integers, surround the sum of two 5013 constants with a CONST, put the constant as the second operand, and 5014 group the constant on the outermost sum. 5015 5016 This routine assumes both inputs are already in canonical form. */ 5017 5018rtx 5019form_sum (x, y) 5020 rtx x, y; 5021{ 5022 rtx tem; 5023 enum machine_mode mode = GET_MODE (x); 5024 5025 if (mode == VOIDmode) 5026 mode = GET_MODE (y); 5027 5028 if (mode == VOIDmode) 5029 mode = Pmode; 5030 5031 if (GET_CODE (x) == CONST_INT) 5032 return plus_constant (y, INTVAL (x)); 5033 else if (GET_CODE (y) == CONST_INT) 5034 return plus_constant (x, INTVAL (y)); 5035 else if (CONSTANT_P (x)) 5036 tem = x, x = y, y = tem; 5037 5038 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5039 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5040 5041 /* Note that if the operands of Y are specified in the opposite 5042 order in the recursive calls below, infinite recursion will occur. */ 5043 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5044 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5045 5046 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5047 constant will have been placed second. */ 5048 if (CONSTANT_P (x) && CONSTANT_P (y)) 5049 { 5050 if (GET_CODE (x) == CONST) 5051 x = XEXP (x, 0); 5052 if (GET_CODE (y) == CONST) 5053 y = XEXP (y, 0); 5054 5055 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5056 } 5057 5058 return gen_rtx_PLUS (mode, x, y); 5059} 5060 5061/* If ADDR is a sum containing a pseudo register that should be 5062 replaced with a constant (from reg_equiv_constant), 5063 return the result of doing so, and also apply the associative 5064 law so that the result is more likely to be a valid address. 5065 (But it is not guaranteed to be one.) 5066 5067 Note that at most one register is replaced, even if more are 5068 replaceable. Also, we try to put the result into a canonical form 5069 so it is more likely to be a valid address. 5070 5071 In all other cases, return ADDR. */ 5072 5073static rtx 5074subst_indexed_address (addr) 5075 rtx addr; 5076{ 5077 rtx op0 = 0, op1 = 0, op2 = 0; 5078 rtx tem; 5079 int regno; 5080 5081 if (GET_CODE (addr) == PLUS) 5082 { 5083 /* Try to find a register to replace. */ 5084 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5085 if (GET_CODE (op0) == REG 5086 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5087 && reg_renumber[regno] < 0 5088 && reg_equiv_constant[regno] != 0) 5089 op0 = reg_equiv_constant[regno]; 5090 else if (GET_CODE (op1) == REG 5091 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5092 && reg_renumber[regno] < 0 5093 && reg_equiv_constant[regno] != 0) 5094 op1 = reg_equiv_constant[regno]; 5095 else if (GET_CODE (op0) == PLUS 5096 && (tem = subst_indexed_address (op0)) != op0) 5097 op0 = tem; 5098 else if (GET_CODE (op1) == PLUS 5099 && (tem = subst_indexed_address (op1)) != op1) 5100 op1 = tem; 5101 else 5102 return addr; 5103 5104 /* Pick out up to three things to add. */ 5105 if (GET_CODE (op1) == PLUS) 5106 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5107 else if (GET_CODE (op0) == PLUS) 5108 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5109 5110 /* Compute the sum. */ 5111 if (op2 != 0) 5112 op1 = form_sum (op1, op2); 5113 if (op1 != 0) 5114 op0 = form_sum (op0, op1); 5115 5116 return op0; 5117 } 5118 return addr; 5119} 5120 5121/* Update the REG_INC notes for an insn. It updates all REG_INC 5122 notes for the instruction which refer to REGNO the to refer 5123 to the reload number. 5124 5125 INSN is the insn for which any REG_INC notes need updating. 5126 5127 REGNO is the register number which has been reloaded. 5128 5129 RELOADNUM is the reload number. */ 5130 5131static void 5132update_auto_inc_notes (insn, regno, reloadnum) 5133 rtx insn ATTRIBUTE_UNUSED; 5134 int regno ATTRIBUTE_UNUSED; 5135 int reloadnum ATTRIBUTE_UNUSED; 5136{ 5137#ifdef AUTO_INC_DEC 5138 rtx link; 5139 5140 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 5141 if (REG_NOTE_KIND (link) == REG_INC 5142 && REGNO (XEXP (link, 0)) == regno) 5143 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5144#endif 5145} 5146 5147/* Record the pseudo registers we must reload into hard registers in a 5148 subexpression of a would-be memory address, X referring to a value 5149 in mode MODE. (This function is not called if the address we find 5150 is strictly valid.) 5151 5152 CONTEXT = 1 means we are considering regs as index regs, 5153 = 0 means we are considering them as base regs. 5154 5155 OPNUM and TYPE specify the purpose of any reloads made. 5156 5157 IND_LEVELS says how many levels of indirect addressing are 5158 supported at this point in the address. 5159 5160 INSN, if nonzero, is the insn in which we do the reload. It is used 5161 to determine if we may generate output reloads. 5162 5163 We return nonzero if X, as a whole, is reloaded or replaced. */ 5164 5165/* Note that we take shortcuts assuming that no multi-reg machine mode 5166 occurs as part of an address. 5167 Also, this is not fully machine-customizable; it works for machines 5168 such as VAXen and 68000's and 32000's, but other possible machines 5169 could have addressing modes that this does not handle right. */ 5170 5171static int 5172find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5173 enum machine_mode mode; 5174 rtx x; 5175 int context; 5176 rtx *loc; 5177 int opnum; 5178 enum reload_type type; 5179 int ind_levels; 5180 rtx insn; 5181{ 5182 RTX_CODE code = GET_CODE (x); 5183 5184 switch (code) 5185 { 5186 case PLUS: 5187 { 5188 rtx orig_op0 = XEXP (x, 0); 5189 rtx orig_op1 = XEXP (x, 1); 5190 RTX_CODE code0 = GET_CODE (orig_op0); 5191 RTX_CODE code1 = GET_CODE (orig_op1); 5192 rtx op0 = orig_op0; 5193 rtx op1 = orig_op1; 5194 5195 if (GET_CODE (op0) == SUBREG) 5196 { 5197 op0 = SUBREG_REG (op0); 5198 code0 = GET_CODE (op0); 5199 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5200 op0 = gen_rtx_REG (word_mode, 5201 (REGNO (op0) + 5202 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)), 5203 GET_MODE (SUBREG_REG (orig_op0)), 5204 SUBREG_BYTE (orig_op0), 5205 GET_MODE (orig_op0)))); 5206 } 5207 5208 if (GET_CODE (op1) == SUBREG) 5209 { 5210 op1 = SUBREG_REG (op1); 5211 code1 = GET_CODE (op1); 5212 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5213 /* ??? Why is this given op1's mode and above for 5214 ??? op0 SUBREGs we use word_mode? */ 5215 op1 = gen_rtx_REG (GET_MODE (op1), 5216 (REGNO (op1) + 5217 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)), 5218 GET_MODE (SUBREG_REG (orig_op1)), 5219 SUBREG_BYTE (orig_op1), 5220 GET_MODE (orig_op1)))); 5221 } 5222 5223 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5224 || code0 == ZERO_EXTEND || code1 == MEM) 5225 { 5226 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5227 type, ind_levels, insn); 5228 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5229 type, ind_levels, insn); 5230 } 5231 5232 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5233 || code1 == ZERO_EXTEND || code0 == MEM) 5234 { 5235 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5236 type, ind_levels, insn); 5237 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5238 type, ind_levels, insn); 5239 } 5240 5241 else if (code0 == CONST_INT || code0 == CONST 5242 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5243 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5244 type, ind_levels, insn); 5245 5246 else if (code1 == CONST_INT || code1 == CONST 5247 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5248 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5249 type, ind_levels, insn); 5250 5251 else if (code0 == REG && code1 == REG) 5252 { 5253 if (REG_OK_FOR_INDEX_P (op0) 5254 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5255 return 0; 5256 else if (REG_OK_FOR_INDEX_P (op1) 5257 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5258 return 0; 5259 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5260 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5261 type, ind_levels, insn); 5262 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5263 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5264 type, ind_levels, insn); 5265 else if (REG_OK_FOR_INDEX_P (op1)) 5266 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5267 type, ind_levels, insn); 5268 else if (REG_OK_FOR_INDEX_P (op0)) 5269 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5270 type, ind_levels, insn); 5271 else 5272 { 5273 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5274 type, ind_levels, insn); 5275 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5276 type, ind_levels, insn); 5277 } 5278 } 5279 5280 else if (code0 == REG) 5281 { 5282 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5283 type, ind_levels, insn); 5284 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5285 type, ind_levels, insn); 5286 } 5287 5288 else if (code1 == REG) 5289 { 5290 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5291 type, ind_levels, insn); 5292 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5293 type, ind_levels, insn); 5294 } 5295 } 5296 5297 return 0; 5298 5299 case POST_MODIFY: 5300 case PRE_MODIFY: 5301 { 5302 rtx op0 = XEXP (x, 0); 5303 rtx op1 = XEXP (x, 1); 5304 5305 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS) 5306 return 0; 5307 5308 /* Currently, we only support {PRE,POST}_MODIFY constructs 5309 where a base register is {inc,dec}remented by the contents 5310 of another register or by a constant value. Thus, these 5311 operands must match. */ 5312 if (op0 != XEXP (op1, 0)) 5313 abort (); 5314 5315 /* Require index register (or constant). Let's just handle the 5316 register case in the meantime... If the target allows 5317 auto-modify by a constant then we could try replacing a pseudo 5318 register with its equivalent constant where applicable. */ 5319 if (REG_P (XEXP (op1, 1))) 5320 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1)))) 5321 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1), 5322 opnum, type, ind_levels, insn); 5323 5324 if (REG_P (XEXP (op1, 0))) 5325 { 5326 int regno = REGNO (XEXP (op1, 0)); 5327 int reloadnum; 5328 5329 /* A register that is incremented cannot be constant! */ 5330 if (regno >= FIRST_PSEUDO_REGISTER 5331 && reg_equiv_constant[regno] != 0) 5332 abort (); 5333 5334 /* Handle a register that is equivalent to a memory location 5335 which cannot be addressed directly. */ 5336 if (reg_equiv_memory_loc[regno] != 0 5337 && (reg_equiv_address[regno] != 0 5338 || num_not_at_initial_offset)) 5339 { 5340 rtx tem = make_memloc (XEXP (x, 0), regno); 5341 5342 if (reg_equiv_address[regno] 5343 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5344 { 5345 /* First reload the memory location's address. 5346 We can't use ADDR_TYPE (type) here, because we need to 5347 write back the value after reading it, hence we actually 5348 need two registers. */ 5349 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0), 5350 &XEXP (tem, 0), opnum, 5351 RELOAD_OTHER, 5352 ind_levels, insn); 5353 5354 /* Then reload the memory location into a base 5355 register. */ 5356 reloadnum = push_reload (tem, tem, &XEXP (x, 0), 5357 &XEXP (op1, 0), 5358 MODE_BASE_REG_CLASS (mode), 5359 GET_MODE (x), GET_MODE (x), 0, 5360 0, opnum, RELOAD_OTHER); 5361 5362 update_auto_inc_notes (this_insn, regno, reloadnum); 5363 return 0; 5364 } 5365 } 5366 5367 if (reg_renumber[regno] >= 0) 5368 regno = reg_renumber[regno]; 5369 5370 /* We require a base register here... */ 5371 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x))) 5372 { 5373 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0), 5374 &XEXP (op1, 0), &XEXP (x, 0), 5375 MODE_BASE_REG_CLASS (mode), 5376 GET_MODE (x), GET_MODE (x), 0, 0, 5377 opnum, RELOAD_OTHER); 5378 5379 update_auto_inc_notes (this_insn, regno, reloadnum); 5380 return 0; 5381 } 5382 } 5383 else 5384 abort (); 5385 } 5386 return 0; 5387 5388 case POST_INC: 5389 case POST_DEC: 5390 case PRE_INC: 5391 case PRE_DEC: 5392 if (GET_CODE (XEXP (x, 0)) == REG) 5393 { 5394 int regno = REGNO (XEXP (x, 0)); 5395 int value = 0; 5396 rtx x_orig = x; 5397 5398 /* A register that is incremented cannot be constant! */ 5399 if (regno >= FIRST_PSEUDO_REGISTER 5400 && reg_equiv_constant[regno] != 0) 5401 abort (); 5402 5403 /* Handle a register that is equivalent to a memory location 5404 which cannot be addressed directly. */ 5405 if (reg_equiv_memory_loc[regno] != 0 5406 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5407 { 5408 rtx tem = make_memloc (XEXP (x, 0), regno); 5409 if (reg_equiv_address[regno] 5410 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5411 { 5412 /* First reload the memory location's address. 5413 We can't use ADDR_TYPE (type) here, because we need to 5414 write back the value after reading it, hence we actually 5415 need two registers. */ 5416 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5417 &XEXP (tem, 0), opnum, type, 5418 ind_levels, insn); 5419 /* Put this inside a new increment-expression. */ 5420 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5421 /* Proceed to reload that, as if it contained a register. */ 5422 } 5423 } 5424 5425 /* If we have a hard register that is ok as an index, 5426 don't make a reload. If an autoincrement of a nice register 5427 isn't "valid", it must be that no autoincrement is "valid". 5428 If that is true and something made an autoincrement anyway, 5429 this must be a special context where one is allowed. 5430 (For example, a "push" instruction.) 5431 We can't improve this address, so leave it alone. */ 5432 5433 /* Otherwise, reload the autoincrement into a suitable hard reg 5434 and record how much to increment by. */ 5435 5436 if (reg_renumber[regno] >= 0) 5437 regno = reg_renumber[regno]; 5438 if ((regno >= FIRST_PSEUDO_REGISTER 5439 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5440 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5441 { 5442 int reloadnum; 5443 5444 /* If we can output the register afterwards, do so, this 5445 saves the extra update. 5446 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5447 CALL_INSN - and it does not set CC0. 5448 But don't do this if we cannot directly address the 5449 memory location, since this will make it harder to 5450 reuse address reloads, and increases register pressure. 5451 Also don't do this if we can probably update x directly. */ 5452 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5453 ? XEXP (x, 0) 5454 : reg_equiv_mem[regno]); 5455 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5456 if (insn && GET_CODE (insn) == INSN && equiv 5457 && memory_operand (equiv, GET_MODE (equiv)) 5458#ifdef HAVE_cc0 5459 && ! sets_cc0_p (PATTERN (insn)) 5460#endif 5461 && ! (icode != CODE_FOR_nothing 5462 && ((*insn_data[icode].operand[0].predicate) 5463 (equiv, Pmode)) 5464 && ((*insn_data[icode].operand[1].predicate) 5465 (equiv, Pmode)))) 5466 { 5467 /* We use the original pseudo for loc, so that 5468 emit_reload_insns() knows which pseudo this 5469 reload refers to and updates the pseudo rtx, not 5470 its equivalent memory location, as well as the 5471 corresponding entry in reg_last_reload_reg. */ 5472 loc = &XEXP (x_orig, 0); 5473 x = XEXP (x, 0); 5474 reloadnum 5475 = push_reload (x, x, loc, loc, 5476 (context ? INDEX_REG_CLASS : 5477 MODE_BASE_REG_CLASS (mode)), 5478 GET_MODE (x), GET_MODE (x), 0, 0, 5479 opnum, RELOAD_OTHER); 5480 } 5481 else 5482 { 5483 reloadnum 5484 = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5485 (context ? INDEX_REG_CLASS : 5486 MODE_BASE_REG_CLASS (mode)), 5487 GET_MODE (x), GET_MODE (x), 0, 0, 5488 opnum, type); 5489 rld[reloadnum].inc 5490 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5491 5492 value = 1; 5493 } 5494 5495 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)), 5496 reloadnum); 5497 } 5498 return value; 5499 } 5500 5501 else if (GET_CODE (XEXP (x, 0)) == MEM) 5502 { 5503 /* This is probably the result of a substitution, by eliminate_regs, 5504 of an equivalent address for a pseudo that was not allocated to a 5505 hard register. Verify that the specified address is valid and 5506 reload it into a register. */ 5507 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5508 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5509 rtx link; 5510 int reloadnum; 5511 5512 /* Since we know we are going to reload this item, don't decrement 5513 for the indirection level. 5514 5515 Note that this is actually conservative: it would be slightly 5516 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5517 reload1.c here. */ 5518 /* We can't use ADDR_TYPE (type) here, because we need to 5519 write back the value after reading it, hence we actually 5520 need two registers. */ 5521 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5522 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5523 opnum, type, ind_levels, insn); 5524 5525 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5526 (context ? INDEX_REG_CLASS : 5527 MODE_BASE_REG_CLASS (mode)), 5528 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5529 rld[reloadnum].inc 5530 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5531 5532 link = FIND_REG_INC_NOTE (this_insn, tem); 5533 if (link != 0) 5534 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5535 5536 return 1; 5537 } 5538 return 0; 5539 5540 case MEM: 5541 /* This is probably the result of a substitution, by eliminate_regs, of 5542 an equivalent address for a pseudo that was not allocated to a hard 5543 register. Verify that the specified address is valid and reload it 5544 into a register. 5545 5546 Since we know we are going to reload this item, don't decrement for 5547 the indirection level. 5548 5549 Note that this is actually conservative: it would be slightly more 5550 efficient to use the value of SPILL_INDIRECT_LEVELS from 5551 reload1.c here. */ 5552 5553 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5554 opnum, ADDR_TYPE (type), ind_levels, insn); 5555 push_reload (*loc, NULL_RTX, loc, (rtx*) 0, 5556 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5557 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5558 return 1; 5559 5560 case REG: 5561 { 5562 int regno = REGNO (x); 5563 5564 if (reg_equiv_constant[regno] != 0) 5565 { 5566 find_reloads_address_part (reg_equiv_constant[regno], loc, 5567 (context ? INDEX_REG_CLASS : 5568 MODE_BASE_REG_CLASS (mode)), 5569 GET_MODE (x), opnum, type, ind_levels); 5570 return 1; 5571 } 5572 5573#if 0 /* This might screw code in reload1.c to delete prior output-reload 5574 that feeds this insn. */ 5575 if (reg_equiv_mem[regno] != 0) 5576 { 5577 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0, 5578 (context ? INDEX_REG_CLASS : 5579 MODE_BASE_REG_CLASS (mode)), 5580 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5581 return 1; 5582 } 5583#endif 5584 5585 if (reg_equiv_memory_loc[regno] 5586 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5587 { 5588 rtx tem = make_memloc (x, regno); 5589 if (reg_equiv_address[regno] != 0 5590 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5591 { 5592 x = tem; 5593 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5594 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5595 ind_levels, insn); 5596 } 5597 } 5598 5599 if (reg_renumber[regno] >= 0) 5600 regno = reg_renumber[regno]; 5601 5602 if ((regno >= FIRST_PSEUDO_REGISTER 5603 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5604 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5605 { 5606 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5607 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5608 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5609 return 1; 5610 } 5611 5612 /* If a register appearing in an address is the subject of a CLOBBER 5613 in this insn, reload it into some other register to be safe. 5614 The CLOBBER is supposed to make the register unavailable 5615 from before this insn to after it. */ 5616 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5617 { 5618 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5619 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5620 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5621 return 1; 5622 } 5623 } 5624 return 0; 5625 5626 case SUBREG: 5627 if (GET_CODE (SUBREG_REG (x)) == REG) 5628 { 5629 /* If this is a SUBREG of a hard register and the resulting register 5630 is of the wrong class, reload the whole SUBREG. This avoids 5631 needless copies if SUBREG_REG is multi-word. */ 5632 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5633 { 5634 int regno = subreg_regno (x); 5635 5636 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5637 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5638 { 5639 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5640 (context ? INDEX_REG_CLASS : 5641 MODE_BASE_REG_CLASS (mode)), 5642 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5643 return 1; 5644 } 5645 } 5646 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5647 is larger than the class size, then reload the whole SUBREG. */ 5648 else 5649 { 5650 enum reg_class class = (context ? INDEX_REG_CLASS 5651 : MODE_BASE_REG_CLASS (mode)); 5652 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5653 > reg_class_size[class]) 5654 { 5655 x = find_reloads_subreg_address (x, 0, opnum, type, 5656 ind_levels, insn); 5657 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5658 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5659 return 1; 5660 } 5661 } 5662 } 5663 break; 5664 5665 default: 5666 break; 5667 } 5668 5669 { 5670 const char *fmt = GET_RTX_FORMAT (code); 5671 int i; 5672 5673 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5674 { 5675 if (fmt[i] == 'e') 5676 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5677 opnum, type, ind_levels, insn); 5678 } 5679 } 5680 5681 return 0; 5682} 5683 5684/* X, which is found at *LOC, is a part of an address that needs to be 5685 reloaded into a register of class CLASS. If X is a constant, or if 5686 X is a PLUS that contains a constant, check that the constant is a 5687 legitimate operand and that we are supposed to be able to load 5688 it into the register. 5689 5690 If not, force the constant into memory and reload the MEM instead. 5691 5692 MODE is the mode to use, in case X is an integer constant. 5693 5694 OPNUM and TYPE describe the purpose of any reloads made. 5695 5696 IND_LEVELS says how many levels of indirect addressing this machine 5697 supports. */ 5698 5699static void 5700find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5701 rtx x; 5702 rtx *loc; 5703 enum reg_class class; 5704 enum machine_mode mode; 5705 int opnum; 5706 enum reload_type type; 5707 int ind_levels; 5708{ 5709 if (CONSTANT_P (x) 5710 && (! LEGITIMATE_CONSTANT_P (x) 5711 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5712 { 5713 rtx tem; 5714 5715 tem = x = force_const_mem (mode, x); 5716 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5717 opnum, type, ind_levels, 0); 5718 } 5719 5720 else if (GET_CODE (x) == PLUS 5721 && CONSTANT_P (XEXP (x, 1)) 5722 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5723 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5724 { 5725 rtx tem; 5726 5727 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5728 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5729 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5730 opnum, type, ind_levels, 0); 5731 } 5732 5733 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5734 mode, VOIDmode, 0, 0, opnum, type); 5735} 5736 5737/* X, a subreg of a pseudo, is a part of an address that needs to be 5738 reloaded. 5739 5740 If the pseudo is equivalent to a memory location that cannot be directly 5741 addressed, make the necessary address reloads. 5742 5743 If address reloads have been necessary, or if the address is changed 5744 by register elimination, return the rtx of the memory location; 5745 otherwise, return X. 5746 5747 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5748 memory location. 5749 5750 OPNUM and TYPE identify the purpose of the reload. 5751 5752 IND_LEVELS says how many levels of indirect addressing are 5753 supported at this point in the address. 5754 5755 INSN, if nonzero, is the insn in which we do the reload. It is used 5756 to determine where to put USEs for pseudos that we have to replace with 5757 stack slots. */ 5758 5759static rtx 5760find_reloads_subreg_address (x, force_replace, opnum, type, 5761 ind_levels, insn) 5762 rtx x; 5763 int force_replace; 5764 int opnum; 5765 enum reload_type type; 5766 int ind_levels; 5767 rtx insn; 5768{ 5769 int regno = REGNO (SUBREG_REG (x)); 5770 5771 if (reg_equiv_memory_loc[regno]) 5772 { 5773 /* If the address is not directly addressable, or if the address is not 5774 offsettable, then it must be replaced. */ 5775 if (! force_replace 5776 && (reg_equiv_address[regno] 5777 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5778 force_replace = 1; 5779 5780 if (force_replace || num_not_at_initial_offset) 5781 { 5782 rtx tem = make_memloc (SUBREG_REG (x), regno); 5783 5784 /* If the address changes because of register elimination, then 5785 it must be replaced. */ 5786 if (force_replace 5787 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5788 { 5789 int offset = SUBREG_BYTE (x); 5790 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); 5791 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5792 5793 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5794 PUT_MODE (tem, GET_MODE (x)); 5795 5796 /* If this was a paradoxical subreg that we replaced, the 5797 resulting memory must be sufficiently aligned to allow 5798 us to widen the mode of the memory. */ 5799 if (outer_size > inner_size && STRICT_ALIGNMENT) 5800 { 5801 rtx base; 5802 5803 base = XEXP (tem, 0); 5804 if (GET_CODE (base) == PLUS) 5805 { 5806 if (GET_CODE (XEXP (base, 1)) == CONST_INT 5807 && INTVAL (XEXP (base, 1)) % outer_size != 0) 5808 return x; 5809 base = XEXP (base, 0); 5810 } 5811 if (GET_CODE (base) != REG 5812 || (REGNO_POINTER_ALIGN (REGNO (base)) 5813 < outer_size * BITS_PER_UNIT)) 5814 return x; 5815 } 5816 5817 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5818 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5819 ind_levels, insn); 5820 5821 /* If this is not a toplevel operand, find_reloads doesn't see 5822 this substitution. We have to emit a USE of the pseudo so 5823 that delete_output_reload can see it. */ 5824 if (replace_reloads && recog_data.operand[opnum] != x) 5825 /* We mark the USE with QImode so that we recognize it 5826 as one that can be safely deleted at the end of 5827 reload. */ 5828 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, 5829 SUBREG_REG (x)), 5830 insn), QImode); 5831 x = tem; 5832 } 5833 } 5834 } 5835 return x; 5836} 5837 5838/* Substitute into the current INSN the registers into which we have reloaded 5839 the things that need reloading. The array `replacements' 5840 contains the locations of all pointers that must be changed 5841 and says what to replace them with. 5842 5843 Return the rtx that X translates into; usually X, but modified. */ 5844 5845void 5846subst_reloads (insn) 5847 rtx insn; 5848{ 5849 int i; 5850 5851 for (i = 0; i < n_replacements; i++) 5852 { 5853 struct replacement *r = &replacements[i]; 5854 rtx reloadreg = rld[r->what].reg_rtx; 5855 if (reloadreg) 5856 { 5857#ifdef ENABLE_CHECKING 5858 /* Internal consistency test. Check that we don't modify 5859 anything in the equivalence arrays. Whenever something from 5860 those arrays needs to be reloaded, it must be unshared before 5861 being substituted into; the equivalence must not be modified. 5862 Otherwise, if the equivalence is used after that, it will 5863 have been modified, and the thing substituted (probably a 5864 register) is likely overwritten and not a usable equivalence. */ 5865 int check_regno; 5866 5867 for (check_regno = 0; check_regno < max_regno; check_regno++) 5868 { 5869#define CHECK_MODF(ARRAY) \ 5870 if (ARRAY[check_regno] \ 5871 && loc_mentioned_in_p (r->where, \ 5872 ARRAY[check_regno])) \ 5873 abort () 5874 5875 CHECK_MODF (reg_equiv_constant); 5876 CHECK_MODF (reg_equiv_memory_loc); 5877 CHECK_MODF (reg_equiv_address); 5878 CHECK_MODF (reg_equiv_mem); 5879#undef CHECK_MODF 5880 } 5881#endif /* ENABLE_CHECKING */ 5882 5883 /* If we're replacing a LABEL_REF with a register, add a 5884 REG_LABEL note to indicate to flow which label this 5885 register refers to. */ 5886 if (GET_CODE (*r->where) == LABEL_REF 5887 && GET_CODE (insn) == JUMP_INSN) 5888 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 5889 XEXP (*r->where, 0), 5890 REG_NOTES (insn)); 5891 5892 /* Encapsulate RELOADREG so its machine mode matches what 5893 used to be there. Note that gen_lowpart_common will 5894 do the wrong thing if RELOADREG is multi-word. RELOADREG 5895 will always be a REG here. */ 5896 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5897 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5898 5899 /* If we are putting this into a SUBREG and RELOADREG is a 5900 SUBREG, we would be making nested SUBREGs, so we have to fix 5901 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5902 5903 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5904 { 5905 if (GET_MODE (*r->subreg_loc) 5906 == GET_MODE (SUBREG_REG (reloadreg))) 5907 *r->subreg_loc = SUBREG_REG (reloadreg); 5908 else 5909 { 5910 int final_offset = 5911 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg); 5912 5913 /* When working with SUBREGs the rule is that the byte 5914 offset must be a multiple of the SUBREG's mode. */ 5915 final_offset = (final_offset / 5916 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5917 final_offset = (final_offset * 5918 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5919 5920 *r->where = SUBREG_REG (reloadreg); 5921 SUBREG_BYTE (*r->subreg_loc) = final_offset; 5922 } 5923 } 5924 else 5925 *r->where = reloadreg; 5926 } 5927 /* If reload got no reg and isn't optional, something's wrong. */ 5928 else if (! rld[r->what].optional) 5929 abort (); 5930 } 5931} 5932 5933/* Make a copy of any replacements being done into X and move those 5934 copies to locations in Y, a copy of X. */ 5935 5936void 5937copy_replacements (x, y) 5938 rtx x, y; 5939{ 5940 /* We can't support X being a SUBREG because we might then need to know its 5941 location if something inside it was replaced. */ 5942 if (GET_CODE (x) == SUBREG) 5943 abort (); 5944 5945 copy_replacements_1 (&x, &y, n_replacements); 5946} 5947 5948static void 5949copy_replacements_1 (px, py, orig_replacements) 5950 rtx *px; 5951 rtx *py; 5952 int orig_replacements; 5953{ 5954 int i, j; 5955 rtx x, y; 5956 struct replacement *r; 5957 enum rtx_code code; 5958 const char *fmt; 5959 5960 for (j = 0; j < orig_replacements; j++) 5961 { 5962 if (replacements[j].subreg_loc == px) 5963 { 5964 r = &replacements[n_replacements++]; 5965 r->where = replacements[j].where; 5966 r->subreg_loc = py; 5967 r->what = replacements[j].what; 5968 r->mode = replacements[j].mode; 5969 } 5970 else if (replacements[j].where == px) 5971 { 5972 r = &replacements[n_replacements++]; 5973 r->where = py; 5974 r->subreg_loc = 0; 5975 r->what = replacements[j].what; 5976 r->mode = replacements[j].mode; 5977 } 5978 } 5979 5980 x = *px; 5981 y = *py; 5982 code = GET_CODE (x); 5983 fmt = GET_RTX_FORMAT (code); 5984 5985 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5986 { 5987 if (fmt[i] == 'e') 5988 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements); 5989 else if (fmt[i] == 'E') 5990 for (j = XVECLEN (x, i); --j >= 0; ) 5991 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j), 5992 orig_replacements); 5993 } 5994} 5995 5996/* Change any replacements being done to *X to be done to *Y */ 5997 5998void 5999move_replacements (x, y) 6000 rtx *x; 6001 rtx *y; 6002{ 6003 int i; 6004 6005 for (i = 0; i < n_replacements; i++) 6006 if (replacements[i].subreg_loc == x) 6007 replacements[i].subreg_loc = y; 6008 else if (replacements[i].where == x) 6009 { 6010 replacements[i].where = y; 6011 replacements[i].subreg_loc = 0; 6012 } 6013} 6014 6015/* If LOC was scheduled to be replaced by something, return the replacement. 6016 Otherwise, return *LOC. */ 6017 6018rtx 6019find_replacement (loc) 6020 rtx *loc; 6021{ 6022 struct replacement *r; 6023 6024 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 6025 { 6026 rtx reloadreg = rld[r->what].reg_rtx; 6027 6028 if (reloadreg && r->where == loc) 6029 { 6030 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 6031 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 6032 6033 return reloadreg; 6034 } 6035 else if (reloadreg && r->subreg_loc == loc) 6036 { 6037 /* RELOADREG must be either a REG or a SUBREG. 6038 6039 ??? Is it actually still ever a SUBREG? If so, why? */ 6040 6041 if (GET_CODE (reloadreg) == REG) 6042 return gen_rtx_REG (GET_MODE (*loc), 6043 (REGNO (reloadreg) + 6044 subreg_regno_offset (REGNO (SUBREG_REG (*loc)), 6045 GET_MODE (SUBREG_REG (*loc)), 6046 SUBREG_BYTE (*loc), 6047 GET_MODE (*loc)))); 6048 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 6049 return reloadreg; 6050 else 6051 { 6052 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc); 6053 6054 /* When working with SUBREGs the rule is that the byte 6055 offset must be a multiple of the SUBREG's mode. */ 6056 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc))); 6057 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc))); 6058 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 6059 final_offset); 6060 } 6061 } 6062 } 6063 6064 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 6065 what's inside and make a new rtl if so. */ 6066 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 6067 || GET_CODE (*loc) == MULT) 6068 { 6069 rtx x = find_replacement (&XEXP (*loc, 0)); 6070 rtx y = find_replacement (&XEXP (*loc, 1)); 6071 6072 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 6073 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 6074 } 6075 6076 return *loc; 6077} 6078 6079/* Return nonzero if register in range [REGNO, ENDREGNO) 6080 appears either explicitly or implicitly in X 6081 other than being stored into (except for earlyclobber operands). 6082 6083 References contained within the substructure at LOC do not count. 6084 LOC may be zero, meaning don't ignore anything. 6085 6086 This is similar to refers_to_regno_p in rtlanal.c except that we 6087 look at equivalences for pseudos that didn't get hard registers. */ 6088 6089int 6090refers_to_regno_for_reload_p (regno, endregno, x, loc) 6091 unsigned int regno, endregno; 6092 rtx x; 6093 rtx *loc; 6094{ 6095 int i; 6096 unsigned int r; 6097 RTX_CODE code; 6098 const char *fmt; 6099 6100 if (x == 0) 6101 return 0; 6102 6103 repeat: 6104 code = GET_CODE (x); 6105 6106 switch (code) 6107 { 6108 case REG: 6109 r = REGNO (x); 6110 6111 /* If this is a pseudo, a hard register must not have been allocated. 6112 X must therefore either be a constant or be in memory. */ 6113 if (r >= FIRST_PSEUDO_REGISTER) 6114 { 6115 if (reg_equiv_memory_loc[r]) 6116 return refers_to_regno_for_reload_p (regno, endregno, 6117 reg_equiv_memory_loc[r], 6118 (rtx*) 0); 6119 6120 if (reg_equiv_constant[r]) 6121 return 0; 6122 6123 abort (); 6124 } 6125 6126 return (endregno > r 6127 && regno < r + (r < FIRST_PSEUDO_REGISTER 6128 ? HARD_REGNO_NREGS (r, GET_MODE (x)) 6129 : 1)); 6130 6131 case SUBREG: 6132 /* If this is a SUBREG of a hard reg, we can see exactly which 6133 registers are being modified. Otherwise, handle normally. */ 6134 if (GET_CODE (SUBREG_REG (x)) == REG 6135 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 6136 { 6137 unsigned int inner_regno = subreg_regno (x); 6138 unsigned int inner_endregno 6139 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 6140 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6141 6142 return endregno > inner_regno && regno < inner_endregno; 6143 } 6144 break; 6145 6146 case CLOBBER: 6147 case SET: 6148 if (&SET_DEST (x) != loc 6149 /* Note setting a SUBREG counts as referring to the REG it is in for 6150 a pseudo but not for hard registers since we can 6151 treat each word individually. */ 6152 && ((GET_CODE (SET_DEST (x)) == SUBREG 6153 && loc != &SUBREG_REG (SET_DEST (x)) 6154 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 6155 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 6156 && refers_to_regno_for_reload_p (regno, endregno, 6157 SUBREG_REG (SET_DEST (x)), 6158 loc)) 6159 /* If the output is an earlyclobber operand, this is 6160 a conflict. */ 6161 || ((GET_CODE (SET_DEST (x)) != REG 6162 || earlyclobber_operand_p (SET_DEST (x))) 6163 && refers_to_regno_for_reload_p (regno, endregno, 6164 SET_DEST (x), loc)))) 6165 return 1; 6166 6167 if (code == CLOBBER || loc == &SET_SRC (x)) 6168 return 0; 6169 x = SET_SRC (x); 6170 goto repeat; 6171 6172 default: 6173 break; 6174 } 6175 6176 /* X does not match, so try its subexpressions. */ 6177 6178 fmt = GET_RTX_FORMAT (code); 6179 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6180 { 6181 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 6182 { 6183 if (i == 0) 6184 { 6185 x = XEXP (x, 0); 6186 goto repeat; 6187 } 6188 else 6189 if (refers_to_regno_for_reload_p (regno, endregno, 6190 XEXP (x, i), loc)) 6191 return 1; 6192 } 6193 else if (fmt[i] == 'E') 6194 { 6195 int j; 6196 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6197 if (loc != &XVECEXP (x, i, j) 6198 && refers_to_regno_for_reload_p (regno, endregno, 6199 XVECEXP (x, i, j), loc)) 6200 return 1; 6201 } 6202 } 6203 return 0; 6204} 6205 6206/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6207 we check if any register number in X conflicts with the relevant register 6208 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6209 contains a MEM (we don't bother checking for memory addresses that can't 6210 conflict because we expect this to be a rare case. 6211 6212 This function is similar to reg_overlap_mentioned_p in rtlanal.c except 6213 that we look at equivalences for pseudos that didn't get hard registers. */ 6214 6215int 6216reg_overlap_mentioned_for_reload_p (x, in) 6217 rtx x, in; 6218{ 6219 int regno, endregno; 6220 6221 /* Overly conservative. */ 6222 if (GET_CODE (x) == STRICT_LOW_PART 6223 || GET_RTX_CLASS (GET_CODE (x)) == 'a') 6224 x = XEXP (x, 0); 6225 6226 /* If either argument is a constant, then modifying X can not affect IN. */ 6227 if (CONSTANT_P (x) || CONSTANT_P (in)) 6228 return 0; 6229 else if (GET_CODE (x) == SUBREG) 6230 { 6231 regno = REGNO (SUBREG_REG (x)); 6232 if (regno < FIRST_PSEUDO_REGISTER) 6233 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)), 6234 GET_MODE (SUBREG_REG (x)), 6235 SUBREG_BYTE (x), 6236 GET_MODE (x)); 6237 } 6238 else if (GET_CODE (x) == REG) 6239 { 6240 regno = REGNO (x); 6241 6242 /* If this is a pseudo, it must not have been assigned a hard register. 6243 Therefore, it must either be in memory or be a constant. */ 6244 6245 if (regno >= FIRST_PSEUDO_REGISTER) 6246 { 6247 if (reg_equiv_memory_loc[regno]) 6248 return refers_to_mem_for_reload_p (in); 6249 else if (reg_equiv_constant[regno]) 6250 return 0; 6251 abort (); 6252 } 6253 } 6254 else if (GET_CODE (x) == MEM) 6255 return refers_to_mem_for_reload_p (in); 6256 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6257 || GET_CODE (x) == CC0) 6258 return reg_mentioned_p (x, in); 6259 else if (GET_CODE (x) == PLUS) 6260 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in) 6261 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in)); 6262 else 6263 abort (); 6264 6265 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6266 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6267 6268 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0); 6269} 6270 6271/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6272 registers. */ 6273 6274int 6275refers_to_mem_for_reload_p (x) 6276 rtx x; 6277{ 6278 const char *fmt; 6279 int i; 6280 6281 if (GET_CODE (x) == MEM) 6282 return 1; 6283 6284 if (GET_CODE (x) == REG) 6285 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6286 && reg_equiv_memory_loc[REGNO (x)]); 6287 6288 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6289 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6290 if (fmt[i] == 'e' 6291 && (GET_CODE (XEXP (x, i)) == MEM 6292 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6293 return 1; 6294 6295 return 0; 6296} 6297 6298/* Check the insns before INSN to see if there is a suitable register 6299 containing the same value as GOAL. 6300 If OTHER is -1, look for a register in class CLASS. 6301 Otherwise, just see if register number OTHER shares GOAL's value. 6302 6303 Return an rtx for the register found, or zero if none is found. 6304 6305 If RELOAD_REG_P is (short *)1, 6306 we reject any hard reg that appears in reload_reg_rtx 6307 because such a hard reg is also needed coming into this insn. 6308 6309 If RELOAD_REG_P is any other nonzero value, 6310 it is a vector indexed by hard reg number 6311 and we reject any hard reg whose element in the vector is nonnegative 6312 as well as any that appears in reload_reg_rtx. 6313 6314 If GOAL is zero, then GOALREG is a register number; we look 6315 for an equivalent for that register. 6316 6317 MODE is the machine mode of the value we want an equivalence for. 6318 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6319 6320 This function is used by jump.c as well as in the reload pass. 6321 6322 If GOAL is the sum of the stack pointer and a constant, we treat it 6323 as if it were a constant except that sp is required to be unchanging. */ 6324 6325rtx 6326find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6327 rtx goal; 6328 rtx insn; 6329 enum reg_class class; 6330 int other; 6331 short *reload_reg_p; 6332 int goalreg; 6333 enum machine_mode mode; 6334{ 6335 rtx p = insn; 6336 rtx goaltry, valtry, value, where; 6337 rtx pat; 6338 int regno = -1; 6339 int valueno; 6340 int goal_mem = 0; 6341 int goal_const = 0; 6342 int goal_mem_addr_varies = 0; 6343 int need_stable_sp = 0; 6344 int nregs; 6345 int valuenregs; 6346 6347 if (goal == 0) 6348 regno = goalreg; 6349 else if (GET_CODE (goal) == REG) 6350 regno = REGNO (goal); 6351 else if (GET_CODE (goal) == MEM) 6352 { 6353 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6354 if (MEM_VOLATILE_P (goal)) 6355 return 0; 6356 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6357 return 0; 6358 /* An address with side effects must be reexecuted. */ 6359 switch (code) 6360 { 6361 case POST_INC: 6362 case PRE_INC: 6363 case POST_DEC: 6364 case PRE_DEC: 6365 case POST_MODIFY: 6366 case PRE_MODIFY: 6367 return 0; 6368 default: 6369 break; 6370 } 6371 goal_mem = 1; 6372 } 6373 else if (CONSTANT_P (goal)) 6374 goal_const = 1; 6375 else if (GET_CODE (goal) == PLUS 6376 && XEXP (goal, 0) == stack_pointer_rtx 6377 && CONSTANT_P (XEXP (goal, 1))) 6378 goal_const = need_stable_sp = 1; 6379 else if (GET_CODE (goal) == PLUS 6380 && XEXP (goal, 0) == frame_pointer_rtx 6381 && CONSTANT_P (XEXP (goal, 1))) 6382 goal_const = 1; 6383 else 6384 return 0; 6385 6386 /* Scan insns back from INSN, looking for one that copies 6387 a value into or out of GOAL. 6388 Stop and give up if we reach a label. */ 6389 6390 while (1) 6391 { 6392 p = PREV_INSN (p); 6393 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6394 return 0; 6395 6396 if (GET_CODE (p) == INSN 6397 /* If we don't want spill regs ... */ 6398 && (! (reload_reg_p != 0 6399 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6400 /* ... then ignore insns introduced by reload; they aren't 6401 useful and can cause results in reload_as_needed to be 6402 different from what they were when calculating the need for 6403 spills. If we notice an input-reload insn here, we will 6404 reject it below, but it might hide a usable equivalent. 6405 That makes bad code. It may even abort: perhaps no reg was 6406 spilled for this insn because it was assumed we would find 6407 that equivalent. */ 6408 || INSN_UID (p) < reload_first_uid)) 6409 { 6410 rtx tem; 6411 pat = single_set (p); 6412 6413 /* First check for something that sets some reg equal to GOAL. */ 6414 if (pat != 0 6415 && ((regno >= 0 6416 && true_regnum (SET_SRC (pat)) == regno 6417 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6418 || 6419 (regno >= 0 6420 && true_regnum (SET_DEST (pat)) == regno 6421 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6422 || 6423 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6424 /* When looking for stack pointer + const, 6425 make sure we don't use a stack adjust. */ 6426 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6427 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6428 || (goal_mem 6429 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6430 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6431 || (goal_mem 6432 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6433 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6434 /* If we are looking for a constant, 6435 and something equivalent to that constant was copied 6436 into a reg, we can use that reg. */ 6437 || (goal_const && REG_NOTES (p) != 0 6438 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX)) 6439 && ((rtx_equal_p (XEXP (tem, 0), goal) 6440 && (valueno 6441 = true_regnum (valtry = SET_DEST (pat))) >= 0) 6442 || (GET_CODE (SET_DEST (pat)) == REG 6443 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6444 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6445 == MODE_FLOAT) 6446 && GET_CODE (goal) == CONST_INT 6447 && 0 != (goaltry 6448 = operand_subword (XEXP (tem, 0), 0, 0, 6449 VOIDmode)) 6450 && rtx_equal_p (goal, goaltry) 6451 && (valtry 6452 = operand_subword (SET_DEST (pat), 0, 0, 6453 VOIDmode)) 6454 && (valueno = true_regnum (valtry)) >= 0))) 6455 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6456 NULL_RTX)) 6457 && GET_CODE (SET_DEST (pat)) == REG 6458 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6459 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6460 == MODE_FLOAT) 6461 && GET_CODE (goal) == CONST_INT 6462 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6463 VOIDmode)) 6464 && rtx_equal_p (goal, goaltry) 6465 && (valtry 6466 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6467 && (valueno = true_regnum (valtry)) >= 0))) 6468 { 6469 if (other >= 0) 6470 { 6471 if (valueno != other) 6472 continue; 6473 } 6474 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6475 continue; 6476 else 6477 { 6478 int i; 6479 6480 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6481 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6482 valueno + i)) 6483 break; 6484 if (i >= 0) 6485 continue; 6486 } 6487 value = valtry; 6488 where = p; 6489 break; 6490 } 6491 } 6492 } 6493 6494 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6495 (or copying VALUE into GOAL, if GOAL is also a register). 6496 Now verify that VALUE is really valid. */ 6497 6498 /* VALUENO is the register number of VALUE; a hard register. */ 6499 6500 /* Don't try to re-use something that is killed in this insn. We want 6501 to be able to trust REG_UNUSED notes. */ 6502 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value)) 6503 return 0; 6504 6505 /* If we propose to get the value from the stack pointer or if GOAL is 6506 a MEM based on the stack pointer, we need a stable SP. */ 6507 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6508 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6509 goal))) 6510 need_stable_sp = 1; 6511 6512 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6513 if (GET_MODE (value) != mode) 6514 return 0; 6515 6516 /* Reject VALUE if it was loaded from GOAL 6517 and is also a register that appears in the address of GOAL. */ 6518 6519 if (goal_mem && value == SET_DEST (single_set (where)) 6520 && refers_to_regno_for_reload_p (valueno, 6521 (valueno 6522 + HARD_REGNO_NREGS (valueno, mode)), 6523 goal, (rtx*) 0)) 6524 return 0; 6525 6526 /* Reject registers that overlap GOAL. */ 6527 6528 if (!goal_mem && !goal_const 6529 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno 6530 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode)) 6531 return 0; 6532 6533 nregs = HARD_REGNO_NREGS (regno, mode); 6534 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6535 6536 /* Reject VALUE if it is one of the regs reserved for reloads. 6537 Reload1 knows how to reuse them anyway, and it would get 6538 confused if we allocated one without its knowledge. 6539 (Now that insns introduced by reload are ignored above, 6540 this case shouldn't happen, but I'm not positive.) */ 6541 6542 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6543 { 6544 int i; 6545 for (i = 0; i < valuenregs; ++i) 6546 if (reload_reg_p[valueno + i] >= 0) 6547 return 0; 6548 } 6549 6550 /* Reject VALUE if it is a register being used for an input reload 6551 even if it is not one of those reserved. */ 6552 6553 if (reload_reg_p != 0) 6554 { 6555 int i; 6556 for (i = 0; i < n_reloads; i++) 6557 if (rld[i].reg_rtx != 0 && rld[i].in) 6558 { 6559 int regno1 = REGNO (rld[i].reg_rtx); 6560 int nregs1 = HARD_REGNO_NREGS (regno1, 6561 GET_MODE (rld[i].reg_rtx)); 6562 if (regno1 < valueno + valuenregs 6563 && regno1 + nregs1 > valueno) 6564 return 0; 6565 } 6566 } 6567 6568 if (goal_mem) 6569 /* We must treat frame pointer as varying here, 6570 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6571 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6572 6573 /* Now verify that the values of GOAL and VALUE remain unaltered 6574 until INSN is reached. */ 6575 6576 p = insn; 6577 while (1) 6578 { 6579 p = PREV_INSN (p); 6580 if (p == where) 6581 return value; 6582 6583 /* Don't trust the conversion past a function call 6584 if either of the two is in a call-clobbered register, or memory. */ 6585 if (GET_CODE (p) == CALL_INSN) 6586 { 6587 int i; 6588 6589 if (goal_mem || need_stable_sp) 6590 return 0; 6591 6592 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6593 for (i = 0; i < nregs; ++i) 6594 if (call_used_regs[regno + i]) 6595 return 0; 6596 6597 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6598 for (i = 0; i < valuenregs; ++i) 6599 if (call_used_regs[valueno + i]) 6600 return 0; 6601#ifdef NON_SAVING_SETJMP 6602 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL)) 6603 return 0; 6604#endif 6605 } 6606 6607 if (INSN_P (p)) 6608 { 6609 pat = PATTERN (p); 6610 6611 /* Watch out for unspec_volatile, and volatile asms. */ 6612 if (volatile_insn_p (pat)) 6613 return 0; 6614 6615 /* If this insn P stores in either GOAL or VALUE, return 0. 6616 If GOAL is a memory ref and this insn writes memory, return 0. 6617 If GOAL is a memory ref and its address is not constant, 6618 and this insn P changes a register used in GOAL, return 0. */ 6619 6620 if (GET_CODE (pat) == COND_EXEC) 6621 pat = COND_EXEC_CODE (pat); 6622 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6623 { 6624 rtx dest = SET_DEST (pat); 6625 while (GET_CODE (dest) == SUBREG 6626 || GET_CODE (dest) == ZERO_EXTRACT 6627 || GET_CODE (dest) == SIGN_EXTRACT 6628 || GET_CODE (dest) == STRICT_LOW_PART) 6629 dest = XEXP (dest, 0); 6630 if (GET_CODE (dest) == REG) 6631 { 6632 int xregno = REGNO (dest); 6633 int xnregs; 6634 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6635 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6636 else 6637 xnregs = 1; 6638 if (xregno < regno + nregs && xregno + xnregs > regno) 6639 return 0; 6640 if (xregno < valueno + valuenregs 6641 && xregno + xnregs > valueno) 6642 return 0; 6643 if (goal_mem_addr_varies 6644 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6645 return 0; 6646 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6647 return 0; 6648 } 6649 else if (goal_mem && GET_CODE (dest) == MEM 6650 && ! push_operand (dest, GET_MODE (dest))) 6651 return 0; 6652 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6653 && reg_equiv_memory_loc[regno] != 0) 6654 return 0; 6655 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6656 return 0; 6657 } 6658 else if (GET_CODE (pat) == PARALLEL) 6659 { 6660 int i; 6661 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6662 { 6663 rtx v1 = XVECEXP (pat, 0, i); 6664 if (GET_CODE (v1) == COND_EXEC) 6665 v1 = COND_EXEC_CODE (v1); 6666 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6667 { 6668 rtx dest = SET_DEST (v1); 6669 while (GET_CODE (dest) == SUBREG 6670 || GET_CODE (dest) == ZERO_EXTRACT 6671 || GET_CODE (dest) == SIGN_EXTRACT 6672 || GET_CODE (dest) == STRICT_LOW_PART) 6673 dest = XEXP (dest, 0); 6674 if (GET_CODE (dest) == REG) 6675 { 6676 int xregno = REGNO (dest); 6677 int xnregs; 6678 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6679 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6680 else 6681 xnregs = 1; 6682 if (xregno < regno + nregs 6683 && xregno + xnregs > regno) 6684 return 0; 6685 if (xregno < valueno + valuenregs 6686 && xregno + xnregs > valueno) 6687 return 0; 6688 if (goal_mem_addr_varies 6689 && reg_overlap_mentioned_for_reload_p (dest, 6690 goal)) 6691 return 0; 6692 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6693 return 0; 6694 } 6695 else if (goal_mem && GET_CODE (dest) == MEM 6696 && ! push_operand (dest, GET_MODE (dest))) 6697 return 0; 6698 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6699 && reg_equiv_memory_loc[regno] != 0) 6700 return 0; 6701 else if (need_stable_sp 6702 && push_operand (dest, GET_MODE (dest))) 6703 return 0; 6704 } 6705 } 6706 } 6707 6708 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6709 { 6710 rtx link; 6711 6712 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6713 link = XEXP (link, 1)) 6714 { 6715 pat = XEXP (link, 0); 6716 if (GET_CODE (pat) == CLOBBER) 6717 { 6718 rtx dest = SET_DEST (pat); 6719 6720 if (GET_CODE (dest) == REG) 6721 { 6722 int xregno = REGNO (dest); 6723 int xnregs 6724 = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6725 6726 if (xregno < regno + nregs 6727 && xregno + xnregs > regno) 6728 return 0; 6729 else if (xregno < valueno + valuenregs 6730 && xregno + xnregs > valueno) 6731 return 0; 6732 else if (goal_mem_addr_varies 6733 && reg_overlap_mentioned_for_reload_p (dest, 6734 goal)) 6735 return 0; 6736 } 6737 6738 else if (goal_mem && GET_CODE (dest) == MEM 6739 && ! push_operand (dest, GET_MODE (dest))) 6740 return 0; 6741 else if (need_stable_sp 6742 && push_operand (dest, GET_MODE (dest))) 6743 return 0; 6744 } 6745 } 6746 } 6747 6748#ifdef AUTO_INC_DEC 6749 /* If this insn auto-increments or auto-decrements 6750 either regno or valueno, return 0 now. 6751 If GOAL is a memory ref and its address is not constant, 6752 and this insn P increments a register used in GOAL, return 0. */ 6753 { 6754 rtx link; 6755 6756 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6757 if (REG_NOTE_KIND (link) == REG_INC 6758 && GET_CODE (XEXP (link, 0)) == REG) 6759 { 6760 int incno = REGNO (XEXP (link, 0)); 6761 if (incno < regno + nregs && incno >= regno) 6762 return 0; 6763 if (incno < valueno + valuenregs && incno >= valueno) 6764 return 0; 6765 if (goal_mem_addr_varies 6766 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6767 goal)) 6768 return 0; 6769 } 6770 } 6771#endif 6772 } 6773 } 6774} 6775 6776/* Find a place where INCED appears in an increment or decrement operator 6777 within X, and return the amount INCED is incremented or decremented by. 6778 The value is always positive. */ 6779 6780static int 6781find_inc_amount (x, inced) 6782 rtx x, inced; 6783{ 6784 enum rtx_code code = GET_CODE (x); 6785 const char *fmt; 6786 int i; 6787 6788 if (code == MEM) 6789 { 6790 rtx addr = XEXP (x, 0); 6791 if ((GET_CODE (addr) == PRE_DEC 6792 || GET_CODE (addr) == POST_DEC 6793 || GET_CODE (addr) == PRE_INC 6794 || GET_CODE (addr) == POST_INC) 6795 && XEXP (addr, 0) == inced) 6796 return GET_MODE_SIZE (GET_MODE (x)); 6797 else if ((GET_CODE (addr) == PRE_MODIFY 6798 || GET_CODE (addr) == POST_MODIFY) 6799 && GET_CODE (XEXP (addr, 1)) == PLUS 6800 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 6801 && XEXP (addr, 0) == inced 6802 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT) 6803 { 6804 i = INTVAL (XEXP (XEXP (addr, 1), 1)); 6805 return i < 0 ? -i : i; 6806 } 6807 } 6808 6809 fmt = GET_RTX_FORMAT (code); 6810 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6811 { 6812 if (fmt[i] == 'e') 6813 { 6814 int tem = find_inc_amount (XEXP (x, i), inced); 6815 if (tem != 0) 6816 return tem; 6817 } 6818 if (fmt[i] == 'E') 6819 { 6820 int j; 6821 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6822 { 6823 int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6824 if (tem != 0) 6825 return tem; 6826 } 6827 } 6828 } 6829 6830 return 0; 6831} 6832 6833/* Return 1 if register REGNO is the subject of a clobber in insn INSN. 6834 If SETS is nonzero, also consider SETs. */ 6835 6836int 6837regno_clobbered_p (regno, insn, mode, sets) 6838 unsigned int regno; 6839 rtx insn; 6840 enum machine_mode mode; 6841 int sets; 6842{ 6843 unsigned int nregs = HARD_REGNO_NREGS (regno, mode); 6844 unsigned int endregno = regno + nregs; 6845 6846 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6847 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6848 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6849 { 6850 unsigned int test = REGNO (XEXP (PATTERN (insn), 0)); 6851 6852 return test >= regno && test < endregno; 6853 } 6854 6855 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6856 { 6857 int i = XVECLEN (PATTERN (insn), 0) - 1; 6858 6859 for (; i >= 0; i--) 6860 { 6861 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6862 if ((GET_CODE (elt) == CLOBBER 6863 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6864 && GET_CODE (XEXP (elt, 0)) == REG) 6865 { 6866 unsigned int test = REGNO (XEXP (elt, 0)); 6867 6868 if (test >= regno && test < endregno) 6869 return 1; 6870 } 6871 } 6872 } 6873 6874 return 0; 6875} 6876 6877static const char *const reload_when_needed_name[] = 6878{ 6879 "RELOAD_FOR_INPUT", 6880 "RELOAD_FOR_OUTPUT", 6881 "RELOAD_FOR_INSN", 6882 "RELOAD_FOR_INPUT_ADDRESS", 6883 "RELOAD_FOR_INPADDR_ADDRESS", 6884 "RELOAD_FOR_OUTPUT_ADDRESS", 6885 "RELOAD_FOR_OUTADDR_ADDRESS", 6886 "RELOAD_FOR_OPERAND_ADDRESS", 6887 "RELOAD_FOR_OPADDR_ADDR", 6888 "RELOAD_OTHER", 6889 "RELOAD_FOR_OTHER_ADDRESS" 6890}; 6891 6892static const char * const reg_class_names[] = REG_CLASS_NAMES; 6893 6894/* These functions are used to print the variables set by 'find_reloads' */ 6895 6896void 6897debug_reload_to_stream (f) 6898 FILE *f; 6899{ 6900 int r; 6901 const char *prefix; 6902 6903 if (! f) 6904 f = stderr; 6905 for (r = 0; r < n_reloads; r++) 6906 { 6907 fprintf (f, "Reload %d: ", r); 6908 6909 if (rld[r].in != 0) 6910 { 6911 fprintf (f, "reload_in (%s) = ", 6912 GET_MODE_NAME (rld[r].inmode)); 6913 print_inline_rtx (f, rld[r].in, 24); 6914 fprintf (f, "\n\t"); 6915 } 6916 6917 if (rld[r].out != 0) 6918 { 6919 fprintf (f, "reload_out (%s) = ", 6920 GET_MODE_NAME (rld[r].outmode)); 6921 print_inline_rtx (f, rld[r].out, 24); 6922 fprintf (f, "\n\t"); 6923 } 6924 6925 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]); 6926 6927 fprintf (f, "%s (opnum = %d)", 6928 reload_when_needed_name[(int) rld[r].when_needed], 6929 rld[r].opnum); 6930 6931 if (rld[r].optional) 6932 fprintf (f, ", optional"); 6933 6934 if (rld[r].nongroup) 6935 fprintf (f, ", nongroup"); 6936 6937 if (rld[r].inc != 0) 6938 fprintf (f, ", inc by %d", rld[r].inc); 6939 6940 if (rld[r].nocombine) 6941 fprintf (f, ", can't combine"); 6942 6943 if (rld[r].secondary_p) 6944 fprintf (f, ", secondary_reload_p"); 6945 6946 if (rld[r].in_reg != 0) 6947 { 6948 fprintf (f, "\n\treload_in_reg: "); 6949 print_inline_rtx (f, rld[r].in_reg, 24); 6950 } 6951 6952 if (rld[r].out_reg != 0) 6953 { 6954 fprintf (f, "\n\treload_out_reg: "); 6955 print_inline_rtx (f, rld[r].out_reg, 24); 6956 } 6957 6958 if (rld[r].reg_rtx != 0) 6959 { 6960 fprintf (f, "\n\treload_reg_rtx: "); 6961 print_inline_rtx (f, rld[r].reg_rtx, 24); 6962 } 6963 6964 prefix = "\n\t"; 6965 if (rld[r].secondary_in_reload != -1) 6966 { 6967 fprintf (f, "%ssecondary_in_reload = %d", 6968 prefix, rld[r].secondary_in_reload); 6969 prefix = ", "; 6970 } 6971 6972 if (rld[r].secondary_out_reload != -1) 6973 fprintf (f, "%ssecondary_out_reload = %d\n", 6974 prefix, rld[r].secondary_out_reload); 6975 6976 prefix = "\n\t"; 6977 if (rld[r].secondary_in_icode != CODE_FOR_nothing) 6978 { 6979 fprintf (f, "%ssecondary_in_icode = %s", prefix, 6980 insn_data[rld[r].secondary_in_icode].name); 6981 prefix = ", "; 6982 } 6983 6984 if (rld[r].secondary_out_icode != CODE_FOR_nothing) 6985 fprintf (f, "%ssecondary_out_icode = %s", prefix, 6986 insn_data[rld[r].secondary_out_icode].name); 6987 6988 fprintf (f, "\n"); 6989 } 6990} 6991 6992void 6993debug_reload () 6994{ 6995 debug_reload_to_stream (stderr); 6996} 6997