reload.c revision 102798
1139823Simp/* Search an insn for pseudo regs that must be in hard regs and are not. 21541Srgrimes Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 31541Srgrimes 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 41541Srgrimes 51541SrgrimesThis file is part of GCC. 61541Srgrimes 71541SrgrimesGCC is free software; you can redistribute it and/or modify it under 81541Srgrimesthe terms of the GNU General Public License as published by the Free 91541SrgrimesSoftware Foundation; either version 2, or (at your option) any later 101541Srgrimesversion. 111541Srgrimes 121541SrgrimesGCC is distributed in the hope that it will be useful, but WITHOUT ANY 131541SrgrimesWARRANTY; without even the implied warranty of MERCHANTABILITY or 141541SrgrimesFITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 151541Srgrimesfor more details. 161541Srgrimes 171541SrgrimesYou should have received a copy of the GNU General Public License 181541Srgrimesalong with GCC; see the file COPYING. If not, write to the Free 191541SrgrimesSoftware Foundation, 59 Temple Place - Suite 330, Boston, MA 201541Srgrimes02111-1307, USA. */ 211541Srgrimes 221541Srgrimes 231541Srgrimes/* $FreeBSD: head/contrib/gcc/reload.c 102798 2002-09-01 21:08:29Z kan $ */ 241541Srgrimes 251541Srgrimes 261541Srgrimes/* This file contains subroutines used only from the file reload1.c. 271541Srgrimes It knows how to scan one insn for operands and values 281541Srgrimes that need to be copied into registers to make valid code. 291541Srgrimes It also finds other operands and values which are valid 3050477Speter but for which equivalent values in registers exist and 311541Srgrimes ought to be used instead. 321541Srgrimes 332168Spaul Before processing the first insn of the function, call `init_reload'. 344507Sbde 352168Spaul To scan an insn, call `find_reloads'. This does two things: 36104355Smike 1. sets up tables describing which values must be reloaded 37104355Smike for this insn, and what kind of hard regs they must be reloaded into; 3897024Siedowse 2. optionally record the locations where those values appear in 3979103Sbrooks the data, so they can be replaced properly later. 4097024Siedowse This is done only if the second arg to `find_reloads' is nonzero. 4179103Sbrooks 42104355Smike The third arg to `find_reloads' specifies the number of levels 431541Srgrimes of indirect addressing supported by the machine. If it is zero, 4434750Speter indirect addressing is not valid. If it is one, (MEM (REG n)) 4572093Sasmodai is valid even if (REG n) did not get a hard register; if it is two, 46226610Sed (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 4734750Speter hard register, and similarly for higher values. 4855205Speter 4934750Speter Then you must choose the hard regs to reload those pseudo regs into, 50226610Sed and generate appropriate load insns before this insn and perhaps 5134750Speter also store insns after this insn. Set up the array `reload_reg_rtx' 5234750Speter to contain the REG rtx's for the registers you used. In some 5379103Sbrooks cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 54104355Smike for certain reloads. Then that tells you which register to use, 5579103Sbrooks so you do not need to allocate one. But you still do need to add extra 5634750Speter instructions to copy the value into and out of that register. 5779103Sbrooks 5879103Sbrooks Finally you must call `subst_reloads' to substitute the reload reg rtx's 5979103Sbrooks into the locations already recorded. 60104355Smike 61104355SmikeNOTE SIDE EFFECTS: 62104355Smike 63121816Sbrooks find_reloads can alter the operands of the instruction it is called on. 64104355Smike 65104355Smike 1. Two operands of any sort may be interchanged, if they are in a 66104355Smike commutative instruction. 6779103Sbrooks This happens only if find_reloads thinks the instruction will compile 6879103Sbrooks better that way. 6979103Sbrooks 7079103Sbrooks 2. Pseudo-registers that are equivalent to constants are replaced 7179103Sbrooks with those constants if they are not in hard registers. 7279103Sbrooks 7379103Sbrooks1 happens every time find_reloads is called. 7479103Sbrooks2 happens only when REPLACE is 1, which is only when 7579103Sbrooksactually doing the reloads, not when just counting them. 7679103Sbrooks 7779103SbrooksUsing a reload register for several reloads in one insn: 7819079Sfenner 7919079SfennerWhen an insn has reloads, it is considered as having three parts: 8019079Sfennerthe input reloads, the insn itself after reloading, and the output reloads. 819457SjoergReloads of values used in memory addresses are often needed for only one part. 829457Sjoerg 839457SjoergWhen this is so, reload_when_needed records which part needs the reload. 849457SjoergTwo reloads for different parts of the insn can share the same reload 859457Sjoergregister. 869457Sjoerg 87128871SandreWhen a reload is used for addresses in multiple parts, or when it is 88228571Sglebiusan ordinary operand, it is classified as RELOAD_OTHER, and cannot share 89241616Semaxa register with any other reload. */ 90134609Sbrooks 919457Sjoerg#define REG_OK_STRICT 929457Sjoerg 939457Sjoerg#include "config.h" 949457Sjoerg#include "system.h" 959457Sjoerg#include "rtl.h" 969457Sjoerg#include "tm_p.h" 979457Sjoerg#include "insn-config.h" 989457Sjoerg#include "expr.h" 999457Sjoerg#include "optabs.h" 1009457Sjoerg#include "recog.h" 1019457Sjoerg#include "reload.h" 1029457Sjoerg#include "regs.h" 1039457Sjoerg#include "hard-reg-set.h" 1049457Sjoerg#include "flags.h" 1059457Sjoerg#include "real.h" 106162070Sandre#include "output.h" 107142501Sbrooks#include "function.h" 10816287Sgpalmer#include "toplev.h" 1099457Sjoerg 1109457Sjoerg#ifndef REGISTER_MOVE_COST 111148894Srwatson#define REGISTER_MOVE_COST(m, x, y) 2 112148886Srwatson#endif 113148886Srwatson 114148886Srwatson#ifndef REGNO_MODE_OK_FOR_BASE_P 115148886Srwatson#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 116148886Srwatson#endif 117148886Srwatson 118148886Srwatson#ifndef REG_MODE_OK_FOR_BASE_P 119148886Srwatson#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 120148886Srwatson#endif 121148886Srwatson 122148886Srwatson/* All reloads of the current insn are recorded here. See reload.h for 123148886Srwatson comments. */ 124148894Srwatsonint n_reloads; 125148894Srwatsonstruct reload rld[MAX_RELOADS]; 126148894Srwatson 127148894Srwatson/* All the "earlyclobber" operands of the current insn 128148894Srwatson are recorded here. */ 129148894Srwatsonint n_earlyclobbers; 130148894Srwatsonrtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 131148894Srwatson 132148886Srwatsonint reload_n_operands; 133148894Srwatson 134148894Srwatson/* Replacing reloads. 135148894Srwatson 136148894Srwatson If `replace_reloads' is nonzero, then as each reload is recorded 137148894Srwatson an entry is made for it in the table `replacements'. 138148894Srwatson Then later `subst_reloads' can look through that table and 139148894Srwatson perform all the replacements needed. */ 140148894Srwatson 141148894Srwatson/* Nonzero means record the places to replace. */ 142148894Srwatsonstatic int replace_reloads; 143148894Srwatson 144148894Srwatson/* Each replacement is recorded with a structure like this. */ 1451541Srgrimesstruct replacement 1461541Srgrimes{ 1471541Srgrimes rtx *where; /* Location to store in */ 1483274Swollman rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 149148894Srwatson a SUBREG; 0 otherwise. */ 150216267Sweongyo int what; /* which reload this is for */ 151148894Srwatson enum machine_mode mode; /* mode it must have */ 152148894Srwatson}; 153148894Srwatson 154191416Srwatsonstatic struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 155201196Sjhb 156148886Srwatson/* Number of replacements currently recorded. */ 157148886Srwatsonstatic int n_replacements; 158148894Srwatson 159148886Srwatson/* Used to track what is modified by an operand. */ 160148886Srwatsonstruct decomposition 161148886Srwatson{ 162148886Srwatson int reg_flag; /* Nonzero if referencing a register. */ 163148886Srwatson int safe; /* Nonzero if this can't conflict with anything. */ 164148886Srwatson rtx base; /* Base address for MEM. */ 1651541Srgrimes HOST_WIDE_INT start; /* Starting offset or register number. */ 1661541Srgrimes HOST_WIDE_INT end; /* Ending offset or register number. */ 167148886Srwatson}; 168191416Srwatson 169216268Sweongyo#ifdef SECONDARY_MEMORY_NEEDED 1701541Srgrimes 171106925Ssam/* Save MEMs needed to copy from one class of registers to another. One MEM 172128871Sandre is used per mode, but normally only one or two modes are ever used. 173128871Sandre 174128871Sandre We keep two versions, before and after register elimination. The one 175128871Sandre after register elimination is record separately for each operand. This 176128871Sandre is done in case the address is not valid to be sure that we separately 177128871Sandre reload each. */ 178128871Sandre 179106925Ssamstatic rtx secondary_memlocs[NUM_MACHINE_MODES]; 180106925Ssamstatic rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 181106925Ssam#endif 182106925Ssam 183106925Ssam/* The instruction we are doing reloads for; 184106925Ssam so we can test whether a register dies in it. */ 185106925Ssamstatic rtx this_insn; 186162070Sandre 187162070Sandre/* Nonzero if this instruction is a user-specified asm with operands. */ 188162070Sandrestatic int this_insn_is_asm; 189162070Sandre 190162070Sandre/* If hard_regs_live_known is nonzero, 191162070Sandre we can tell which hard regs are currently live, 192162070Sandre at least enough to succeed in choosing dummy reloads. */ 193169207Syarstatic int hard_regs_live_known; 194162070Sandre 195162070Sandre/* Indexed by hard reg number, 196162070Sandre element is nonnegative if hard reg has been spilled. 197162070Sandre This vector is passed to `find_reloads' as an argument 198162070Sandre and is not changed here. */ 199162070Sandrestatic short *static_reload_reg_p; 200162070Sandre 201169207Syar/* Set to 1 in subst_reg_equivs if it changes anything. */ 202162070Sandrestatic int subst_reg_equivs_changed; 203223078Sluigi 204223078Sluigi/* On return from push_reload, holds the reload-number for the OUT 205223078Sluigi operand, which can be different for that from the input operand. */ 206223078Sluigistatic int output_reloadnum; 207223078Sluigi 208223078Sluigi /* Compare two RTX's. */ 209223078Sluigi#define MATCHES(x, y) \ 210162070Sandre (x == y || (x != 0 && (GET_CODE (x) == REG \ 211182413Sjfv ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 212182413Sjfv : rtx_equal_p (x, y) && ! side_effects_p (x)))) 213182413Sjfv 214182413Sjfv /* Indicates if two reloads purposes are for similar enough things that we 215182413Sjfv can merge their reloads. */ 216182413Sjfv#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 217182413Sjfv ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 218182413Sjfv || ((when1) == (when2) && (op1) == (op2)) \ 219182413Sjfv || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 220182413Sjfv || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 221182413Sjfv && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 222182413Sjfv || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 223182413Sjfv && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 224182413Sjfv 225182413Sjfv /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 226182413Sjfv#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 227182413Sjfv ((when1) != (when2) \ 228193096Sattilio || ! ((op1) == (op2) \ 229204149Syongari || (when1) == RELOAD_FOR_INPUT \ 230205222Sqingli || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 231223078Sluigi || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 232236170Sbz 233236170Sbz /* If we are going to reload an address, compute the reload type to 23483624Sjlemon use. */ 235236170Sbz#define ADDR_TYPE(type) \ 236236170Sbz ((type) == RELOAD_FOR_INPUT_ADDRESS \ 237174505Ssam ? RELOAD_FOR_INPADDR_ADDRESS \ 238174505Ssam : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 239174505Ssam ? RELOAD_FOR_OUTADDR_ADDRESS \ 240174628Skmacy : (type))) 24183636Sjlemon 242223078Sluigi#ifdef HAVE_SECONDARY_RELOADS 243223078Sluigistatic int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class, 2441541Srgrimes enum machine_mode, enum reload_type, 2451541Srgrimes enum insn_code *)); 2461541Srgrimes#endif 2471541Srgrimesstatic enum reg_class find_valid_class PARAMS ((enum machine_mode, int, 2481541Srgrimes unsigned int)); 2491541Srgrimesstatic int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode)); 250231505Sbzstatic void push_replacement PARAMS ((rtx *, int, enum machine_mode)); 2511541Srgrimesstatic void combine_reloads PARAMS ((void)); 2521541Srgrimesstatic int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class, 2531541Srgrimes enum reload_type, int, int)); 25472093Sasmodaistatic rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *, 2551541Srgrimes enum machine_mode, enum machine_mode, 2561541Srgrimes enum reg_class, int, int)); 2571541Srgrimesstatic int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx)); 2581541Srgrimesstatic struct decomposition decompose PARAMS ((rtx)); 2591541Srgrimesstatic int immune_p PARAMS ((rtx, rtx, struct decomposition)); 2601541Srgrimesstatic int alternative_allows_memconst PARAMS ((const char *, int)); 2611541Srgrimesstatic rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int, 2621541Srgrimes int, rtx, int *)); 263231505Sbzstatic rtx make_memloc PARAMS ((rtx, int)); 264231505Sbzstatic int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *, 265231505Sbz int, enum reload_type, int, rtx)); 266231505Sbzstatic rtx subst_reg_equivs PARAMS ((rtx, rtx)); 267231505Sbzstatic rtx subst_indexed_address PARAMS ((rtx)); 268231505Sbzstatic void update_auto_inc_notes PARAMS ((rtx, int, int)); 269231505Sbzstatic int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *, 270231505Sbz int, enum reload_type,int, rtx)); 271231505Sbzstatic void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class, 272231505Sbz enum machine_mode, int, 273231505Sbz enum reload_type, int)); 274231505Sbzstatic rtx find_reloads_subreg_address PARAMS ((rtx, int, int, 275231505Sbz enum reload_type, int, rtx)); 276231505Sbzstatic void copy_replacements_1 PARAMS ((rtx *, rtx *, int)); 277231505Sbzstatic int find_inc_amount PARAMS ((rtx, rtx)); 278231505Sbz 279231505Sbz#ifdef HAVE_SECONDARY_RELOADS 280231505Sbz 281231505Sbz/* Determine if any secondary reloads are needed for loading (if IN_P is 282231505Sbz non-zero) or storing (if IN_P is zero) X to or from a reload register of 283231505Sbz register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 284231505Sbz are needed, push them. 285231505Sbz 286231505Sbz Return the reload number of the secondary reload we made, or -1 if 287231505Sbz we didn't need one. *PICODE is set to the insn_code to use if we do 2881541Srgrimes need a secondary reload. */ 2891541Srgrimes 290231505Sbzstatic int 2911541Srgrimespush_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 2921541Srgrimes type, picode) 2931541Srgrimes int in_p; 29472093Sasmodai rtx x; 2951541Srgrimes int opnum; 2961541Srgrimes int optional; 2971541Srgrimes enum reg_class reload_class; 2981541Srgrimes enum machine_mode reload_mode; 2991541Srgrimes enum reload_type type; 3001541Srgrimes enum insn_code *picode; 3011541Srgrimes{ 3021541Srgrimes enum reg_class class = NO_REGS; 303231505Sbz enum machine_mode mode = reload_mode; 304231505Sbz enum insn_code icode = CODE_FOR_nothing; 305231505Sbz enum reg_class t_class = NO_REGS; 306231505Sbz enum machine_mode t_mode = VOIDmode; 307231505Sbz enum insn_code t_icode = CODE_FOR_nothing; 308231505Sbz enum reload_type secondary_type; 309231505Sbz int s_reload, t_reload = -1; 310231505Sbz 311231505Sbz if (type == RELOAD_FOR_INPUT_ADDRESS 312231505Sbz || type == RELOAD_FOR_OUTPUT_ADDRESS 313231505Sbz || type == RELOAD_FOR_INPADDR_ADDRESS 314231505Sbz || type == RELOAD_FOR_OUTADDR_ADDRESS) 315231505Sbz secondary_type = type; 316231505Sbz else 317231505Sbz secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 318231505Sbz 319231505Sbz *picode = CODE_FOR_nothing; 320231505Sbz 321231505Sbz /* If X is a paradoxical SUBREG, use the inner value to determine both the 322231505Sbz mode and object being reloaded. */ 323231505Sbz if (GET_CODE (x) == SUBREG 324231505Sbz && (GET_MODE_SIZE (GET_MODE (x)) 325231505Sbz > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 326231505Sbz { 327231505Sbz x = SUBREG_REG (x); 328231505Sbz reload_mode = GET_MODE (x); 329231505Sbz } 33021666Swollman 33121666Swollman /* If X is a pseudo-register that has an equivalent MEM (actually, if it 33221666Swollman is still a pseudo-register by now, it *must* have an equivalent MEM 33321666Swollman but we don't want to assume that), use that equivalent when seeing if 33421666Swollman a secondary reload is needed since whether or not a reload is needed 33572093Sasmodai might be sensitive to the form of the MEM. */ 33621666Swollman 33721666Swollman if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 33821666Swollman && reg_equiv_mem[REGNO (x)] != 0) 33921666Swollman x = reg_equiv_mem[REGNO (x)]; 34021666Swollman 34121666Swollman#ifdef SECONDARY_INPUT_RELOAD_CLASS 34221666Swollman if (in_p) 34389498Sru class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 34489498Sru#endif 34589498Sru 34689498Sru#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 34789498Sru if (! in_p) 34889498Sru class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 34989498Sru#endif 35089498Sru 35189498Sru /* If we don't need any secondary registers, done. */ 35289498Sru if (class == NO_REGS) 35389498Sru return -1; 35489498Sru 35589498Sru /* Get a possible insn to use. If the predicate doesn't accept X, don't 35689498Sru use the insn. */ 35789498Sru 358203052Sdelphij icode = (in_p ? reload_in_optab[(int) reload_mode] 359203052Sdelphij : reload_out_optab[(int) reload_mode]); 360203052Sdelphij 361203052Sdelphij if (icode != CODE_FOR_nothing 362203052Sdelphij && insn_data[(int) icode].operand[in_p].predicate 363203052Sdelphij && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode))) 364203052Sdelphij icode = CODE_FOR_nothing; 365203052Sdelphij 3661541Srgrimes /* If we will be using an insn, see if it can directly handle the reload 3671541Srgrimes register we will be using. If it can, the secondary reload is for a 3681541Srgrimes scratch register. If it can't, we will use the secondary reload for 3691541Srgrimes an intermediate register and require a tertiary reload for the scratch 3701541Srgrimes register. */ 3711541Srgrimes 3721541Srgrimes if (icode != CODE_FOR_nothing) 3731541Srgrimes { 3741541Srgrimes /* If IN_P is non-zero, the reload register will be the output in 3751541Srgrimes operand 0. If IN_P is zero, the reload register will be the input 3761541Srgrimes in operand 1. Outputs should have an initial "=", which we must 377203052Sdelphij skip. */ 37844144Sphk 37985079Sjlemon enum reg_class insn_class; 380194251Sjamie 3811541Srgrimes if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0) 3821941Sdg insn_class = ALL_REGS; 3835184Swollman else 38425434Speter { 3851541Srgrimes char insn_letter 38683624Sjlemon = insn_data[(int) icode].operand[!in_p].constraint[in_p]; 387223735Sbz insn_class 3881541Srgrimes = (insn_letter == 'r' ? GENERAL_REGS 3891541Srgrimes : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 3901541Srgrimes 3911541Srgrimes if (insn_class == NO_REGS) 392203052Sdelphij abort (); 393102052Ssobomax if (in_p 394102052Ssobomax && insn_data[(int) icode].operand[!in_p].constraint[0] != '=') 395194251Sjamie abort (); 3961541Srgrimes } 3971941Sdg 3985187Sdg /* The scratch register's constraint must start with "=&". */ 39925434Speter if (insn_data[(int) icode].operand[2].constraint[0] != '=' 4001541Srgrimes || insn_data[(int) icode].operand[2].constraint[1] != '&') 40183624Sjlemon abort (); 40283624Sjlemon 40385079Sjlemon if (reg_class_subset_p (reload_class, insn_class)) 404223735Sbz mode = insn_data[(int) icode].operand[2].mode; 4051541Srgrimes else 4061541Srgrimes { 40732491Swollman char t_letter = insn_data[(int) icode].operand[2].constraint[2]; 40832491Swollman class = insn_class; 40932491Swollman t_mode = insn_data[(int) icode].operand[2].mode; 41032491Swollman t_class = (t_letter == 'r' ? GENERAL_REGS 41132491Swollman : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 4121541Srgrimes t_icode = icode; 4131541Srgrimes icode = CODE_FOR_nothing; 4141541Srgrimes } 4151541Srgrimes } 4161541Srgrimes 417228571Sglebius /* This case isn't valid, so fail. Reload is allowed to use the same 4181541Srgrimes register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 4191541Srgrimes in the case of a secondary register, we actually need two different 420228768Sglebius registers for correct code. We fail here to prevent the possibility of 421228768Sglebius silently generating incorrect code later. 422228768Sglebius 423228768Sglebius The convention is that secondary input reloads are valid only if the 424228768Sglebius secondary_class is different from class. If you have such a case, you 425228768Sglebius can not use secondary reloads, you must work around the problem some 426228768Sglebius other way. 427228768Sglebius 42825434Speter Allow this when a reload_in/out pattern is being used. I.e. assume 42925434Speter that the generated code handles this case. */ 43025434Speter 43125434Speter if (in_p && class == reload_class && icode == CODE_FOR_nothing 43225434Speter && t_icode == CODE_FOR_nothing) 43325434Speter abort (); 43425434Speter 43525434Speter /* If we need a tertiary reload, see if we have one we can reuse or else 43625434Speter make a new one. */ 43748021Sphk 438146986Sthompsa if (t_class != NO_REGS) 439146986Sthompsa { 440146986Sthompsa for (t_reload = 0; t_reload < n_reloads; t_reload++) 441146986Sthompsa if (rld[t_reload].secondary_p 442146986Sthompsa && (reg_class_subset_p (t_class, rld[t_reload].class) 443146986Sthompsa || reg_class_subset_p (rld[t_reload].class, t_class)) 444146986Sthompsa && ((in_p && rld[t_reload].inmode == t_mode) 44548021Sphk || (! in_p && rld[t_reload].outmode == t_mode)) 44648021Sphk && ((in_p && (rld[t_reload].secondary_in_icode 44748589Sbde == CODE_FOR_nothing)) 44848021Sphk || (! in_p &&(rld[t_reload].secondary_out_icode 44948589Sbde == CODE_FOR_nothing))) 45048021Sphk && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 45148021Sphk && MERGABLE_RELOADS (secondary_type, 45248589Sbde rld[t_reload].when_needed, 45348021Sphk opnum, rld[t_reload].opnum)) 45448589Sbde { 45548589Sbde if (in_p) 45648021Sphk rld[t_reload].inmode = t_mode; 45748021Sphk if (! in_p) 4581541Srgrimes rld[t_reload].outmode = t_mode; 4591541Srgrimes 4601541Srgrimes if (reg_class_subset_p (t_class, rld[t_reload].class)) 4611541Srgrimes rld[t_reload].class = t_class; 4621541Srgrimes 4631541Srgrimes rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum); 4641541Srgrimes rld[t_reload].optional &= optional; 4651541Srgrimes rld[t_reload].secondary_p = 1; 4661541Srgrimes if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed, 4671541Srgrimes opnum, rld[t_reload].opnum)) 4681541Srgrimes rld[t_reload].when_needed = RELOAD_OTHER; 4691541Srgrimes } 4701541Srgrimes 4711541Srgrimes if (t_reload == n_reloads) 4721541Srgrimes { 4731541Srgrimes /* We need to make a new tertiary reload for this register class. */ 47452904Sshin rld[t_reload].in = rld[t_reload].out = 0; 475159781Smlaier rld[t_reload].class = t_class; 476159781Smlaier rld[t_reload].inmode = in_p ? t_mode : VOIDmode; 477159781Smlaier rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode; 478159781Smlaier rld[t_reload].reg_rtx = 0; 479159781Smlaier rld[t_reload].optional = optional; 480159781Smlaier rld[t_reload].inc = 0; 481159781Smlaier /* Maybe we could combine these, but it seems too tricky. */ 482159781Smlaier rld[t_reload].nocombine = 1; 483159781Smlaier rld[t_reload].in_reg = 0; 484159781Smlaier rld[t_reload].out_reg = 0; 485159781Smlaier rld[t_reload].opnum = opnum; 486159781Smlaier rld[t_reload].when_needed = secondary_type; 487159781Smlaier rld[t_reload].secondary_in_reload = -1; 488159781Smlaier rld[t_reload].secondary_out_reload = -1; 489159781Smlaier rld[t_reload].secondary_in_icode = CODE_FOR_nothing; 490159781Smlaier rld[t_reload].secondary_out_icode = CODE_FOR_nothing; 491159781Smlaier rld[t_reload].secondary_p = 1; 492159781Smlaier 493159781Smlaier n_reloads++; 494159781Smlaier } 495159781Smlaier } 496159781Smlaier 497159781Smlaier /* See if we can reuse an existing secondary reload. */ 498159781Smlaier for (s_reload = 0; s_reload < n_reloads; s_reload++) 499159781Smlaier if (rld[s_reload].secondary_p 500159781Smlaier && (reg_class_subset_p (class, rld[s_reload].class) 501159781Smlaier || reg_class_subset_p (rld[s_reload].class, class)) 502159781Smlaier && ((in_p && rld[s_reload].inmode == mode) 503159781Smlaier || (! in_p && rld[s_reload].outmode == mode)) 504159781Smlaier && ((in_p && rld[s_reload].secondary_in_reload == t_reload) 505159781Smlaier || (! in_p && rld[s_reload].secondary_out_reload == t_reload)) 50652904Sshin && ((in_p && rld[s_reload].secondary_in_icode == t_icode) 50752904Sshin || (! in_p && rld[s_reload].secondary_out_icode == t_icode)) 50852904Sshin && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 50952904Sshin && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed, 51052904Sshin opnum, rld[s_reload].opnum)) 51152904Sshin { 51252904Sshin if (in_p) 51352904Sshin rld[s_reload].inmode = mode; 51452904Sshin if (! in_p) 51552904Sshin rld[s_reload].outmode = mode; 51652904Sshin 517104355Smike if (reg_class_subset_p (class, rld[s_reload].class)) 518104355Smike rld[s_reload].class = class; 51955205Speter 52030354Sphk rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum); 52130354Sphk rld[s_reload].optional &= optional; 52230354Sphk rld[s_reload].secondary_p = 1; 52330354Sphk if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed, 52430354Sphk opnum, rld[s_reload].opnum)) 52530354Sphk rld[s_reload].when_needed = RELOAD_OTHER; 52655205Speter } 52752904Sshin 528104355Smike if (s_reload == n_reloads) 529104360Smike { 53052904Sshin#ifdef SECONDARY_MEMORY_NEEDED 53152904Sshin /* If we need a memory location to copy between the two reload regs, 53252904Sshin set it up now. Note that we do the input case before making 533104360Smike the reload and the output case after. This is due to the 534104360Smike way reloads are output. */ 535104360Smike 536104360Smike if (in_p && icode == CODE_FOR_nothing 53752904Sshin && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 53852904Sshin { 53952904Sshin get_secondary_mem (x, reload_mode, opnum, type); 54055205Speter 54148589Sbde /* We may have just added new reloads. Make sure we add 54221259Swollman the new reload at the end. */ 5431541Srgrimes s_reload = n_reloads; 5441541Srgrimes } 5454507Sbde#endif 546 547 /* We need to make a new secondary reload for this register class. */ 548 rld[s_reload].in = rld[s_reload].out = 0; 549 rld[s_reload].class = class; 550 551 rld[s_reload].inmode = in_p ? mode : VOIDmode; 552 rld[s_reload].outmode = ! in_p ? mode : VOIDmode; 553 rld[s_reload].reg_rtx = 0; 554 rld[s_reload].optional = optional; 555 rld[s_reload].inc = 0; 556 /* Maybe we could combine these, but it seems too tricky. */ 557 rld[s_reload].nocombine = 1; 558 rld[s_reload].in_reg = 0; 559 rld[s_reload].out_reg = 0; 560 rld[s_reload].opnum = opnum; 561 rld[s_reload].when_needed = secondary_type; 562 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1; 563 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1; 564 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing; 565 rld[s_reload].secondary_out_icode 566 = ! in_p ? t_icode : CODE_FOR_nothing; 567 rld[s_reload].secondary_p = 1; 568 569 n_reloads++; 570 571#ifdef SECONDARY_MEMORY_NEEDED 572 if (! in_p && icode == CODE_FOR_nothing 573 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 574 get_secondary_mem (x, mode, opnum, type); 575#endif 576 } 577 578 *picode = icode; 579 return s_reload; 580} 581#endif /* HAVE_SECONDARY_RELOADS */ 582 583#ifdef SECONDARY_MEMORY_NEEDED 584 585/* Return a memory location that will be used to copy X in mode MODE. 586 If we haven't already made a location for this mode in this insn, 587 call find_reloads_address on the location being returned. */ 588 589rtx 590get_secondary_mem (x, mode, opnum, type) 591 rtx x ATTRIBUTE_UNUSED; 592 enum machine_mode mode; 593 int opnum; 594 enum reload_type type; 595{ 596 rtx loc; 597 int mem_valid; 598 599 /* By default, if MODE is narrower than a word, widen it to a word. 600 This is required because most machines that require these memory 601 locations do not support short load and stores from all registers 602 (e.g., FP registers). */ 603 604#ifdef SECONDARY_MEMORY_NEEDED_MODE 605 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 606#else 607 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode)) 608 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 609#endif 610 611 /* If we already have made a MEM for this operand in MODE, return it. */ 612 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 613 return secondary_memlocs_elim[(int) mode][opnum]; 614 615 /* If this is the first time we've tried to get a MEM for this mode, 616 allocate a new one. `something_changed' in reload will get set 617 by noticing that the frame size has changed. */ 618 619 if (secondary_memlocs[(int) mode] == 0) 620 { 621#ifdef SECONDARY_MEMORY_NEEDED_RTX 622 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 623#else 624 secondary_memlocs[(int) mode] 625 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 626#endif 627 } 628 629 /* Get a version of the address doing any eliminations needed. If that 630 didn't give us a new MEM, make a new one if it isn't valid. */ 631 632 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 633 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 634 635 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 636 loc = copy_rtx (loc); 637 638 /* The only time the call below will do anything is if the stack 639 offset is too large. In that case IND_LEVELS doesn't matter, so we 640 can just pass a zero. Adjust the type to be the address of the 641 corresponding object. If the address was valid, save the eliminated 642 address. If it wasn't valid, we need to make a reload each time, so 643 don't save it. */ 644 645 if (! mem_valid) 646 { 647 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 648 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 649 : RELOAD_OTHER); 650 651 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0), 652 opnum, type, 0, 0); 653 } 654 655 secondary_memlocs_elim[(int) mode][opnum] = loc; 656 return loc; 657} 658 659/* Clear any secondary memory locations we've made. */ 660 661void 662clear_secondary_mem () 663{ 664 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs); 665} 666#endif /* SECONDARY_MEMORY_NEEDED */ 667 668/* Find the largest class for which every register number plus N is valid in 669 M1 (if in range) and is cheap to move into REGNO. 670 Abort if no such class exists. */ 671 672static enum reg_class 673find_valid_class (m1, n, dest_regno) 674 enum machine_mode m1 ATTRIBUTE_UNUSED; 675 int n; 676 unsigned int dest_regno; 677{ 678 int best_cost = -1; 679 int class; 680 int regno; 681 enum reg_class best_class = NO_REGS; 682 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno); 683 unsigned int best_size = 0; 684 int cost; 685 686 for (class = 1; class < N_REG_CLASSES; class++) 687 { 688 int bad = 0; 689 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 690 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 691 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 692 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 693 bad = 1; 694 695 if (bad) 696 continue; 697 cost = REGISTER_MOVE_COST (m1, class, dest_class); 698 699 if ((reg_class_size[class] > best_size 700 && (best_cost < 0 || best_cost >= cost)) 701 || best_cost > cost) 702 { 703 best_class = class; 704 best_size = reg_class_size[class]; 705 best_cost = REGISTER_MOVE_COST (m1, class, dest_class); 706 } 707 } 708 709 if (best_size == 0) 710 abort (); 711 712 return best_class; 713} 714 715/* Return the number of a previously made reload that can be combined with 716 a new one, or n_reloads if none of the existing reloads can be used. 717 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 718 push_reload, they determine the kind of the new reload that we try to 719 combine. P_IN points to the corresponding value of IN, which can be 720 modified by this function. 721 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 722 723static int 724find_reusable_reload (p_in, out, class, type, opnum, dont_share) 725 rtx *p_in, out; 726 enum reg_class class; 727 enum reload_type type; 728 int opnum, dont_share; 729{ 730 rtx in = *p_in; 731 int i; 732 /* We can't merge two reloads if the output of either one is 733 earlyclobbered. */ 734 735 if (earlyclobber_operand_p (out)) 736 return n_reloads; 737 738 /* We can use an existing reload if the class is right 739 and at least one of IN and OUT is a match 740 and the other is at worst neutral. 741 (A zero compared against anything is neutral.) 742 743 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 744 for the same thing since that can cause us to need more reload registers 745 than we otherwise would. */ 746 747 for (i = 0; i < n_reloads; i++) 748 if ((reg_class_subset_p (class, rld[i].class) 749 || reg_class_subset_p (rld[i].class, class)) 750 /* If the existing reload has a register, it must fit our class. */ 751 && (rld[i].reg_rtx == 0 752 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 753 true_regnum (rld[i].reg_rtx))) 754 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share 755 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out))) 756 || (out != 0 && MATCHES (rld[i].out, out) 757 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in)))) 758 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 759 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 760 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum)) 761 return i; 762 763 /* Reloading a plain reg for input can match a reload to postincrement 764 that reg, since the postincrement's value is the right value. 765 Likewise, it can match a preincrement reload, since we regard 766 the preincrementation as happening before any ref in this insn 767 to that register. */ 768 for (i = 0; i < n_reloads; i++) 769 if ((reg_class_subset_p (class, rld[i].class) 770 || reg_class_subset_p (rld[i].class, class)) 771 /* If the existing reload has a register, it must fit our 772 class. */ 773 && (rld[i].reg_rtx == 0 774 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 775 true_regnum (rld[i].reg_rtx))) 776 && out == 0 && rld[i].out == 0 && rld[i].in != 0 777 && ((GET_CODE (in) == REG 778 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a' 779 && MATCHES (XEXP (rld[i].in, 0), in)) 780 || (GET_CODE (rld[i].in) == REG 781 && GET_RTX_CLASS (GET_CODE (in)) == 'a' 782 && MATCHES (XEXP (in, 0), rld[i].in))) 783 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 784 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 785 && MERGABLE_RELOADS (type, rld[i].when_needed, 786 opnum, rld[i].opnum)) 787 { 788 /* Make sure reload_in ultimately has the increment, 789 not the plain register. */ 790 if (GET_CODE (in) == REG) 791 *p_in = rld[i].in; 792 return i; 793 } 794 return n_reloads; 795} 796 797/* Return nonzero if X is a SUBREG which will require reloading of its 798 SUBREG_REG expression. */ 799 800static int 801reload_inner_reg_of_subreg (x, mode) 802 rtx x; 803 enum machine_mode mode; 804{ 805 rtx inner; 806 807 /* Only SUBREGs are problematical. */ 808 if (GET_CODE (x) != SUBREG) 809 return 0; 810 811 inner = SUBREG_REG (x); 812 813 /* If INNER is a constant or PLUS, then INNER must be reloaded. */ 814 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS) 815 return 1; 816 817 /* If INNER is not a hard register, then INNER will not need to 818 be reloaded. */ 819 if (GET_CODE (inner) != REG 820 || REGNO (inner) >= FIRST_PSEUDO_REGISTER) 821 return 0; 822 823 /* If INNER is not ok for MODE, then INNER will need reloading. */ 824 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode)) 825 return 1; 826 827 /* If the outer part is a word or smaller, INNER larger than a 828 word and the number of regs for INNER is not the same as the 829 number of words in INNER, then INNER will need reloading. */ 830 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 831 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD 832 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD) 833 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner)))); 834} 835 836/* Record one reload that needs to be performed. 837 IN is an rtx saying where the data are to be found before this instruction. 838 OUT says where they must be stored after the instruction. 839 (IN is zero for data not read, and OUT is zero for data not written.) 840 INLOC and OUTLOC point to the places in the instructions where 841 IN and OUT were found. 842 If IN and OUT are both non-zero, it means the same register must be used 843 to reload both IN and OUT. 844 845 CLASS is a register class required for the reloaded data. 846 INMODE is the machine mode that the instruction requires 847 for the reg that replaces IN and OUTMODE is likewise for OUT. 848 849 If IN is zero, then OUT's location and mode should be passed as 850 INLOC and INMODE. 851 852 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 853 854 OPTIONAL nonzero means this reload does not need to be performed: 855 it can be discarded if that is more convenient. 856 857 OPNUM and TYPE say what the purpose of this reload is. 858 859 The return value is the reload-number for this reload. 860 861 If both IN and OUT are nonzero, in some rare cases we might 862 want to make two separate reloads. (Actually we never do this now.) 863 Therefore, the reload-number for OUT is stored in 864 output_reloadnum when we return; the return value applies to IN. 865 Usually (presently always), when IN and OUT are nonzero, 866 the two reload-numbers are equal, but the caller should be careful to 867 distinguish them. */ 868 869int 870push_reload (in, out, inloc, outloc, class, 871 inmode, outmode, strict_low, optional, opnum, type) 872 rtx in, out; 873 rtx *inloc, *outloc; 874 enum reg_class class; 875 enum machine_mode inmode, outmode; 876 int strict_low; 877 int optional; 878 int opnum; 879 enum reload_type type; 880{ 881 int i; 882 int dont_share = 0; 883 int dont_remove_subreg = 0; 884 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 885 int secondary_in_reload = -1, secondary_out_reload = -1; 886 enum insn_code secondary_in_icode = CODE_FOR_nothing; 887 enum insn_code secondary_out_icode = CODE_FOR_nothing; 888 889 /* INMODE and/or OUTMODE could be VOIDmode if no mode 890 has been specified for the operand. In that case, 891 use the operand's mode as the mode to reload. */ 892 if (inmode == VOIDmode && in != 0) 893 inmode = GET_MODE (in); 894 if (outmode == VOIDmode && out != 0) 895 outmode = GET_MODE (out); 896 897 /* If IN is a pseudo register everywhere-equivalent to a constant, and 898 it is not in a hard register, reload straight from the constant, 899 since we want to get rid of such pseudo registers. 900 Often this is done earlier, but not always in find_reloads_address. */ 901 if (in != 0 && GET_CODE (in) == REG) 902 { 903 int regno = REGNO (in); 904 905 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 906 && reg_equiv_constant[regno] != 0) 907 in = reg_equiv_constant[regno]; 908 } 909 910 /* Likewise for OUT. Of course, OUT will never be equivalent to 911 an actual constant, but it might be equivalent to a memory location 912 (in the case of a parameter). */ 913 if (out != 0 && GET_CODE (out) == REG) 914 { 915 int regno = REGNO (out); 916 917 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 918 && reg_equiv_constant[regno] != 0) 919 out = reg_equiv_constant[regno]; 920 } 921 922 /* If we have a read-write operand with an address side-effect, 923 change either IN or OUT so the side-effect happens only once. */ 924 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 925 switch (GET_CODE (XEXP (in, 0))) 926 { 927 case POST_INC: case POST_DEC: case POST_MODIFY: 928 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0)); 929 break; 930 931 case PRE_INC: case PRE_DEC: case PRE_MODIFY: 932 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0)); 933 break; 934 935 default: 936 break; 937 } 938 939 /* If we are reloading a (SUBREG constant ...), really reload just the 940 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 941 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 942 a pseudo and hence will become a MEM) with M1 wider than M2 and the 943 register is a pseudo, also reload the inside expression. 944 For machines that extend byte loads, do this for any SUBREG of a pseudo 945 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 946 M2 is an integral mode that gets extended when loaded. 947 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 948 either M1 is not valid for R or M2 is wider than a word but we only 949 need one word to store an M2-sized quantity in R. 950 (However, if OUT is nonzero, we need to reload the reg *and* 951 the subreg, so do nothing here, and let following statement handle it.) 952 953 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 954 we can't handle it here because CONST_INT does not indicate a mode. 955 956 Similarly, we must reload the inside expression if we have a 957 STRICT_LOW_PART (presumably, in == out in the cas). 958 959 Also reload the inner expression if it does not require a secondary 960 reload but the SUBREG does. 961 962 Finally, reload the inner expression if it is a register that is in 963 the class whose registers cannot be referenced in a different size 964 and M1 is not the same size as M2. If subreg_lowpart_p is false, we 965 cannot reload just the inside since we might end up with the wrong 966 register class. But if it is inside a STRICT_LOW_PART, we have 967 no choice, so we hope we do get the right register class there. */ 968 969 if (in != 0 && GET_CODE (in) == SUBREG 970 && (subreg_lowpart_p (in) || strict_low) 971#ifdef CLASS_CANNOT_CHANGE_MODE 972 && (class != CLASS_CANNOT_CHANGE_MODE 973 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode)) 974#endif 975 && (CONSTANT_P (SUBREG_REG (in)) 976 || GET_CODE (SUBREG_REG (in)) == PLUS 977 || strict_low 978 || (((GET_CODE (SUBREG_REG (in)) == REG 979 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 980 || GET_CODE (SUBREG_REG (in)) == MEM) 981 && ((GET_MODE_SIZE (inmode) 982 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 983#ifdef LOAD_EXTEND_OP 984 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 986 <= UNITS_PER_WORD) 987 && (GET_MODE_SIZE (inmode) 988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 989 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 990 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 991#endif 992#ifdef WORD_REGISTER_OPERATIONS 993 || ((GET_MODE_SIZE (inmode) 994 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 995 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 996 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 997 / UNITS_PER_WORD))) 998#endif 999 )) 1000 || (GET_CODE (SUBREG_REG (in)) == REG 1001 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1002 /* The case where out is nonzero 1003 is handled differently in the following statement. */ 1004 && (out == 0 || subreg_lowpart_p (in)) 1005 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1006 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1007 > UNITS_PER_WORD) 1008 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1009 / UNITS_PER_WORD) 1010 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1011 GET_MODE (SUBREG_REG (in))))) 1012 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode))) 1013#ifdef SECONDARY_INPUT_RELOAD_CLASS 1014 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1015 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1016 GET_MODE (SUBREG_REG (in)), 1017 SUBREG_REG (in)) 1018 == NO_REGS)) 1019#endif 1020#ifdef CLASS_CANNOT_CHANGE_MODE 1021 || (GET_CODE (SUBREG_REG (in)) == REG 1022 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1023 && (TEST_HARD_REG_BIT 1024 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1025 REGNO (SUBREG_REG (in)))) 1026 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), 1027 inmode)) 1028#endif 1029 )) 1030 { 1031 in_subreg_loc = inloc; 1032 inloc = &SUBREG_REG (in); 1033 in = *inloc; 1034#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1035 if (GET_CODE (in) == MEM) 1036 /* This is supposed to happen only for paradoxical subregs made by 1037 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1038 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1039 abort (); 1040#endif 1041 inmode = GET_MODE (in); 1042 } 1043 1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1045 either M1 is not valid for R or M2 is wider than a word but we only 1046 need one word to store an M2-sized quantity in R. 1047 1048 However, we must reload the inner reg *as well as* the subreg in 1049 that case. */ 1050 1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1052 code above. This can happen if SUBREG_BYTE != 0. */ 1053 1054 if (in != 0 && reload_inner_reg_of_subreg (in, inmode)) 1055 { 1056 enum reg_class in_class = class; 1057 1058 if (GET_CODE (SUBREG_REG (in)) == REG) 1059 in_class 1060 = find_valid_class (inmode, 1061 subreg_regno_offset (REGNO (SUBREG_REG (in)), 1062 GET_MODE (SUBREG_REG (in)), 1063 SUBREG_BYTE (in), 1064 GET_MODE (in)), 1065 REGNO (SUBREG_REG (in))); 1066 1067 /* This relies on the fact that emit_reload_insns outputs the 1068 instructions for input reloads of type RELOAD_OTHER in the same 1069 order as the reloads. Thus if the outer reload is also of type 1070 RELOAD_OTHER, we are guaranteed that this inner reload will be 1071 output before the outer reload. */ 1072 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0, 1073 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type); 1074 dont_remove_subreg = 1; 1075 } 1076 1077 /* Similarly for paradoxical and problematical SUBREGs on the output. 1078 Note that there is no reason we need worry about the previous value 1079 of SUBREG_REG (out); even if wider than out, 1080 storing in a subreg is entitled to clobber it all 1081 (except in the case of STRICT_LOW_PART, 1082 and in that case the constraint should label it input-output.) */ 1083 if (out != 0 && GET_CODE (out) == SUBREG 1084 && (subreg_lowpart_p (out) || strict_low) 1085#ifdef CLASS_CANNOT_CHANGE_MODE 1086 && (class != CLASS_CANNOT_CHANGE_MODE 1087 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1088 outmode)) 1089#endif 1090 && (CONSTANT_P (SUBREG_REG (out)) 1091 || strict_low 1092 || (((GET_CODE (SUBREG_REG (out)) == REG 1093 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1094 || GET_CODE (SUBREG_REG (out)) == MEM) 1095 && ((GET_MODE_SIZE (outmode) 1096 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1097#ifdef WORD_REGISTER_OPERATIONS 1098 || ((GET_MODE_SIZE (outmode) 1099 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1100 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1101 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1102 / UNITS_PER_WORD))) 1103#endif 1104 )) 1105 || (GET_CODE (SUBREG_REG (out)) == REG 1106 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1107 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1108 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1109 > UNITS_PER_WORD) 1110 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1111 / UNITS_PER_WORD) 1112 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1113 GET_MODE (SUBREG_REG (out))))) 1114 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode))) 1115#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1116 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1117 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1118 GET_MODE (SUBREG_REG (out)), 1119 SUBREG_REG (out)) 1120 == NO_REGS)) 1121#endif 1122#ifdef CLASS_CANNOT_CHANGE_MODE 1123 || (GET_CODE (SUBREG_REG (out)) == REG 1124 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1125 && (TEST_HARD_REG_BIT 1126 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1127 REGNO (SUBREG_REG (out)))) 1128 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1129 outmode)) 1130#endif 1131 )) 1132 { 1133 out_subreg_loc = outloc; 1134 outloc = &SUBREG_REG (out); 1135 out = *outloc; 1136#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1137 if (GET_CODE (out) == MEM 1138 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1139 abort (); 1140#endif 1141 outmode = GET_MODE (out); 1142 } 1143 1144 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1145 either M1 is not valid for R or M2 is wider than a word but we only 1146 need one word to store an M2-sized quantity in R. 1147 1148 However, we must reload the inner reg *as well as* the subreg in 1149 that case. In this case, the inner reg is an in-out reload. */ 1150 1151 if (out != 0 && reload_inner_reg_of_subreg (out, outmode)) 1152 { 1153 /* This relies on the fact that emit_reload_insns outputs the 1154 instructions for output reloads of type RELOAD_OTHER in reverse 1155 order of the reloads. Thus if the outer reload is also of type 1156 RELOAD_OTHER, we are guaranteed that this inner reload will be 1157 output after the outer reload. */ 1158 dont_remove_subreg = 1; 1159 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1160 &SUBREG_REG (out), 1161 find_valid_class (outmode, 1162 subreg_regno_offset (REGNO (SUBREG_REG (out)), 1163 GET_MODE (SUBREG_REG (out)), 1164 SUBREG_BYTE (out), 1165 GET_MODE (out)), 1166 REGNO (SUBREG_REG (out))), 1167 VOIDmode, VOIDmode, 0, 0, 1168 opnum, RELOAD_OTHER); 1169 } 1170 1171 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1172 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1173 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1174 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1175 dont_share = 1; 1176 1177 /* If IN is a SUBREG of a hard register, make a new REG. This 1178 simplifies some of the cases below. */ 1179 1180 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1181 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1182 && ! dont_remove_subreg) 1183 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in)); 1184 1185 /* Similarly for OUT. */ 1186 if (out != 0 && GET_CODE (out) == SUBREG 1187 && GET_CODE (SUBREG_REG (out)) == REG 1188 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1189 && ! dont_remove_subreg) 1190 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out)); 1191 1192 /* Narrow down the class of register wanted if that is 1193 desirable on this machine for efficiency. */ 1194 if (in != 0) 1195 class = PREFERRED_RELOAD_CLASS (in, class); 1196 1197 /* Output reloads may need analogous treatment, different in detail. */ 1198#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1199 if (out != 0) 1200 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1201#endif 1202 1203 /* Make sure we use a class that can handle the actual pseudo 1204 inside any subreg. For example, on the 386, QImode regs 1205 can appear within SImode subregs. Although GENERAL_REGS 1206 can handle SImode, QImode needs a smaller class. */ 1207#ifdef LIMIT_RELOAD_CLASS 1208 if (in_subreg_loc) 1209 class = LIMIT_RELOAD_CLASS (inmode, class); 1210 else if (in != 0 && GET_CODE (in) == SUBREG) 1211 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1212 1213 if (out_subreg_loc) 1214 class = LIMIT_RELOAD_CLASS (outmode, class); 1215 if (out != 0 && GET_CODE (out) == SUBREG) 1216 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1217#endif 1218 1219 /* Verify that this class is at least possible for the mode that 1220 is specified. */ 1221 if (this_insn_is_asm) 1222 { 1223 enum machine_mode mode; 1224 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1225 mode = inmode; 1226 else 1227 mode = outmode; 1228 if (mode == VOIDmode) 1229 { 1230 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1231 mode = word_mode; 1232 if (in != 0) 1233 inmode = word_mode; 1234 if (out != 0) 1235 outmode = word_mode; 1236 } 1237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1238 if (HARD_REGNO_MODE_OK (i, mode) 1239 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1240 { 1241 int nregs = HARD_REGNO_NREGS (i, mode); 1242 1243 int j; 1244 for (j = 1; j < nregs; j++) 1245 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1246 break; 1247 if (j == nregs) 1248 break; 1249 } 1250 if (i == FIRST_PSEUDO_REGISTER) 1251 { 1252 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1253 class = ALL_REGS; 1254 } 1255 } 1256 1257 /* Optional output reloads are always OK even if we have no register class, 1258 since the function of these reloads is only to have spill_reg_store etc. 1259 set, so that the storing insn can be deleted later. */ 1260 if (class == NO_REGS 1261 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1262 abort (); 1263 1264 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1265 1266 if (i == n_reloads) 1267 { 1268 /* See if we need a secondary reload register to move between CLASS 1269 and IN or CLASS and OUT. Get the icode and push any required reloads 1270 needed for each of them if so. */ 1271 1272#ifdef SECONDARY_INPUT_RELOAD_CLASS 1273 if (in != 0) 1274 secondary_in_reload 1275 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1276 &secondary_in_icode); 1277#endif 1278 1279#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1280 if (out != 0 && GET_CODE (out) != SCRATCH) 1281 secondary_out_reload 1282 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1283 type, &secondary_out_icode); 1284#endif 1285 1286 /* We found no existing reload suitable for re-use. 1287 So add an additional reload. */ 1288 1289#ifdef SECONDARY_MEMORY_NEEDED 1290 /* If a memory location is needed for the copy, make one. */ 1291 if (in != 0 && GET_CODE (in) == REG 1292 && REGNO (in) < FIRST_PSEUDO_REGISTER 1293 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1294 class, inmode)) 1295 get_secondary_mem (in, inmode, opnum, type); 1296#endif 1297 1298 i = n_reloads; 1299 rld[i].in = in; 1300 rld[i].out = out; 1301 rld[i].class = class; 1302 rld[i].inmode = inmode; 1303 rld[i].outmode = outmode; 1304 rld[i].reg_rtx = 0; 1305 rld[i].optional = optional; 1306 rld[i].inc = 0; 1307 rld[i].nocombine = 0; 1308 rld[i].in_reg = inloc ? *inloc : 0; 1309 rld[i].out_reg = outloc ? *outloc : 0; 1310 rld[i].opnum = opnum; 1311 rld[i].when_needed = type; 1312 rld[i].secondary_in_reload = secondary_in_reload; 1313 rld[i].secondary_out_reload = secondary_out_reload; 1314 rld[i].secondary_in_icode = secondary_in_icode; 1315 rld[i].secondary_out_icode = secondary_out_icode; 1316 rld[i].secondary_p = 0; 1317 1318 n_reloads++; 1319 1320#ifdef SECONDARY_MEMORY_NEEDED 1321 if (out != 0 && GET_CODE (out) == REG 1322 && REGNO (out) < FIRST_PSEUDO_REGISTER 1323 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1324 outmode)) 1325 get_secondary_mem (out, outmode, opnum, type); 1326#endif 1327 } 1328 else 1329 { 1330 /* We are reusing an existing reload, 1331 but we may have additional information for it. 1332 For example, we may now have both IN and OUT 1333 while the old one may have just one of them. */ 1334 1335 /* The modes can be different. If they are, we want to reload in 1336 the larger mode, so that the value is valid for both modes. */ 1337 if (inmode != VOIDmode 1338 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode)) 1339 rld[i].inmode = inmode; 1340 if (outmode != VOIDmode 1341 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode)) 1342 rld[i].outmode = outmode; 1343 if (in != 0) 1344 { 1345 rtx in_reg = inloc ? *inloc : 0; 1346 /* If we merge reloads for two distinct rtl expressions that 1347 are identical in content, there might be duplicate address 1348 reloads. Remove the extra set now, so that if we later find 1349 that we can inherit this reload, we can get rid of the 1350 address reloads altogether. 1351 1352 Do not do this if both reloads are optional since the result 1353 would be an optional reload which could potentially leave 1354 unresolved address replacements. 1355 1356 It is not sufficient to call transfer_replacements since 1357 choose_reload_regs will remove the replacements for address 1358 reloads of inherited reloads which results in the same 1359 problem. */ 1360 if (rld[i].in != in && rtx_equal_p (in, rld[i].in) 1361 && ! (rld[i].optional && optional)) 1362 { 1363 /* We must keep the address reload with the lower operand 1364 number alive. */ 1365 if (opnum > rld[i].opnum) 1366 { 1367 remove_address_replacements (in); 1368 in = rld[i].in; 1369 in_reg = rld[i].in_reg; 1370 } 1371 else 1372 remove_address_replacements (rld[i].in); 1373 } 1374 rld[i].in = in; 1375 rld[i].in_reg = in_reg; 1376 } 1377 if (out != 0) 1378 { 1379 rld[i].out = out; 1380 rld[i].out_reg = outloc ? *outloc : 0; 1381 } 1382 if (reg_class_subset_p (class, rld[i].class)) 1383 rld[i].class = class; 1384 rld[i].optional &= optional; 1385 if (MERGE_TO_OTHER (type, rld[i].when_needed, 1386 opnum, rld[i].opnum)) 1387 rld[i].when_needed = RELOAD_OTHER; 1388 rld[i].opnum = MIN (rld[i].opnum, opnum); 1389 } 1390 1391 /* If the ostensible rtx being reloaded differs from the rtx found 1392 in the location to substitute, this reload is not safe to combine 1393 because we cannot reliably tell whether it appears in the insn. */ 1394 1395 if (in != 0 && in != *inloc) 1396 rld[i].nocombine = 1; 1397 1398#if 0 1399 /* This was replaced by changes in find_reloads_address_1 and the new 1400 function inc_for_reload, which go with a new meaning of reload_inc. */ 1401 1402 /* If this is an IN/OUT reload in an insn that sets the CC, 1403 it must be for an autoincrement. It doesn't work to store 1404 the incremented value after the insn because that would clobber the CC. 1405 So we must do the increment of the value reloaded from, 1406 increment it, store it back, then decrement again. */ 1407 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1408 { 1409 out = 0; 1410 rld[i].out = 0; 1411 rld[i].inc = find_inc_amount (PATTERN (this_insn), in); 1412 /* If we did not find a nonzero amount-to-increment-by, 1413 that contradicts the belief that IN is being incremented 1414 in an address in this insn. */ 1415 if (rld[i].inc == 0) 1416 abort (); 1417 } 1418#endif 1419 1420 /* If we will replace IN and OUT with the reload-reg, 1421 record where they are located so that substitution need 1422 not do a tree walk. */ 1423 1424 if (replace_reloads) 1425 { 1426 if (inloc != 0) 1427 { 1428 struct replacement *r = &replacements[n_replacements++]; 1429 r->what = i; 1430 r->subreg_loc = in_subreg_loc; 1431 r->where = inloc; 1432 r->mode = inmode; 1433 } 1434 if (outloc != 0 && outloc != inloc) 1435 { 1436 struct replacement *r = &replacements[n_replacements++]; 1437 r->what = i; 1438 r->where = outloc; 1439 r->subreg_loc = out_subreg_loc; 1440 r->mode = outmode; 1441 } 1442 } 1443 1444 /* If this reload is just being introduced and it has both 1445 an incoming quantity and an outgoing quantity that are 1446 supposed to be made to match, see if either one of the two 1447 can serve as the place to reload into. 1448 1449 If one of them is acceptable, set rld[i].reg_rtx 1450 to that one. */ 1451 1452 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0) 1453 { 1454 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc, 1455 inmode, outmode, 1456 rld[i].class, i, 1457 earlyclobber_operand_p (out)); 1458 1459 /* If the outgoing register already contains the same value 1460 as the incoming one, we can dispense with loading it. 1461 The easiest way to tell the caller that is to give a phony 1462 value for the incoming operand (same as outgoing one). */ 1463 if (rld[i].reg_rtx == out 1464 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1465 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1466 static_reload_reg_p, i, inmode)) 1467 rld[i].in = out; 1468 } 1469 1470 /* If this is an input reload and the operand contains a register that 1471 dies in this insn and is used nowhere else, see if it is the right class 1472 to be used for this reload. Use it if so. (This occurs most commonly 1473 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1474 this if it is also an output reload that mentions the register unless 1475 the output is a SUBREG that clobbers an entire register. 1476 1477 Note that the operand might be one of the spill regs, if it is a 1478 pseudo reg and we are in a block where spilling has not taken place. 1479 But if there is no spilling in this block, that is OK. 1480 An explicitly used hard reg cannot be a spill reg. */ 1481 1482 if (rld[i].reg_rtx == 0 && in != 0) 1483 { 1484 rtx note; 1485 int regno; 1486 enum machine_mode rel_mode = inmode; 1487 1488 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode)) 1489 rel_mode = outmode; 1490 1491 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1492 if (REG_NOTE_KIND (note) == REG_DEAD 1493 && GET_CODE (XEXP (note, 0)) == REG 1494 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1495 && reg_mentioned_p (XEXP (note, 0), in) 1496 && ! refers_to_regno_for_reload_p (regno, 1497 (regno 1498 + HARD_REGNO_NREGS (regno, 1499 rel_mode)), 1500 PATTERN (this_insn), inloc) 1501 /* If this is also an output reload, IN cannot be used as 1502 the reload register if it is set in this insn unless IN 1503 is also OUT. */ 1504 && (out == 0 || in == out 1505 || ! hard_reg_set_here_p (regno, 1506 (regno 1507 + HARD_REGNO_NREGS (regno, 1508 rel_mode)), 1509 PATTERN (this_insn))) 1510 /* ??? Why is this code so different from the previous? 1511 Is there any simple coherent way to describe the two together? 1512 What's going on here. */ 1513 && (in != out 1514 || (GET_CODE (in) == SUBREG 1515 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1516 / UNITS_PER_WORD) 1517 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1518 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1519 /* Make sure the operand fits in the reg that dies. */ 1520 && (GET_MODE_SIZE (rel_mode) 1521 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))) 1522 && HARD_REGNO_MODE_OK (regno, inmode) 1523 && HARD_REGNO_MODE_OK (regno, outmode)) 1524 { 1525 unsigned int offs; 1526 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1527 HARD_REGNO_NREGS (regno, outmode)); 1528 1529 for (offs = 0; offs < nregs; offs++) 1530 if (fixed_regs[regno + offs] 1531 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1532 regno + offs)) 1533 break; 1534 1535 if (offs == nregs) 1536 { 1537 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno); 1538 break; 1539 } 1540 } 1541 } 1542 1543 if (out) 1544 output_reloadnum = i; 1545 1546 return i; 1547} 1548 1549/* Record an additional place we must replace a value 1550 for which we have already recorded a reload. 1551 RELOADNUM is the value returned by push_reload 1552 when the reload was recorded. 1553 This is used in insn patterns that use match_dup. */ 1554 1555static void 1556push_replacement (loc, reloadnum, mode) 1557 rtx *loc; 1558 int reloadnum; 1559 enum machine_mode mode; 1560{ 1561 if (replace_reloads) 1562 { 1563 struct replacement *r = &replacements[n_replacements++]; 1564 r->what = reloadnum; 1565 r->where = loc; 1566 r->subreg_loc = 0; 1567 r->mode = mode; 1568 } 1569} 1570 1571/* Transfer all replacements that used to be in reload FROM to be in 1572 reload TO. */ 1573 1574void 1575transfer_replacements (to, from) 1576 int to, from; 1577{ 1578 int i; 1579 1580 for (i = 0; i < n_replacements; i++) 1581 if (replacements[i].what == from) 1582 replacements[i].what = to; 1583} 1584 1585/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1586 or a subpart of it. If we have any replacements registered for IN_RTX, 1587 cancel the reloads that were supposed to load them. 1588 Return non-zero if we canceled any reloads. */ 1589int 1590remove_address_replacements (in_rtx) 1591 rtx in_rtx; 1592{ 1593 int i, j; 1594 char reload_flags[MAX_RELOADS]; 1595 int something_changed = 0; 1596 1597 memset (reload_flags, 0, sizeof reload_flags); 1598 for (i = 0, j = 0; i < n_replacements; i++) 1599 { 1600 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1601 reload_flags[replacements[i].what] |= 1; 1602 else 1603 { 1604 replacements[j++] = replacements[i]; 1605 reload_flags[replacements[i].what] |= 2; 1606 } 1607 } 1608 /* Note that the following store must be done before the recursive calls. */ 1609 n_replacements = j; 1610 1611 for (i = n_reloads - 1; i >= 0; i--) 1612 { 1613 if (reload_flags[i] == 1) 1614 { 1615 deallocate_reload_reg (i); 1616 remove_address_replacements (rld[i].in); 1617 rld[i].in = 0; 1618 something_changed = 1; 1619 } 1620 } 1621 return something_changed; 1622} 1623 1624/* If there is only one output reload, and it is not for an earlyclobber 1625 operand, try to combine it with a (logically unrelated) input reload 1626 to reduce the number of reload registers needed. 1627 1628 This is safe if the input reload does not appear in 1629 the value being output-reloaded, because this implies 1630 it is not needed any more once the original insn completes. 1631 1632 If that doesn't work, see we can use any of the registers that 1633 die in this insn as a reload register. We can if it is of the right 1634 class and does not appear in the value being output-reloaded. */ 1635 1636static void 1637combine_reloads () 1638{ 1639 int i; 1640 int output_reload = -1; 1641 int secondary_out = -1; 1642 rtx note; 1643 1644 /* Find the output reload; return unless there is exactly one 1645 and that one is mandatory. */ 1646 1647 for (i = 0; i < n_reloads; i++) 1648 if (rld[i].out != 0) 1649 { 1650 if (output_reload >= 0) 1651 return; 1652 output_reload = i; 1653 } 1654 1655 if (output_reload < 0 || rld[output_reload].optional) 1656 return; 1657 1658 /* An input-output reload isn't combinable. */ 1659 1660 if (rld[output_reload].in != 0) 1661 return; 1662 1663 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1664 if (earlyclobber_operand_p (rld[output_reload].out)) 1665 return; 1666 1667 /* If there is a reload for part of the address of this operand, we would 1668 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend 1669 its life to the point where doing this combine would not lower the 1670 number of spill registers needed. */ 1671 for (i = 0; i < n_reloads; i++) 1672 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 1673 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 1674 && rld[i].opnum == rld[output_reload].opnum) 1675 return; 1676 1677 /* Check each input reload; can we combine it? */ 1678 1679 for (i = 0; i < n_reloads; i++) 1680 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine 1681 /* Life span of this reload must not extend past main insn. */ 1682 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 1683 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 1684 && rld[i].when_needed != RELOAD_OTHER 1685 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode) 1686 == CLASS_MAX_NREGS (rld[output_reload].class, 1687 rld[output_reload].outmode)) 1688 && rld[i].inc == 0 1689 && rld[i].reg_rtx == 0 1690#ifdef SECONDARY_MEMORY_NEEDED 1691 /* Don't combine two reloads with different secondary 1692 memory locations. */ 1693 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0 1694 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0 1695 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum], 1696 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum])) 1697#endif 1698 && (SMALL_REGISTER_CLASSES 1699 ? (rld[i].class == rld[output_reload].class) 1700 : (reg_class_subset_p (rld[i].class, 1701 rld[output_reload].class) 1702 || reg_class_subset_p (rld[output_reload].class, 1703 rld[i].class))) 1704 && (MATCHES (rld[i].in, rld[output_reload].out) 1705 /* Args reversed because the first arg seems to be 1706 the one that we imagine being modified 1707 while the second is the one that might be affected. */ 1708 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out, 1709 rld[i].in) 1710 /* However, if the input is a register that appears inside 1711 the output, then we also can't share. 1712 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1713 If the same reload reg is used for both reg 69 and the 1714 result to be stored in memory, then that result 1715 will clobber the address of the memory ref. */ 1716 && ! (GET_CODE (rld[i].in) == REG 1717 && reg_overlap_mentioned_for_reload_p (rld[i].in, 1718 rld[output_reload].out)))) 1719 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode) 1720 && (reg_class_size[(int) rld[i].class] 1721 || SMALL_REGISTER_CLASSES) 1722 /* We will allow making things slightly worse by combining an 1723 input and an output, but no worse than that. */ 1724 && (rld[i].when_needed == RELOAD_FOR_INPUT 1725 || rld[i].when_needed == RELOAD_FOR_OUTPUT)) 1726 { 1727 int j; 1728 1729 /* We have found a reload to combine with! */ 1730 rld[i].out = rld[output_reload].out; 1731 rld[i].out_reg = rld[output_reload].out_reg; 1732 rld[i].outmode = rld[output_reload].outmode; 1733 /* Mark the old output reload as inoperative. */ 1734 rld[output_reload].out = 0; 1735 /* The combined reload is needed for the entire insn. */ 1736 rld[i].when_needed = RELOAD_OTHER; 1737 /* If the output reload had a secondary reload, copy it. */ 1738 if (rld[output_reload].secondary_out_reload != -1) 1739 { 1740 rld[i].secondary_out_reload 1741 = rld[output_reload].secondary_out_reload; 1742 rld[i].secondary_out_icode 1743 = rld[output_reload].secondary_out_icode; 1744 } 1745 1746#ifdef SECONDARY_MEMORY_NEEDED 1747 /* Copy any secondary MEM. */ 1748 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0) 1749 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] 1750 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]; 1751#endif 1752 /* If required, minimize the register class. */ 1753 if (reg_class_subset_p (rld[output_reload].class, 1754 rld[i].class)) 1755 rld[i].class = rld[output_reload].class; 1756 1757 /* Transfer all replacements from the old reload to the combined. */ 1758 for (j = 0; j < n_replacements; j++) 1759 if (replacements[j].what == output_reload) 1760 replacements[j].what = i; 1761 1762 return; 1763 } 1764 1765 /* If this insn has only one operand that is modified or written (assumed 1766 to be the first), it must be the one corresponding to this reload. It 1767 is safe to use anything that dies in this insn for that output provided 1768 that it does not occur in the output (we already know it isn't an 1769 earlyclobber. If this is an asm insn, give up. */ 1770 1771 if (INSN_CODE (this_insn) == -1) 1772 return; 1773 1774 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++) 1775 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '=' 1776 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+') 1777 return; 1778 1779 /* See if some hard register that dies in this insn and is not used in 1780 the output is the right class. Only works if the register we pick 1781 up can fully hold our output reload. */ 1782 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1783 if (REG_NOTE_KIND (note) == REG_DEAD 1784 && GET_CODE (XEXP (note, 0)) == REG 1785 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1786 rld[output_reload].out) 1787 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1788 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1789 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class], 1790 REGNO (XEXP (note, 0))) 1791 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1792 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1793 /* Ensure that a secondary or tertiary reload for this output 1794 won't want this register. */ 1795 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1 1796 || (! (TEST_HARD_REG_BIT 1797 (reg_class_contents[(int) rld[secondary_out].class], 1798 REGNO (XEXP (note, 0)))) 1799 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1 1800 || ! (TEST_HARD_REG_BIT 1801 (reg_class_contents[(int) rld[secondary_out].class], 1802 REGNO (XEXP (note, 0))))))) 1803 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1804 { 1805 rld[output_reload].reg_rtx 1806 = gen_rtx_REG (rld[output_reload].outmode, 1807 REGNO (XEXP (note, 0))); 1808 return; 1809 } 1810} 1811 1812/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1813 See if one of IN and OUT is a register that may be used; 1814 this is desirable since a spill-register won't be needed. 1815 If so, return the register rtx that proves acceptable. 1816 1817 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1818 CLASS is the register class required for the reload. 1819 1820 If FOR_REAL is >= 0, it is the number of the reload, 1821 and in some cases when it can be discovered that OUT doesn't need 1822 to be computed, clear out rld[FOR_REAL].out. 1823 1824 If FOR_REAL is -1, this should not be done, because this call 1825 is just to see if a register can be found, not to find and install it. 1826 1827 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1828 puts an additional constraint on being able to use IN for OUT since 1829 IN must not appear elsewhere in the insn (it is assumed that IN itself 1830 is safe from the earlyclobber). */ 1831 1832static rtx 1833find_dummy_reload (real_in, real_out, inloc, outloc, 1834 inmode, outmode, class, for_real, earlyclobber) 1835 rtx real_in, real_out; 1836 rtx *inloc, *outloc; 1837 enum machine_mode inmode, outmode; 1838 enum reg_class class; 1839 int for_real; 1840 int earlyclobber; 1841{ 1842 rtx in = real_in; 1843 rtx out = real_out; 1844 int in_offset = 0; 1845 int out_offset = 0; 1846 rtx value = 0; 1847 1848 /* If operands exceed a word, we can't use either of them 1849 unless they have the same size. */ 1850 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1851 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1852 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1853 return 0; 1854 1855 /* Note that {in,out}_offset are needed only when 'in' or 'out' 1856 respectively refers to a hard register. */ 1857 1858 /* Find the inside of any subregs. */ 1859 while (GET_CODE (out) == SUBREG) 1860 { 1861 if (GET_CODE (SUBREG_REG (out)) == REG 1862 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) 1863 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)), 1864 GET_MODE (SUBREG_REG (out)), 1865 SUBREG_BYTE (out), 1866 GET_MODE (out)); 1867 out = SUBREG_REG (out); 1868 } 1869 while (GET_CODE (in) == SUBREG) 1870 { 1871 if (GET_CODE (SUBREG_REG (in)) == REG 1872 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) 1873 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)), 1874 GET_MODE (SUBREG_REG (in)), 1875 SUBREG_BYTE (in), 1876 GET_MODE (in)); 1877 in = SUBREG_REG (in); 1878 } 1879 1880 /* Narrow down the reg class, the same way push_reload will; 1881 otherwise we might find a dummy now, but push_reload won't. */ 1882 class = PREFERRED_RELOAD_CLASS (in, class); 1883 1884 /* See if OUT will do. */ 1885 if (GET_CODE (out) == REG 1886 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1887 { 1888 unsigned int regno = REGNO (out) + out_offset; 1889 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode); 1890 rtx saved_rtx; 1891 1892 /* When we consider whether the insn uses OUT, 1893 ignore references within IN. They don't prevent us 1894 from copying IN into OUT, because those refs would 1895 move into the insn that reloads IN. 1896 1897 However, we only ignore IN in its role as this reload. 1898 If the insn uses IN elsewhere and it contains OUT, 1899 that counts. We can't be sure it's the "same" operand 1900 so it might not go through this reload. */ 1901 saved_rtx = *inloc; 1902 *inloc = const0_rtx; 1903 1904 if (regno < FIRST_PSEUDO_REGISTER 1905 && HARD_REGNO_MODE_OK (regno, outmode) 1906 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1907 PATTERN (this_insn), outloc)) 1908 { 1909 unsigned int i; 1910 1911 for (i = 0; i < nwords; i++) 1912 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1913 regno + i)) 1914 break; 1915 1916 if (i == nwords) 1917 { 1918 if (GET_CODE (real_out) == REG) 1919 value = real_out; 1920 else 1921 value = gen_rtx_REG (outmode, regno); 1922 } 1923 } 1924 1925 *inloc = saved_rtx; 1926 } 1927 1928 /* Consider using IN if OUT was not acceptable 1929 or if OUT dies in this insn (like the quotient in a divmod insn). 1930 We can't use IN unless it is dies in this insn, 1931 which means we must know accurately which hard regs are live. 1932 Also, the result can't go in IN if IN is used within OUT, 1933 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1934 if (hard_regs_live_known 1935 && GET_CODE (in) == REG 1936 && REGNO (in) < FIRST_PSEUDO_REGISTER 1937 && (value == 0 1938 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1939 && find_reg_note (this_insn, REG_DEAD, real_in) 1940 && !fixed_regs[REGNO (in)] 1941 && HARD_REGNO_MODE_OK (REGNO (in), 1942 /* The only case where out and real_out might 1943 have different modes is where real_out 1944 is a subreg, and in that case, out 1945 has a real mode. */ 1946 (GET_MODE (out) != VOIDmode 1947 ? GET_MODE (out) : outmode))) 1948 { 1949 unsigned int regno = REGNO (in) + in_offset; 1950 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode); 1951 1952 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0) 1953 && ! hard_reg_set_here_p (regno, regno + nwords, 1954 PATTERN (this_insn)) 1955 && (! earlyclobber 1956 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1957 PATTERN (this_insn), inloc))) 1958 { 1959 unsigned int i; 1960 1961 for (i = 0; i < nwords; i++) 1962 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1963 regno + i)) 1964 break; 1965 1966 if (i == nwords) 1967 { 1968 /* If we were going to use OUT as the reload reg 1969 and changed our mind, it means OUT is a dummy that 1970 dies here. So don't bother copying value to it. */ 1971 if (for_real >= 0 && value == real_out) 1972 rld[for_real].out = 0; 1973 if (GET_CODE (real_in) == REG) 1974 value = real_in; 1975 else 1976 value = gen_rtx_REG (inmode, regno); 1977 } 1978 } 1979 } 1980 1981 return value; 1982} 1983 1984/* This page contains subroutines used mainly for determining 1985 whether the IN or an OUT of a reload can serve as the 1986 reload register. */ 1987 1988/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1989 1990int 1991earlyclobber_operand_p (x) 1992 rtx x; 1993{ 1994 int i; 1995 1996 for (i = 0; i < n_earlyclobbers; i++) 1997 if (reload_earlyclobbers[i] == x) 1998 return 1; 1999 2000 return 0; 2001} 2002 2003/* Return 1 if expression X alters a hard reg in the range 2004 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2005 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2006 X should be the body of an instruction. */ 2007 2008static int 2009hard_reg_set_here_p (beg_regno, end_regno, x) 2010 unsigned int beg_regno, end_regno; 2011 rtx x; 2012{ 2013 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2014 { 2015 rtx op0 = SET_DEST (x); 2016 2017 while (GET_CODE (op0) == SUBREG) 2018 op0 = SUBREG_REG (op0); 2019 if (GET_CODE (op0) == REG) 2020 { 2021 unsigned int r = REGNO (op0); 2022 2023 /* See if this reg overlaps range under consideration. */ 2024 if (r < end_regno 2025 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2026 return 1; 2027 } 2028 } 2029 else if (GET_CODE (x) == PARALLEL) 2030 { 2031 int i = XVECLEN (x, 0) - 1; 2032 2033 for (; i >= 0; i--) 2034 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2035 return 1; 2036 } 2037 2038 return 0; 2039} 2040 2041/* Return 1 if ADDR is a valid memory address for mode MODE, 2042 and check that each pseudo reg has the proper kind of 2043 hard reg. */ 2044 2045int 2046strict_memory_address_p (mode, addr) 2047 enum machine_mode mode ATTRIBUTE_UNUSED; 2048 rtx addr; 2049{ 2050 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2051 return 0; 2052 2053 win: 2054 return 1; 2055} 2056 2057/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2058 if they are the same hard reg, and has special hacks for 2059 autoincrement and autodecrement. 2060 This is specifically intended for find_reloads to use 2061 in determining whether two operands match. 2062 X is the operand whose number is the lower of the two. 2063 2064 The value is 2 if Y contains a pre-increment that matches 2065 a non-incrementing address in X. */ 2066 2067/* ??? To be completely correct, we should arrange to pass 2068 for X the output operand and for Y the input operand. 2069 For now, we assume that the output operand has the lower number 2070 because that is natural in (SET output (... input ...)). */ 2071 2072int 2073operands_match_p (x, y) 2074 rtx x, y; 2075{ 2076 int i; 2077 RTX_CODE code = GET_CODE (x); 2078 const char *fmt; 2079 int success_2; 2080 2081 if (x == y) 2082 return 1; 2083 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2084 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2085 && GET_CODE (SUBREG_REG (y)) == REG))) 2086 { 2087 int j; 2088 2089 if (code == SUBREG) 2090 { 2091 i = REGNO (SUBREG_REG (x)); 2092 if (i >= FIRST_PSEUDO_REGISTER) 2093 goto slow; 2094 i += subreg_regno_offset (REGNO (SUBREG_REG (x)), 2095 GET_MODE (SUBREG_REG (x)), 2096 SUBREG_BYTE (x), 2097 GET_MODE (x)); 2098 } 2099 else 2100 i = REGNO (x); 2101 2102 if (GET_CODE (y) == SUBREG) 2103 { 2104 j = REGNO (SUBREG_REG (y)); 2105 if (j >= FIRST_PSEUDO_REGISTER) 2106 goto slow; 2107 j += subreg_regno_offset (REGNO (SUBREG_REG (y)), 2108 GET_MODE (SUBREG_REG (y)), 2109 SUBREG_BYTE (y), 2110 GET_MODE (y)); 2111 } 2112 else 2113 j = REGNO (y); 2114 2115 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2116 multiple hard register group, so that for example (reg:DI 0) and 2117 (reg:SI 1) will be considered the same register. */ 2118 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2119 && i < FIRST_PSEUDO_REGISTER) 2120 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2121 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2122 && j < FIRST_PSEUDO_REGISTER) 2123 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2124 2125 return i == j; 2126 } 2127 /* If two operands must match, because they are really a single 2128 operand of an assembler insn, then two postincrements are invalid 2129 because the assembler insn would increment only once. 2130 On the other hand, an postincrement matches ordinary indexing 2131 if the postincrement is the output operand. */ 2132 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY) 2133 return operands_match_p (XEXP (x, 0), y); 2134 /* Two preincrements are invalid 2135 because the assembler insn would increment only once. 2136 On the other hand, an preincrement matches ordinary indexing 2137 if the preincrement is the input operand. 2138 In this case, return 2, since some callers need to do special 2139 things when this happens. */ 2140 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC 2141 || GET_CODE (y) == PRE_MODIFY) 2142 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2143 2144 slow: 2145 2146 /* Now we have disposed of all the cases 2147 in which different rtx codes can match. */ 2148 if (code != GET_CODE (y)) 2149 return 0; 2150 if (code == LABEL_REF) 2151 return XEXP (x, 0) == XEXP (y, 0); 2152 if (code == SYMBOL_REF) 2153 return XSTR (x, 0) == XSTR (y, 0); 2154 2155 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2156 2157 if (GET_MODE (x) != GET_MODE (y)) 2158 return 0; 2159 2160 /* Compare the elements. If any pair of corresponding elements 2161 fail to match, return 0 for the whole things. */ 2162 2163 success_2 = 0; 2164 fmt = GET_RTX_FORMAT (code); 2165 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2166 { 2167 int val, j; 2168 switch (fmt[i]) 2169 { 2170 case 'w': 2171 if (XWINT (x, i) != XWINT (y, i)) 2172 return 0; 2173 break; 2174 2175 case 'i': 2176 if (XINT (x, i) != XINT (y, i)) 2177 return 0; 2178 break; 2179 2180 case 'e': 2181 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2182 if (val == 0) 2183 return 0; 2184 /* If any subexpression returns 2, 2185 we should return 2 if we are successful. */ 2186 if (val == 2) 2187 success_2 = 1; 2188 break; 2189 2190 case '0': 2191 break; 2192 2193 case 'E': 2194 if (XVECLEN (x, i) != XVECLEN (y, i)) 2195 return 0; 2196 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2197 { 2198 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2199 if (val == 0) 2200 return 0; 2201 if (val == 2) 2202 success_2 = 1; 2203 } 2204 break; 2205 2206 /* It is believed that rtx's at this level will never 2207 contain anything but integers and other rtx's, 2208 except for within LABEL_REFs and SYMBOL_REFs. */ 2209 default: 2210 abort (); 2211 } 2212 } 2213 return 1 + success_2; 2214} 2215 2216/* Describe the range of registers or memory referenced by X. 2217 If X is a register, set REG_FLAG and put the first register 2218 number into START and the last plus one into END. 2219 If X is a memory reference, put a base address into BASE 2220 and a range of integer offsets into START and END. 2221 If X is pushing on the stack, we can assume it causes no trouble, 2222 so we set the SAFE field. */ 2223 2224static struct decomposition 2225decompose (x) 2226 rtx x; 2227{ 2228 struct decomposition val; 2229 int all_const = 0; 2230 2231 val.reg_flag = 0; 2232 val.safe = 0; 2233 val.base = 0; 2234 if (GET_CODE (x) == MEM) 2235 { 2236 rtx base = NULL_RTX, offset = 0; 2237 rtx addr = XEXP (x, 0); 2238 2239 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2240 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2241 { 2242 val.base = XEXP (addr, 0); 2243 val.start = -GET_MODE_SIZE (GET_MODE (x)); 2244 val.end = GET_MODE_SIZE (GET_MODE (x)); 2245 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2246 return val; 2247 } 2248 2249 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY) 2250 { 2251 if (GET_CODE (XEXP (addr, 1)) == PLUS 2252 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 2253 && CONSTANT_P (XEXP (XEXP (addr, 1), 1))) 2254 { 2255 val.base = XEXP (addr, 0); 2256 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1)); 2257 val.end = INTVAL (XEXP (XEXP (addr, 1), 1)); 2258 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2259 return val; 2260 } 2261 } 2262 2263 if (GET_CODE (addr) == CONST) 2264 { 2265 addr = XEXP (addr, 0); 2266 all_const = 1; 2267 } 2268 if (GET_CODE (addr) == PLUS) 2269 { 2270 if (CONSTANT_P (XEXP (addr, 0))) 2271 { 2272 base = XEXP (addr, 1); 2273 offset = XEXP (addr, 0); 2274 } 2275 else if (CONSTANT_P (XEXP (addr, 1))) 2276 { 2277 base = XEXP (addr, 0); 2278 offset = XEXP (addr, 1); 2279 } 2280 } 2281 2282 if (offset == 0) 2283 { 2284 base = addr; 2285 offset = const0_rtx; 2286 } 2287 if (GET_CODE (offset) == CONST) 2288 offset = XEXP (offset, 0); 2289 if (GET_CODE (offset) == PLUS) 2290 { 2291 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2292 { 2293 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2294 offset = XEXP (offset, 0); 2295 } 2296 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2297 { 2298 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2299 offset = XEXP (offset, 1); 2300 } 2301 else 2302 { 2303 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2304 offset = const0_rtx; 2305 } 2306 } 2307 else if (GET_CODE (offset) != CONST_INT) 2308 { 2309 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2310 offset = const0_rtx; 2311 } 2312 2313 if (all_const && GET_CODE (base) == PLUS) 2314 base = gen_rtx_CONST (GET_MODE (base), base); 2315 2316 if (GET_CODE (offset) != CONST_INT) 2317 abort (); 2318 2319 val.start = INTVAL (offset); 2320 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2321 val.base = base; 2322 return val; 2323 } 2324 else if (GET_CODE (x) == REG) 2325 { 2326 val.reg_flag = 1; 2327 val.start = true_regnum (x); 2328 if (val.start < 0) 2329 { 2330 /* A pseudo with no hard reg. */ 2331 val.start = REGNO (x); 2332 val.end = val.start + 1; 2333 } 2334 else 2335 /* A hard reg. */ 2336 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2337 } 2338 else if (GET_CODE (x) == SUBREG) 2339 { 2340 if (GET_CODE (SUBREG_REG (x)) != REG) 2341 /* This could be more precise, but it's good enough. */ 2342 return decompose (SUBREG_REG (x)); 2343 val.reg_flag = 1; 2344 val.start = true_regnum (x); 2345 if (val.start < 0) 2346 return decompose (SUBREG_REG (x)); 2347 else 2348 /* A hard reg. */ 2349 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2350 } 2351 else if (CONSTANT_P (x) 2352 /* This hasn't been assigned yet, so it can't conflict yet. */ 2353 || GET_CODE (x) == SCRATCH) 2354 val.safe = 1; 2355 else 2356 abort (); 2357 return val; 2358} 2359 2360/* Return 1 if altering Y will not modify the value of X. 2361 Y is also described by YDATA, which should be decompose (Y). */ 2362 2363static int 2364immune_p (x, y, ydata) 2365 rtx x, y; 2366 struct decomposition ydata; 2367{ 2368 struct decomposition xdata; 2369 2370 if (ydata.reg_flag) 2371 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0); 2372 if (ydata.safe) 2373 return 1; 2374 2375 if (GET_CODE (y) != MEM) 2376 abort (); 2377 /* If Y is memory and X is not, Y can't affect X. */ 2378 if (GET_CODE (x) != MEM) 2379 return 1; 2380 2381 xdata = decompose (x); 2382 2383 if (! rtx_equal_p (xdata.base, ydata.base)) 2384 { 2385 /* If bases are distinct symbolic constants, there is no overlap. */ 2386 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2387 return 1; 2388 /* Constants and stack slots never overlap. */ 2389 if (CONSTANT_P (xdata.base) 2390 && (ydata.base == frame_pointer_rtx 2391 || ydata.base == hard_frame_pointer_rtx 2392 || ydata.base == stack_pointer_rtx)) 2393 return 1; 2394 if (CONSTANT_P (ydata.base) 2395 && (xdata.base == frame_pointer_rtx 2396 || xdata.base == hard_frame_pointer_rtx 2397 || xdata.base == stack_pointer_rtx)) 2398 return 1; 2399 /* If either base is variable, we don't know anything. */ 2400 return 0; 2401 } 2402 2403 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2404} 2405 2406/* Similar, but calls decompose. */ 2407 2408int 2409safe_from_earlyclobber (op, clobber) 2410 rtx op, clobber; 2411{ 2412 struct decomposition early_data; 2413 2414 early_data = decompose (clobber); 2415 return immune_p (op, clobber, early_data); 2416} 2417 2418/* Main entry point of this file: search the body of INSN 2419 for values that need reloading and record them with push_reload. 2420 REPLACE nonzero means record also where the values occur 2421 so that subst_reloads can be used. 2422 2423 IND_LEVELS says how many levels of indirection are supported by this 2424 machine; a value of zero means that a memory reference is not a valid 2425 memory address. 2426 2427 LIVE_KNOWN says we have valid information about which hard 2428 regs are live at each point in the program; this is true when 2429 we are called from global_alloc but false when stupid register 2430 allocation has been done. 2431 2432 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2433 which is nonnegative if the reg has been commandeered for reloading into. 2434 It is copied into STATIC_RELOAD_REG_P and referenced from there 2435 by various subroutines. 2436 2437 Return TRUE if some operands need to be changed, because of swapping 2438 commutative operands, reg_equiv_address substitution, or whatever. */ 2439 2440int 2441find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2442 rtx insn; 2443 int replace, ind_levels; 2444 int live_known; 2445 short *reload_reg_p; 2446{ 2447 int insn_code_number; 2448 int i, j; 2449 int noperands; 2450 /* These start out as the constraints for the insn 2451 and they are chewed up as we consider alternatives. */ 2452 char *constraints[MAX_RECOG_OPERANDS]; 2453 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2454 a register. */ 2455 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2456 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2457 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2458 int address_reloaded[MAX_RECOG_OPERANDS]; 2459 /* Value of enum reload_type to use for operand. */ 2460 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2461 /* Value of enum reload_type to use within address of operand. */ 2462 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2463 /* Save the usage of each operand. */ 2464 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2465 int no_input_reloads = 0, no_output_reloads = 0; 2466 int n_alternatives; 2467 int this_alternative[MAX_RECOG_OPERANDS]; 2468 char this_alternative_match_win[MAX_RECOG_OPERANDS]; 2469 char this_alternative_win[MAX_RECOG_OPERANDS]; 2470 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2471 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2472 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2473 int swapped; 2474 int goal_alternative[MAX_RECOG_OPERANDS]; 2475 int this_alternative_number; 2476 int goal_alternative_number = 0; 2477 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2478 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2479 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2480 char goal_alternative_match_win[MAX_RECOG_OPERANDS]; 2481 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2482 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2483 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2484 int goal_alternative_swapped; 2485 int best; 2486 int commutative; 2487 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2488 rtx substed_operand[MAX_RECOG_OPERANDS]; 2489 rtx body = PATTERN (insn); 2490 rtx set = single_set (insn); 2491 int goal_earlyclobber = 0, this_earlyclobber; 2492 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2493 int retval = 0; 2494 2495 this_insn = insn; 2496 n_reloads = 0; 2497 n_replacements = 0; 2498 n_earlyclobbers = 0; 2499 replace_reloads = replace; 2500 hard_regs_live_known = live_known; 2501 static_reload_reg_p = reload_reg_p; 2502 2503 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2504 neither are insns that SET cc0. Insns that use CC0 are not allowed 2505 to have any input reloads. */ 2506 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2507 no_output_reloads = 1; 2508 2509#ifdef HAVE_cc0 2510 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2511 no_input_reloads = 1; 2512 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2513 no_output_reloads = 1; 2514#endif 2515 2516#ifdef SECONDARY_MEMORY_NEEDED 2517 /* The eliminated forms of any secondary memory locations are per-insn, so 2518 clear them out here. */ 2519 2520 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim); 2521#endif 2522 2523 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2524 is cheap to move between them. If it is not, there may not be an insn 2525 to do the copy, so we may need a reload. */ 2526 if (GET_CODE (body) == SET 2527 && GET_CODE (SET_DEST (body)) == REG 2528 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2529 && GET_CODE (SET_SRC (body)) == REG 2530 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2531 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)), 2532 REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2533 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2534 return 0; 2535 2536 extract_insn (insn); 2537 2538 noperands = reload_n_operands = recog_data.n_operands; 2539 n_alternatives = recog_data.n_alternatives; 2540 2541 /* Just return "no reloads" if insn has no operands with constraints. */ 2542 if (noperands == 0 || n_alternatives == 0) 2543 return 0; 2544 2545 insn_code_number = INSN_CODE (insn); 2546 this_insn_is_asm = insn_code_number < 0; 2547 2548 memcpy (operand_mode, recog_data.operand_mode, 2549 noperands * sizeof (enum machine_mode)); 2550 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *)); 2551 2552 commutative = -1; 2553 2554 /* If we will need to know, later, whether some pair of operands 2555 are the same, we must compare them now and save the result. 2556 Reloading the base and index registers will clobber them 2557 and afterward they will fail to match. */ 2558 2559 for (i = 0; i < noperands; i++) 2560 { 2561 char *p; 2562 int c; 2563 2564 substed_operand[i] = recog_data.operand[i]; 2565 p = constraints[i]; 2566 2567 modified[i] = RELOAD_READ; 2568 2569 /* Scan this operand's constraint to see if it is an output operand, 2570 an in-out operand, is commutative, or should match another. */ 2571 2572 while ((c = *p++)) 2573 { 2574 if (c == '=') 2575 modified[i] = RELOAD_WRITE; 2576 else if (c == '+') 2577 modified[i] = RELOAD_READ_WRITE; 2578 else if (c == '%') 2579 { 2580 /* The last operand should not be marked commutative. */ 2581 if (i == noperands - 1) 2582 abort (); 2583 2584 commutative = i; 2585 } 2586 else if (ISDIGIT (c)) 2587 { 2588 c = strtoul (p - 1, &p, 10); 2589 2590 operands_match[c][i] 2591 = operands_match_p (recog_data.operand[c], 2592 recog_data.operand[i]); 2593 2594 /* An operand may not match itself. */ 2595 if (c == i) 2596 abort (); 2597 2598 /* If C can be commuted with C+1, and C might need to match I, 2599 then C+1 might also need to match I. */ 2600 if (commutative >= 0) 2601 { 2602 if (c == commutative || c == commutative + 1) 2603 { 2604 int other = c + (c == commutative ? 1 : -1); 2605 operands_match[other][i] 2606 = operands_match_p (recog_data.operand[other], 2607 recog_data.operand[i]); 2608 } 2609 if (i == commutative || i == commutative + 1) 2610 { 2611 int other = i + (i == commutative ? 1 : -1); 2612 operands_match[c][other] 2613 = operands_match_p (recog_data.operand[c], 2614 recog_data.operand[other]); 2615 } 2616 /* Note that C is supposed to be less than I. 2617 No need to consider altering both C and I because in 2618 that case we would alter one into the other. */ 2619 } 2620 } 2621 } 2622 } 2623 2624 /* Examine each operand that is a memory reference or memory address 2625 and reload parts of the addresses into index registers. 2626 Also here any references to pseudo regs that didn't get hard regs 2627 but are equivalent to constants get replaced in the insn itself 2628 with those constants. Nobody will ever see them again. 2629 2630 Finally, set up the preferred classes of each operand. */ 2631 2632 for (i = 0; i < noperands; i++) 2633 { 2634 RTX_CODE code = GET_CODE (recog_data.operand[i]); 2635 2636 address_reloaded[i] = 0; 2637 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2638 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2639 : RELOAD_OTHER); 2640 address_type[i] 2641 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2642 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2643 : RELOAD_OTHER); 2644 2645 if (*constraints[i] == 0) 2646 /* Ignore things like match_operator operands. */ 2647 ; 2648 else if (constraints[i][0] == 'p') 2649 { 2650 find_reloads_address (VOIDmode, (rtx*) 0, 2651 recog_data.operand[i], 2652 recog_data.operand_loc[i], 2653 i, operand_type[i], ind_levels, insn); 2654 2655 /* If we now have a simple operand where we used to have a 2656 PLUS or MULT, re-recognize and try again. */ 2657 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o' 2658 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2659 && (GET_CODE (recog_data.operand[i]) == MULT 2660 || GET_CODE (recog_data.operand[i]) == PLUS)) 2661 { 2662 INSN_CODE (insn) = -1; 2663 retval = find_reloads (insn, replace, ind_levels, live_known, 2664 reload_reg_p); 2665 return retval; 2666 } 2667 2668 recog_data.operand[i] = *recog_data.operand_loc[i]; 2669 substed_operand[i] = recog_data.operand[i]; 2670 } 2671 else if (code == MEM) 2672 { 2673 address_reloaded[i] 2674 = find_reloads_address (GET_MODE (recog_data.operand[i]), 2675 recog_data.operand_loc[i], 2676 XEXP (recog_data.operand[i], 0), 2677 &XEXP (recog_data.operand[i], 0), 2678 i, address_type[i], ind_levels, insn); 2679 recog_data.operand[i] = *recog_data.operand_loc[i]; 2680 substed_operand[i] = recog_data.operand[i]; 2681 } 2682 else if (code == SUBREG) 2683 { 2684 rtx reg = SUBREG_REG (recog_data.operand[i]); 2685 rtx op 2686 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2687 ind_levels, 2688 set != 0 2689 && &SET_DEST (set) == recog_data.operand_loc[i], 2690 insn, 2691 &address_reloaded[i]); 2692 2693 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2694 that didn't get a hard register, emit a USE with a REG_EQUAL 2695 note in front so that we might inherit a previous, possibly 2696 wider reload. */ 2697 2698 if (replace 2699 && GET_CODE (op) == MEM 2700 && GET_CODE (reg) == REG 2701 && (GET_MODE_SIZE (GET_MODE (reg)) 2702 >= GET_MODE_SIZE (GET_MODE (op)))) 2703 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), 2704 insn), 2705 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]); 2706 2707 substed_operand[i] = recog_data.operand[i] = op; 2708 } 2709 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2710 /* We can get a PLUS as an "operand" as a result of register 2711 elimination. See eliminate_regs and gen_reload. We handle 2712 a unary operator by reloading the operand. */ 2713 substed_operand[i] = recog_data.operand[i] 2714 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2715 ind_levels, 0, insn, 2716 &address_reloaded[i]); 2717 else if (code == REG) 2718 { 2719 /* This is equivalent to calling find_reloads_toplev. 2720 The code is duplicated for speed. 2721 When we find a pseudo always equivalent to a constant, 2722 we replace it by the constant. We must be sure, however, 2723 that we don't try to replace it in the insn in which it 2724 is being set. */ 2725 int regno = REGNO (recog_data.operand[i]); 2726 if (reg_equiv_constant[regno] != 0 2727 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i])) 2728 { 2729 /* Record the existing mode so that the check if constants are 2730 allowed will work when operand_mode isn't specified. */ 2731 2732 if (operand_mode[i] == VOIDmode) 2733 operand_mode[i] = GET_MODE (recog_data.operand[i]); 2734 2735 substed_operand[i] = recog_data.operand[i] 2736 = reg_equiv_constant[regno]; 2737 } 2738 if (reg_equiv_memory_loc[regno] != 0 2739 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2740 /* We need not give a valid is_set_dest argument since the case 2741 of a constant equivalence was checked above. */ 2742 substed_operand[i] = recog_data.operand[i] 2743 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2744 ind_levels, 0, insn, 2745 &address_reloaded[i]); 2746 } 2747 /* If the operand is still a register (we didn't replace it with an 2748 equivalent), get the preferred class to reload it into. */ 2749 code = GET_CODE (recog_data.operand[i]); 2750 preferred_class[i] 2751 = ((code == REG && REGNO (recog_data.operand[i]) 2752 >= FIRST_PSEUDO_REGISTER) 2753 ? reg_preferred_class (REGNO (recog_data.operand[i])) 2754 : NO_REGS); 2755 pref_or_nothing[i] 2756 = (code == REG 2757 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER 2758 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS); 2759 } 2760 2761 /* If this is simply a copy from operand 1 to operand 0, merge the 2762 preferred classes for the operands. */ 2763 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set) 2764 && recog_data.operand[1] == SET_SRC (set)) 2765 { 2766 preferred_class[0] = preferred_class[1] 2767 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2768 pref_or_nothing[0] |= pref_or_nothing[1]; 2769 pref_or_nothing[1] |= pref_or_nothing[0]; 2770 } 2771 2772 /* Now see what we need for pseudo-regs that didn't get hard regs 2773 or got the wrong kind of hard reg. For this, we must consider 2774 all the operands together against the register constraints. */ 2775 2776 best = MAX_RECOG_OPERANDS * 2 + 600; 2777 2778 swapped = 0; 2779 goal_alternative_swapped = 0; 2780 try_swapped: 2781 2782 /* The constraints are made of several alternatives. 2783 Each operand's constraint looks like foo,bar,... with commas 2784 separating the alternatives. The first alternatives for all 2785 operands go together, the second alternatives go together, etc. 2786 2787 First loop over alternatives. */ 2788 2789 for (this_alternative_number = 0; 2790 this_alternative_number < n_alternatives; 2791 this_alternative_number++) 2792 { 2793 /* Loop over operands for one constraint alternative. */ 2794 /* LOSERS counts those that don't fit this alternative 2795 and would require loading. */ 2796 int losers = 0; 2797 /* BAD is set to 1 if it some operand can't fit this alternative 2798 even after reloading. */ 2799 int bad = 0; 2800 /* REJECT is a count of how undesirable this alternative says it is 2801 if any reloading is required. If the alternative matches exactly 2802 then REJECT is ignored, but otherwise it gets this much 2803 counted against it in addition to the reloading needed. Each 2804 ? counts three times here since we want the disparaging caused by 2805 a bad register class to only count 1/3 as much. */ 2806 int reject = 0; 2807 2808 this_earlyclobber = 0; 2809 2810 for (i = 0; i < noperands; i++) 2811 { 2812 char *p = constraints[i]; 2813 int win = 0; 2814 int did_match = 0; 2815 /* 0 => this operand can be reloaded somehow for this alternative. */ 2816 int badop = 1; 2817 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2818 int winreg = 0; 2819 int c; 2820 rtx operand = recog_data.operand[i]; 2821 int offset = 0; 2822 /* Nonzero means this is a MEM that must be reloaded into a reg 2823 regardless of what the constraint says. */ 2824 int force_reload = 0; 2825 int offmemok = 0; 2826 /* Nonzero if a constant forced into memory would be OK for this 2827 operand. */ 2828 int constmemok = 0; 2829 int earlyclobber = 0; 2830 2831 /* If the predicate accepts a unary operator, it means that 2832 we need to reload the operand, but do not do this for 2833 match_operator and friends. */ 2834 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2835 operand = XEXP (operand, 0); 2836 2837 /* If the operand is a SUBREG, extract 2838 the REG or MEM (or maybe even a constant) within. 2839 (Constants can occur as a result of reg_equiv_constant.) */ 2840 2841 while (GET_CODE (operand) == SUBREG) 2842 { 2843 /* Offset only matters when operand is a REG and 2844 it is a hard reg. This is because it is passed 2845 to reg_fits_class_p if it is a REG and all pseudos 2846 return 0 from that function. */ 2847 if (GET_CODE (SUBREG_REG (operand)) == REG 2848 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER) 2849 { 2850 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)), 2851 GET_MODE (SUBREG_REG (operand)), 2852 SUBREG_BYTE (operand), 2853 GET_MODE (operand)); 2854 } 2855 operand = SUBREG_REG (operand); 2856 /* Force reload if this is a constant or PLUS or if there may 2857 be a problem accessing OPERAND in the outer mode. */ 2858 if (CONSTANT_P (operand) 2859 || GET_CODE (operand) == PLUS 2860 /* We must force a reload of paradoxical SUBREGs 2861 of a MEM because the alignment of the inner value 2862 may not be enough to do the outer reference. On 2863 big-endian machines, it may also reference outside 2864 the object. 2865 2866 On machines that extend byte operations and we have a 2867 SUBREG where both the inner and outer modes are no wider 2868 than a word and the inner mode is narrower, is integral, 2869 and gets extended when loaded from memory, combine.c has 2870 made assumptions about the behavior of the machine in such 2871 register access. If the data is, in fact, in memory we 2872 must always load using the size assumed to be in the 2873 register and let the insn do the different-sized 2874 accesses. 2875 2876 This is doubly true if WORD_REGISTER_OPERATIONS. In 2877 this case eliminate_regs has left non-paradoxical 2878 subregs for push_reloads to see. Make sure it does 2879 by forcing the reload. 2880 2881 ??? When is it right at this stage to have a subreg 2882 of a mem that is _not_ to be handled specialy? IMO 2883 those should have been reduced to just a mem. */ 2884 || ((GET_CODE (operand) == MEM 2885 || (GET_CODE (operand)== REG 2886 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2887#ifndef WORD_REGISTER_OPERATIONS 2888 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2889 < BIGGEST_ALIGNMENT) 2890 && (GET_MODE_SIZE (operand_mode[i]) 2891 > GET_MODE_SIZE (GET_MODE (operand)))) 2892 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2893#ifdef LOAD_EXTEND_OP 2894 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2895 && (GET_MODE_SIZE (GET_MODE (operand)) 2896 <= UNITS_PER_WORD) 2897 && (GET_MODE_SIZE (operand_mode[i]) 2898 > GET_MODE_SIZE (GET_MODE (operand))) 2899 && INTEGRAL_MODE_P (GET_MODE (operand)) 2900 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2901#endif 2902 ) 2903#endif 2904 ) 2905 /* This following hunk of code should no longer be 2906 needed at all with SUBREG_BYTE. If you need this 2907 code back, please explain to me why so I can 2908 fix the real problem. -DaveM */ 2909#if 0 2910 /* Subreg of a hard reg which can't handle the subreg's mode 2911 or which would handle that mode in the wrong number of 2912 registers for subregging to work. */ 2913 || (GET_CODE (operand) == REG 2914 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2915 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2916 && (GET_MODE_SIZE (GET_MODE (operand)) 2917 > UNITS_PER_WORD) 2918 && ((GET_MODE_SIZE (GET_MODE (operand)) 2919 / UNITS_PER_WORD) 2920 != HARD_REGNO_NREGS (REGNO (operand), 2921 GET_MODE (operand)))) 2922 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2923 operand_mode[i]))) 2924#endif 2925 ) 2926 force_reload = 1; 2927 } 2928 2929 this_alternative[i] = (int) NO_REGS; 2930 this_alternative_win[i] = 0; 2931 this_alternative_match_win[i] = 0; 2932 this_alternative_offmemok[i] = 0; 2933 this_alternative_earlyclobber[i] = 0; 2934 this_alternative_matches[i] = -1; 2935 2936 /* An empty constraint or empty alternative 2937 allows anything which matched the pattern. */ 2938 if (*p == 0 || *p == ',') 2939 win = 1, badop = 0; 2940 2941 /* Scan this alternative's specs for this operand; 2942 set WIN if the operand fits any letter in this alternative. 2943 Otherwise, clear BADOP if this operand could 2944 fit some letter after reloads, 2945 or set WINREG if this operand could fit after reloads 2946 provided the constraint allows some registers. */ 2947 2948 while (*p && (c = *p++) != ',') 2949 switch (c) 2950 { 2951 case '=': case '+': case '*': 2952 break; 2953 2954 case '%': 2955 /* The last operand should not be marked commutative. */ 2956 if (i != noperands - 1) 2957 commutative = i; 2958 break; 2959 2960 case '?': 2961 reject += 6; 2962 break; 2963 2964 case '!': 2965 reject = 600; 2966 break; 2967 2968 case '#': 2969 /* Ignore rest of this alternative as far as 2970 reloading is concerned. */ 2971 while (*p && *p != ',') 2972 p++; 2973 break; 2974 2975 case '0': case '1': case '2': case '3': case '4': 2976 case '5': case '6': case '7': case '8': case '9': 2977 c = strtoul (p - 1, &p, 10); 2978 2979 this_alternative_matches[i] = c; 2980 /* We are supposed to match a previous operand. 2981 If we do, we win if that one did. 2982 If we do not, count both of the operands as losers. 2983 (This is too conservative, since most of the time 2984 only a single reload insn will be needed to make 2985 the two operands win. As a result, this alternative 2986 may be rejected when it is actually desirable.) */ 2987 if ((swapped && (c != commutative || i != commutative + 1)) 2988 /* If we are matching as if two operands were swapped, 2989 also pretend that operands_match had been computed 2990 with swapped. 2991 But if I is the second of those and C is the first, 2992 don't exchange them, because operands_match is valid 2993 only on one side of its diagonal. */ 2994 ? (operands_match 2995 [(c == commutative || c == commutative + 1) 2996 ? 2 * commutative + 1 - c : c] 2997 [(i == commutative || i == commutative + 1) 2998 ? 2 * commutative + 1 - i : i]) 2999 : operands_match[c][i]) 3000 { 3001 /* If we are matching a non-offsettable address where an 3002 offsettable address was expected, then we must reject 3003 this combination, because we can't reload it. */ 3004 if (this_alternative_offmemok[c] 3005 && GET_CODE (recog_data.operand[c]) == MEM 3006 && this_alternative[c] == (int) NO_REGS 3007 && ! this_alternative_win[c]) 3008 bad = 1; 3009 3010 did_match = this_alternative_win[c]; 3011 } 3012 else 3013 { 3014 /* Operands don't match. */ 3015 rtx value; 3016 /* Retroactively mark the operand we had to match 3017 as a loser, if it wasn't already. */ 3018 if (this_alternative_win[c]) 3019 losers++; 3020 this_alternative_win[c] = 0; 3021 if (this_alternative[c] == (int) NO_REGS) 3022 bad = 1; 3023 /* But count the pair only once in the total badness of 3024 this alternative, if the pair can be a dummy reload. */ 3025 value 3026 = find_dummy_reload (recog_data.operand[i], 3027 recog_data.operand[c], 3028 recog_data.operand_loc[i], 3029 recog_data.operand_loc[c], 3030 operand_mode[i], operand_mode[c], 3031 this_alternative[c], -1, 3032 this_alternative_earlyclobber[c]); 3033 3034 if (value != 0) 3035 losers--; 3036 } 3037 /* This can be fixed with reloads if the operand 3038 we are supposed to match can be fixed with reloads. */ 3039 badop = 0; 3040 this_alternative[i] = this_alternative[c]; 3041 3042 /* If we have to reload this operand and some previous 3043 operand also had to match the same thing as this 3044 operand, we don't know how to do that. So reject this 3045 alternative. */ 3046 if (! did_match || force_reload) 3047 for (j = 0; j < i; j++) 3048 if (this_alternative_matches[j] 3049 == this_alternative_matches[i]) 3050 badop = 1; 3051 break; 3052 3053 case 'p': 3054 /* All necessary reloads for an address_operand 3055 were handled in find_reloads_address. */ 3056 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode); 3057 win = 1; 3058 badop = 0; 3059 break; 3060 3061 case 'm': 3062 if (force_reload) 3063 break; 3064 if (GET_CODE (operand) == MEM 3065 || (GET_CODE (operand) == REG 3066 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3067 && reg_renumber[REGNO (operand)] < 0)) 3068 win = 1; 3069 if (CONSTANT_P (operand) 3070 /* force_const_mem does not accept HIGH. */ 3071 && GET_CODE (operand) != HIGH) 3072 badop = 0; 3073 constmemok = 1; 3074 break; 3075 3076 case '<': 3077 if (GET_CODE (operand) == MEM 3078 && ! address_reloaded[i] 3079 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3080 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3081 win = 1; 3082 break; 3083 3084 case '>': 3085 if (GET_CODE (operand) == MEM 3086 && ! address_reloaded[i] 3087 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3088 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3089 win = 1; 3090 break; 3091 3092 /* Memory operand whose address is not offsettable. */ 3093 case 'V': 3094 if (force_reload) 3095 break; 3096 if (GET_CODE (operand) == MEM 3097 && ! (ind_levels ? offsettable_memref_p (operand) 3098 : offsettable_nonstrict_memref_p (operand)) 3099 /* Certain mem addresses will become offsettable 3100 after they themselves are reloaded. This is important; 3101 we don't want our own handling of unoffsettables 3102 to override the handling of reg_equiv_address. */ 3103 && !(GET_CODE (XEXP (operand, 0)) == REG 3104 && (ind_levels == 0 3105 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3106 win = 1; 3107 break; 3108 3109 /* Memory operand whose address is offsettable. */ 3110 case 'o': 3111 if (force_reload) 3112 break; 3113 if ((GET_CODE (operand) == MEM 3114 /* If IND_LEVELS, find_reloads_address won't reload a 3115 pseudo that didn't get a hard reg, so we have to 3116 reject that case. */ 3117 && ((ind_levels ? offsettable_memref_p (operand) 3118 : offsettable_nonstrict_memref_p (operand)) 3119 /* A reloaded address is offsettable because it is now 3120 just a simple register indirect. */ 3121 || address_reloaded[i])) 3122 || (GET_CODE (operand) == REG 3123 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3124 && reg_renumber[REGNO (operand)] < 0 3125 /* If reg_equiv_address is nonzero, we will be 3126 loading it into a register; hence it will be 3127 offsettable, but we cannot say that reg_equiv_mem 3128 is offsettable without checking. */ 3129 && ((reg_equiv_mem[REGNO (operand)] != 0 3130 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3131 || (reg_equiv_address[REGNO (operand)] != 0)))) 3132 win = 1; 3133 /* force_const_mem does not accept HIGH. */ 3134 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3135 || GET_CODE (operand) == MEM) 3136 badop = 0; 3137 constmemok = 1; 3138 offmemok = 1; 3139 break; 3140 3141 case '&': 3142 /* Output operand that is stored before the need for the 3143 input operands (and their index registers) is over. */ 3144 earlyclobber = 1, this_earlyclobber = 1; 3145 break; 3146 3147 case 'E': 3148#ifndef REAL_ARITHMETIC 3149 /* Match any floating double constant, but only if 3150 we can examine the bits of it reliably. */ 3151 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3152 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3153 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3154 break; 3155#endif 3156 if (GET_CODE (operand) == CONST_DOUBLE) 3157 win = 1; 3158 break; 3159 3160 case 'F': 3161 if (GET_CODE (operand) == CONST_DOUBLE) 3162 win = 1; 3163 break; 3164 3165 case 'G': 3166 case 'H': 3167 if (GET_CODE (operand) == CONST_DOUBLE 3168 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3169 win = 1; 3170 break; 3171 3172 case 's': 3173 if (GET_CODE (operand) == CONST_INT 3174 || (GET_CODE (operand) == CONST_DOUBLE 3175 && GET_MODE (operand) == VOIDmode)) 3176 break; 3177 case 'i': 3178 if (CONSTANT_P (operand) 3179#ifdef LEGITIMATE_PIC_OPERAND_P 3180 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3181#endif 3182 ) 3183 win = 1; 3184 break; 3185 3186 case 'n': 3187 if (GET_CODE (operand) == CONST_INT 3188 || (GET_CODE (operand) == CONST_DOUBLE 3189 && GET_MODE (operand) == VOIDmode)) 3190 win = 1; 3191 break; 3192 3193 case 'I': 3194 case 'J': 3195 case 'K': 3196 case 'L': 3197 case 'M': 3198 case 'N': 3199 case 'O': 3200 case 'P': 3201 if (GET_CODE (operand) == CONST_INT 3202 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3203 win = 1; 3204 break; 3205 3206 case 'X': 3207 win = 1; 3208 break; 3209 3210 case 'g': 3211 if (! force_reload 3212 /* A PLUS is never a valid operand, but reload can make 3213 it from a register when eliminating registers. */ 3214 && GET_CODE (operand) != PLUS 3215 /* A SCRATCH is not a valid operand. */ 3216 && GET_CODE (operand) != SCRATCH 3217#ifdef LEGITIMATE_PIC_OPERAND_P 3218 && (! CONSTANT_P (operand) 3219 || ! flag_pic 3220 || LEGITIMATE_PIC_OPERAND_P (operand)) 3221#endif 3222 && (GENERAL_REGS == ALL_REGS 3223 || GET_CODE (operand) != REG 3224 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3225 && reg_renumber[REGNO (operand)] < 0))) 3226 win = 1; 3227 /* Drop through into 'r' case. */ 3228 3229 case 'r': 3230 this_alternative[i] 3231 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3232 goto reg; 3233 3234 default: 3235 if (REG_CLASS_FROM_LETTER (c) == NO_REGS) 3236 { 3237#ifdef EXTRA_CONSTRAINT 3238 if (EXTRA_CONSTRAINT (operand, c)) 3239 win = 1; 3240#endif 3241 break; 3242 } 3243 3244 this_alternative[i] 3245 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3246 reg: 3247 if (GET_MODE (operand) == BLKmode) 3248 break; 3249 winreg = 1; 3250 if (GET_CODE (operand) == REG 3251 && reg_fits_class_p (operand, this_alternative[i], 3252 offset, GET_MODE (recog_data.operand[i]))) 3253 win = 1; 3254 break; 3255 } 3256 3257 constraints[i] = p; 3258 3259 /* If this operand could be handled with a reg, 3260 and some reg is allowed, then this operand can be handled. */ 3261 if (winreg && this_alternative[i] != (int) NO_REGS) 3262 badop = 0; 3263 3264 /* Record which operands fit this alternative. */ 3265 this_alternative_earlyclobber[i] = earlyclobber; 3266 if (win && ! force_reload) 3267 this_alternative_win[i] = 1; 3268 else if (did_match && ! force_reload) 3269 this_alternative_match_win[i] = 1; 3270 else 3271 { 3272 int const_to_mem = 0; 3273 3274 this_alternative_offmemok[i] = offmemok; 3275 losers++; 3276 if (badop) 3277 bad = 1; 3278 /* Alternative loses if it has no regs for a reg operand. */ 3279 if (GET_CODE (operand) == REG 3280 && this_alternative[i] == (int) NO_REGS 3281 && this_alternative_matches[i] < 0) 3282 bad = 1; 3283 3284 /* If this is a constant that is reloaded into the desired 3285 class by copying it to memory first, count that as another 3286 reload. This is consistent with other code and is 3287 required to avoid choosing another alternative when 3288 the constant is moved into memory by this function on 3289 an early reload pass. Note that the test here is 3290 precisely the same as in the code below that calls 3291 force_const_mem. */ 3292 if (CONSTANT_P (operand) 3293 /* force_const_mem does not accept HIGH. */ 3294 && GET_CODE (operand) != HIGH 3295 && ((PREFERRED_RELOAD_CLASS (operand, 3296 (enum reg_class) this_alternative[i]) 3297 == NO_REGS) 3298 || no_input_reloads) 3299 && operand_mode[i] != VOIDmode) 3300 { 3301 const_to_mem = 1; 3302 if (this_alternative[i] != (int) NO_REGS) 3303 losers++; 3304 } 3305 3306 /* If we can't reload this value at all, reject this 3307 alternative. Note that we could also lose due to 3308 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3309 here. */ 3310 3311 if (! CONSTANT_P (operand) 3312 && (enum reg_class) this_alternative[i] != NO_REGS 3313 && (PREFERRED_RELOAD_CLASS (operand, 3314 (enum reg_class) this_alternative[i]) 3315 == NO_REGS)) 3316 bad = 1; 3317 3318 /* Alternative loses if it requires a type of reload not 3319 permitted for this insn. We can always reload SCRATCH 3320 and objects with a REG_UNUSED note. */ 3321 else if (GET_CODE (operand) != SCRATCH 3322 && modified[i] != RELOAD_READ && no_output_reloads 3323 && ! find_reg_note (insn, REG_UNUSED, operand)) 3324 bad = 1; 3325 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3326 && ! const_to_mem) 3327 bad = 1; 3328 3329 /* We prefer to reload pseudos over reloading other things, 3330 since such reloads may be able to be eliminated later. 3331 If we are reloading a SCRATCH, we won't be generating any 3332 insns, just using a register, so it is also preferred. 3333 So bump REJECT in other cases. Don't do this in the 3334 case where we are forcing a constant into memory and 3335 it will then win since we don't want to have a different 3336 alternative match then. */ 3337 if (! (GET_CODE (operand) == REG 3338 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3339 && GET_CODE (operand) != SCRATCH 3340 && ! (const_to_mem && constmemok)) 3341 reject += 2; 3342 3343 /* Input reloads can be inherited more often than output 3344 reloads can be removed, so penalize output reloads. */ 3345 if (operand_type[i] != RELOAD_FOR_INPUT 3346 && GET_CODE (operand) != SCRATCH) 3347 reject++; 3348 } 3349 3350 /* If this operand is a pseudo register that didn't get a hard 3351 reg and this alternative accepts some register, see if the 3352 class that we want is a subset of the preferred class for this 3353 register. If not, but it intersects that class, use the 3354 preferred class instead. If it does not intersect the preferred 3355 class, show that usage of this alternative should be discouraged; 3356 it will be discouraged more still if the register is `preferred 3357 or nothing'. We do this because it increases the chance of 3358 reusing our spill register in a later insn and avoiding a pair 3359 of memory stores and loads. 3360 3361 Don't bother with this if this alternative will accept this 3362 operand. 3363 3364 Don't do this for a multiword operand, since it is only a 3365 small win and has the risk of requiring more spill registers, 3366 which could cause a large loss. 3367 3368 Don't do this if the preferred class has only one register 3369 because we might otherwise exhaust the class. */ 3370 3371 if (! win && ! did_match 3372 && this_alternative[i] != (int) NO_REGS 3373 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3374 && reg_class_size[(int) preferred_class[i]] > 1) 3375 { 3376 if (! reg_class_subset_p (this_alternative[i], 3377 preferred_class[i])) 3378 { 3379 /* Since we don't have a way of forming the intersection, 3380 we just do something special if the preferred class 3381 is a subset of the class we have; that's the most 3382 common case anyway. */ 3383 if (reg_class_subset_p (preferred_class[i], 3384 this_alternative[i])) 3385 this_alternative[i] = (int) preferred_class[i]; 3386 else 3387 reject += (2 + 2 * pref_or_nothing[i]); 3388 } 3389 } 3390 } 3391 3392 /* Now see if any output operands that are marked "earlyclobber" 3393 in this alternative conflict with any input operands 3394 or any memory addresses. */ 3395 3396 for (i = 0; i < noperands; i++) 3397 if (this_alternative_earlyclobber[i] 3398 && (this_alternative_win[i] || this_alternative_match_win[i])) 3399 { 3400 struct decomposition early_data; 3401 3402 early_data = decompose (recog_data.operand[i]); 3403 3404 if (modified[i] == RELOAD_READ) 3405 abort (); 3406 3407 if (this_alternative[i] == NO_REGS) 3408 { 3409 this_alternative_earlyclobber[i] = 0; 3410 if (this_insn_is_asm) 3411 error_for_asm (this_insn, 3412 "`&' constraint used with no register class"); 3413 else 3414 abort (); 3415 } 3416 3417 for (j = 0; j < noperands; j++) 3418 /* Is this an input operand or a memory ref? */ 3419 if ((GET_CODE (recog_data.operand[j]) == MEM 3420 || modified[j] != RELOAD_WRITE) 3421 && j != i 3422 /* Ignore things like match_operator operands. */ 3423 && *recog_data.constraints[j] != 0 3424 /* Don't count an input operand that is constrained to match 3425 the early clobber operand. */ 3426 && ! (this_alternative_matches[j] == i 3427 && rtx_equal_p (recog_data.operand[i], 3428 recog_data.operand[j])) 3429 /* Is it altered by storing the earlyclobber operand? */ 3430 && !immune_p (recog_data.operand[j], recog_data.operand[i], 3431 early_data)) 3432 { 3433 /* If the output is in a single-reg class, 3434 it's costly to reload it, so reload the input instead. */ 3435 if (reg_class_size[this_alternative[i]] == 1 3436 && (GET_CODE (recog_data.operand[j]) == REG 3437 || GET_CODE (recog_data.operand[j]) == SUBREG)) 3438 { 3439 losers++; 3440 this_alternative_win[j] = 0; 3441 this_alternative_match_win[j] = 0; 3442 } 3443 else 3444 break; 3445 } 3446 /* If an earlyclobber operand conflicts with something, 3447 it must be reloaded, so request this and count the cost. */ 3448 if (j != noperands) 3449 { 3450 losers++; 3451 this_alternative_win[i] = 0; 3452 this_alternative_match_win[j] = 0; 3453 for (j = 0; j < noperands; j++) 3454 if (this_alternative_matches[j] == i 3455 && this_alternative_match_win[j]) 3456 { 3457 this_alternative_win[j] = 0; 3458 this_alternative_match_win[j] = 0; 3459 losers++; 3460 } 3461 } 3462 } 3463 3464 /* If one alternative accepts all the operands, no reload required, 3465 choose that alternative; don't consider the remaining ones. */ 3466 if (losers == 0) 3467 { 3468 /* Unswap these so that they are never swapped at `finish'. */ 3469 if (commutative >= 0) 3470 { 3471 recog_data.operand[commutative] = substed_operand[commutative]; 3472 recog_data.operand[commutative + 1] 3473 = substed_operand[commutative + 1]; 3474 } 3475 for (i = 0; i < noperands; i++) 3476 { 3477 goal_alternative_win[i] = this_alternative_win[i]; 3478 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3479 goal_alternative[i] = this_alternative[i]; 3480 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3481 goal_alternative_matches[i] = this_alternative_matches[i]; 3482 goal_alternative_earlyclobber[i] 3483 = this_alternative_earlyclobber[i]; 3484 } 3485 goal_alternative_number = this_alternative_number; 3486 goal_alternative_swapped = swapped; 3487 goal_earlyclobber = this_earlyclobber; 3488 goto finish; 3489 } 3490 3491 /* REJECT, set by the ! and ? constraint characters and when a register 3492 would be reloaded into a non-preferred class, discourages the use of 3493 this alternative for a reload goal. REJECT is incremented by six 3494 for each ? and two for each non-preferred class. */ 3495 losers = losers * 6 + reject; 3496 3497 /* If this alternative can be made to work by reloading, 3498 and it needs less reloading than the others checked so far, 3499 record it as the chosen goal for reloading. */ 3500 if (! bad && best > losers) 3501 { 3502 for (i = 0; i < noperands; i++) 3503 { 3504 goal_alternative[i] = this_alternative[i]; 3505 goal_alternative_win[i] = this_alternative_win[i]; 3506 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3507 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3508 goal_alternative_matches[i] = this_alternative_matches[i]; 3509 goal_alternative_earlyclobber[i] 3510 = this_alternative_earlyclobber[i]; 3511 } 3512 goal_alternative_swapped = swapped; 3513 best = losers; 3514 goal_alternative_number = this_alternative_number; 3515 goal_earlyclobber = this_earlyclobber; 3516 } 3517 } 3518 3519 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3520 then we need to try each alternative twice, 3521 the second time matching those two operands 3522 as if we had exchanged them. 3523 To do this, really exchange them in operands. 3524 3525 If we have just tried the alternatives the second time, 3526 return operands to normal and drop through. */ 3527 3528 if (commutative >= 0) 3529 { 3530 swapped = !swapped; 3531 if (swapped) 3532 { 3533 enum reg_class tclass; 3534 int t; 3535 3536 recog_data.operand[commutative] = substed_operand[commutative + 1]; 3537 recog_data.operand[commutative + 1] = substed_operand[commutative]; 3538 /* Swap the duplicates too. */ 3539 for (i = 0; i < recog_data.n_dups; i++) 3540 if (recog_data.dup_num[i] == commutative 3541 || recog_data.dup_num[i] == commutative + 1) 3542 *recog_data.dup_loc[i] 3543 = recog_data.operand[(int) recog_data.dup_num[i]]; 3544 3545 tclass = preferred_class[commutative]; 3546 preferred_class[commutative] = preferred_class[commutative + 1]; 3547 preferred_class[commutative + 1] = tclass; 3548 3549 t = pref_or_nothing[commutative]; 3550 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3551 pref_or_nothing[commutative + 1] = t; 3552 3553 memcpy (constraints, recog_data.constraints, 3554 noperands * sizeof (char *)); 3555 goto try_swapped; 3556 } 3557 else 3558 { 3559 recog_data.operand[commutative] = substed_operand[commutative]; 3560 recog_data.operand[commutative + 1] 3561 = substed_operand[commutative + 1]; 3562 /* Unswap the duplicates too. */ 3563 for (i = 0; i < recog_data.n_dups; i++) 3564 if (recog_data.dup_num[i] == commutative 3565 || recog_data.dup_num[i] == commutative + 1) 3566 *recog_data.dup_loc[i] 3567 = recog_data.operand[(int) recog_data.dup_num[i]]; 3568 } 3569 } 3570 3571 /* The operands don't meet the constraints. 3572 goal_alternative describes the alternative 3573 that we could reach by reloading the fewest operands. 3574 Reload so as to fit it. */ 3575 3576 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3577 { 3578 /* No alternative works with reloads?? */ 3579 if (insn_code_number >= 0) 3580 fatal_insn ("unable to generate reloads for:", insn); 3581 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3582 /* Avoid further trouble with this insn. */ 3583 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3584 n_reloads = 0; 3585 return 0; 3586 } 3587 3588 /* Jump to `finish' from above if all operands are valid already. 3589 In that case, goal_alternative_win is all 1. */ 3590 finish: 3591 3592 /* Right now, for any pair of operands I and J that are required to match, 3593 with I < J, 3594 goal_alternative_matches[J] is I. 3595 Set up goal_alternative_matched as the inverse function: 3596 goal_alternative_matched[I] = J. */ 3597 3598 for (i = 0; i < noperands; i++) 3599 goal_alternative_matched[i] = -1; 3600 3601 for (i = 0; i < noperands; i++) 3602 if (! goal_alternative_win[i] 3603 && goal_alternative_matches[i] >= 0) 3604 goal_alternative_matched[goal_alternative_matches[i]] = i; 3605 3606 for (i = 0; i < noperands; i++) 3607 goal_alternative_win[i] |= goal_alternative_match_win[i]; 3608 3609 /* If the best alternative is with operands 1 and 2 swapped, 3610 consider them swapped before reporting the reloads. Update the 3611 operand numbers of any reloads already pushed. */ 3612 3613 if (goal_alternative_swapped) 3614 { 3615 rtx tem; 3616 3617 tem = substed_operand[commutative]; 3618 substed_operand[commutative] = substed_operand[commutative + 1]; 3619 substed_operand[commutative + 1] = tem; 3620 tem = recog_data.operand[commutative]; 3621 recog_data.operand[commutative] = recog_data.operand[commutative + 1]; 3622 recog_data.operand[commutative + 1] = tem; 3623 tem = *recog_data.operand_loc[commutative]; 3624 *recog_data.operand_loc[commutative] 3625 = *recog_data.operand_loc[commutative + 1]; 3626 *recog_data.operand_loc[commutative + 1] = tem; 3627 3628 for (i = 0; i < n_reloads; i++) 3629 { 3630 if (rld[i].opnum == commutative) 3631 rld[i].opnum = commutative + 1; 3632 else if (rld[i].opnum == commutative + 1) 3633 rld[i].opnum = commutative; 3634 } 3635 } 3636 3637 for (i = 0; i < noperands; i++) 3638 { 3639 operand_reloadnum[i] = -1; 3640 3641 /* If this is an earlyclobber operand, we need to widen the scope. 3642 The reload must remain valid from the start of the insn being 3643 reloaded until after the operand is stored into its destination. 3644 We approximate this with RELOAD_OTHER even though we know that we 3645 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3646 3647 One special case that is worth checking is when we have an 3648 output that is earlyclobber but isn't used past the insn (typically 3649 a SCRATCH). In this case, we only need have the reload live 3650 through the insn itself, but not for any of our input or output 3651 reloads. 3652 But we must not accidentally narrow the scope of an existing 3653 RELOAD_OTHER reload - leave these alone. 3654 3655 In any case, anything needed to address this operand can remain 3656 however they were previously categorized. */ 3657 3658 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3659 operand_type[i] 3660 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i]) 3661 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3662 } 3663 3664 /* Any constants that aren't allowed and can't be reloaded 3665 into registers are here changed into memory references. */ 3666 for (i = 0; i < noperands; i++) 3667 if (! goal_alternative_win[i] 3668 && CONSTANT_P (recog_data.operand[i]) 3669 /* force_const_mem does not accept HIGH. */ 3670 && GET_CODE (recog_data.operand[i]) != HIGH 3671 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i], 3672 (enum reg_class) goal_alternative[i]) 3673 == NO_REGS) 3674 || no_input_reloads) 3675 && operand_mode[i] != VOIDmode) 3676 { 3677 substed_operand[i] = recog_data.operand[i] 3678 = find_reloads_toplev (force_const_mem (operand_mode[i], 3679 recog_data.operand[i]), 3680 i, address_type[i], ind_levels, 0, insn, 3681 NULL); 3682 if (alternative_allows_memconst (recog_data.constraints[i], 3683 goal_alternative_number)) 3684 goal_alternative_win[i] = 1; 3685 } 3686 3687 /* Record the values of the earlyclobber operands for the caller. */ 3688 if (goal_earlyclobber) 3689 for (i = 0; i < noperands; i++) 3690 if (goal_alternative_earlyclobber[i]) 3691 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i]; 3692 3693 /* Now record reloads for all the operands that need them. */ 3694 for (i = 0; i < noperands; i++) 3695 if (! goal_alternative_win[i]) 3696 { 3697 /* Operands that match previous ones have already been handled. */ 3698 if (goal_alternative_matches[i] >= 0) 3699 ; 3700 /* Handle an operand with a nonoffsettable address 3701 appearing where an offsettable address will do 3702 by reloading the address into a base register. 3703 3704 ??? We can also do this when the operand is a register and 3705 reg_equiv_mem is not offsettable, but this is a bit tricky, 3706 so we don't bother with it. It may not be worth doing. */ 3707 else if (goal_alternative_matched[i] == -1 3708 && goal_alternative_offmemok[i] 3709 && GET_CODE (recog_data.operand[i]) == MEM) 3710 { 3711 operand_reloadnum[i] 3712 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX, 3713 &XEXP (recog_data.operand[i], 0), (rtx*) 0, 3714 MODE_BASE_REG_CLASS (VOIDmode), 3715 GET_MODE (XEXP (recog_data.operand[i], 0)), 3716 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3717 rld[operand_reloadnum[i]].inc 3718 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i])); 3719 3720 /* If this operand is an output, we will have made any 3721 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3722 now we are treating part of the operand as an input, so 3723 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3724 3725 if (modified[i] == RELOAD_WRITE) 3726 { 3727 for (j = 0; j < n_reloads; j++) 3728 { 3729 if (rld[j].opnum == i) 3730 { 3731 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS) 3732 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS; 3733 else if (rld[j].when_needed 3734 == RELOAD_FOR_OUTADDR_ADDRESS) 3735 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS; 3736 } 3737 } 3738 } 3739 } 3740 else if (goal_alternative_matched[i] == -1) 3741 { 3742 operand_reloadnum[i] 3743 = push_reload ((modified[i] != RELOAD_WRITE 3744 ? recog_data.operand[i] : 0), 3745 (modified[i] != RELOAD_READ 3746 ? recog_data.operand[i] : 0), 3747 (modified[i] != RELOAD_WRITE 3748 ? recog_data.operand_loc[i] : 0), 3749 (modified[i] != RELOAD_READ 3750 ? recog_data.operand_loc[i] : 0), 3751 (enum reg_class) goal_alternative[i], 3752 (modified[i] == RELOAD_WRITE 3753 ? VOIDmode : operand_mode[i]), 3754 (modified[i] == RELOAD_READ 3755 ? VOIDmode : operand_mode[i]), 3756 (insn_code_number < 0 ? 0 3757 : insn_data[insn_code_number].operand[i].strict_low), 3758 0, i, operand_type[i]); 3759 } 3760 /* In a matching pair of operands, one must be input only 3761 and the other must be output only. 3762 Pass the input operand as IN and the other as OUT. */ 3763 else if (modified[i] == RELOAD_READ 3764 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3765 { 3766 operand_reloadnum[i] 3767 = push_reload (recog_data.operand[i], 3768 recog_data.operand[goal_alternative_matched[i]], 3769 recog_data.operand_loc[i], 3770 recog_data.operand_loc[goal_alternative_matched[i]], 3771 (enum reg_class) goal_alternative[i], 3772 operand_mode[i], 3773 operand_mode[goal_alternative_matched[i]], 3774 0, 0, i, RELOAD_OTHER); 3775 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3776 } 3777 else if (modified[i] == RELOAD_WRITE 3778 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3779 { 3780 operand_reloadnum[goal_alternative_matched[i]] 3781 = push_reload (recog_data.operand[goal_alternative_matched[i]], 3782 recog_data.operand[i], 3783 recog_data.operand_loc[goal_alternative_matched[i]], 3784 recog_data.operand_loc[i], 3785 (enum reg_class) goal_alternative[i], 3786 operand_mode[goal_alternative_matched[i]], 3787 operand_mode[i], 3788 0, 0, i, RELOAD_OTHER); 3789 operand_reloadnum[i] = output_reloadnum; 3790 } 3791 else if (insn_code_number >= 0) 3792 abort (); 3793 else 3794 { 3795 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3796 /* Avoid further trouble with this insn. */ 3797 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3798 n_reloads = 0; 3799 return 0; 3800 } 3801 } 3802 else if (goal_alternative_matched[i] < 0 3803 && goal_alternative_matches[i] < 0 3804 && optimize) 3805 { 3806 /* For each non-matching operand that's a MEM or a pseudo-register 3807 that didn't get a hard register, make an optional reload. 3808 This may get done even if the insn needs no reloads otherwise. */ 3809 3810 rtx operand = recog_data.operand[i]; 3811 3812 while (GET_CODE (operand) == SUBREG) 3813 operand = SUBREG_REG (operand); 3814 if ((GET_CODE (operand) == MEM 3815 || (GET_CODE (operand) == REG 3816 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3817 /* If this is only for an output, the optional reload would not 3818 actually cause us to use a register now, just note that 3819 something is stored here. */ 3820 && ((enum reg_class) goal_alternative[i] != NO_REGS 3821 || modified[i] == RELOAD_WRITE) 3822 && ! no_input_reloads 3823 /* An optional output reload might allow to delete INSN later. 3824 We mustn't make in-out reloads on insns that are not permitted 3825 output reloads. 3826 If this is an asm, we can't delete it; we must not even call 3827 push_reload for an optional output reload in this case, 3828 because we can't be sure that the constraint allows a register, 3829 and push_reload verifies the constraints for asms. */ 3830 && (modified[i] == RELOAD_READ 3831 || (! no_output_reloads && ! this_insn_is_asm))) 3832 operand_reloadnum[i] 3833 = push_reload ((modified[i] != RELOAD_WRITE 3834 ? recog_data.operand[i] : 0), 3835 (modified[i] != RELOAD_READ 3836 ? recog_data.operand[i] : 0), 3837 (modified[i] != RELOAD_WRITE 3838 ? recog_data.operand_loc[i] : 0), 3839 (modified[i] != RELOAD_READ 3840 ? recog_data.operand_loc[i] : 0), 3841 (enum reg_class) goal_alternative[i], 3842 (modified[i] == RELOAD_WRITE 3843 ? VOIDmode : operand_mode[i]), 3844 (modified[i] == RELOAD_READ 3845 ? VOIDmode : operand_mode[i]), 3846 (insn_code_number < 0 ? 0 3847 : insn_data[insn_code_number].operand[i].strict_low), 3848 1, i, operand_type[i]); 3849 /* If a memory reference remains (either as a MEM or a pseudo that 3850 did not get a hard register), yet we can't make an optional 3851 reload, check if this is actually a pseudo register reference; 3852 we then need to emit a USE and/or a CLOBBER so that reload 3853 inheritance will do the right thing. */ 3854 else if (replace 3855 && (GET_CODE (operand) == MEM 3856 || (GET_CODE (operand) == REG 3857 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3858 && reg_renumber [REGNO (operand)] < 0))) 3859 { 3860 operand = *recog_data.operand_loc[i]; 3861 3862 while (GET_CODE (operand) == SUBREG) 3863 operand = SUBREG_REG (operand); 3864 if (GET_CODE (operand) == REG) 3865 { 3866 if (modified[i] != RELOAD_WRITE) 3867 /* We mark the USE with QImode so that we recognize 3868 it as one that can be safely deleted at the end 3869 of reload. */ 3870 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand), 3871 insn), QImode); 3872 if (modified[i] != RELOAD_READ) 3873 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3874 } 3875 } 3876 } 3877 else if (goal_alternative_matches[i] >= 0 3878 && goal_alternative_win[goal_alternative_matches[i]] 3879 && modified[i] == RELOAD_READ 3880 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3881 && ! no_input_reloads && ! no_output_reloads 3882 && optimize) 3883 { 3884 /* Similarly, make an optional reload for a pair of matching 3885 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3886 3887 rtx operand = recog_data.operand[i]; 3888 3889 while (GET_CODE (operand) == SUBREG) 3890 operand = SUBREG_REG (operand); 3891 if ((GET_CODE (operand) == MEM 3892 || (GET_CODE (operand) == REG 3893 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3894 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3895 != NO_REGS)) 3896 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3897 = push_reload (recog_data.operand[goal_alternative_matches[i]], 3898 recog_data.operand[i], 3899 recog_data.operand_loc[goal_alternative_matches[i]], 3900 recog_data.operand_loc[i], 3901 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3902 operand_mode[goal_alternative_matches[i]], 3903 operand_mode[i], 3904 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3905 } 3906 3907 /* Perform whatever substitutions on the operands we are supposed 3908 to make due to commutativity or replacement of registers 3909 with equivalent constants or memory slots. */ 3910 3911 for (i = 0; i < noperands; i++) 3912 { 3913 /* We only do this on the last pass through reload, because it is 3914 possible for some data (like reg_equiv_address) to be changed during 3915 later passes. Moreover, we loose the opportunity to get a useful 3916 reload_{in,out}_reg when we do these replacements. */ 3917 3918 if (replace) 3919 { 3920 rtx substitution = substed_operand[i]; 3921 3922 *recog_data.operand_loc[i] = substitution; 3923 3924 /* If we're replacing an operand with a LABEL_REF, we need 3925 to make sure that there's a REG_LABEL note attached to 3926 this instruction. */ 3927 if (GET_CODE (insn) != JUMP_INSN 3928 && GET_CODE (substitution) == LABEL_REF 3929 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3930 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 3931 XEXP (substitution, 0), 3932 REG_NOTES (insn)); 3933 } 3934 else 3935 retval |= (substed_operand[i] != *recog_data.operand_loc[i]); 3936 } 3937 3938 /* If this insn pattern contains any MATCH_DUP's, make sure that 3939 they will be substituted if the operands they match are substituted. 3940 Also do now any substitutions we already did on the operands. 3941 3942 Don't do this if we aren't making replacements because we might be 3943 propagating things allocated by frame pointer elimination into places 3944 it doesn't expect. */ 3945 3946 if (insn_code_number >= 0 && replace) 3947 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--) 3948 { 3949 int opno = recog_data.dup_num[i]; 3950 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno]; 3951 if (operand_reloadnum[opno] >= 0) 3952 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno], 3953 insn_data[insn_code_number].operand[opno].mode); 3954 } 3955 3956#if 0 3957 /* This loses because reloading of prior insns can invalidate the equivalence 3958 (or at least find_equiv_reg isn't smart enough to find it any more), 3959 causing this insn to need more reload regs than it needed before. 3960 It may be too late to make the reload regs available. 3961 Now this optimization is done safely in choose_reload_regs. */ 3962 3963 /* For each reload of a reg into some other class of reg, 3964 search for an existing equivalent reg (same value now) in the right class. 3965 We can use it as long as we don't need to change its contents. */ 3966 for (i = 0; i < n_reloads; i++) 3967 if (rld[i].reg_rtx == 0 3968 && rld[i].in != 0 3969 && GET_CODE (rld[i].in) == REG 3970 && rld[i].out == 0) 3971 { 3972 rld[i].reg_rtx 3973 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1, 3974 static_reload_reg_p, 0, rld[i].inmode); 3975 /* Prevent generation of insn to load the value 3976 because the one we found already has the value. */ 3977 if (rld[i].reg_rtx) 3978 rld[i].in = rld[i].reg_rtx; 3979 } 3980#endif 3981 3982 /* Perhaps an output reload can be combined with another 3983 to reduce needs by one. */ 3984 if (!goal_earlyclobber) 3985 combine_reloads (); 3986 3987 /* If we have a pair of reloads for parts of an address, they are reloading 3988 the same object, the operands themselves were not reloaded, and they 3989 are for two operands that are supposed to match, merge the reloads and 3990 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3991 3992 for (i = 0; i < n_reloads; i++) 3993 { 3994 int k; 3995 3996 for (j = i + 1; j < n_reloads; j++) 3997 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 3998 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 3999 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4000 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4001 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 4002 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4003 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4004 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4005 && rtx_equal_p (rld[i].in, rld[j].in) 4006 && (operand_reloadnum[rld[i].opnum] < 0 4007 || rld[operand_reloadnum[rld[i].opnum]].optional) 4008 && (operand_reloadnum[rld[j].opnum] < 0 4009 || rld[operand_reloadnum[rld[j].opnum]].optional) 4010 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum 4011 || (goal_alternative_matches[rld[j].opnum] 4012 == rld[i].opnum))) 4013 { 4014 for (k = 0; k < n_replacements; k++) 4015 if (replacements[k].what == j) 4016 replacements[k].what = i; 4017 4018 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4019 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4020 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4021 else 4022 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4023 rld[j].in = 0; 4024 } 4025 } 4026 4027 /* Scan all the reloads and update their type. 4028 If a reload is for the address of an operand and we didn't reload 4029 that operand, change the type. Similarly, change the operand number 4030 of a reload when two operands match. If a reload is optional, treat it 4031 as though the operand isn't reloaded. 4032 4033 ??? This latter case is somewhat odd because if we do the optional 4034 reload, it means the object is hanging around. Thus we need only 4035 do the address reload if the optional reload was NOT done. 4036 4037 Change secondary reloads to be the address type of their operand, not 4038 the normal type. 4039 4040 If an operand's reload is now RELOAD_OTHER, change any 4041 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4042 RELOAD_FOR_OTHER_ADDRESS. */ 4043 4044 for (i = 0; i < n_reloads; i++) 4045 { 4046 if (rld[i].secondary_p 4047 && rld[i].when_needed == operand_type[rld[i].opnum]) 4048 rld[i].when_needed = address_type[rld[i].opnum]; 4049 4050 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4051 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4052 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4053 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4054 && (operand_reloadnum[rld[i].opnum] < 0 4055 || rld[operand_reloadnum[rld[i].opnum]].optional)) 4056 { 4057 /* If we have a secondary reload to go along with this reload, 4058 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4059 4060 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4061 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4062 && rld[i].secondary_in_reload != -1) 4063 { 4064 int secondary_in_reload = rld[i].secondary_in_reload; 4065 4066 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4067 4068 /* If there's a tertiary reload we have to change it also. */ 4069 if (secondary_in_reload > 0 4070 && rld[secondary_in_reload].secondary_in_reload != -1) 4071 rld[rld[secondary_in_reload].secondary_in_reload].when_needed 4072 = RELOAD_FOR_OPADDR_ADDR; 4073 } 4074 4075 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4076 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4077 && rld[i].secondary_out_reload != -1) 4078 { 4079 int secondary_out_reload = rld[i].secondary_out_reload; 4080 4081 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4082 4083 /* If there's a tertiary reload we have to change it also. */ 4084 if (secondary_out_reload 4085 && rld[secondary_out_reload].secondary_out_reload != -1) 4086 rld[rld[secondary_out_reload].secondary_out_reload].when_needed 4087 = RELOAD_FOR_OPADDR_ADDR; 4088 } 4089 4090 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4091 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4092 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4093 else 4094 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4095 } 4096 4097 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4098 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4099 && operand_reloadnum[rld[i].opnum] >= 0 4100 && (rld[operand_reloadnum[rld[i].opnum]].when_needed 4101 == RELOAD_OTHER)) 4102 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS; 4103 4104 if (goal_alternative_matches[rld[i].opnum] >= 0) 4105 rld[i].opnum = goal_alternative_matches[rld[i].opnum]; 4106 } 4107 4108 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4109 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4110 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4111 4112 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4113 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4114 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4115 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4116 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4117 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4118 This is complicated by the fact that a single operand can have more 4119 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4120 choose_reload_regs without affecting code quality, and cases that 4121 actually fail are extremely rare, so it turns out to be better to fix 4122 the problem here by not generating cases that choose_reload_regs will 4123 fail for. */ 4124 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4125 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4126 a single operand. 4127 We can reduce the register pressure by exploiting that a 4128 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4129 does not conflict with any of them, if it is only used for the first of 4130 the RELOAD_FOR_X_ADDRESS reloads. */ 4131 { 4132 int first_op_addr_num = -2; 4133 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4134 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4135 int need_change = 0; 4136 /* We use last_op_addr_reload and the contents of the above arrays 4137 first as flags - -2 means no instance encountered, -1 means exactly 4138 one instance encountered. 4139 If more than one instance has been encountered, we store the reload 4140 number of the first reload of the kind in question; reload numbers 4141 are known to be non-negative. */ 4142 for (i = 0; i < noperands; i++) 4143 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4144 for (i = n_reloads - 1; i >= 0; i--) 4145 { 4146 switch (rld[i].when_needed) 4147 { 4148 case RELOAD_FOR_OPERAND_ADDRESS: 4149 if (++first_op_addr_num >= 0) 4150 { 4151 first_op_addr_num = i; 4152 need_change = 1; 4153 } 4154 break; 4155 case RELOAD_FOR_INPUT_ADDRESS: 4156 if (++first_inpaddr_num[rld[i].opnum] >= 0) 4157 { 4158 first_inpaddr_num[rld[i].opnum] = i; 4159 need_change = 1; 4160 } 4161 break; 4162 case RELOAD_FOR_OUTPUT_ADDRESS: 4163 if (++first_outpaddr_num[rld[i].opnum] >= 0) 4164 { 4165 first_outpaddr_num[rld[i].opnum] = i; 4166 need_change = 1; 4167 } 4168 break; 4169 default: 4170 break; 4171 } 4172 } 4173 4174 if (need_change) 4175 { 4176 for (i = 0; i < n_reloads; i++) 4177 { 4178 int first_num; 4179 enum reload_type type; 4180 4181 switch (rld[i].when_needed) 4182 { 4183 case RELOAD_FOR_OPADDR_ADDR: 4184 first_num = first_op_addr_num; 4185 type = RELOAD_FOR_OPERAND_ADDRESS; 4186 break; 4187 case RELOAD_FOR_INPADDR_ADDRESS: 4188 first_num = first_inpaddr_num[rld[i].opnum]; 4189 type = RELOAD_FOR_INPUT_ADDRESS; 4190 break; 4191 case RELOAD_FOR_OUTADDR_ADDRESS: 4192 first_num = first_outpaddr_num[rld[i].opnum]; 4193 type = RELOAD_FOR_OUTPUT_ADDRESS; 4194 break; 4195 default: 4196 continue; 4197 } 4198 if (first_num < 0) 4199 continue; 4200 else if (i > first_num) 4201 rld[i].when_needed = type; 4202 else 4203 { 4204 /* Check if the only TYPE reload that uses reload I is 4205 reload FIRST_NUM. */ 4206 for (j = n_reloads - 1; j > first_num; j--) 4207 { 4208 if (rld[j].when_needed == type 4209 && (rld[i].secondary_p 4210 ? rld[j].secondary_in_reload == i 4211 : reg_mentioned_p (rld[i].in, rld[j].in))) 4212 { 4213 rld[i].when_needed = type; 4214 break; 4215 } 4216 } 4217 } 4218 } 4219 } 4220 } 4221 4222 /* See if we have any reloads that are now allowed to be merged 4223 because we've changed when the reload is needed to 4224 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4225 check for the most common cases. */ 4226 4227 for (i = 0; i < n_reloads; i++) 4228 if (rld[i].in != 0 && rld[i].out == 0 4229 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS 4230 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR 4231 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 4232 for (j = 0; j < n_reloads; j++) 4233 if (i != j && rld[j].in != 0 && rld[j].out == 0 4234 && rld[j].when_needed == rld[i].when_needed 4235 && MATCHES (rld[i].in, rld[j].in) 4236 && rld[i].class == rld[j].class 4237 && !rld[i].nocombine && !rld[j].nocombine 4238 && rld[i].reg_rtx == rld[j].reg_rtx) 4239 { 4240 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum); 4241 transfer_replacements (i, j); 4242 rld[j].in = 0; 4243 } 4244 4245#ifdef HAVE_cc0 4246 /* If we made any reloads for addresses, see if they violate a 4247 "no input reloads" requirement for this insn. But loads that we 4248 do after the insn (such as for output addresses) are fine. */ 4249 if (no_input_reloads) 4250 for (i = 0; i < n_reloads; i++) 4251 if (rld[i].in != 0 4252 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 4253 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS) 4254 abort (); 4255#endif 4256 4257 /* Compute reload_mode and reload_nregs. */ 4258 for (i = 0; i < n_reloads; i++) 4259 { 4260 rld[i].mode 4261 = (rld[i].inmode == VOIDmode 4262 || (GET_MODE_SIZE (rld[i].outmode) 4263 > GET_MODE_SIZE (rld[i].inmode))) 4264 ? rld[i].outmode : rld[i].inmode; 4265 4266 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode); 4267 } 4268 4269 /* Special case a simple move with an input reload and a 4270 destination of a hard reg, if the hard reg is ok, use it. */ 4271 for (i = 0; i < n_reloads; i++) 4272 if (rld[i].when_needed == RELOAD_FOR_INPUT 4273 && GET_CODE (PATTERN (insn)) == SET 4274 && GET_CODE (SET_DEST (PATTERN (insn))) == REG 4275 && SET_SRC (PATTERN (insn)) == rld[i].in) 4276 { 4277 rtx dest = SET_DEST (PATTERN (insn)); 4278 unsigned int regno = REGNO (dest); 4279 4280 if (regno < FIRST_PSEUDO_REGISTER 4281 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno) 4282 && HARD_REGNO_MODE_OK (regno, rld[i].mode)) 4283 rld[i].reg_rtx = dest; 4284 } 4285 4286 return retval; 4287} 4288 4289/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4290 accepts a memory operand with constant address. */ 4291 4292static int 4293alternative_allows_memconst (constraint, altnum) 4294 const char *constraint; 4295 int altnum; 4296{ 4297 int c; 4298 /* Skip alternatives before the one requested. */ 4299 while (altnum > 0) 4300 { 4301 while (*constraint++ != ','); 4302 altnum--; 4303 } 4304 /* Scan the requested alternative for 'm' or 'o'. 4305 If one of them is present, this alternative accepts memory constants. */ 4306 while ((c = *constraint++) && c != ',' && c != '#') 4307 if (c == 'm' || c == 'o') 4308 return 1; 4309 return 0; 4310} 4311 4312/* Scan X for memory references and scan the addresses for reloading. 4313 Also checks for references to "constant" regs that we want to eliminate 4314 and replaces them with the values they stand for. 4315 We may alter X destructively if it contains a reference to such. 4316 If X is just a constant reg, we return the equivalent value 4317 instead of X. 4318 4319 IND_LEVELS says how many levels of indirect addressing this machine 4320 supports. 4321 4322 OPNUM and TYPE identify the purpose of the reload. 4323 4324 IS_SET_DEST is true if X is the destination of a SET, which is not 4325 appropriate to be replaced by a constant. 4326 4327 INSN, if nonzero, is the insn in which we do the reload. It is used 4328 to determine if we may generate output reloads, and where to put USEs 4329 for pseudos that we have to replace with stack slots. 4330 4331 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the 4332 result of find_reloads_address. */ 4333 4334static rtx 4335find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn, 4336 address_reloaded) 4337 rtx x; 4338 int opnum; 4339 enum reload_type type; 4340 int ind_levels; 4341 int is_set_dest; 4342 rtx insn; 4343 int *address_reloaded; 4344{ 4345 RTX_CODE code = GET_CODE (x); 4346 4347 const char *fmt = GET_RTX_FORMAT (code); 4348 int i; 4349 int copied; 4350 4351 if (code == REG) 4352 { 4353 /* This code is duplicated for speed in find_reloads. */ 4354 int regno = REGNO (x); 4355 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4356 x = reg_equiv_constant[regno]; 4357#if 0 4358 /* This creates (subreg (mem...)) which would cause an unnecessary 4359 reload of the mem. */ 4360 else if (reg_equiv_mem[regno] != 0) 4361 x = reg_equiv_mem[regno]; 4362#endif 4363 else if (reg_equiv_memory_loc[regno] 4364 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4365 { 4366 rtx mem = make_memloc (x, regno); 4367 if (reg_equiv_address[regno] 4368 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4369 { 4370 /* If this is not a toplevel operand, find_reloads doesn't see 4371 this substitution. We have to emit a USE of the pseudo so 4372 that delete_output_reload can see it. */ 4373 if (replace_reloads && recog_data.operand[opnum] != x) 4374 /* We mark the USE with QImode so that we recognize it 4375 as one that can be safely deleted at the end of 4376 reload. */ 4377 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn), 4378 QImode); 4379 x = mem; 4380 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4381 opnum, type, ind_levels, insn); 4382 if (address_reloaded) 4383 *address_reloaded = i; 4384 } 4385 } 4386 return x; 4387 } 4388 if (code == MEM) 4389 { 4390 rtx tem = x; 4391 4392 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4393 opnum, type, ind_levels, insn); 4394 if (address_reloaded) 4395 *address_reloaded = i; 4396 4397 return tem; 4398 } 4399 4400 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4401 { 4402 /* Check for SUBREG containing a REG that's equivalent to a constant. 4403 If the constant has a known value, truncate it right now. 4404 Similarly if we are extracting a single-word of a multi-word 4405 constant. If the constant is symbolic, allow it to be substituted 4406 normally. push_reload will strip the subreg later. If the 4407 constant is VOIDmode, abort because we will lose the mode of 4408 the register (this should never happen because one of the cases 4409 above should handle it). */ 4410 4411 int regno = REGNO (SUBREG_REG (x)); 4412 rtx tem; 4413 4414 if (subreg_lowpart_p (x) 4415 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4416 && reg_equiv_constant[regno] != 0 4417 && (tem = gen_lowpart_common (GET_MODE (x), 4418 reg_equiv_constant[regno])) != 0) 4419 return tem; 4420 4421 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4422 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4423 && reg_equiv_constant[regno] != 0 4424 && (tem = operand_subword (reg_equiv_constant[regno], 4425 SUBREG_BYTE (x) / UNITS_PER_WORD, 0, 4426 GET_MODE (SUBREG_REG (x)))) != 0) 4427 { 4428 /* TEM is now a word sized constant for the bits from X that 4429 we wanted. However, TEM may be the wrong representation. 4430 4431 Use gen_lowpart_common to convert a CONST_INT into a 4432 CONST_DOUBLE and vice versa as needed according to by the mode 4433 of the SUBREG. */ 4434 tem = gen_lowpart_common (GET_MODE (x), tem); 4435 if (!tem) 4436 abort (); 4437 return tem; 4438 } 4439 4440 /* If the SUBREG is wider than a word, the above test will fail. 4441 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4442 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4443 a 32 bit target. We still can - and have to - handle this 4444 for non-paradoxical subregs of CONST_INTs. */ 4445 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4446 && reg_equiv_constant[regno] != 0 4447 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4448 && (GET_MODE_SIZE (GET_MODE (x)) 4449 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4450 { 4451 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT; 4452 if (WORDS_BIG_ENDIAN) 4453 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4454 - GET_MODE_BITSIZE (GET_MODE (x)) 4455 - shift); 4456 /* Here we use the knowledge that CONST_INTs have a 4457 HOST_WIDE_INT field. */ 4458 if (shift >= HOST_BITS_PER_WIDE_INT) 4459 shift = HOST_BITS_PER_WIDE_INT - 1; 4460 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4461 } 4462 4463 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4464 && reg_equiv_constant[regno] != 0 4465 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4466 abort (); 4467 4468 /* If the subreg contains a reg that will be converted to a mem, 4469 convert the subreg to a narrower memref now. 4470 Otherwise, we would get (subreg (mem ...) ...), 4471 which would force reload of the mem. 4472 4473 We also need to do this if there is an equivalent MEM that is 4474 not offsettable. In that case, alter_subreg would produce an 4475 invalid address on big-endian machines. 4476 4477 For machines that extend byte loads, we must not reload using 4478 a wider mode if we have a paradoxical SUBREG. find_reloads will 4479 force a reload in that case. So we should not do anything here. */ 4480 4481 else if (regno >= FIRST_PSEUDO_REGISTER 4482#ifdef LOAD_EXTEND_OP 4483 && (GET_MODE_SIZE (GET_MODE (x)) 4484 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4485#endif 4486 && (reg_equiv_address[regno] != 0 4487 || (reg_equiv_mem[regno] != 0 4488 && (! strict_memory_address_p (GET_MODE (x), 4489 XEXP (reg_equiv_mem[regno], 0)) 4490 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4491 || num_not_at_initial_offset)))) 4492 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4493 insn); 4494 } 4495 4496 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4497 { 4498 if (fmt[i] == 'e') 4499 { 4500 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4501 ind_levels, is_set_dest, insn, 4502 address_reloaded); 4503 /* If we have replaced a reg with it's equivalent memory loc - 4504 that can still be handled here e.g. if it's in a paradoxical 4505 subreg - we must make the change in a copy, rather than using 4506 a destructive change. This way, find_reloads can still elect 4507 not to do the change. */ 4508 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4509 { 4510 x = shallow_copy_rtx (x); 4511 copied = 1; 4512 } 4513 XEXP (x, i) = new_part; 4514 } 4515 } 4516 return x; 4517} 4518 4519/* Return a mem ref for the memory equivalent of reg REGNO. 4520 This mem ref is not shared with anything. */ 4521 4522static rtx 4523make_memloc (ad, regno) 4524 rtx ad; 4525 int regno; 4526{ 4527 /* We must rerun eliminate_regs, in case the elimination 4528 offsets have changed. */ 4529 rtx tem 4530 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4531 4532 /* If TEM might contain a pseudo, we must copy it to avoid 4533 modifying it when we do the substitution for the reload. */ 4534 if (rtx_varies_p (tem, 0)) 4535 tem = copy_rtx (tem); 4536 4537 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem); 4538 tem = adjust_address_nv (tem, GET_MODE (ad), 0); 4539 4540 /* Copy the result if it's still the same as the equivalence, to avoid 4541 modifying it when we do the substitution for the reload. */ 4542 if (tem == reg_equiv_memory_loc[regno]) 4543 tem = copy_rtx (tem); 4544 return tem; 4545} 4546 4547/* Record all reloads needed for handling memory address AD 4548 which appears in *LOC in a memory reference to mode MODE 4549 which itself is found in location *MEMREFLOC. 4550 Note that we take shortcuts assuming that no multi-reg machine mode 4551 occurs as part of an address. 4552 4553 OPNUM and TYPE specify the purpose of this reload. 4554 4555 IND_LEVELS says how many levels of indirect addressing this machine 4556 supports. 4557 4558 INSN, if nonzero, is the insn in which we do the reload. It is used 4559 to determine if we may generate output reloads, and where to put USEs 4560 for pseudos that we have to replace with stack slots. 4561 4562 Value is nonzero if this address is reloaded or replaced as a whole. 4563 This is interesting to the caller if the address is an autoincrement. 4564 4565 Note that there is no verification that the address will be valid after 4566 this routine does its work. Instead, we rely on the fact that the address 4567 was valid when reload started. So we need only undo things that reload 4568 could have broken. These are wrong register types, pseudos not allocated 4569 to a hard register, and frame pointer elimination. */ 4570 4571static int 4572find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4573 enum machine_mode mode; 4574 rtx *memrefloc; 4575 rtx ad; 4576 rtx *loc; 4577 int opnum; 4578 enum reload_type type; 4579 int ind_levels; 4580 rtx insn; 4581{ 4582 int regno; 4583 int removed_and = 0; 4584 rtx tem; 4585 4586 /* If the address is a register, see if it is a legitimate address and 4587 reload if not. We first handle the cases where we need not reload 4588 or where we must reload in a non-standard way. */ 4589 4590 if (GET_CODE (ad) == REG) 4591 { 4592 regno = REGNO (ad); 4593 4594 /* If the register is equivalent to an invariant expression, substitute 4595 the invariant, and eliminate any eliminable register references. */ 4596 tem = reg_equiv_constant[regno]; 4597 if (tem != 0 4598 && (tem = eliminate_regs (tem, mode, insn)) 4599 && strict_memory_address_p (mode, tem)) 4600 { 4601 *loc = ad = tem; 4602 return 0; 4603 } 4604 4605 tem = reg_equiv_memory_loc[regno]; 4606 if (tem != 0) 4607 { 4608 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4609 { 4610 tem = make_memloc (ad, regno); 4611 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4612 { 4613 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0), 4614 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4615 ind_levels, insn); 4616 } 4617 /* We can avoid a reload if the register's equivalent memory 4618 expression is valid as an indirect memory address. 4619 But not all addresses are valid in a mem used as an indirect 4620 address: only reg or reg+constant. */ 4621 4622 if (ind_levels > 0 4623 && strict_memory_address_p (mode, tem) 4624 && (GET_CODE (XEXP (tem, 0)) == REG 4625 || (GET_CODE (XEXP (tem, 0)) == PLUS 4626 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4627 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4628 { 4629 /* TEM is not the same as what we'll be replacing the 4630 pseudo with after reload, put a USE in front of INSN 4631 in the final reload pass. */ 4632 if (replace_reloads 4633 && num_not_at_initial_offset 4634 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4635 { 4636 *loc = tem; 4637 /* We mark the USE with QImode so that we 4638 recognize it as one that can be safely 4639 deleted at the end of reload. */ 4640 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), 4641 insn), QImode); 4642 4643 /* This doesn't really count as replacing the address 4644 as a whole, since it is still a memory access. */ 4645 } 4646 return 0; 4647 } 4648 ad = tem; 4649 } 4650 } 4651 4652 /* The only remaining case where we can avoid a reload is if this is a 4653 hard register that is valid as a base register and which is not the 4654 subject of a CLOBBER in this insn. */ 4655 4656 else if (regno < FIRST_PSEUDO_REGISTER 4657 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4658 && ! regno_clobbered_p (regno, this_insn, mode, 0)) 4659 return 0; 4660 4661 /* If we do not have one of the cases above, we must do the reload. */ 4662 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode), 4663 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4664 return 1; 4665 } 4666 4667 if (strict_memory_address_p (mode, ad)) 4668 { 4669 /* The address appears valid, so reloads are not needed. 4670 But the address may contain an eliminable register. 4671 This can happen because a machine with indirect addressing 4672 may consider a pseudo register by itself a valid address even when 4673 it has failed to get a hard reg. 4674 So do a tree-walk to find and eliminate all such regs. */ 4675 4676 /* But first quickly dispose of a common case. */ 4677 if (GET_CODE (ad) == PLUS 4678 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4679 && GET_CODE (XEXP (ad, 0)) == REG 4680 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4681 return 0; 4682 4683 subst_reg_equivs_changed = 0; 4684 *loc = subst_reg_equivs (ad, insn); 4685 4686 if (! subst_reg_equivs_changed) 4687 return 0; 4688 4689 /* Check result for validity after substitution. */ 4690 if (strict_memory_address_p (mode, ad)) 4691 return 0; 4692 } 4693 4694#ifdef LEGITIMIZE_RELOAD_ADDRESS 4695 do 4696 { 4697 if (memrefloc) 4698 { 4699 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4700 ind_levels, win); 4701 } 4702 break; 4703 win: 4704 *memrefloc = copy_rtx (*memrefloc); 4705 XEXP (*memrefloc, 0) = ad; 4706 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4707 return 1; 4708 } 4709 while (0); 4710#endif 4711 4712 /* The address is not valid. We have to figure out why. First see if 4713 we have an outer AND and remove it if so. Then analyze what's inside. */ 4714 4715 if (GET_CODE (ad) == AND) 4716 { 4717 removed_and = 1; 4718 loc = &XEXP (ad, 0); 4719 ad = *loc; 4720 } 4721 4722 /* One possibility for why the address is invalid is that it is itself 4723 a MEM. This can happen when the frame pointer is being eliminated, a 4724 pseudo is not allocated to a hard register, and the offset between the 4725 frame and stack pointers is not its initial value. In that case the 4726 pseudo will have been replaced by a MEM referring to the 4727 stack pointer. */ 4728 if (GET_CODE (ad) == MEM) 4729 { 4730 /* First ensure that the address in this MEM is valid. Then, unless 4731 indirect addresses are valid, reload the MEM into a register. */ 4732 tem = ad; 4733 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4734 opnum, ADDR_TYPE (type), 4735 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4736 4737 /* If tem was changed, then we must create a new memory reference to 4738 hold it and store it back into memrefloc. */ 4739 if (tem != ad && memrefloc) 4740 { 4741 *memrefloc = copy_rtx (*memrefloc); 4742 copy_replacements (tem, XEXP (*memrefloc, 0)); 4743 loc = &XEXP (*memrefloc, 0); 4744 if (removed_and) 4745 loc = &XEXP (*loc, 0); 4746 } 4747 4748 /* Check similar cases as for indirect addresses as above except 4749 that we can allow pseudos and a MEM since they should have been 4750 taken care of above. */ 4751 4752 if (ind_levels == 0 4753 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4754 || GET_CODE (XEXP (tem, 0)) == MEM 4755 || ! (GET_CODE (XEXP (tem, 0)) == REG 4756 || (GET_CODE (XEXP (tem, 0)) == PLUS 4757 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4758 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4759 { 4760 /* Must use TEM here, not AD, since it is the one that will 4761 have any subexpressions reloaded, if needed. */ 4762 push_reload (tem, NULL_RTX, loc, (rtx*) 0, 4763 MODE_BASE_REG_CLASS (mode), GET_MODE (tem), 4764 VOIDmode, 0, 4765 0, opnum, type); 4766 return ! removed_and; 4767 } 4768 else 4769 return 0; 4770 } 4771 4772 /* If we have address of a stack slot but it's not valid because the 4773 displacement is too large, compute the sum in a register. 4774 Handle all base registers here, not just fp/ap/sp, because on some 4775 targets (namely SH) we can also get too large displacements from 4776 big-endian corrections. */ 4777 else if (GET_CODE (ad) == PLUS 4778 && GET_CODE (XEXP (ad, 0)) == REG 4779 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4780 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4781 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4782 { 4783 /* Unshare the MEM rtx so we can safely alter it. */ 4784 if (memrefloc) 4785 { 4786 *memrefloc = copy_rtx (*memrefloc); 4787 loc = &XEXP (*memrefloc, 0); 4788 if (removed_and) 4789 loc = &XEXP (*loc, 0); 4790 } 4791 4792 if (double_reg_address_ok) 4793 { 4794 /* Unshare the sum as well. */ 4795 *loc = ad = copy_rtx (ad); 4796 4797 /* Reload the displacement into an index reg. 4798 We assume the frame pointer or arg pointer is a base reg. */ 4799 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4800 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4801 type, ind_levels); 4802 return 0; 4803 } 4804 else 4805 { 4806 /* If the sum of two regs is not necessarily valid, 4807 reload the sum into a base reg. 4808 That will at least work. */ 4809 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4810 Pmode, opnum, type, ind_levels); 4811 } 4812 return ! removed_and; 4813 } 4814 4815 /* If we have an indexed stack slot, there are three possible reasons why 4816 it might be invalid: The index might need to be reloaded, the address 4817 might have been made by frame pointer elimination and hence have a 4818 constant out of range, or both reasons might apply. 4819 4820 We can easily check for an index needing reload, but even if that is the 4821 case, we might also have an invalid constant. To avoid making the 4822 conservative assumption and requiring two reloads, we see if this address 4823 is valid when not interpreted strictly. If it is, the only problem is 4824 that the index needs a reload and find_reloads_address_1 will take care 4825 of it. 4826 4827 If we decide to do something here, it must be that 4828 `double_reg_address_ok' is true and that this address rtl was made by 4829 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4830 rework the sum so that the reload register will be added to the index. 4831 This is safe because we know the address isn't shared. 4832 4833 We check for fp/ap/sp as both the first and second operand of the 4834 innermost PLUS. */ 4835 4836 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4837 && GET_CODE (XEXP (ad, 0)) == PLUS 4838 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4839#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4840 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4841#endif 4842#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4843 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4844#endif 4845 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4846 && ! memory_address_p (mode, ad)) 4847 { 4848 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4849 plus_constant (XEXP (XEXP (ad, 0), 0), 4850 INTVAL (XEXP (ad, 1))), 4851 XEXP (XEXP (ad, 0), 1)); 4852 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), 4853 MODE_BASE_REG_CLASS (mode), 4854 GET_MODE (ad), opnum, type, ind_levels); 4855 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4856 type, 0, insn); 4857 4858 return 0; 4859 } 4860 4861 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4862 && GET_CODE (XEXP (ad, 0)) == PLUS 4863 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4864#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4865 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4866#endif 4867#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4868 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4869#endif 4870 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4871 && ! memory_address_p (mode, ad)) 4872 { 4873 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4874 XEXP (XEXP (ad, 0), 0), 4875 plus_constant (XEXP (XEXP (ad, 0), 1), 4876 INTVAL (XEXP (ad, 1)))); 4877 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4878 MODE_BASE_REG_CLASS (mode), 4879 GET_MODE (ad), opnum, type, ind_levels); 4880 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4881 type, 0, insn); 4882 4883 return 0; 4884 } 4885 4886 /* See if address becomes valid when an eliminable register 4887 in a sum is replaced. */ 4888 4889 tem = ad; 4890 if (GET_CODE (ad) == PLUS) 4891 tem = subst_indexed_address (ad); 4892 if (tem != ad && strict_memory_address_p (mode, tem)) 4893 { 4894 /* Ok, we win that way. Replace any additional eliminable 4895 registers. */ 4896 4897 subst_reg_equivs_changed = 0; 4898 tem = subst_reg_equivs (tem, insn); 4899 4900 /* Make sure that didn't make the address invalid again. */ 4901 4902 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4903 { 4904 *loc = tem; 4905 return 0; 4906 } 4907 } 4908 4909 /* If constants aren't valid addresses, reload the constant address 4910 into a register. */ 4911 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4912 { 4913 /* If AD is an address in the constant pool, the MEM rtx may be shared. 4914 Unshare it so we can safely alter it. */ 4915 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4916 && CONSTANT_POOL_ADDRESS_P (ad)) 4917 { 4918 *memrefloc = copy_rtx (*memrefloc); 4919 loc = &XEXP (*memrefloc, 0); 4920 if (removed_and) 4921 loc = &XEXP (*loc, 0); 4922 } 4923 4924 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4925 Pmode, opnum, type, ind_levels); 4926 return ! removed_and; 4927 } 4928 4929 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4930 insn); 4931} 4932 4933/* Find all pseudo regs appearing in AD 4934 that are eliminable in favor of equivalent values 4935 and do not have hard regs; replace them by their equivalents. 4936 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4937 front of it for pseudos that we have to replace with stack slots. */ 4938 4939static rtx 4940subst_reg_equivs (ad, insn) 4941 rtx ad; 4942 rtx insn; 4943{ 4944 RTX_CODE code = GET_CODE (ad); 4945 int i; 4946 const char *fmt; 4947 4948 switch (code) 4949 { 4950 case HIGH: 4951 case CONST_INT: 4952 case CONST: 4953 case CONST_DOUBLE: 4954 case CONST_VECTOR: 4955 case SYMBOL_REF: 4956 case LABEL_REF: 4957 case PC: 4958 case CC0: 4959 return ad; 4960 4961 case REG: 4962 { 4963 int regno = REGNO (ad); 4964 4965 if (reg_equiv_constant[regno] != 0) 4966 { 4967 subst_reg_equivs_changed = 1; 4968 return reg_equiv_constant[regno]; 4969 } 4970 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 4971 { 4972 rtx mem = make_memloc (ad, regno); 4973 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 4974 { 4975 subst_reg_equivs_changed = 1; 4976 /* We mark the USE with QImode so that we recognize it 4977 as one that can be safely deleted at the end of 4978 reload. */ 4979 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn), 4980 QImode); 4981 return mem; 4982 } 4983 } 4984 } 4985 return ad; 4986 4987 case PLUS: 4988 /* Quickly dispose of a common case. */ 4989 if (XEXP (ad, 0) == frame_pointer_rtx 4990 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4991 return ad; 4992 break; 4993 4994 default: 4995 break; 4996 } 4997 4998 fmt = GET_RTX_FORMAT (code); 4999 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5000 if (fmt[i] == 'e') 5001 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5002 return ad; 5003} 5004 5005/* Compute the sum of X and Y, making canonicalizations assumed in an 5006 address, namely: sum constant integers, surround the sum of two 5007 constants with a CONST, put the constant as the second operand, and 5008 group the constant on the outermost sum. 5009 5010 This routine assumes both inputs are already in canonical form. */ 5011 5012rtx 5013form_sum (x, y) 5014 rtx x, y; 5015{ 5016 rtx tem; 5017 enum machine_mode mode = GET_MODE (x); 5018 5019 if (mode == VOIDmode) 5020 mode = GET_MODE (y); 5021 5022 if (mode == VOIDmode) 5023 mode = Pmode; 5024 5025 if (GET_CODE (x) == CONST_INT) 5026 return plus_constant (y, INTVAL (x)); 5027 else if (GET_CODE (y) == CONST_INT) 5028 return plus_constant (x, INTVAL (y)); 5029 else if (CONSTANT_P (x)) 5030 tem = x, x = y, y = tem; 5031 5032 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5033 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5034 5035 /* Note that if the operands of Y are specified in the opposite 5036 order in the recursive calls below, infinite recursion will occur. */ 5037 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5038 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5039 5040 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5041 constant will have been placed second. */ 5042 if (CONSTANT_P (x) && CONSTANT_P (y)) 5043 { 5044 if (GET_CODE (x) == CONST) 5045 x = XEXP (x, 0); 5046 if (GET_CODE (y) == CONST) 5047 y = XEXP (y, 0); 5048 5049 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5050 } 5051 5052 return gen_rtx_PLUS (mode, x, y); 5053} 5054 5055/* If ADDR is a sum containing a pseudo register that should be 5056 replaced with a constant (from reg_equiv_constant), 5057 return the result of doing so, and also apply the associative 5058 law so that the result is more likely to be a valid address. 5059 (But it is not guaranteed to be one.) 5060 5061 Note that at most one register is replaced, even if more are 5062 replaceable. Also, we try to put the result into a canonical form 5063 so it is more likely to be a valid address. 5064 5065 In all other cases, return ADDR. */ 5066 5067static rtx 5068subst_indexed_address (addr) 5069 rtx addr; 5070{ 5071 rtx op0 = 0, op1 = 0, op2 = 0; 5072 rtx tem; 5073 int regno; 5074 5075 if (GET_CODE (addr) == PLUS) 5076 { 5077 /* Try to find a register to replace. */ 5078 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5079 if (GET_CODE (op0) == REG 5080 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5081 && reg_renumber[regno] < 0 5082 && reg_equiv_constant[regno] != 0) 5083 op0 = reg_equiv_constant[regno]; 5084 else if (GET_CODE (op1) == REG 5085 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5086 && reg_renumber[regno] < 0 5087 && reg_equiv_constant[regno] != 0) 5088 op1 = reg_equiv_constant[regno]; 5089 else if (GET_CODE (op0) == PLUS 5090 && (tem = subst_indexed_address (op0)) != op0) 5091 op0 = tem; 5092 else if (GET_CODE (op1) == PLUS 5093 && (tem = subst_indexed_address (op1)) != op1) 5094 op1 = tem; 5095 else 5096 return addr; 5097 5098 /* Pick out up to three things to add. */ 5099 if (GET_CODE (op1) == PLUS) 5100 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5101 else if (GET_CODE (op0) == PLUS) 5102 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5103 5104 /* Compute the sum. */ 5105 if (op2 != 0) 5106 op1 = form_sum (op1, op2); 5107 if (op1 != 0) 5108 op0 = form_sum (op0, op1); 5109 5110 return op0; 5111 } 5112 return addr; 5113} 5114 5115/* Update the REG_INC notes for an insn. It updates all REG_INC 5116 notes for the instruction which refer to REGNO the to refer 5117 to the reload number. 5118 5119 INSN is the insn for which any REG_INC notes need updating. 5120 5121 REGNO is the register number which has been reloaded. 5122 5123 RELOADNUM is the reload number. */ 5124 5125static void 5126update_auto_inc_notes (insn, regno, reloadnum) 5127 rtx insn ATTRIBUTE_UNUSED; 5128 int regno ATTRIBUTE_UNUSED; 5129 int reloadnum ATTRIBUTE_UNUSED; 5130{ 5131#ifdef AUTO_INC_DEC 5132 rtx link; 5133 5134 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 5135 if (REG_NOTE_KIND (link) == REG_INC 5136 && REGNO (XEXP (link, 0)) == regno) 5137 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5138#endif 5139} 5140 5141/* Record the pseudo registers we must reload into hard registers in a 5142 subexpression of a would-be memory address, X referring to a value 5143 in mode MODE. (This function is not called if the address we find 5144 is strictly valid.) 5145 5146 CONTEXT = 1 means we are considering regs as index regs, 5147 = 0 means we are considering them as base regs. 5148 5149 OPNUM and TYPE specify the purpose of any reloads made. 5150 5151 IND_LEVELS says how many levels of indirect addressing are 5152 supported at this point in the address. 5153 5154 INSN, if nonzero, is the insn in which we do the reload. It is used 5155 to determine if we may generate output reloads. 5156 5157 We return nonzero if X, as a whole, is reloaded or replaced. */ 5158 5159/* Note that we take shortcuts assuming that no multi-reg machine mode 5160 occurs as part of an address. 5161 Also, this is not fully machine-customizable; it works for machines 5162 such as VAXen and 68000's and 32000's, but other possible machines 5163 could have addressing modes that this does not handle right. */ 5164 5165static int 5166find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5167 enum machine_mode mode; 5168 rtx x; 5169 int context; 5170 rtx *loc; 5171 int opnum; 5172 enum reload_type type; 5173 int ind_levels; 5174 rtx insn; 5175{ 5176 RTX_CODE code = GET_CODE (x); 5177 5178 switch (code) 5179 { 5180 case PLUS: 5181 { 5182 rtx orig_op0 = XEXP (x, 0); 5183 rtx orig_op1 = XEXP (x, 1); 5184 RTX_CODE code0 = GET_CODE (orig_op0); 5185 RTX_CODE code1 = GET_CODE (orig_op1); 5186 rtx op0 = orig_op0; 5187 rtx op1 = orig_op1; 5188 5189 if (GET_CODE (op0) == SUBREG) 5190 { 5191 op0 = SUBREG_REG (op0); 5192 code0 = GET_CODE (op0); 5193 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5194 op0 = gen_rtx_REG (word_mode, 5195 (REGNO (op0) + 5196 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)), 5197 GET_MODE (SUBREG_REG (orig_op0)), 5198 SUBREG_BYTE (orig_op0), 5199 GET_MODE (orig_op0)))); 5200 } 5201 5202 if (GET_CODE (op1) == SUBREG) 5203 { 5204 op1 = SUBREG_REG (op1); 5205 code1 = GET_CODE (op1); 5206 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5207 /* ??? Why is this given op1's mode and above for 5208 ??? op0 SUBREGs we use word_mode? */ 5209 op1 = gen_rtx_REG (GET_MODE (op1), 5210 (REGNO (op1) + 5211 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)), 5212 GET_MODE (SUBREG_REG (orig_op1)), 5213 SUBREG_BYTE (orig_op1), 5214 GET_MODE (orig_op1)))); 5215 } 5216 5217 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5218 || code0 == ZERO_EXTEND || code1 == MEM) 5219 { 5220 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5221 type, ind_levels, insn); 5222 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5223 type, ind_levels, insn); 5224 } 5225 5226 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5227 || code1 == ZERO_EXTEND || code0 == MEM) 5228 { 5229 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5230 type, ind_levels, insn); 5231 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5232 type, ind_levels, insn); 5233 } 5234 5235 else if (code0 == CONST_INT || code0 == CONST 5236 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5237 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5238 type, ind_levels, insn); 5239 5240 else if (code1 == CONST_INT || code1 == CONST 5241 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5242 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5243 type, ind_levels, insn); 5244 5245 else if (code0 == REG && code1 == REG) 5246 { 5247 if (REG_OK_FOR_INDEX_P (op0) 5248 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5249 return 0; 5250 else if (REG_OK_FOR_INDEX_P (op1) 5251 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5252 return 0; 5253 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5254 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5255 type, ind_levels, insn); 5256 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5257 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5258 type, ind_levels, insn); 5259 else if (REG_OK_FOR_INDEX_P (op1)) 5260 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5261 type, ind_levels, insn); 5262 else if (REG_OK_FOR_INDEX_P (op0)) 5263 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5264 type, ind_levels, insn); 5265 else 5266 { 5267 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5268 type, ind_levels, insn); 5269 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5270 type, ind_levels, insn); 5271 } 5272 } 5273 5274 else if (code0 == REG) 5275 { 5276 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5277 type, ind_levels, insn); 5278 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5279 type, ind_levels, insn); 5280 } 5281 5282 else if (code1 == REG) 5283 { 5284 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5285 type, ind_levels, insn); 5286 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5287 type, ind_levels, insn); 5288 } 5289 } 5290 5291 return 0; 5292 5293 case POST_MODIFY: 5294 case PRE_MODIFY: 5295 { 5296 rtx op0 = XEXP (x, 0); 5297 rtx op1 = XEXP (x, 1); 5298 5299 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS) 5300 return 0; 5301 5302 /* Currently, we only support {PRE,POST}_MODIFY constructs 5303 where a base register is {inc,dec}remented by the contents 5304 of another register or by a constant value. Thus, these 5305 operands must match. */ 5306 if (op0 != XEXP (op1, 0)) 5307 abort (); 5308 5309 /* Require index register (or constant). Let's just handle the 5310 register case in the meantime... If the target allows 5311 auto-modify by a constant then we could try replacing a pseudo 5312 register with its equivalent constant where applicable. */ 5313 if (REG_P (XEXP (op1, 1))) 5314 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1)))) 5315 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1), 5316 opnum, type, ind_levels, insn); 5317 5318 if (REG_P (XEXP (op1, 0))) 5319 { 5320 int regno = REGNO (XEXP (op1, 0)); 5321 int reloadnum; 5322 5323 /* A register that is incremented cannot be constant! */ 5324 if (regno >= FIRST_PSEUDO_REGISTER 5325 && reg_equiv_constant[regno] != 0) 5326 abort (); 5327 5328 /* Handle a register that is equivalent to a memory location 5329 which cannot be addressed directly. */ 5330 if (reg_equiv_memory_loc[regno] != 0 5331 && (reg_equiv_address[regno] != 0 5332 || num_not_at_initial_offset)) 5333 { 5334 rtx tem = make_memloc (XEXP (x, 0), regno); 5335 5336 if (reg_equiv_address[regno] 5337 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5338 { 5339 /* First reload the memory location's address. 5340 We can't use ADDR_TYPE (type) here, because we need to 5341 write back the value after reading it, hence we actually 5342 need two registers. */ 5343 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0), 5344 &XEXP (tem, 0), opnum, 5345 RELOAD_OTHER, 5346 ind_levels, insn); 5347 5348 /* Then reload the memory location into a base 5349 register. */ 5350 reloadnum = push_reload (tem, tem, &XEXP (x, 0), 5351 &XEXP (op1, 0), 5352 MODE_BASE_REG_CLASS (mode), 5353 GET_MODE (x), GET_MODE (x), 0, 5354 0, opnum, RELOAD_OTHER); 5355 5356 update_auto_inc_notes (this_insn, regno, reloadnum); 5357 return 0; 5358 } 5359 } 5360 5361 if (reg_renumber[regno] >= 0) 5362 regno = reg_renumber[regno]; 5363 5364 /* We require a base register here... */ 5365 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x))) 5366 { 5367 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0), 5368 &XEXP (op1, 0), &XEXP (x, 0), 5369 MODE_BASE_REG_CLASS (mode), 5370 GET_MODE (x), GET_MODE (x), 0, 0, 5371 opnum, RELOAD_OTHER); 5372 5373 update_auto_inc_notes (this_insn, regno, reloadnum); 5374 return 0; 5375 } 5376 } 5377 else 5378 abort (); 5379 } 5380 return 0; 5381 5382 case POST_INC: 5383 case POST_DEC: 5384 case PRE_INC: 5385 case PRE_DEC: 5386 if (GET_CODE (XEXP (x, 0)) == REG) 5387 { 5388 int regno = REGNO (XEXP (x, 0)); 5389 int value = 0; 5390 rtx x_orig = x; 5391 5392 /* A register that is incremented cannot be constant! */ 5393 if (regno >= FIRST_PSEUDO_REGISTER 5394 && reg_equiv_constant[regno] != 0) 5395 abort (); 5396 5397 /* Handle a register that is equivalent to a memory location 5398 which cannot be addressed directly. */ 5399 if (reg_equiv_memory_loc[regno] != 0 5400 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5401 { 5402 rtx tem = make_memloc (XEXP (x, 0), regno); 5403 if (reg_equiv_address[regno] 5404 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5405 { 5406 /* First reload the memory location's address. 5407 We can't use ADDR_TYPE (type) here, because we need to 5408 write back the value after reading it, hence we actually 5409 need two registers. */ 5410 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5411 &XEXP (tem, 0), opnum, type, 5412 ind_levels, insn); 5413 /* Put this inside a new increment-expression. */ 5414 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5415 /* Proceed to reload that, as if it contained a register. */ 5416 } 5417 } 5418 5419 /* If we have a hard register that is ok as an index, 5420 don't make a reload. If an autoincrement of a nice register 5421 isn't "valid", it must be that no autoincrement is "valid". 5422 If that is true and something made an autoincrement anyway, 5423 this must be a special context where one is allowed. 5424 (For example, a "push" instruction.) 5425 We can't improve this address, so leave it alone. */ 5426 5427 /* Otherwise, reload the autoincrement into a suitable hard reg 5428 and record how much to increment by. */ 5429 5430 if (reg_renumber[regno] >= 0) 5431 regno = reg_renumber[regno]; 5432 if ((regno >= FIRST_PSEUDO_REGISTER 5433 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5434 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5435 { 5436 int reloadnum; 5437 5438 /* If we can output the register afterwards, do so, this 5439 saves the extra update. 5440 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5441 CALL_INSN - and it does not set CC0. 5442 But don't do this if we cannot directly address the 5443 memory location, since this will make it harder to 5444 reuse address reloads, and increases register pressure. 5445 Also don't do this if we can probably update x directly. */ 5446 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5447 ? XEXP (x, 0) 5448 : reg_equiv_mem[regno]); 5449 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5450 if (insn && GET_CODE (insn) == INSN && equiv 5451 && memory_operand (equiv, GET_MODE (equiv)) 5452#ifdef HAVE_cc0 5453 && ! sets_cc0_p (PATTERN (insn)) 5454#endif 5455 && ! (icode != CODE_FOR_nothing 5456 && ((*insn_data[icode].operand[0].predicate) 5457 (equiv, Pmode)) 5458 && ((*insn_data[icode].operand[1].predicate) 5459 (equiv, Pmode)))) 5460 { 5461 /* We use the original pseudo for loc, so that 5462 emit_reload_insns() knows which pseudo this 5463 reload refers to and updates the pseudo rtx, not 5464 its equivalent memory location, as well as the 5465 corresponding entry in reg_last_reload_reg. */ 5466 loc = &XEXP (x_orig, 0); 5467 x = XEXP (x, 0); 5468 reloadnum 5469 = push_reload (x, x, loc, loc, 5470 (context ? INDEX_REG_CLASS : 5471 MODE_BASE_REG_CLASS (mode)), 5472 GET_MODE (x), GET_MODE (x), 0, 0, 5473 opnum, RELOAD_OTHER); 5474 } 5475 else 5476 { 5477 reloadnum 5478 = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5479 (context ? INDEX_REG_CLASS : 5480 MODE_BASE_REG_CLASS (mode)), 5481 GET_MODE (x), GET_MODE (x), 0, 0, 5482 opnum, type); 5483 rld[reloadnum].inc 5484 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5485 5486 value = 1; 5487 } 5488 5489 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)), 5490 reloadnum); 5491 } 5492 return value; 5493 } 5494 5495 else if (GET_CODE (XEXP (x, 0)) == MEM) 5496 { 5497 /* This is probably the result of a substitution, by eliminate_regs, 5498 of an equivalent address for a pseudo that was not allocated to a 5499 hard register. Verify that the specified address is valid and 5500 reload it into a register. */ 5501 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5502 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5503 rtx link; 5504 int reloadnum; 5505 5506 /* Since we know we are going to reload this item, don't decrement 5507 for the indirection level. 5508 5509 Note that this is actually conservative: it would be slightly 5510 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5511 reload1.c here. */ 5512 /* We can't use ADDR_TYPE (type) here, because we need to 5513 write back the value after reading it, hence we actually 5514 need two registers. */ 5515 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5516 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5517 opnum, type, ind_levels, insn); 5518 5519 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5520 (context ? INDEX_REG_CLASS : 5521 MODE_BASE_REG_CLASS (mode)), 5522 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5523 rld[reloadnum].inc 5524 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5525 5526 link = FIND_REG_INC_NOTE (this_insn, tem); 5527 if (link != 0) 5528 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5529 5530 return 1; 5531 } 5532 return 0; 5533 5534 case MEM: 5535 /* This is probably the result of a substitution, by eliminate_regs, of 5536 an equivalent address for a pseudo that was not allocated to a hard 5537 register. Verify that the specified address is valid and reload it 5538 into a register. 5539 5540 Since we know we are going to reload this item, don't decrement for 5541 the indirection level. 5542 5543 Note that this is actually conservative: it would be slightly more 5544 efficient to use the value of SPILL_INDIRECT_LEVELS from 5545 reload1.c here. */ 5546 5547 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5548 opnum, ADDR_TYPE (type), ind_levels, insn); 5549 push_reload (*loc, NULL_RTX, loc, (rtx*) 0, 5550 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5551 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5552 return 1; 5553 5554 case REG: 5555 { 5556 int regno = REGNO (x); 5557 5558 if (reg_equiv_constant[regno] != 0) 5559 { 5560 find_reloads_address_part (reg_equiv_constant[regno], loc, 5561 (context ? INDEX_REG_CLASS : 5562 MODE_BASE_REG_CLASS (mode)), 5563 GET_MODE (x), opnum, type, ind_levels); 5564 return 1; 5565 } 5566 5567#if 0 /* This might screw code in reload1.c to delete prior output-reload 5568 that feeds this insn. */ 5569 if (reg_equiv_mem[regno] != 0) 5570 { 5571 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0, 5572 (context ? INDEX_REG_CLASS : 5573 MODE_BASE_REG_CLASS (mode)), 5574 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5575 return 1; 5576 } 5577#endif 5578 5579 if (reg_equiv_memory_loc[regno] 5580 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5581 { 5582 rtx tem = make_memloc (x, regno); 5583 if (reg_equiv_address[regno] != 0 5584 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5585 { 5586 x = tem; 5587 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5588 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5589 ind_levels, insn); 5590 } 5591 } 5592 5593 if (reg_renumber[regno] >= 0) 5594 regno = reg_renumber[regno]; 5595 5596 if ((regno >= FIRST_PSEUDO_REGISTER 5597 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5598 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5599 { 5600 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5601 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5602 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5603 return 1; 5604 } 5605 5606 /* If a register appearing in an address is the subject of a CLOBBER 5607 in this insn, reload it into some other register to be safe. 5608 The CLOBBER is supposed to make the register unavailable 5609 from before this insn to after it. */ 5610 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5611 { 5612 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5613 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5614 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5615 return 1; 5616 } 5617 } 5618 return 0; 5619 5620 case SUBREG: 5621 if (GET_CODE (SUBREG_REG (x)) == REG) 5622 { 5623 /* If this is a SUBREG of a hard register and the resulting register 5624 is of the wrong class, reload the whole SUBREG. This avoids 5625 needless copies if SUBREG_REG is multi-word. */ 5626 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5627 { 5628 int regno = subreg_regno (x); 5629 5630 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5631 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5632 { 5633 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5634 (context ? INDEX_REG_CLASS : 5635 MODE_BASE_REG_CLASS (mode)), 5636 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5637 return 1; 5638 } 5639 } 5640 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5641 is larger than the class size, then reload the whole SUBREG. */ 5642 else 5643 { 5644 enum reg_class class = (context ? INDEX_REG_CLASS 5645 : MODE_BASE_REG_CLASS (mode)); 5646 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5647 > reg_class_size[class]) 5648 { 5649 x = find_reloads_subreg_address (x, 0, opnum, type, 5650 ind_levels, insn); 5651 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5652 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5653 return 1; 5654 } 5655 } 5656 } 5657 break; 5658 5659 default: 5660 break; 5661 } 5662 5663 { 5664 const char *fmt = GET_RTX_FORMAT (code); 5665 int i; 5666 5667 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5668 { 5669 if (fmt[i] == 'e') 5670 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5671 opnum, type, ind_levels, insn); 5672 } 5673 } 5674 5675 return 0; 5676} 5677 5678/* X, which is found at *LOC, is a part of an address that needs to be 5679 reloaded into a register of class CLASS. If X is a constant, or if 5680 X is a PLUS that contains a constant, check that the constant is a 5681 legitimate operand and that we are supposed to be able to load 5682 it into the register. 5683 5684 If not, force the constant into memory and reload the MEM instead. 5685 5686 MODE is the mode to use, in case X is an integer constant. 5687 5688 OPNUM and TYPE describe the purpose of any reloads made. 5689 5690 IND_LEVELS says how many levels of indirect addressing this machine 5691 supports. */ 5692 5693static void 5694find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5695 rtx x; 5696 rtx *loc; 5697 enum reg_class class; 5698 enum machine_mode mode; 5699 int opnum; 5700 enum reload_type type; 5701 int ind_levels; 5702{ 5703 if (CONSTANT_P (x) 5704 && (! LEGITIMATE_CONSTANT_P (x) 5705 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5706 { 5707 rtx tem; 5708 5709 tem = x = force_const_mem (mode, x); 5710 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5711 opnum, type, ind_levels, 0); 5712 } 5713 5714 else if (GET_CODE (x) == PLUS 5715 && CONSTANT_P (XEXP (x, 1)) 5716 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5717 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5718 { 5719 rtx tem; 5720 5721 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5722 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5723 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5724 opnum, type, ind_levels, 0); 5725 } 5726 5727 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5728 mode, VOIDmode, 0, 0, opnum, type); 5729} 5730 5731/* X, a subreg of a pseudo, is a part of an address that needs to be 5732 reloaded. 5733 5734 If the pseudo is equivalent to a memory location that cannot be directly 5735 addressed, make the necessary address reloads. 5736 5737 If address reloads have been necessary, or if the address is changed 5738 by register elimination, return the rtx of the memory location; 5739 otherwise, return X. 5740 5741 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5742 memory location. 5743 5744 OPNUM and TYPE identify the purpose of the reload. 5745 5746 IND_LEVELS says how many levels of indirect addressing are 5747 supported at this point in the address. 5748 5749 INSN, if nonzero, is the insn in which we do the reload. It is used 5750 to determine where to put USEs for pseudos that we have to replace with 5751 stack slots. */ 5752 5753static rtx 5754find_reloads_subreg_address (x, force_replace, opnum, type, 5755 ind_levels, insn) 5756 rtx x; 5757 int force_replace; 5758 int opnum; 5759 enum reload_type type; 5760 int ind_levels; 5761 rtx insn; 5762{ 5763 int regno = REGNO (SUBREG_REG (x)); 5764 5765 if (reg_equiv_memory_loc[regno]) 5766 { 5767 /* If the address is not directly addressable, or if the address is not 5768 offsettable, then it must be replaced. */ 5769 if (! force_replace 5770 && (reg_equiv_address[regno] 5771 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5772 force_replace = 1; 5773 5774 if (force_replace || num_not_at_initial_offset) 5775 { 5776 rtx tem = make_memloc (SUBREG_REG (x), regno); 5777 5778 /* If the address changes because of register elimination, then 5779 it must be replaced. */ 5780 if (force_replace 5781 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5782 { 5783 int offset = SUBREG_BYTE (x); 5784 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); 5785 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5786 5787 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5788 PUT_MODE (tem, GET_MODE (x)); 5789 5790 /* If this was a paradoxical subreg that we replaced, the 5791 resulting memory must be sufficiently aligned to allow 5792 us to widen the mode of the memory. */ 5793 if (outer_size > inner_size && STRICT_ALIGNMENT) 5794 { 5795 rtx base; 5796 5797 base = XEXP (tem, 0); 5798 if (GET_CODE (base) == PLUS) 5799 { 5800 if (GET_CODE (XEXP (base, 1)) == CONST_INT 5801 && INTVAL (XEXP (base, 1)) % outer_size != 0) 5802 return x; 5803 base = XEXP (base, 0); 5804 } 5805 if (GET_CODE (base) != REG 5806 || (REGNO_POINTER_ALIGN (REGNO (base)) 5807 < outer_size * BITS_PER_UNIT)) 5808 return x; 5809 } 5810 5811 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5812 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5813 ind_levels, insn); 5814 5815 /* If this is not a toplevel operand, find_reloads doesn't see 5816 this substitution. We have to emit a USE of the pseudo so 5817 that delete_output_reload can see it. */ 5818 if (replace_reloads && recog_data.operand[opnum] != x) 5819 /* We mark the USE with QImode so that we recognize it 5820 as one that can be safely deleted at the end of 5821 reload. */ 5822 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, 5823 SUBREG_REG (x)), 5824 insn), QImode); 5825 x = tem; 5826 } 5827 } 5828 } 5829 return x; 5830} 5831 5832/* Substitute into the current INSN the registers into which we have reloaded 5833 the things that need reloading. The array `replacements' 5834 contains the locations of all pointers that must be changed 5835 and says what to replace them with. 5836 5837 Return the rtx that X translates into; usually X, but modified. */ 5838 5839void 5840subst_reloads (insn) 5841 rtx insn; 5842{ 5843 int i; 5844 5845 for (i = 0; i < n_replacements; i++) 5846 { 5847 struct replacement *r = &replacements[i]; 5848 rtx reloadreg = rld[r->what].reg_rtx; 5849 if (reloadreg) 5850 { 5851#ifdef ENABLE_CHECKING 5852 /* Internal consistency test. Check that we don't modify 5853 anything in the equivalence arrays. Whenever something from 5854 those arrays needs to be reloaded, it must be unshared before 5855 being substituted into; the equivalence must not be modified. 5856 Otherwise, if the equivalence is used after that, it will 5857 have been modified, and the thing substituted (probably a 5858 register) is likely overwritten and not a usable equivalence. */ 5859 int check_regno; 5860 5861 for (check_regno = 0; check_regno < max_regno; check_regno++) 5862 { 5863#define CHECK_MODF(ARRAY) \ 5864 if (ARRAY[check_regno] \ 5865 && loc_mentioned_in_p (r->where, \ 5866 ARRAY[check_regno])) \ 5867 abort () 5868 5869 CHECK_MODF (reg_equiv_constant); 5870 CHECK_MODF (reg_equiv_memory_loc); 5871 CHECK_MODF (reg_equiv_address); 5872 CHECK_MODF (reg_equiv_mem); 5873#undef CHECK_MODF 5874 } 5875#endif /* ENABLE_CHECKING */ 5876 5877 /* If we're replacing a LABEL_REF with a register, add a 5878 REG_LABEL note to indicate to flow which label this 5879 register refers to. */ 5880 if (GET_CODE (*r->where) == LABEL_REF 5881 && GET_CODE (insn) == JUMP_INSN) 5882 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 5883 XEXP (*r->where, 0), 5884 REG_NOTES (insn)); 5885 5886 /* Encapsulate RELOADREG so its machine mode matches what 5887 used to be there. Note that gen_lowpart_common will 5888 do the wrong thing if RELOADREG is multi-word. RELOADREG 5889 will always be a REG here. */ 5890 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5891 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5892 5893 /* If we are putting this into a SUBREG and RELOADREG is a 5894 SUBREG, we would be making nested SUBREGs, so we have to fix 5895 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5896 5897 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5898 { 5899 if (GET_MODE (*r->subreg_loc) 5900 == GET_MODE (SUBREG_REG (reloadreg))) 5901 *r->subreg_loc = SUBREG_REG (reloadreg); 5902 else 5903 { 5904 int final_offset = 5905 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg); 5906 5907 /* When working with SUBREGs the rule is that the byte 5908 offset must be a multiple of the SUBREG's mode. */ 5909 final_offset = (final_offset / 5910 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5911 final_offset = (final_offset * 5912 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5913 5914 *r->where = SUBREG_REG (reloadreg); 5915 SUBREG_BYTE (*r->subreg_loc) = final_offset; 5916 } 5917 } 5918 else 5919 *r->where = reloadreg; 5920 } 5921 /* If reload got no reg and isn't optional, something's wrong. */ 5922 else if (! rld[r->what].optional) 5923 abort (); 5924 } 5925} 5926 5927/* Make a copy of any replacements being done into X and move those 5928 copies to locations in Y, a copy of X. */ 5929 5930void 5931copy_replacements (x, y) 5932 rtx x, y; 5933{ 5934 /* We can't support X being a SUBREG because we might then need to know its 5935 location if something inside it was replaced. */ 5936 if (GET_CODE (x) == SUBREG) 5937 abort (); 5938 5939 copy_replacements_1 (&x, &y, n_replacements); 5940} 5941 5942static void 5943copy_replacements_1 (px, py, orig_replacements) 5944 rtx *px; 5945 rtx *py; 5946 int orig_replacements; 5947{ 5948 int i, j; 5949 rtx x, y; 5950 struct replacement *r; 5951 enum rtx_code code; 5952 const char *fmt; 5953 5954 for (j = 0; j < orig_replacements; j++) 5955 { 5956 if (replacements[j].subreg_loc == px) 5957 { 5958 r = &replacements[n_replacements++]; 5959 r->where = replacements[j].where; 5960 r->subreg_loc = py; 5961 r->what = replacements[j].what; 5962 r->mode = replacements[j].mode; 5963 } 5964 else if (replacements[j].where == px) 5965 { 5966 r = &replacements[n_replacements++]; 5967 r->where = py; 5968 r->subreg_loc = 0; 5969 r->what = replacements[j].what; 5970 r->mode = replacements[j].mode; 5971 } 5972 } 5973 5974 x = *px; 5975 y = *py; 5976 code = GET_CODE (x); 5977 fmt = GET_RTX_FORMAT (code); 5978 5979 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5980 { 5981 if (fmt[i] == 'e') 5982 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements); 5983 else if (fmt[i] == 'E') 5984 for (j = XVECLEN (x, i); --j >= 0; ) 5985 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j), 5986 orig_replacements); 5987 } 5988} 5989 5990/* Change any replacements being done to *X to be done to *Y */ 5991 5992void 5993move_replacements (x, y) 5994 rtx *x; 5995 rtx *y; 5996{ 5997 int i; 5998 5999 for (i = 0; i < n_replacements; i++) 6000 if (replacements[i].subreg_loc == x) 6001 replacements[i].subreg_loc = y; 6002 else if (replacements[i].where == x) 6003 { 6004 replacements[i].where = y; 6005 replacements[i].subreg_loc = 0; 6006 } 6007} 6008 6009/* If LOC was scheduled to be replaced by something, return the replacement. 6010 Otherwise, return *LOC. */ 6011 6012rtx 6013find_replacement (loc) 6014 rtx *loc; 6015{ 6016 struct replacement *r; 6017 6018 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 6019 { 6020 rtx reloadreg = rld[r->what].reg_rtx; 6021 6022 if (reloadreg && r->where == loc) 6023 { 6024 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 6025 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 6026 6027 return reloadreg; 6028 } 6029 else if (reloadreg && r->subreg_loc == loc) 6030 { 6031 /* RELOADREG must be either a REG or a SUBREG. 6032 6033 ??? Is it actually still ever a SUBREG? If so, why? */ 6034 6035 if (GET_CODE (reloadreg) == REG) 6036 return gen_rtx_REG (GET_MODE (*loc), 6037 (REGNO (reloadreg) + 6038 subreg_regno_offset (REGNO (SUBREG_REG (*loc)), 6039 GET_MODE (SUBREG_REG (*loc)), 6040 SUBREG_BYTE (*loc), 6041 GET_MODE (*loc)))); 6042 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 6043 return reloadreg; 6044 else 6045 { 6046 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc); 6047 6048 /* When working with SUBREGs the rule is that the byte 6049 offset must be a multiple of the SUBREG's mode. */ 6050 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc))); 6051 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc))); 6052 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 6053 final_offset); 6054 } 6055 } 6056 } 6057 6058 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 6059 what's inside and make a new rtl if so. */ 6060 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 6061 || GET_CODE (*loc) == MULT) 6062 { 6063 rtx x = find_replacement (&XEXP (*loc, 0)); 6064 rtx y = find_replacement (&XEXP (*loc, 1)); 6065 6066 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 6067 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 6068 } 6069 6070 return *loc; 6071} 6072 6073/* Return nonzero if register in range [REGNO, ENDREGNO) 6074 appears either explicitly or implicitly in X 6075 other than being stored into (except for earlyclobber operands). 6076 6077 References contained within the substructure at LOC do not count. 6078 LOC may be zero, meaning don't ignore anything. 6079 6080 This is similar to refers_to_regno_p in rtlanal.c except that we 6081 look at equivalences for pseudos that didn't get hard registers. */ 6082 6083int 6084refers_to_regno_for_reload_p (regno, endregno, x, loc) 6085 unsigned int regno, endregno; 6086 rtx x; 6087 rtx *loc; 6088{ 6089 int i; 6090 unsigned int r; 6091 RTX_CODE code; 6092 const char *fmt; 6093 6094 if (x == 0) 6095 return 0; 6096 6097 repeat: 6098 code = GET_CODE (x); 6099 6100 switch (code) 6101 { 6102 case REG: 6103 r = REGNO (x); 6104 6105 /* If this is a pseudo, a hard register must not have been allocated. 6106 X must therefore either be a constant or be in memory. */ 6107 if (r >= FIRST_PSEUDO_REGISTER) 6108 { 6109 if (reg_equiv_memory_loc[r]) 6110 return refers_to_regno_for_reload_p (regno, endregno, 6111 reg_equiv_memory_loc[r], 6112 (rtx*) 0); 6113 6114 if (reg_equiv_constant[r]) 6115 return 0; 6116 6117 abort (); 6118 } 6119 6120 return (endregno > r 6121 && regno < r + (r < FIRST_PSEUDO_REGISTER 6122 ? HARD_REGNO_NREGS (r, GET_MODE (x)) 6123 : 1)); 6124 6125 case SUBREG: 6126 /* If this is a SUBREG of a hard reg, we can see exactly which 6127 registers are being modified. Otherwise, handle normally. */ 6128 if (GET_CODE (SUBREG_REG (x)) == REG 6129 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 6130 { 6131 unsigned int inner_regno = subreg_regno (x); 6132 unsigned int inner_endregno 6133 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 6134 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6135 6136 return endregno > inner_regno && regno < inner_endregno; 6137 } 6138 break; 6139 6140 case CLOBBER: 6141 case SET: 6142 if (&SET_DEST (x) != loc 6143 /* Note setting a SUBREG counts as referring to the REG it is in for 6144 a pseudo but not for hard registers since we can 6145 treat each word individually. */ 6146 && ((GET_CODE (SET_DEST (x)) == SUBREG 6147 && loc != &SUBREG_REG (SET_DEST (x)) 6148 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 6149 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 6150 && refers_to_regno_for_reload_p (regno, endregno, 6151 SUBREG_REG (SET_DEST (x)), 6152 loc)) 6153 /* If the output is an earlyclobber operand, this is 6154 a conflict. */ 6155 || ((GET_CODE (SET_DEST (x)) != REG 6156 || earlyclobber_operand_p (SET_DEST (x))) 6157 && refers_to_regno_for_reload_p (regno, endregno, 6158 SET_DEST (x), loc)))) 6159 return 1; 6160 6161 if (code == CLOBBER || loc == &SET_SRC (x)) 6162 return 0; 6163 x = SET_SRC (x); 6164 goto repeat; 6165 6166 default: 6167 break; 6168 } 6169 6170 /* X does not match, so try its subexpressions. */ 6171 6172 fmt = GET_RTX_FORMAT (code); 6173 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6174 { 6175 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 6176 { 6177 if (i == 0) 6178 { 6179 x = XEXP (x, 0); 6180 goto repeat; 6181 } 6182 else 6183 if (refers_to_regno_for_reload_p (regno, endregno, 6184 XEXP (x, i), loc)) 6185 return 1; 6186 } 6187 else if (fmt[i] == 'E') 6188 { 6189 int j; 6190 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6191 if (loc != &XVECEXP (x, i, j) 6192 && refers_to_regno_for_reload_p (regno, endregno, 6193 XVECEXP (x, i, j), loc)) 6194 return 1; 6195 } 6196 } 6197 return 0; 6198} 6199 6200/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6201 we check if any register number in X conflicts with the relevant register 6202 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6203 contains a MEM (we don't bother checking for memory addresses that can't 6204 conflict because we expect this to be a rare case. 6205 6206 This function is similar to reg_overlap_mentioned_p in rtlanal.c except 6207 that we look at equivalences for pseudos that didn't get hard registers. */ 6208 6209int 6210reg_overlap_mentioned_for_reload_p (x, in) 6211 rtx x, in; 6212{ 6213 int regno, endregno; 6214 6215 /* Overly conservative. */ 6216 if (GET_CODE (x) == STRICT_LOW_PART 6217 || GET_RTX_CLASS (GET_CODE (x)) == 'a') 6218 x = XEXP (x, 0); 6219 6220 /* If either argument is a constant, then modifying X can not affect IN. */ 6221 if (CONSTANT_P (x) || CONSTANT_P (in)) 6222 return 0; 6223 else if (GET_CODE (x) == SUBREG) 6224 { 6225 regno = REGNO (SUBREG_REG (x)); 6226 if (regno < FIRST_PSEUDO_REGISTER) 6227 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)), 6228 GET_MODE (SUBREG_REG (x)), 6229 SUBREG_BYTE (x), 6230 GET_MODE (x)); 6231 } 6232 else if (GET_CODE (x) == REG) 6233 { 6234 regno = REGNO (x); 6235 6236 /* If this is a pseudo, it must not have been assigned a hard register. 6237 Therefore, it must either be in memory or be a constant. */ 6238 6239 if (regno >= FIRST_PSEUDO_REGISTER) 6240 { 6241 if (reg_equiv_memory_loc[regno]) 6242 return refers_to_mem_for_reload_p (in); 6243 else if (reg_equiv_constant[regno]) 6244 return 0; 6245 abort (); 6246 } 6247 } 6248 else if (GET_CODE (x) == MEM) 6249 return refers_to_mem_for_reload_p (in); 6250 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6251 || GET_CODE (x) == CC0) 6252 return reg_mentioned_p (x, in); 6253 else if (GET_CODE (x) == PLUS) 6254 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in) 6255 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in)); 6256 else 6257 abort (); 6258 6259 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6260 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6261 6262 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0); 6263} 6264 6265/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6266 registers. */ 6267 6268int 6269refers_to_mem_for_reload_p (x) 6270 rtx x; 6271{ 6272 const char *fmt; 6273 int i; 6274 6275 if (GET_CODE (x) == MEM) 6276 return 1; 6277 6278 if (GET_CODE (x) == REG) 6279 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6280 && reg_equiv_memory_loc[REGNO (x)]); 6281 6282 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6283 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6284 if (fmt[i] == 'e' 6285 && (GET_CODE (XEXP (x, i)) == MEM 6286 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6287 return 1; 6288 6289 return 0; 6290} 6291 6292/* Check the insns before INSN to see if there is a suitable register 6293 containing the same value as GOAL. 6294 If OTHER is -1, look for a register in class CLASS. 6295 Otherwise, just see if register number OTHER shares GOAL's value. 6296 6297 Return an rtx for the register found, or zero if none is found. 6298 6299 If RELOAD_REG_P is (short *)1, 6300 we reject any hard reg that appears in reload_reg_rtx 6301 because such a hard reg is also needed coming into this insn. 6302 6303 If RELOAD_REG_P is any other nonzero value, 6304 it is a vector indexed by hard reg number 6305 and we reject any hard reg whose element in the vector is nonnegative 6306 as well as any that appears in reload_reg_rtx. 6307 6308 If GOAL is zero, then GOALREG is a register number; we look 6309 for an equivalent for that register. 6310 6311 MODE is the machine mode of the value we want an equivalence for. 6312 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6313 6314 This function is used by jump.c as well as in the reload pass. 6315 6316 If GOAL is the sum of the stack pointer and a constant, we treat it 6317 as if it were a constant except that sp is required to be unchanging. */ 6318 6319rtx 6320find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6321 rtx goal; 6322 rtx insn; 6323 enum reg_class class; 6324 int other; 6325 short *reload_reg_p; 6326 int goalreg; 6327 enum machine_mode mode; 6328{ 6329 rtx p = insn; 6330 rtx goaltry, valtry, value, where; 6331 rtx pat; 6332 int regno = -1; 6333 int valueno; 6334 int goal_mem = 0; 6335 int goal_const = 0; 6336 int goal_mem_addr_varies = 0; 6337 int need_stable_sp = 0; 6338 int nregs; 6339 int valuenregs; 6340 6341 if (goal == 0) 6342 regno = goalreg; 6343 else if (GET_CODE (goal) == REG) 6344 regno = REGNO (goal); 6345 else if (GET_CODE (goal) == MEM) 6346 { 6347 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6348 if (MEM_VOLATILE_P (goal)) 6349 return 0; 6350 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6351 return 0; 6352 /* An address with side effects must be reexecuted. */ 6353 switch (code) 6354 { 6355 case POST_INC: 6356 case PRE_INC: 6357 case POST_DEC: 6358 case PRE_DEC: 6359 case POST_MODIFY: 6360 case PRE_MODIFY: 6361 return 0; 6362 default: 6363 break; 6364 } 6365 goal_mem = 1; 6366 } 6367 else if (CONSTANT_P (goal)) 6368 goal_const = 1; 6369 else if (GET_CODE (goal) == PLUS 6370 && XEXP (goal, 0) == stack_pointer_rtx 6371 && CONSTANT_P (XEXP (goal, 1))) 6372 goal_const = need_stable_sp = 1; 6373 else if (GET_CODE (goal) == PLUS 6374 && XEXP (goal, 0) == frame_pointer_rtx 6375 && CONSTANT_P (XEXP (goal, 1))) 6376 goal_const = 1; 6377 else 6378 return 0; 6379 6380 /* Scan insns back from INSN, looking for one that copies 6381 a value into or out of GOAL. 6382 Stop and give up if we reach a label. */ 6383 6384 while (1) 6385 { 6386 p = PREV_INSN (p); 6387 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6388 return 0; 6389 6390 if (GET_CODE (p) == INSN 6391 /* If we don't want spill regs ... */ 6392 && (! (reload_reg_p != 0 6393 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6394 /* ... then ignore insns introduced by reload; they aren't 6395 useful and can cause results in reload_as_needed to be 6396 different from what they were when calculating the need for 6397 spills. If we notice an input-reload insn here, we will 6398 reject it below, but it might hide a usable equivalent. 6399 That makes bad code. It may even abort: perhaps no reg was 6400 spilled for this insn because it was assumed we would find 6401 that equivalent. */ 6402 || INSN_UID (p) < reload_first_uid)) 6403 { 6404 rtx tem; 6405 pat = single_set (p); 6406 6407 /* First check for something that sets some reg equal to GOAL. */ 6408 if (pat != 0 6409 && ((regno >= 0 6410 && true_regnum (SET_SRC (pat)) == regno 6411 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6412 || 6413 (regno >= 0 6414 && true_regnum (SET_DEST (pat)) == regno 6415 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6416 || 6417 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6418 /* When looking for stack pointer + const, 6419 make sure we don't use a stack adjust. */ 6420 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6421 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6422 || (goal_mem 6423 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6424 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6425 || (goal_mem 6426 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6427 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6428 /* If we are looking for a constant, 6429 and something equivalent to that constant was copied 6430 into a reg, we can use that reg. */ 6431 || (goal_const && REG_NOTES (p) != 0 6432 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX)) 6433 && ((rtx_equal_p (XEXP (tem, 0), goal) 6434 && (valueno 6435 = true_regnum (valtry = SET_DEST (pat))) >= 0) 6436 || (GET_CODE (SET_DEST (pat)) == REG 6437 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6438 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6439 == MODE_FLOAT) 6440 && GET_CODE (goal) == CONST_INT 6441 && 0 != (goaltry 6442 = operand_subword (XEXP (tem, 0), 0, 0, 6443 VOIDmode)) 6444 && rtx_equal_p (goal, goaltry) 6445 && (valtry 6446 = operand_subword (SET_DEST (pat), 0, 0, 6447 VOIDmode)) 6448 && (valueno = true_regnum (valtry)) >= 0))) 6449 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6450 NULL_RTX)) 6451 && GET_CODE (SET_DEST (pat)) == REG 6452 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6453 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6454 == MODE_FLOAT) 6455 && GET_CODE (goal) == CONST_INT 6456 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6457 VOIDmode)) 6458 && rtx_equal_p (goal, goaltry) 6459 && (valtry 6460 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6461 && (valueno = true_regnum (valtry)) >= 0))) 6462 { 6463 if (other >= 0) 6464 { 6465 if (valueno != other) 6466 continue; 6467 } 6468 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6469 continue; 6470 else 6471 { 6472 int i; 6473 6474 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6475 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6476 valueno + i)) 6477 break; 6478 if (i >= 0) 6479 continue; 6480 } 6481 value = valtry; 6482 where = p; 6483 break; 6484 } 6485 } 6486 } 6487 6488 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6489 (or copying VALUE into GOAL, if GOAL is also a register). 6490 Now verify that VALUE is really valid. */ 6491 6492 /* VALUENO is the register number of VALUE; a hard register. */ 6493 6494 /* Don't try to re-use something that is killed in this insn. We want 6495 to be able to trust REG_UNUSED notes. */ 6496 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value)) 6497 return 0; 6498 6499 /* If we propose to get the value from the stack pointer or if GOAL is 6500 a MEM based on the stack pointer, we need a stable SP. */ 6501 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6502 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6503 goal))) 6504 need_stable_sp = 1; 6505 6506 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6507 if (GET_MODE (value) != mode) 6508 return 0; 6509 6510 /* Reject VALUE if it was loaded from GOAL 6511 and is also a register that appears in the address of GOAL. */ 6512 6513 if (goal_mem && value == SET_DEST (single_set (where)) 6514 && refers_to_regno_for_reload_p (valueno, 6515 (valueno 6516 + HARD_REGNO_NREGS (valueno, mode)), 6517 goal, (rtx*) 0)) 6518 return 0; 6519 6520 /* Reject registers that overlap GOAL. */ 6521 6522 if (!goal_mem && !goal_const 6523 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno 6524 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode)) 6525 return 0; 6526 6527 nregs = HARD_REGNO_NREGS (regno, mode); 6528 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6529 6530 /* Reject VALUE if it is one of the regs reserved for reloads. 6531 Reload1 knows how to reuse them anyway, and it would get 6532 confused if we allocated one without its knowledge. 6533 (Now that insns introduced by reload are ignored above, 6534 this case shouldn't happen, but I'm not positive.) */ 6535 6536 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6537 { 6538 int i; 6539 for (i = 0; i < valuenregs; ++i) 6540 if (reload_reg_p[valueno + i] >= 0) 6541 return 0; 6542 } 6543 6544 /* Reject VALUE if it is a register being used for an input reload 6545 even if it is not one of those reserved. */ 6546 6547 if (reload_reg_p != 0) 6548 { 6549 int i; 6550 for (i = 0; i < n_reloads; i++) 6551 if (rld[i].reg_rtx != 0 && rld[i].in) 6552 { 6553 int regno1 = REGNO (rld[i].reg_rtx); 6554 int nregs1 = HARD_REGNO_NREGS (regno1, 6555 GET_MODE (rld[i].reg_rtx)); 6556 if (regno1 < valueno + valuenregs 6557 && regno1 + nregs1 > valueno) 6558 return 0; 6559 } 6560 } 6561 6562 if (goal_mem) 6563 /* We must treat frame pointer as varying here, 6564 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6565 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6566 6567 /* Now verify that the values of GOAL and VALUE remain unaltered 6568 until INSN is reached. */ 6569 6570 p = insn; 6571 while (1) 6572 { 6573 p = PREV_INSN (p); 6574 if (p == where) 6575 return value; 6576 6577 /* Don't trust the conversion past a function call 6578 if either of the two is in a call-clobbered register, or memory. */ 6579 if (GET_CODE (p) == CALL_INSN) 6580 { 6581 int i; 6582 6583 if (goal_mem || need_stable_sp) 6584 return 0; 6585 6586 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6587 for (i = 0; i < nregs; ++i) 6588 if (call_used_regs[regno + i]) 6589 return 0; 6590 6591 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6592 for (i = 0; i < valuenregs; ++i) 6593 if (call_used_regs[valueno + i]) 6594 return 0; 6595#ifdef NON_SAVING_SETJMP 6596 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL)) 6597 return 0; 6598#endif 6599 } 6600 6601 if (INSN_P (p)) 6602 { 6603 pat = PATTERN (p); 6604 6605 /* Watch out for unspec_volatile, and volatile asms. */ 6606 if (volatile_insn_p (pat)) 6607 return 0; 6608 6609 /* If this insn P stores in either GOAL or VALUE, return 0. 6610 If GOAL is a memory ref and this insn writes memory, return 0. 6611 If GOAL is a memory ref and its address is not constant, 6612 and this insn P changes a register used in GOAL, return 0. */ 6613 6614 if (GET_CODE (pat) == COND_EXEC) 6615 pat = COND_EXEC_CODE (pat); 6616 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6617 { 6618 rtx dest = SET_DEST (pat); 6619 while (GET_CODE (dest) == SUBREG 6620 || GET_CODE (dest) == ZERO_EXTRACT 6621 || GET_CODE (dest) == SIGN_EXTRACT 6622 || GET_CODE (dest) == STRICT_LOW_PART) 6623 dest = XEXP (dest, 0); 6624 if (GET_CODE (dest) == REG) 6625 { 6626 int xregno = REGNO (dest); 6627 int xnregs; 6628 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6629 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6630 else 6631 xnregs = 1; 6632 if (xregno < regno + nregs && xregno + xnregs > regno) 6633 return 0; 6634 if (xregno < valueno + valuenregs 6635 && xregno + xnregs > valueno) 6636 return 0; 6637 if (goal_mem_addr_varies 6638 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6639 return 0; 6640 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6641 return 0; 6642 } 6643 else if (goal_mem && GET_CODE (dest) == MEM 6644 && ! push_operand (dest, GET_MODE (dest))) 6645 return 0; 6646 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6647 && reg_equiv_memory_loc[regno] != 0) 6648 return 0; 6649 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6650 return 0; 6651 } 6652 else if (GET_CODE (pat) == PARALLEL) 6653 { 6654 int i; 6655 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6656 { 6657 rtx v1 = XVECEXP (pat, 0, i); 6658 if (GET_CODE (v1) == COND_EXEC) 6659 v1 = COND_EXEC_CODE (v1); 6660 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6661 { 6662 rtx dest = SET_DEST (v1); 6663 while (GET_CODE (dest) == SUBREG 6664 || GET_CODE (dest) == ZERO_EXTRACT 6665 || GET_CODE (dest) == SIGN_EXTRACT 6666 || GET_CODE (dest) == STRICT_LOW_PART) 6667 dest = XEXP (dest, 0); 6668 if (GET_CODE (dest) == REG) 6669 { 6670 int xregno = REGNO (dest); 6671 int xnregs; 6672 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6673 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6674 else 6675 xnregs = 1; 6676 if (xregno < regno + nregs 6677 && xregno + xnregs > regno) 6678 return 0; 6679 if (xregno < valueno + valuenregs 6680 && xregno + xnregs > valueno) 6681 return 0; 6682 if (goal_mem_addr_varies 6683 && reg_overlap_mentioned_for_reload_p (dest, 6684 goal)) 6685 return 0; 6686 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6687 return 0; 6688 } 6689 else if (goal_mem && GET_CODE (dest) == MEM 6690 && ! push_operand (dest, GET_MODE (dest))) 6691 return 0; 6692 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6693 && reg_equiv_memory_loc[regno] != 0) 6694 return 0; 6695 else if (need_stable_sp 6696 && push_operand (dest, GET_MODE (dest))) 6697 return 0; 6698 } 6699 } 6700 } 6701 6702 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6703 { 6704 rtx link; 6705 6706 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6707 link = XEXP (link, 1)) 6708 { 6709 pat = XEXP (link, 0); 6710 if (GET_CODE (pat) == CLOBBER) 6711 { 6712 rtx dest = SET_DEST (pat); 6713 6714 if (GET_CODE (dest) == REG) 6715 { 6716 int xregno = REGNO (dest); 6717 int xnregs 6718 = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6719 6720 if (xregno < regno + nregs 6721 && xregno + xnregs > regno) 6722 return 0; 6723 else if (xregno < valueno + valuenregs 6724 && xregno + xnregs > valueno) 6725 return 0; 6726 else if (goal_mem_addr_varies 6727 && reg_overlap_mentioned_for_reload_p (dest, 6728 goal)) 6729 return 0; 6730 } 6731 6732 else if (goal_mem && GET_CODE (dest) == MEM 6733 && ! push_operand (dest, GET_MODE (dest))) 6734 return 0; 6735 else if (need_stable_sp 6736 && push_operand (dest, GET_MODE (dest))) 6737 return 0; 6738 } 6739 } 6740 } 6741 6742#ifdef AUTO_INC_DEC 6743 /* If this insn auto-increments or auto-decrements 6744 either regno or valueno, return 0 now. 6745 If GOAL is a memory ref and its address is not constant, 6746 and this insn P increments a register used in GOAL, return 0. */ 6747 { 6748 rtx link; 6749 6750 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6751 if (REG_NOTE_KIND (link) == REG_INC 6752 && GET_CODE (XEXP (link, 0)) == REG) 6753 { 6754 int incno = REGNO (XEXP (link, 0)); 6755 if (incno < regno + nregs && incno >= regno) 6756 return 0; 6757 if (incno < valueno + valuenregs && incno >= valueno) 6758 return 0; 6759 if (goal_mem_addr_varies 6760 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6761 goal)) 6762 return 0; 6763 } 6764 } 6765#endif 6766 } 6767 } 6768} 6769 6770/* Find a place where INCED appears in an increment or decrement operator 6771 within X, and return the amount INCED is incremented or decremented by. 6772 The value is always positive. */ 6773 6774static int 6775find_inc_amount (x, inced) 6776 rtx x, inced; 6777{ 6778 enum rtx_code code = GET_CODE (x); 6779 const char *fmt; 6780 int i; 6781 6782 if (code == MEM) 6783 { 6784 rtx addr = XEXP (x, 0); 6785 if ((GET_CODE (addr) == PRE_DEC 6786 || GET_CODE (addr) == POST_DEC 6787 || GET_CODE (addr) == PRE_INC 6788 || GET_CODE (addr) == POST_INC) 6789 && XEXP (addr, 0) == inced) 6790 return GET_MODE_SIZE (GET_MODE (x)); 6791 else if ((GET_CODE (addr) == PRE_MODIFY 6792 || GET_CODE (addr) == POST_MODIFY) 6793 && GET_CODE (XEXP (addr, 1)) == PLUS 6794 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 6795 && XEXP (addr, 0) == inced 6796 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT) 6797 { 6798 i = INTVAL (XEXP (XEXP (addr, 1), 1)); 6799 return i < 0 ? -i : i; 6800 } 6801 } 6802 6803 fmt = GET_RTX_FORMAT (code); 6804 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6805 { 6806 if (fmt[i] == 'e') 6807 { 6808 int tem = find_inc_amount (XEXP (x, i), inced); 6809 if (tem != 0) 6810 return tem; 6811 } 6812 if (fmt[i] == 'E') 6813 { 6814 int j; 6815 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6816 { 6817 int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6818 if (tem != 0) 6819 return tem; 6820 } 6821 } 6822 } 6823 6824 return 0; 6825} 6826 6827/* Return 1 if register REGNO is the subject of a clobber in insn INSN. 6828 If SETS is nonzero, also consider SETs. */ 6829 6830int 6831regno_clobbered_p (regno, insn, mode, sets) 6832 unsigned int regno; 6833 rtx insn; 6834 enum machine_mode mode; 6835 int sets; 6836{ 6837 unsigned int nregs = HARD_REGNO_NREGS (regno, mode); 6838 unsigned int endregno = regno + nregs; 6839 6840 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6841 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6842 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6843 { 6844 unsigned int test = REGNO (XEXP (PATTERN (insn), 0)); 6845 6846 return test >= regno && test < endregno; 6847 } 6848 6849 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6850 { 6851 int i = XVECLEN (PATTERN (insn), 0) - 1; 6852 6853 for (; i >= 0; i--) 6854 { 6855 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6856 if ((GET_CODE (elt) == CLOBBER 6857 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6858 && GET_CODE (XEXP (elt, 0)) == REG) 6859 { 6860 unsigned int test = REGNO (XEXP (elt, 0)); 6861 6862 if (test >= regno && test < endregno) 6863 return 1; 6864 } 6865 } 6866 } 6867 6868 return 0; 6869} 6870 6871static const char *const reload_when_needed_name[] = 6872{ 6873 "RELOAD_FOR_INPUT", 6874 "RELOAD_FOR_OUTPUT", 6875 "RELOAD_FOR_INSN", 6876 "RELOAD_FOR_INPUT_ADDRESS", 6877 "RELOAD_FOR_INPADDR_ADDRESS", 6878 "RELOAD_FOR_OUTPUT_ADDRESS", 6879 "RELOAD_FOR_OUTADDR_ADDRESS", 6880 "RELOAD_FOR_OPERAND_ADDRESS", 6881 "RELOAD_FOR_OPADDR_ADDR", 6882 "RELOAD_OTHER", 6883 "RELOAD_FOR_OTHER_ADDRESS" 6884}; 6885 6886static const char * const reg_class_names[] = REG_CLASS_NAMES; 6887 6888/* These functions are used to print the variables set by 'find_reloads' */ 6889 6890void 6891debug_reload_to_stream (f) 6892 FILE *f; 6893{ 6894 int r; 6895 const char *prefix; 6896 6897 if (! f) 6898 f = stderr; 6899 for (r = 0; r < n_reloads; r++) 6900 { 6901 fprintf (f, "Reload %d: ", r); 6902 6903 if (rld[r].in != 0) 6904 { 6905 fprintf (f, "reload_in (%s) = ", 6906 GET_MODE_NAME (rld[r].inmode)); 6907 print_inline_rtx (f, rld[r].in, 24); 6908 fprintf (f, "\n\t"); 6909 } 6910 6911 if (rld[r].out != 0) 6912 { 6913 fprintf (f, "reload_out (%s) = ", 6914 GET_MODE_NAME (rld[r].outmode)); 6915 print_inline_rtx (f, rld[r].out, 24); 6916 fprintf (f, "\n\t"); 6917 } 6918 6919 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]); 6920 6921 fprintf (f, "%s (opnum = %d)", 6922 reload_when_needed_name[(int) rld[r].when_needed], 6923 rld[r].opnum); 6924 6925 if (rld[r].optional) 6926 fprintf (f, ", optional"); 6927 6928 if (rld[r].nongroup) 6929 fprintf (f, ", nongroup"); 6930 6931 if (rld[r].inc != 0) 6932 fprintf (f, ", inc by %d", rld[r].inc); 6933 6934 if (rld[r].nocombine) 6935 fprintf (f, ", can't combine"); 6936 6937 if (rld[r].secondary_p) 6938 fprintf (f, ", secondary_reload_p"); 6939 6940 if (rld[r].in_reg != 0) 6941 { 6942 fprintf (f, "\n\treload_in_reg: "); 6943 print_inline_rtx (f, rld[r].in_reg, 24); 6944 } 6945 6946 if (rld[r].out_reg != 0) 6947 { 6948 fprintf (f, "\n\treload_out_reg: "); 6949 print_inline_rtx (f, rld[r].out_reg, 24); 6950 } 6951 6952 if (rld[r].reg_rtx != 0) 6953 { 6954 fprintf (f, "\n\treload_reg_rtx: "); 6955 print_inline_rtx (f, rld[r].reg_rtx, 24); 6956 } 6957 6958 prefix = "\n\t"; 6959 if (rld[r].secondary_in_reload != -1) 6960 { 6961 fprintf (f, "%ssecondary_in_reload = %d", 6962 prefix, rld[r].secondary_in_reload); 6963 prefix = ", "; 6964 } 6965 6966 if (rld[r].secondary_out_reload != -1) 6967 fprintf (f, "%ssecondary_out_reload = %d\n", 6968 prefix, rld[r].secondary_out_reload); 6969 6970 prefix = "\n\t"; 6971 if (rld[r].secondary_in_icode != CODE_FOR_nothing) 6972 { 6973 fprintf (f, "%ssecondary_in_icode = %s", prefix, 6974 insn_data[rld[r].secondary_in_icode].name); 6975 prefix = ", "; 6976 } 6977 6978 if (rld[r].secondary_out_icode != CODE_FOR_nothing) 6979 fprintf (f, "%ssecondary_out_icode = %s", prefix, 6980 insn_data[rld[r].secondary_out_icode].name); 6981 6982 fprintf (f, "\n"); 6983 } 6984} 6985 6986void 6987debug_reload () 6988{ 6989 debug_reload_to_stream (stderr); 6990} 6991