regs.h revision 225736
1/* Define per-register tables for data flow info and register allocation. 2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2003, 2004 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 2, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING. If not, write to the Free 19Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 2002110-1301, USA. */ 21 22#ifndef GCC_REGS_H 23#define GCC_REGS_H 24 25#include "varray.h" 26#include "obstack.h" 27#include "hard-reg-set.h" 28#include "basic-block.h" 29 30#define REG_BYTES(R) mode_size[(int) GET_MODE (R)] 31 32/* When you only have the mode of a pseudo register before it has a hard 33 register chosen for it, this reports the size of each hard register 34 a pseudo in such a mode would get allocated to. A target may 35 override this. */ 36 37#ifndef REGMODE_NATURAL_SIZE 38#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD 39#endif 40 41#ifndef SMALL_REGISTER_CLASSES 42#define SMALL_REGISTER_CLASSES 0 43#endif 44 45/* Maximum register number used in this function, plus one. */ 46 47extern int max_regno; 48 49/* Register information indexed by register number */ 50typedef struct reg_info_def 51{ /* fields set by reg_scan */ 52 int first_uid; /* UID of first insn to use (REG n) */ 53 int last_uid; /* UID of last insn to use (REG n) */ 54 55 /* fields set by reg_scan & flow_analysis */ 56 int sets; /* # of times (REG n) is set */ 57 58 /* fields set by flow_analysis */ 59 int refs; /* # of times (REG n) is used or set */ 60 int freq; /* # estimated frequency (REG n) is used or set */ 61 int deaths; /* # of times (REG n) dies */ 62 int live_length; /* # of instructions (REG n) is live */ 63 int calls_crossed; /* # of calls (REG n) is live across */ 64 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ 65 int basic_block; /* # of basic blocks (REG n) is used in */ 66} reg_info; 67 68typedef reg_info *reg_info_p; 69 70DEF_VEC_P(reg_info_p); 71DEF_VEC_ALLOC_P(reg_info_p,heap); 72 73extern VEC(reg_info_p,heap) *reg_n_info; 74 75/* Indexed by n, gives number of times (REG n) is used or set. */ 76 77#define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs) 78 79/* Estimate frequency of references to register N. */ 80 81#define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq) 82 83/* The weights for each insn varries from 0 to REG_FREQ_BASE. 84 This constant does not need to be high, as in infrequently executed 85 regions we want to count instructions equivalently to optimize for 86 size instead of speed. */ 87#define REG_FREQ_MAX 1000 88 89/* Compute register frequency from the BB frequency. When optimizing for size, 90 or profile driven feedback is available and the function is never executed, 91 frequency is always equivalent. Otherwise rescale the basic block 92 frequency. */ 93#define REG_FREQ_FROM_BB(bb) (optimize_size \ 94 || (flag_branch_probabilities \ 95 && !ENTRY_BLOCK_PTR->count) \ 96 ? REG_FREQ_MAX \ 97 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 98 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 99 : 1) 100 101/* Indexed by n, gives number of times (REG n) is set. 102 ??? both regscan and flow allocate space for this. We should settle 103 on just copy. */ 104 105#define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets) 106 107/* Indexed by N, gives number of insns in which register N dies. 108 Note that if register N is live around loops, it can die 109 in transitions between basic blocks, and that is not counted here. 110 So this is only a reliable indicator of how many regions of life there are 111 for registers that are contained in one basic block. */ 112 113#define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths) 114 115/* Get the number of consecutive words required to hold pseudo-reg N. */ 116 117#define PSEUDO_REGNO_SIZE(N) \ 118 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ 119 / UNITS_PER_WORD) 120 121/* Get the number of bytes required to hold pseudo-reg N. */ 122 123#define PSEUDO_REGNO_BYTES(N) \ 124 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) 125 126/* Get the machine mode of pseudo-reg N. */ 127 128#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) 129 130/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ 131 132#define REG_N_CALLS_CROSSED(N) \ 133 (VEC_index (reg_info_p, reg_n_info, N)->calls_crossed) 134 135/* Indexed by N, gives number of CALL_INSNS that may throw, across which 136 (REG n) is live. */ 137 138#define REG_N_THROWING_CALLS_CROSSED(N) \ 139 (VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed) 140 141/* Total number of instructions at which (REG n) is live. 142 The larger this is, the less priority (REG n) gets for 143 allocation in a hard register (in global-alloc). 144 This is set in flow.c and remains valid for the rest of the compilation 145 of the function; it is used to control register allocation. 146 147 local-alloc.c may alter this number to change the priority. 148 149 Negative values are special. 150 -1 is used to mark a pseudo reg which has a constant or memory equivalent 151 and is used infrequently enough that it should not get a hard register. 152 -2 is used to mark a pseudo reg for a parameter, when a frame pointer 153 is not required. global.c makes an allocno for this but does 154 not try to assign a hard register to it. */ 155 156#define REG_LIVE_LENGTH(N) \ 157 (VEC_index (reg_info_p, reg_n_info, N)->live_length) 158 159/* Vector of substitutions of register numbers, 160 used to map pseudo regs into hardware regs. 161 162 This can't be folded into reg_n_info without changing all of the 163 machine dependent directories, since the reload functions 164 in the machine dependent files access it. */ 165 166extern short *reg_renumber; 167 168/* Vector indexed by hardware reg saying whether that reg is ever used. */ 169 170extern char regs_ever_live[FIRST_PSEUDO_REGISTER]; 171 172/* Like regs_ever_live, but saying whether reg is set by asm statements. */ 173 174extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER]; 175 176/* Vector indexed by machine mode saying whether there are regs of that mode. */ 177 178extern bool have_regs_of_mode [MAX_MACHINE_MODE]; 179 180/* For each hard register, the widest mode object that it can contain. 181 This will be a MODE_INT mode if the register can hold integers. Otherwise 182 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the 183 register. */ 184 185extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; 186 187/* Vector indexed by regno; gives uid of first insn using that reg. 188 This is computed by reg_scan for use by cse and loop. 189 It is sometimes adjusted for subsequent changes during loop, 190 but not adjusted by cse even if cse invalidates it. */ 191 192#define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid) 193 194/* Vector indexed by regno; gives uid of last insn using that reg. 195 This is computed by reg_scan for use by cse and loop. 196 It is sometimes adjusted for subsequent changes during loop, 197 but not adjusted by cse even if cse invalidates it. 198 This is harmless since cse won't scan through a loop end. */ 199 200#define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid) 201 202/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers 203 that have to go in the same hard reg. */ 204extern rtx regs_may_share; 205 206/* Flag set by local-alloc or global-alloc if they decide to allocate 207 something in a call-clobbered register. */ 208 209extern int caller_save_needed; 210 211/* Predicate to decide whether to give a hard reg to a pseudo which 212 is referenced REFS times and would need to be saved and restored 213 around a call CALLS times. */ 214 215#ifndef CALLER_SAVE_PROFITABLE 216#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) 217#endif 218 219/* On most machines a register class is likely to be spilled if it 220 only has one register. */ 221#ifndef CLASS_LIKELY_SPILLED_P 222#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1) 223#endif 224 225/* Select a register mode required for caller save of hard regno REGNO. */ 226#ifndef HARD_REGNO_CALLER_SAVE_MODE 227#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 228 choose_hard_reg_mode (REGNO, NREGS, false) 229#endif 230 231/* Registers that get partially clobbered by a call in a given mode. 232 These must not be call used registers. */ 233#ifndef HARD_REGNO_CALL_PART_CLOBBERED 234#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 235#endif 236 237/* Allocate reg_n_info tables */ 238extern void allocate_reg_info (size_t, int, int); 239 240/* Specify number of hard registers given machine mode occupy. */ 241extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 242 243#endif /* GCC_REGS_H */ 244