regmove.c revision 50397
1/* Move registers around to reduce number of move instructions needed. 2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19 20 21/* This module looks for cases where matching constraints would force 22 an instruction to need a reload, and this reload would be a register 23 to register move. It then attempts to change the registers used by the 24 instruction to avoid the move instruction. */ 25 26#include "config.h" 27#ifdef __STDC__ 28#include <stdarg.h> 29#else 30#include <varargs.h> 31#endif 32 33/* stdio.h must precede rtl.h for FFS. */ 34#include "system.h" 35 36#include "rtl.h" 37#include "insn-config.h" 38#include "recog.h" 39#include "output.h" 40#include "reload.h" 41#include "regs.h" 42#include "hard-reg-set.h" 43#include "flags.h" 44#include "expr.h" 45#include "insn-flags.h" 46#include "basic-block.h" 47#include "toplev.h" 48 49static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx)); 50static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx)); 51static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx)); 52static rtx gen_add3_insn PROTO((rtx, rtx, rtx)); 53static void copy_src_to_dest PROTO((rtx, rtx, rtx, int)); 54static int *regmove_bb_head; 55 56struct match { 57 int with[MAX_RECOG_OPERANDS]; 58 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS]; 59 int commutative[MAX_RECOG_OPERANDS]; 60 int early_clobber[MAX_RECOG_OPERANDS]; 61}; 62 63#ifdef AUTO_INC_DEC 64static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int)); 65#endif 66static int find_matches PROTO((rtx, struct match *)); 67static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *)) 68; 69static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx)); 70static int stable_but_for_p PROTO((rtx, rtx, rtx)); 71static int loop_depth; 72 73/* Generate and return an insn body to add r1 and c, 74 storing the result in r0. */ 75static rtx 76gen_add3_insn (r0, r1, c) 77 rtx r0, r1, c; 78{ 79 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code; 80 81 if (icode == CODE_FOR_nothing 82 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0]) 83 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1]) 84 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2])) 85 return NULL_RTX; 86 87 return (GEN_FCN (icode) (r0, r1, c)); 88} 89 90#ifdef AUTO_INC_DEC 91 92/* INC_INSN is an instruction that adds INCREMENT to REG. 93 Try to fold INC_INSN as a post/pre in/decrement into INSN. 94 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src. 95 Return nonzero for success. */ 96static int 97try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) 98 rtx reg, insn, inc_insn ,inc_insn_set; 99 HOST_WIDE_INT increment; 100 int pre; 101{ 102 enum rtx_code inc_code; 103 104 rtx pset = single_set (insn); 105 if (pset) 106 { 107 /* Can't use the size of SET_SRC, we might have something like 108 (sign_extend:SI (mem:QI ... */ 109 rtx use = find_use_as_address (pset, reg, 0); 110 if (use != 0 && use != (rtx) 1) 111 { 112 int size = GET_MODE_SIZE (GET_MODE (use)); 113 if (0 114#ifdef HAVE_POST_INCREMENT 115 || (pre == 0 && (inc_code = POST_INC, increment == size)) 116#endif 117#ifdef HAVE_PRE_INCREMENT 118 || (pre == 1 && (inc_code = PRE_INC, increment == size)) 119#endif 120#ifdef HAVE_POST_DECREMENT 121 || (pre == 0 && (inc_code = POST_DEC, increment == -size)) 122#endif 123#ifdef HAVE_PRE_DECREMENT 124 || (pre == 1 && (inc_code = PRE_DEC, increment == -size)) 125#endif 126 ) 127 { 128 if (inc_insn_set) 129 validate_change 130 (inc_insn, 131 &SET_SRC (inc_insn_set), 132 XEXP (SET_SRC (inc_insn_set), 0), 1); 133 validate_change (insn, &XEXP (use, 0), 134 gen_rtx_fmt_e (inc_code, Pmode, reg), 1); 135 if (apply_change_group ()) 136 { 137 REG_NOTES (insn) 138 = gen_rtx_EXPR_LIST (REG_INC, 139 reg, REG_NOTES (insn)); 140 if (! inc_insn_set) 141 { 142 PUT_CODE (inc_insn, NOTE); 143 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED; 144 NOTE_SOURCE_FILE (inc_insn) = 0; 145 } 146 return 1; 147 } 148 } 149 } 150 } 151 return 0; 152} 153#endif /* AUTO_INC_DEC */ 154 155static int *regno_src_regno; 156 157/* Indicate how good a choice REG (which appears as a source) is to replace 158 a destination register with. The higher the returned value, the better 159 the choice. The main objective is to avoid using a register that is 160 a candidate for tying to a hard register, since the output might in 161 turn be a candidate to be tied to a different hard register. */ 162int 163replacement_quality(reg) 164 rtx reg; 165{ 166 int src_regno; 167 168 /* Bad if this isn't a register at all. */ 169 if (GET_CODE (reg) != REG) 170 return 0; 171 172 /* If this register is not meant to get a hard register, 173 it is a poor choice. */ 174 if (REG_LIVE_LENGTH (REGNO (reg)) < 0) 175 return 0; 176 177 src_regno = regno_src_regno[REGNO (reg)]; 178 179 /* If it was not copied from another register, it is fine. */ 180 if (src_regno < 0) 181 return 3; 182 183 /* Copied from a hard register? */ 184 if (src_regno < FIRST_PSEUDO_REGISTER) 185 return 1; 186 187 /* Copied from a pseudo register - not as bad as from a hard register, 188 yet still cumbersome, since the register live length will be lengthened 189 when the registers get tied. */ 190 return 2; 191} 192 193/* INSN is a copy from SRC to DEST, both registers, and SRC does not die 194 in INSN. 195 196 Search forward to see if SRC dies before either it or DEST is modified, 197 but don't scan past the end of a basic block. If so, we can replace SRC 198 with DEST and let SRC die in INSN. 199 200 This will reduce the number of registers live in that range and may enable 201 DEST to be tied to SRC, thus often saving one register in addition to a 202 register-register copy. */ 203 204static int 205optimize_reg_copy_1 (insn, dest, src) 206 rtx insn; 207 rtx dest; 208 rtx src; 209{ 210 rtx p, q; 211 rtx note; 212 rtx dest_death = 0; 213 int sregno = REGNO (src); 214 int dregno = REGNO (dest); 215 216 /* We don't want to mess with hard regs if register classes are small. */ 217 if (sregno == dregno 218 || (SMALL_REGISTER_CLASSES 219 && (sregno < FIRST_PSEUDO_REGISTER 220 || dregno < FIRST_PSEUDO_REGISTER)) 221 /* We don't see all updates to SP if they are in an auto-inc memory 222 reference, so we must disallow this optimization on them. */ 223 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM) 224 return 0; 225 226 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 227 { 228 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 229 || (GET_CODE (p) == NOTE 230 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 231 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 232 break; 233 234 /* ??? We can't scan past the end of a basic block without updating 235 the register lifetime info (REG_DEAD/basic_block_live_at_start). 236 A CALL_INSN might be the last insn of a basic block, if it is inside 237 an EH region. There is no easy way to tell, so we just always break 238 when we see a CALL_INSN if flag_exceptions is nonzero. */ 239 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 240 break; 241 242 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 243 continue; 244 245 if (reg_set_p (src, p) || reg_set_p (dest, p) 246 /* Don't change a USE of a register. */ 247 || (GET_CODE (PATTERN (p)) == USE 248 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) 249 break; 250 251 /* See if all of SRC dies in P. This test is slightly more 252 conservative than it needs to be. */ 253 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0 254 && GET_MODE (XEXP (note, 0)) == GET_MODE (src)) 255 { 256 int failed = 0; 257 int d_length = 0; 258 int s_length = 0; 259 int d_n_calls = 0; 260 int s_n_calls = 0; 261 262 /* We can do the optimization. Scan forward from INSN again, 263 replacing regs as we go. Set FAILED if a replacement can't 264 be done. In that case, we can't move the death note for SRC. 265 This should be rare. */ 266 267 /* Set to stop at next insn. */ 268 for (q = next_real_insn (insn); 269 q != next_real_insn (p); 270 q = next_real_insn (q)) 271 { 272 if (reg_overlap_mentioned_p (src, PATTERN (q))) 273 { 274 /* If SRC is a hard register, we might miss some 275 overlapping registers with validate_replace_rtx, 276 so we would have to undo it. We can't if DEST is 277 present in the insn, so fail in that combination 278 of cases. */ 279 if (sregno < FIRST_PSEUDO_REGISTER 280 && reg_mentioned_p (dest, PATTERN (q))) 281 failed = 1; 282 283 /* Replace all uses and make sure that the register 284 isn't still present. */ 285 else if (validate_replace_rtx (src, dest, q) 286 && (sregno >= FIRST_PSEUDO_REGISTER 287 || ! reg_overlap_mentioned_p (src, 288 PATTERN (q)))) 289 { 290 /* We assume that a register is used exactly once per 291 insn in the REG_N_REFS updates below. If this is not 292 correct, no great harm is done. 293 294 Since we do not know if we will change the lifetime of 295 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH 296 or REG_N_CALLS_CROSSED at this time. */ 297 if (sregno >= FIRST_PSEUDO_REGISTER) 298 REG_N_REFS (sregno) -= loop_depth; 299 300 if (dregno >= FIRST_PSEUDO_REGISTER) 301 REG_N_REFS (dregno) += loop_depth; 302 } 303 else 304 { 305 validate_replace_rtx (dest, src, q); 306 failed = 1; 307 } 308 } 309 310 /* For SREGNO, count the total number of insns scanned. 311 For DREGNO, count the total number of insns scanned after 312 passing the death note for DREGNO. */ 313 s_length++; 314 if (dest_death) 315 d_length++; 316 317 /* If the insn in which SRC dies is a CALL_INSN, don't count it 318 as a call that has been crossed. Otherwise, count it. */ 319 if (q != p && GET_CODE (q) == CALL_INSN) 320 { 321 /* Similarly, total calls for SREGNO, total calls beyond 322 the death note for DREGNO. */ 323 s_n_calls++; 324 if (dest_death) 325 d_n_calls++; 326 } 327 328 /* If DEST dies here, remove the death note and save it for 329 later. Make sure ALL of DEST dies here; again, this is 330 overly conservative. */ 331 if (dest_death == 0 332 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0) 333 { 334 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest)) 335 failed = 1, dest_death = 0; 336 else 337 remove_note (q, dest_death); 338 } 339 } 340 341 if (! failed) 342 { 343 /* These counters need to be updated if and only if we are 344 going to move the REG_DEAD note. */ 345 if (sregno >= FIRST_PSEUDO_REGISTER) 346 { 347 if (REG_LIVE_LENGTH (sregno) >= 0) 348 { 349 REG_LIVE_LENGTH (sregno) -= s_length; 350 /* REG_LIVE_LENGTH is only an approximation after 351 combine if sched is not run, so make sure that we 352 still have a reasonable value. */ 353 if (REG_LIVE_LENGTH (sregno) < 2) 354 REG_LIVE_LENGTH (sregno) = 2; 355 } 356 357 REG_N_CALLS_CROSSED (sregno) -= s_n_calls; 358 } 359 360 /* Move death note of SRC from P to INSN. */ 361 remove_note (p, note); 362 XEXP (note, 1) = REG_NOTES (insn); 363 REG_NOTES (insn) = note; 364 } 365 366 /* Put death note of DEST on P if we saw it die. */ 367 if (dest_death) 368 { 369 XEXP (dest_death, 1) = REG_NOTES (p); 370 REG_NOTES (p) = dest_death; 371 372 if (dregno >= FIRST_PSEUDO_REGISTER) 373 { 374 /* If and only if we are moving the death note for DREGNO, 375 then we need to update its counters. */ 376 if (REG_LIVE_LENGTH (dregno) >= 0) 377 REG_LIVE_LENGTH (dregno) += d_length; 378 REG_N_CALLS_CROSSED (dregno) += d_n_calls; 379 } 380 } 381 382 return ! failed; 383 } 384 385 /* If SRC is a hard register which is set or killed in some other 386 way, we can't do this optimization. */ 387 else if (sregno < FIRST_PSEUDO_REGISTER 388 && dead_or_set_p (p, src)) 389 break; 390 } 391 return 0; 392} 393 394/* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have 395 a sequence of insns that modify DEST followed by an insn that sets 396 SRC to DEST in which DEST dies, with no prior modification of DEST. 397 (There is no need to check if the insns in between actually modify 398 DEST. We should not have cases where DEST is not modified, but 399 the optimization is safe if no such modification is detected.) 400 In that case, we can replace all uses of DEST, starting with INSN and 401 ending with the set of SRC to DEST, with SRC. We do not do this 402 optimization if a CALL_INSN is crossed unless SRC already crosses a 403 call or if DEST dies before the copy back to SRC. 404 405 It is assumed that DEST and SRC are pseudos; it is too complicated to do 406 this for hard registers since the substitutions we may make might fail. */ 407 408static void 409optimize_reg_copy_2 (insn, dest, src) 410 rtx insn; 411 rtx dest; 412 rtx src; 413{ 414 rtx p, q; 415 rtx set; 416 int sregno = REGNO (src); 417 int dregno = REGNO (dest); 418 419 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 420 { 421 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 422 || (GET_CODE (p) == NOTE 423 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 424 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 425 break; 426 427 /* ??? We can't scan past the end of a basic block without updating 428 the register lifetime info (REG_DEAD/basic_block_live_at_start). 429 A CALL_INSN might be the last insn of a basic block, if it is inside 430 an EH region. There is no easy way to tell, so we just always break 431 when we see a CALL_INSN if flag_exceptions is nonzero. */ 432 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 433 break; 434 435 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 436 continue; 437 438 set = single_set (p); 439 if (set && SET_SRC (set) == dest && SET_DEST (set) == src 440 && find_reg_note (p, REG_DEAD, dest)) 441 { 442 /* We can do the optimization. Scan forward from INSN again, 443 replacing regs as we go. */ 444 445 /* Set to stop at next insn. */ 446 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q)) 447 if (GET_RTX_CLASS (GET_CODE (q)) == 'i') 448 { 449 if (reg_mentioned_p (dest, PATTERN (q))) 450 { 451 PATTERN (q) = replace_rtx (PATTERN (q), dest, src); 452 453 /* We assume that a register is used exactly once per 454 insn in the updates below. If this is not correct, 455 no great harm is done. */ 456 REG_N_REFS (dregno) -= loop_depth; 457 REG_N_REFS (sregno) += loop_depth; 458 } 459 460 461 if (GET_CODE (q) == CALL_INSN) 462 { 463 REG_N_CALLS_CROSSED (dregno)--; 464 REG_N_CALLS_CROSSED (sregno)++; 465 } 466 } 467 468 remove_note (p, find_reg_note (p, REG_DEAD, dest)); 469 REG_N_DEATHS (dregno)--; 470 remove_note (insn, find_reg_note (insn, REG_DEAD, src)); 471 REG_N_DEATHS (sregno)--; 472 return; 473 } 474 475 if (reg_set_p (src, p) 476 || find_reg_note (p, REG_DEAD, dest) 477 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0)) 478 break; 479 } 480} 481/* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST. 482 Look if SRC dies there, and if it is only set once, by loading 483 it from memory. If so, try to encorporate the zero/sign extension 484 into the memory read, change SRC to the mode of DEST, and alter 485 the remaining accesses to use the appropriate SUBREG. This allows 486 SRC and DEST to be tied later. */ 487static void 488optimize_reg_copy_3 (insn, dest, src) 489 rtx insn; 490 rtx dest; 491 rtx src; 492{ 493 rtx src_reg = XEXP (src, 0); 494 int src_no = REGNO (src_reg); 495 int dst_no = REGNO (dest); 496 rtx p, set, subreg; 497 enum machine_mode old_mode; 498 499 /* This code has been disabled on the egcs-1.1 release branch due to 500 a potentially serious bug. 501 502 In a nutshell, if we perform a series of substitutions, then have a 503 later substitution fail we will not be able to undo the previous 504 substitutions, leaving bogus RTL. 505 506 A fix for this can be found in the mainline sources, but it did not 507 seem worth the trouble and potential problems to migrate the real 508 fix to the egcs-1.1 branch. */ 509 return; 510 511 if (src_no < FIRST_PSEUDO_REGISTER 512 || dst_no < FIRST_PSEUDO_REGISTER 513 || ! find_reg_note (insn, REG_DEAD, src_reg) 514 || REG_N_SETS (src_no) != 1) 515 return; 516 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p)) 517 { 518 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 519 || (GET_CODE (p) == NOTE 520 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 521 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 522 return; 523 524 /* ??? We can't scan past the end of a basic block without updating 525 the register lifetime info (REG_DEAD/basic_block_live_at_start). 526 A CALL_INSN might be the last insn of a basic block, if it is inside 527 an EH region. There is no easy way to tell, so we just always break 528 when we see a CALL_INSN if flag_exceptions is nonzero. */ 529 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 530 return; 531 532 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 533 continue; 534 } 535 if (! (set = single_set (p)) 536 || GET_CODE (SET_SRC (set)) != MEM 537 || SET_DEST (set) != src_reg) 538 return; 539 old_mode = GET_MODE (src_reg); 540 PUT_MODE (src_reg, GET_MODE (src)); 541 XEXP (src, 0) = SET_SRC (set); 542 if (! validate_change (p, &SET_SRC (set), src, 0)) 543 { 544 PUT_MODE (src_reg, old_mode); 545 XEXP (src, 0) = src_reg; 546 return; 547 } 548 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0); 549 while (p = NEXT_INSN (p), p != insn) 550 { 551 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 552 continue; 553 validate_replace_rtx (src_reg, subreg, p); 554 } 555 validate_replace_rtx (src, src_reg, insn); 556} 557 558 559/* If we were not able to update the users of src to use dest directly, try 560 instead moving the value to dest directly before the operation. */ 561 562static void 563copy_src_to_dest (insn, src, dest, loop_depth) 564 rtx insn; 565 rtx src; 566 rtx dest; 567 int loop_depth; 568{ 569 rtx seq; 570 rtx link; 571 rtx next; 572 rtx set; 573 rtx move_insn; 574 rtx *p_insn_notes; 575 rtx *p_move_notes; 576 int src_regno; 577 int dest_regno; 578 int bb; 579 int insn_uid; 580 int move_uid; 581 582 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant 583 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is 584 parameter when there is no frame pointer that is not allocated a register. 585 For now, we just reject them, rather than incrementing the live length. */ 586 587 if (GET_CODE (src) == REG 588 && REG_LIVE_LENGTH (REGNO (src)) > 0 589 && GET_CODE (dest) == REG 590 && REG_LIVE_LENGTH (REGNO (dest)) > 0 591 && (set = single_set (insn)) != NULL_RTX 592 && !reg_mentioned_p (dest, SET_SRC (set)) 593 && validate_replace_rtx (src, dest, insn)) 594 { 595 /* Generate the src->dest move. */ 596 start_sequence (); 597 emit_move_insn (dest, src); 598 seq = gen_sequence (); 599 end_sequence (); 600 emit_insn_before (seq, insn); 601 move_insn = PREV_INSN (insn); 602 p_move_notes = ®_NOTES (move_insn); 603 p_insn_notes = ®_NOTES (insn); 604 605 /* Move any notes mentioning src to the move instruction */ 606 for (link = REG_NOTES (insn); link != NULL_RTX; link = next) 607 { 608 next = XEXP (link, 1); 609 if (XEXP (link, 0) == src) 610 { 611 *p_move_notes = link; 612 p_move_notes = &XEXP (link, 1); 613 } 614 else 615 { 616 *p_insn_notes = link; 617 p_insn_notes = &XEXP (link, 1); 618 } 619 } 620 621 *p_move_notes = NULL_RTX; 622 *p_insn_notes = NULL_RTX; 623 624 /* Is the insn the head of a basic block? If so extend it */ 625 insn_uid = INSN_UID (insn); 626 move_uid = INSN_UID (move_insn); 627 bb = regmove_bb_head[insn_uid]; 628 if (bb >= 0) 629 { 630 basic_block_head[bb] = move_insn; 631 regmove_bb_head[insn_uid] = -1; 632 } 633 634 /* Update the various register tables. */ 635 dest_regno = REGNO (dest); 636 REG_N_SETS (dest_regno) += loop_depth; 637 REG_N_REFS (dest_regno) += loop_depth; 638 REG_LIVE_LENGTH (dest_regno)++; 639 if (REGNO_FIRST_UID (dest_regno) == insn_uid) 640 REGNO_FIRST_UID (dest_regno) = move_uid; 641 642 src_regno = REGNO (src); 643 if (! find_reg_note (move_insn, REG_DEAD, src)) 644 REG_LIVE_LENGTH (src_regno)++; 645 646 if (REGNO_FIRST_UID (src_regno) == insn_uid) 647 REGNO_FIRST_UID (src_regno) = move_uid; 648 649 if (REGNO_LAST_UID (src_regno) == insn_uid) 650 REGNO_LAST_UID (src_regno) = move_uid; 651 652 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid) 653 REGNO_LAST_NOTE_UID (src_regno) = move_uid; 654 } 655} 656 657 658/* Return whether REG is set in only one location, and is set to a 659 constant, but is set in a different basic block from INSN (an 660 instructions which uses REG). In this case REG is equivalent to a 661 constant, and we don't want to break that equivalence, because that 662 may increase register pressure and make reload harder. If REG is 663 set in the same basic block as INSN, we don't worry about it, 664 because we'll probably need a register anyhow (??? but what if REG 665 is used in a different basic block as well as this one?). FIRST is 666 the first insn in the function. */ 667 668static int 669reg_is_remote_constant_p (reg, insn, first) 670 rtx reg; 671 rtx insn; 672 rtx first; 673{ 674 register rtx p; 675 676 if (REG_N_SETS (REGNO (reg)) != 1) 677 return 0; 678 679 /* Look for the set. */ 680 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1)) 681 { 682 rtx s; 683 684 if (REG_NOTE_KIND (p) != 0) 685 continue; 686 s = single_set (XEXP (p, 0)); 687 if (s != 0 688 && GET_CODE (SET_DEST (s)) == REG 689 && REGNO (SET_DEST (s)) == REGNO (reg)) 690 { 691 /* The register is set in the same basic block. */ 692 return 0; 693 } 694 } 695 696 for (p = first; p && p != insn; p = NEXT_INSN (p)) 697 { 698 rtx s; 699 700 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 701 continue; 702 s = single_set (p); 703 if (s != 0 704 && GET_CODE (SET_DEST (s)) == REG 705 && REGNO (SET_DEST (s)) == REGNO (reg)) 706 { 707 /* This is the instruction which sets REG. If there is a 708 REG_EQUAL note, then REG is equivalent to a constant. */ 709 if (find_reg_note (p, REG_EQUAL, NULL_RTX)) 710 return 1; 711 return 0; 712 } 713 } 714 715 return 0; 716} 717 718/* INSN is adding a CONST_INT to a REG. We search backwards looking for 719 another add immediate instruction with the same source and dest registers, 720 and if we find one, we change INSN to an increment, and return 1. If 721 no changes are made, we return 0. 722 723 This changes 724 (set (reg100) (plus reg1 offset1)) 725 ... 726 (set (reg100) (plus reg1 offset2)) 727 to 728 (set (reg100) (plus reg1 offset1)) 729 ... 730 (set (reg100) (plus reg100 offset2-offset1)) */ 731 732/* ??? What does this comment mean? */ 733/* cse disrupts preincrement / postdecrement squences when it finds a 734 hard register as ultimate source, like the frame pointer. */ 735 736int 737fixup_match_2 (insn, dst, src, offset, regmove_dump_file) 738 rtx insn, dst, src, offset; 739 FILE *regmove_dump_file; 740{ 741 rtx p, dst_death = 0; 742 int length, num_calls = 0; 743 744 /* If SRC dies in INSN, we'd have to move the death note. This is 745 considered to be very unlikely, so we just skip the optimization 746 in this case. */ 747 if (find_regno_note (insn, REG_DEAD, REGNO (src))) 748 return 0; 749 750 /* Scan backward to find the first instruction that sets DST. */ 751 752 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) 753 { 754 rtx pset; 755 756 if (GET_CODE (p) == CODE_LABEL 757 || GET_CODE (p) == JUMP_INSN 758 || (GET_CODE (p) == NOTE 759 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 760 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 761 break; 762 763 /* ??? We can't scan past the end of a basic block without updating 764 the register lifetime info (REG_DEAD/basic_block_live_at_start). 765 A CALL_INSN might be the last insn of a basic block, if it is inside 766 an EH region. There is no easy way to tell, so we just always break 767 when we see a CALL_INSN if flag_exceptions is nonzero. */ 768 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 769 break; 770 771 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 772 continue; 773 774 if (find_regno_note (p, REG_DEAD, REGNO (dst))) 775 dst_death = p; 776 if (! dst_death) 777 length++; 778 779 pset = single_set (p); 780 if (pset && SET_DEST (pset) == dst 781 && GET_CODE (SET_SRC (pset)) == PLUS 782 && XEXP (SET_SRC (pset), 0) == src 783 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT) 784 { 785 HOST_WIDE_INT newconst 786 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1)); 787 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst)); 788 789 if (add && validate_change (insn, &PATTERN (insn), add, 0)) 790 { 791 /* Remove the death note for DST from DST_DEATH. */ 792 if (dst_death) 793 { 794 remove_death (REGNO (dst), dst_death); 795 REG_LIVE_LENGTH (REGNO (dst)) += length; 796 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls; 797 } 798 799 REG_N_REFS (REGNO (dst)) += loop_depth; 800 REG_N_REFS (REGNO (src)) -= loop_depth; 801 802 if (regmove_dump_file) 803 fprintf (regmove_dump_file, 804 "Fixed operand of insn %d.\n", 805 INSN_UID (insn)); 806 807#ifdef AUTO_INC_DEC 808 for (p = PREV_INSN (insn); p; p = PREV_INSN (p)) 809 { 810 if (GET_CODE (p) == CODE_LABEL 811 || GET_CODE (p) == JUMP_INSN 812 || (GET_CODE (p) == NOTE 813 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 814 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 815 break; 816 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 817 continue; 818 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 819 { 820 if (try_auto_increment (p, insn, 0, dst, newconst, 0)) 821 return 1; 822 break; 823 } 824 } 825 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 826 { 827 if (GET_CODE (p) == CODE_LABEL 828 || GET_CODE (p) == JUMP_INSN 829 || (GET_CODE (p) == NOTE 830 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 831 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 832 break; 833 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 834 continue; 835 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 836 { 837 try_auto_increment (p, insn, 0, dst, newconst, 1); 838 break; 839 } 840 } 841#endif 842 return 1; 843 } 844 } 845 846 if (reg_set_p (dst, PATTERN (p))) 847 break; 848 849 /* If we have passed a call instruction, and the 850 pseudo-reg SRC is not already live across a call, 851 then don't perform the optimization. */ 852 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all 853 hard regs are clobbered. Thus, we only use it for src for 854 non-call insns. */ 855 if (GET_CODE (p) == CALL_INSN) 856 { 857 if (! dst_death) 858 num_calls++; 859 860 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) 861 break; 862 863 if (call_used_regs [REGNO (dst)] 864 || find_reg_fusage (p, CLOBBER, dst)) 865 break; 866 } 867 else if (reg_set_p (src, PATTERN (p))) 868 break; 869 } 870 871 return 0; 872} 873 874void 875regmove_optimize (f, nregs, regmove_dump_file) 876 rtx f; 877 int nregs; 878 FILE *regmove_dump_file; 879{ 880 rtx insn; 881 struct match match; 882 int pass; 883 int maxregnum = max_reg_num (), i; 884 rtx copy_src, copy_dst; 885 886 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * maxregnum); 887 for (i = maxregnum; --i >= 0; ) regno_src_regno[i] = -1; 888 889 regmove_bb_head = (int *)alloca (sizeof (int) * (get_max_uid () + 1)); 890 for (i = get_max_uid (); i >= 0; i--) regmove_bb_head[i] = -1; 891 for (i = 0; i < n_basic_blocks; i++) 892 regmove_bb_head[INSN_UID (basic_block_head[i])] = i; 893 894 /* A forward/backward pass. Replace output operands with input operands. */ 895 896 loop_depth = 1; 897 898 for (pass = 0; pass <= 2; pass++) 899 { 900 if (! flag_regmove && pass >= flag_expensive_optimizations) 901 return; 902 903 if (regmove_dump_file) 904 fprintf (regmove_dump_file, "Starting %s pass...\n", 905 pass ? "backward" : "forward"); 906 907 for (insn = pass ? get_last_insn () : f; insn; 908 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn)) 909 { 910 rtx set; 911 int insn_code_number; 912 int operand_number, match_number; 913 914 if (GET_CODE (insn) == NOTE) 915 { 916 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) 917 loop_depth++; 918 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) 919 loop_depth--; 920 } 921 922 set = single_set (insn); 923 if (! set) 924 continue; 925 926 if (flag_expensive_optimizations && ! pass 927 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND 928 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) 929 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG 930 && GET_CODE (SET_DEST(set)) == REG) 931 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); 932 933 if (flag_expensive_optimizations && ! pass 934 && GET_CODE (SET_SRC (set)) == REG 935 && GET_CODE (SET_DEST(set)) == REG) 936 { 937 /* If this is a register-register copy where SRC is not dead, 938 see if we can optimize it. If this optimization succeeds, 939 it will become a copy where SRC is dead. */ 940 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set)) 941 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set))) 942 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) 943 { 944 /* Similarly for a pseudo-pseudo copy when SRC is dead. */ 945 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) 946 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set)); 947 if (regno_src_regno[REGNO (SET_DEST (set))] < 0 948 && SET_SRC (set) != SET_DEST (set)) 949 { 950 int srcregno = REGNO (SET_SRC(set)); 951 if (regno_src_regno[srcregno] >= 0) 952 srcregno = regno_src_regno[srcregno]; 953 regno_src_regno[REGNO (SET_DEST (set))] = srcregno; 954 } 955 } 956 } 957#ifdef REGISTER_CONSTRAINTS 958 insn_code_number 959 = find_matches (insn, &match); 960 961 if (insn_code_number < 0) 962 continue; 963 964 /* Now scan through the operands looking for a source operand 965 which is supposed to match the destination operand. 966 Then scan forward for an instruction which uses the dest 967 operand. 968 If it dies there, then replace the dest in both operands with 969 the source operand. */ 970 971 for (operand_number = 0; 972 operand_number < insn_n_operands[insn_code_number]; 973 operand_number++) 974 { 975 rtx src, dst, src_subreg; 976 enum reg_class src_class, dst_class; 977 978 match_number = match.with[operand_number]; 979 980 /* Nothing to do if the two operands aren't supposed to match. */ 981 if (match_number < 0) 982 continue; 983 984 src = recog_operand[operand_number]; 985 dst = recog_operand[match_number]; 986 987 if (GET_CODE (src) != REG) 988 continue; 989 990 src_subreg = src; 991 if (GET_CODE (dst) == SUBREG 992 && GET_MODE_SIZE (GET_MODE (dst)) 993 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst)))) 994 { 995 src_subreg 996 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)), 997 src, SUBREG_WORD (dst)); 998 dst = SUBREG_REG (dst); 999 } 1000 if (GET_CODE (dst) != REG 1001 || REGNO (dst) < FIRST_PSEUDO_REGISTER) 1002 continue; 1003 1004 if (REGNO (src) < FIRST_PSEUDO_REGISTER) 1005 { 1006 if (match.commutative[operand_number] < operand_number) 1007 regno_src_regno[REGNO (dst)] = REGNO (src); 1008 continue; 1009 } 1010 1011 if (REG_LIVE_LENGTH (REGNO (src)) < 0) 1012 continue; 1013 1014 /* operand_number/src must be a read-only operand, and 1015 match_operand/dst must be a write-only operand. */ 1016 if (match.use[operand_number] != READ 1017 || match.use[match_number] != WRITE) 1018 continue; 1019 1020 if (match.early_clobber[match_number] 1021 && count_occurrences (PATTERN (insn), src) > 1) 1022 continue; 1023 1024 /* Make sure match_operand is the destination. */ 1025 if (recog_operand[match_number] != SET_DEST (set)) 1026 continue; 1027 1028 /* If the operands already match, then there is nothing to do. */ 1029 /* But in the commutative case, we might find a better match. */ 1030 if (operands_match_p (src, dst) 1031 || (match.commutative[operand_number] >= 0 1032 && operands_match_p (recog_operand[match.commutative 1033 [operand_number]], dst) 1034 && (replacement_quality (recog_operand[match.commutative 1035 [operand_number]]) 1036 >= replacement_quality (src)))) 1037 continue; 1038 1039 src_class = reg_preferred_class (REGNO (src)); 1040 dst_class = reg_preferred_class (REGNO (dst)); 1041 if (src_class != dst_class 1042 && (! reg_class_subset_p (src_class, dst_class) 1043 || CLASS_LIKELY_SPILLED_P (src_class)) 1044 && (! reg_class_subset_p (dst_class, src_class) 1045 || CLASS_LIKELY_SPILLED_P (dst_class))) 1046 continue; 1047 1048 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass, 1049 operand_number, match_number, 1050 regmove_dump_file)) 1051 break; 1052 } 1053 } 1054 } 1055 1056 /* A backward pass. Replace input operands with output operands. */ 1057 1058 if (regmove_dump_file) 1059 fprintf (regmove_dump_file, "Starting backward pass...\n"); 1060 1061 loop_depth = 1; 1062 1063 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) 1064 { 1065 if (GET_CODE (insn) == NOTE) 1066 { 1067 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) 1068 loop_depth++; 1069 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) 1070 loop_depth--; 1071 } 1072 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 1073 { 1074 int insn_code_number = find_matches (insn, &match); 1075 int operand_number, match_number; 1076 int success = 0; 1077 1078 if (insn_code_number < 0) 1079 continue; 1080 1081 /* Now scan through the operands looking for a destination operand 1082 which is supposed to match a source operand. 1083 Then scan backward for an instruction which sets the source 1084 operand. If safe, then replace the source operand with the 1085 dest operand in both instructions. */ 1086 1087 copy_src = NULL_RTX; 1088 copy_dst = NULL_RTX; 1089 for (operand_number = 0; 1090 operand_number < insn_n_operands[insn_code_number]; 1091 operand_number++) 1092 { 1093 rtx set, p, src, dst; 1094 rtx src_note, dst_note; 1095 int num_calls = 0; 1096 enum reg_class src_class, dst_class; 1097 int length; 1098 1099 match_number = match.with[operand_number]; 1100 1101 /* Nothing to do if the two operands aren't supposed to match. */ 1102 if (match_number < 0) 1103 continue; 1104 1105 dst = recog_operand[match_number]; 1106 src = recog_operand[operand_number]; 1107 1108 if (GET_CODE (src) != REG) 1109 continue; 1110 1111 if (GET_CODE (dst) != REG 1112 || REGNO (dst) < FIRST_PSEUDO_REGISTER 1113 || REG_LIVE_LENGTH (REGNO (dst)) < 0) 1114 continue; 1115 1116 /* If the operands already match, then there is nothing to do. */ 1117 if (operands_match_p (src, dst) 1118 || (match.commutative[operand_number] >= 0 1119 && operands_match_p (recog_operand[match.commutative[operand_number]], dst))) 1120 continue; 1121 1122 set = single_set (insn); 1123 if (! set) 1124 continue; 1125 1126 /* match_number/dst must be a write-only operand, and 1127 operand_operand/src must be a read-only operand. */ 1128 if (match.use[operand_number] != READ 1129 || match.use[match_number] != WRITE) 1130 continue; 1131 1132 if (match.early_clobber[match_number] 1133 && count_occurrences (PATTERN (insn), src) > 1) 1134 continue; 1135 1136 /* Make sure match_number is the destination. */ 1137 if (recog_operand[match_number] != SET_DEST (set)) 1138 continue; 1139 1140 if (REGNO (src) < FIRST_PSEUDO_REGISTER) 1141 { 1142 if (GET_CODE (SET_SRC (set)) == PLUS 1143 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT 1144 && XEXP (SET_SRC (set), 0) == src 1145 && fixup_match_2 (insn, dst, src, 1146 XEXP (SET_SRC (set), 1), 1147 regmove_dump_file)) 1148 break; 1149 continue; 1150 } 1151 src_class = reg_preferred_class (REGNO (src)); 1152 dst_class = reg_preferred_class (REGNO (dst)); 1153 if (src_class != dst_class 1154 && (! reg_class_subset_p (src_class, dst_class) 1155 || CLASS_LIKELY_SPILLED_P (src_class)) 1156 && (! reg_class_subset_p (dst_class, src_class) 1157 || CLASS_LIKELY_SPILLED_P (dst_class))) 1158 { 1159 if (!copy_src) 1160 { 1161 copy_src = src; 1162 copy_dst = dst; 1163 } 1164 continue; 1165 } 1166 1167 /* Can not modify an earlier insn to set dst if this insn 1168 uses an old value in the source. */ 1169 if (reg_overlap_mentioned_p (dst, SET_SRC (set))) 1170 { 1171 if (!copy_src) 1172 { 1173 copy_src = src; 1174 copy_dst = dst; 1175 } 1176 continue; 1177 } 1178 1179 if (! (src_note = find_reg_note (insn, REG_DEAD, src))) 1180 { 1181 if (!copy_src) 1182 { 1183 copy_src = src; 1184 copy_dst = dst; 1185 } 1186 continue; 1187 } 1188 1189 1190 /* If src is set once in a different basic block, 1191 and is set equal to a constant, then do not use 1192 it for this optimization, as this would make it 1193 no longer equivalent to a constant. */ 1194 1195 if (reg_is_remote_constant_p (src, insn, f)) 1196 { 1197 if (!copy_src) 1198 { 1199 copy_src = src; 1200 copy_dst = dst; 1201 } 1202 continue; 1203 } 1204 1205 1206 if (regmove_dump_file) 1207 fprintf (regmove_dump_file, 1208 "Could fix operand %d of insn %d matching operand %d.\n", 1209 operand_number, INSN_UID (insn), match_number); 1210 1211 /* Scan backward to find the first instruction that uses 1212 the input operand. If the operand is set here, then 1213 replace it in both instructions with match_number. */ 1214 1215 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) 1216 { 1217 rtx pset; 1218 1219 if (GET_CODE (p) == CODE_LABEL 1220 || GET_CODE (p) == JUMP_INSN 1221 || (GET_CODE (p) == NOTE 1222 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1223 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1224 break; 1225 1226 /* ??? We can't scan past the end of a basic block without 1227 updating the register lifetime info 1228 (REG_DEAD/basic_block_live_at_start). 1229 A CALL_INSN might be the last insn of a basic block, if 1230 it is inside an EH region. There is no easy way to tell, 1231 so we just always break when we see a CALL_INSN if 1232 flag_exceptions is nonzero. */ 1233 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 1234 break; 1235 1236 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1237 continue; 1238 1239 length++; 1240 1241 /* ??? See if all of SRC is set in P. This test is much 1242 more conservative than it needs to be. */ 1243 pset = single_set (p); 1244 if (pset && SET_DEST (pset) == src) 1245 { 1246 /* We use validate_replace_rtx, in case there 1247 are multiple identical source operands. All of 1248 them have to be changed at the same time. */ 1249 if (validate_replace_rtx (src, dst, insn)) 1250 { 1251 if (validate_change (p, &SET_DEST (pset), 1252 dst, 0)) 1253 success = 1; 1254 else 1255 { 1256 /* Change all source operands back. 1257 This modifies the dst as a side-effect. */ 1258 validate_replace_rtx (dst, src, insn); 1259 /* Now make sure the dst is right. */ 1260 validate_change (insn, 1261 recog_operand_loc[match_number], 1262 dst, 0); 1263 } 1264 } 1265 break; 1266 } 1267 1268 if (reg_overlap_mentioned_p (src, PATTERN (p)) 1269 || reg_overlap_mentioned_p (dst, PATTERN (p))) 1270 break; 1271 1272 /* If we have passed a call instruction, and the 1273 pseudo-reg DST is not already live across a call, 1274 then don't perform the optimization. */ 1275 if (GET_CODE (p) == CALL_INSN) 1276 { 1277 num_calls++; 1278 1279 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0) 1280 break; 1281 } 1282 } 1283 1284 if (success) 1285 { 1286 int dstno, srcno; 1287 1288 /* Remove the death note for SRC from INSN. */ 1289 remove_note (insn, src_note); 1290 /* Move the death note for SRC to P if it is used 1291 there. */ 1292 if (reg_overlap_mentioned_p (src, PATTERN (p))) 1293 { 1294 XEXP (src_note, 1) = REG_NOTES (p); 1295 REG_NOTES (p) = src_note; 1296 } 1297 /* If there is a REG_DEAD note for DST on P, then remove 1298 it, because DST is now set there. */ 1299 if ((dst_note = find_reg_note (p, REG_DEAD, dst))) 1300 remove_note (p, dst_note); 1301 1302 dstno = REGNO (dst); 1303 srcno = REGNO (src); 1304 1305 REG_N_SETS (dstno)++; 1306 REG_N_SETS (srcno)--; 1307 1308 REG_N_CALLS_CROSSED (dstno) += num_calls; 1309 REG_N_CALLS_CROSSED (srcno) -= num_calls; 1310 1311 REG_LIVE_LENGTH (dstno) += length; 1312 if (REG_LIVE_LENGTH (srcno) >= 0) 1313 { 1314 REG_LIVE_LENGTH (srcno) -= length; 1315 /* REG_LIVE_LENGTH is only an approximation after 1316 combine if sched is not run, so make sure that we 1317 still have a reasonable value. */ 1318 if (REG_LIVE_LENGTH (srcno) < 2) 1319 REG_LIVE_LENGTH (srcno) = 2; 1320 } 1321 1322 /* We assume that a register is used exactly once per 1323 insn in the updates above. If this is not correct, 1324 no great harm is done. */ 1325 1326 REG_N_REFS (dstno) += 2 * loop_depth; 1327 REG_N_REFS (srcno) -= 2 * loop_depth; 1328 1329 /* If that was the only time src was set, 1330 and src was not live at the start of the 1331 function, we know that we have no more 1332 references to src; clear REG_N_REFS so it 1333 won't make reload do any work. */ 1334 if (REG_N_SETS (REGNO (src)) == 0 1335 && ! regno_uninitialized (REGNO (src))) 1336 REG_N_REFS (REGNO (src)) = 0; 1337 1338 if (regmove_dump_file) 1339 fprintf (regmove_dump_file, 1340 "Fixed operand %d of insn %d matching operand %d.\n", 1341 operand_number, INSN_UID (insn), match_number); 1342 1343 break; 1344 } 1345 } 1346 1347 /* If we weren't able to replace any of the alternatives, try an 1348 alternative appoach of copying the source to the destination. */ 1349 if (!success && copy_src != NULL_RTX) 1350 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth); 1351 1352 } 1353 } 1354#endif /* REGISTER_CONSTRAINTS */ 1355} 1356 1357/* Returns the INSN_CODE for INSN if its pattern has matching constraints for 1358 any operand. Returns -1 if INSN can't be recognized, or if the alternative 1359 can't be determined. 1360 1361 Initialize the info in MATCHP based on the constraints. */ 1362 1363static int 1364find_matches (insn, matchp) 1365 rtx insn; 1366 struct match *matchp; 1367{ 1368 int likely_spilled[MAX_RECOG_OPERANDS]; 1369 int operand_number; 1370 int insn_code_number = recog_memoized (insn); 1371 int any_matches = 0; 1372 1373 if (insn_code_number < 0) 1374 return -1; 1375 1376 insn_extract (insn); 1377 if (! constrain_operands (insn_code_number, 0)) 1378 return -1; 1379 1380 /* Must initialize this before main loop, because the code for 1381 the commutative case may set matches for operands other than 1382 the current one. */ 1383 for (operand_number = insn_n_operands[insn_code_number]; 1384 --operand_number >= 0; ) 1385 matchp->with[operand_number] = matchp->commutative[operand_number] = -1; 1386 1387 for (operand_number = 0; operand_number < insn_n_operands[insn_code_number]; 1388 operand_number++) 1389 { 1390 char *p, c; 1391 int i = 0; 1392 1393 p = insn_operand_constraint[insn_code_number][operand_number]; 1394 1395 likely_spilled[operand_number] = 0; 1396 matchp->use[operand_number] = READ; 1397 matchp->early_clobber[operand_number] = 0; 1398 if (*p == '=') 1399 matchp->use[operand_number] = WRITE; 1400 else if (*p == '+') 1401 matchp->use[operand_number] = READWRITE; 1402 1403 for (;*p && i < which_alternative; p++) 1404 if (*p == ',') 1405 i++; 1406 1407 while ((c = *p++) != '\0' && c != ',') 1408 switch (c) 1409 { 1410 case '=': 1411 break; 1412 case '+': 1413 break; 1414 case '&': 1415 matchp->early_clobber[operand_number] = 1; 1416 break; 1417 case '%': 1418 matchp->commutative[operand_number] = operand_number + 1; 1419 matchp->commutative[operand_number + 1] = operand_number; 1420 break; 1421 case '0': case '1': case '2': case '3': case '4': 1422 case '5': case '6': case '7': case '8': case '9': 1423 c -= '0'; 1424 if (c < operand_number && likely_spilled[(unsigned char) c]) 1425 break; 1426 matchp->with[operand_number] = c; 1427 any_matches = 1; 1428 if (matchp->commutative[operand_number] >= 0) 1429 matchp->with[matchp->commutative[operand_number]] = c; 1430 break; 1431 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h': 1432 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u': 1433 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B': 1434 case 'C': case 'D': case 'W': case 'Y': case 'Z': 1435 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c))) 1436 likely_spilled[operand_number] = 1; 1437 break; 1438 } 1439 } 1440 return any_matches ? insn_code_number : -1; 1441} 1442 1443/* Try to replace output operand DST in SET, with input operand SRC. SET is 1444 the only set in INSN. INSN has just been recgnized and constrained. 1445 SRC is operand number OPERAND_NUMBER in INSN. 1446 DST is operand number MATCH_NUMBER in INSN. 1447 If BACKWARD is nonzero, we have been called in a backward pass. 1448 Return nonzero for success. */ 1449static int 1450fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, 1451 match_number, regmove_dump_file) 1452 rtx insn, set, src, src_subreg, dst; 1453 int backward, operand_number, match_number; 1454 FILE *regmove_dump_file; 1455{ 1456 rtx p; 1457 rtx post_inc = 0, post_inc_set = 0, search_end = 0; 1458 int success = 0; 1459 int num_calls = 0, s_num_calls = 0; 1460 enum rtx_code code = NOTE; 1461 HOST_WIDE_INT insn_const, newconst; 1462 rtx overlap = 0; /* need to move insn ? */ 1463 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note; 1464 int length, s_length, true_loop_depth; 1465 1466 if (! src_note) 1467 { 1468 /* Look for (set (regX) (op regA constX)) 1469 (set (regY) (op regA constY)) 1470 and change that to 1471 (set (regA) (op regA constX)). 1472 (set (regY) (op regA constY-constX)). 1473 This works for add and shift operations, if 1474 regA is dead after or set by the second insn. */ 1475 1476 code = GET_CODE (SET_SRC (set)); 1477 if ((code == PLUS || code == LSHIFTRT 1478 || code == ASHIFT || code == ASHIFTRT) 1479 && XEXP (SET_SRC (set), 0) == src 1480 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT) 1481 insn_const = INTVAL (XEXP (SET_SRC (set), 1)); 1482 else if (! stable_but_for_p (SET_SRC (set), src, dst)) 1483 return 0; 1484 else 1485 /* We might find a src_note while scanning. */ 1486 code = NOTE; 1487 } 1488 1489 if (regmove_dump_file) 1490 fprintf (regmove_dump_file, 1491 "Could fix operand %d of insn %d matching operand %d.\n", 1492 operand_number, INSN_UID (insn), match_number); 1493 1494 /* If SRC is equivalent to a constant set in a different basic block, 1495 then do not use it for this optimization. We want the equivalence 1496 so that if we have to reload this register, we can reload the 1497 constant, rather than extending the lifespan of the register. */ 1498 if (reg_is_remote_constant_p (src, insn, get_insns ())) 1499 return 0; 1500 1501 /* Scan forward to find the next instruction that 1502 uses the output operand. If the operand dies here, 1503 then replace it in both instructions with 1504 operand_number. */ 1505 1506 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 1507 { 1508 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 1509 || (GET_CODE (p) == NOTE 1510 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1511 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1512 break; 1513 1514 /* ??? We can't scan past the end of a basic block without updating 1515 the register lifetime info (REG_DEAD/basic_block_live_at_start). 1516 A CALL_INSN might be the last insn of a basic block, if it is 1517 inside an EH region. There is no easy way to tell, so we just 1518 always break when we see a CALL_INSN if flag_exceptions is nonzero. */ 1519 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 1520 break; 1521 1522 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1523 continue; 1524 1525 length++; 1526 if (src_note) 1527 s_length++; 1528 1529 if (reg_set_p (src, p) || reg_set_p (dst, p) 1530 || (GET_CODE (PATTERN (p)) == USE 1531 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) 1532 break; 1533 1534 /* See if all of DST dies in P. This test is 1535 slightly more conservative than it needs to be. */ 1536 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst))) 1537 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst))) 1538 { 1539 if (! src_note) 1540 { 1541 rtx q; 1542 rtx set2; 1543 1544 /* If an optimization is done, the value of SRC while P 1545 is executed will be changed. Check that this is OK. */ 1546 if (reg_overlap_mentioned_p (src, PATTERN (p))) 1547 break; 1548 for (q = p; q; q = NEXT_INSN (q)) 1549 { 1550 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 1551 || (GET_CODE (q) == NOTE 1552 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 1553 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 1554 { 1555 q = 0; 1556 break; 1557 } 1558 1559 /* ??? We can't scan past the end of a basic block without 1560 updating the register lifetime info 1561 (REG_DEAD/basic_block_live_at_start). 1562 A CALL_INSN might be the last insn of a basic block, if 1563 it is inside an EH region. There is no easy way to tell, 1564 so we just always break when we see a CALL_INSN if 1565 flag_exceptions is nonzero. */ 1566 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 1567 { 1568 q = 0; 1569 break; 1570 } 1571 1572 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 1573 continue; 1574 if (reg_overlap_mentioned_p (src, PATTERN (q)) 1575 || reg_set_p (src, q)) 1576 break; 1577 } 1578 if (q) 1579 set2 = single_set (q); 1580 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code 1581 || XEXP (SET_SRC (set2), 0) != src 1582 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT 1583 || (SET_DEST (set2) != src 1584 && ! find_reg_note (q, REG_DEAD, src))) 1585 { 1586 /* If this is a PLUS, we can still save a register by doing 1587 src += insn_const; 1588 P; 1589 src -= insn_const; . 1590 This also gives opportunities for subsequent 1591 optimizations in the backward pass, so do it there. */ 1592 if (code == PLUS && backward 1593#ifdef HAVE_cc0 1594 /* We may not emit an insn directly 1595 after P if the latter sets CC0. */ 1596 && ! sets_cc0_p (PATTERN (p)) 1597#endif 1598 ) 1599 1600 { 1601 search_end = q; 1602 q = insn; 1603 set2 = set; 1604 newconst = -insn_const; 1605 code = MINUS; 1606 } 1607 else 1608 break; 1609 } 1610 else 1611 { 1612 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const; 1613 /* Reject out of range shifts. */ 1614 if (code != PLUS 1615 && (newconst < 0 1616 || (newconst 1617 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2)))))) 1618 break; 1619 if (code == PLUS) 1620 { 1621 post_inc = q; 1622 if (SET_DEST (set2) != src) 1623 post_inc_set = set2; 1624 } 1625 } 1626 /* We use 1 as last argument to validate_change so that all 1627 changes are accepted or rejected together by apply_change_group 1628 when it is called by validate_replace_rtx . */ 1629 validate_change (q, &XEXP (SET_SRC (set2), 1), 1630 GEN_INT (newconst), 1); 1631 } 1632 validate_change (insn, recog_operand_loc[match_number], src, 1); 1633 if (validate_replace_rtx (dst, src_subreg, p)) 1634 success = 1; 1635 break; 1636 } 1637 1638 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 1639 break; 1640 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p))) 1641 { 1642 /* INSN was already checked to be movable when 1643 we found no REG_DEAD note for src on it. */ 1644 overlap = p; 1645 src_note = find_reg_note (p, REG_DEAD, src); 1646 } 1647 1648 /* If we have passed a call instruction, and the pseudo-reg SRC is not 1649 already live across a call, then don't perform the optimization. */ 1650 if (GET_CODE (p) == CALL_INSN) 1651 { 1652 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) 1653 break; 1654 1655 num_calls++; 1656 1657 if (src_note) 1658 s_num_calls++; 1659 1660 } 1661 } 1662 1663 if (! success) 1664 return 0; 1665 1666 true_loop_depth = backward ? 2 - loop_depth : loop_depth; 1667 1668 /* Remove the death note for DST from P. */ 1669 remove_note (p, dst_note); 1670 if (code == MINUS) 1671 { 1672 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p); 1673#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) 1674 if (search_end 1675 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1)) 1676 post_inc = 0; 1677#endif 1678 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0); 1679 REG_N_SETS (REGNO (src))++; 1680 REG_N_REFS (REGNO (src)) += true_loop_depth; 1681 REG_LIVE_LENGTH (REGNO (src))++; 1682 } 1683 if (overlap) 1684 { 1685 /* The lifetime of src and dest overlap, 1686 but we can change this by moving insn. */ 1687 rtx pat = PATTERN (insn); 1688 if (src_note) 1689 remove_note (overlap, src_note); 1690#if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) 1691 if (code == PLUS 1692 && try_auto_increment (overlap, insn, 0, src, insn_const, 0)) 1693 insn = overlap; 1694 else 1695#endif 1696 { 1697 rtx notes = REG_NOTES (insn); 1698 1699 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn); 1700 PUT_CODE (insn, NOTE); 1701 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 1702 NOTE_SOURCE_FILE (insn) = 0; 1703 /* emit_insn_after_with_line_notes has no 1704 return value, so search for the new insn. */ 1705 for (insn = p; PATTERN (insn) != pat; ) 1706 insn = PREV_INSN (insn); 1707 1708 REG_NOTES (insn) = notes; 1709 } 1710 } 1711 /* Sometimes we'd generate src = const; src += n; 1712 if so, replace the instruction that set src 1713 in the first place. */ 1714 1715 if (! overlap && (code == PLUS || code == MINUS)) 1716 { 1717 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); 1718 rtx q, set2; 1719 int num_calls2 = 0, s_length2 = 0; 1720 1721 if (note && CONSTANT_P (XEXP (note, 0))) 1722 { 1723 for (q = PREV_INSN (insn); q; q = PREV_INSN(q)) 1724 { 1725 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 1726 || (GET_CODE (q) == NOTE 1727 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 1728 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 1729 { 1730 q = 0; 1731 break; 1732 } 1733 1734 /* ??? We can't scan past the end of a basic block without 1735 updating the register lifetime info 1736 (REG_DEAD/basic_block_live_at_start). 1737 A CALL_INSN might be the last insn of a basic block, if 1738 it is inside an EH region. There is no easy way to tell, 1739 so we just always break when we see a CALL_INSN if 1740 flag_exceptions is nonzero. */ 1741 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 1742 { 1743 q = 0; 1744 break; 1745 } 1746 1747 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 1748 continue; 1749 s_length2++; 1750 if (reg_set_p (src, q)) 1751 { 1752 set2 = single_set (q); 1753 break; 1754 } 1755 if (reg_overlap_mentioned_p (src, PATTERN (q))) 1756 { 1757 q = 0; 1758 break; 1759 } 1760 if (GET_CODE (p) == CALL_INSN) 1761 num_calls2++; 1762 } 1763 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2)) 1764 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0)) 1765 { 1766 PUT_CODE (q, NOTE); 1767 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED; 1768 NOTE_SOURCE_FILE (q) = 0; 1769 REG_N_SETS (REGNO (src))--; 1770 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2; 1771 REG_N_REFS (REGNO (src)) -= true_loop_depth; 1772 REG_LIVE_LENGTH (REGNO (src)) -= s_length2; 1773 insn_const = 0; 1774 } 1775 } 1776 } 1777 1778 /* Don't remove this seemingly useless if, it is needed to pair with the 1779 else in the next two conditionally included code blocks. */ 1780 if (0) 1781 {;} 1782#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) 1783 else if ((code == PLUS || code == MINUS) && insn_const 1784 && try_auto_increment (p, insn, 0, src, insn_const, 1)) 1785 insn = p; 1786#endif 1787#if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) 1788 else if (post_inc 1789 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0)) 1790 post_inc = 0; 1791#endif 1792#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) 1793 /* If post_inc still prevails, try to find an 1794 insn where it can be used as a pre-in/decrement. 1795 If code is MINUS, this was already tried. */ 1796 if (post_inc && code == PLUS 1797 /* Check that newconst is likely to be usable 1798 in a pre-in/decrement before starting the search. */ 1799 && (0 1800#if defined (HAVE_PRE_INCREMENT) 1801 || (newconst > 0 && newconst <= MOVE_MAX) 1802#endif 1803#if defined (HAVE_PRE_DECREMENT) 1804 || (newconst < 0 && newconst >= -MOVE_MAX) 1805#endif 1806 ) && exact_log2 (newconst)) 1807 { 1808 rtx q, inc_dest; 1809 1810 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src; 1811 for (q = post_inc; (q = NEXT_INSN (q)); ) 1812 { 1813 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 1814 || (GET_CODE (q) == NOTE 1815 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 1816 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 1817 break; 1818 1819 /* ??? We can't scan past the end of a basic block without updating 1820 the register lifetime info (REG_DEAD/basic_block_live_at_start). 1821 A CALL_INSN might be the last insn of a basic block, if it 1822 is inside an EH region. There is no easy way to tell so we 1823 just always break when we see a CALL_INSN if flag_exceptions 1824 is nonzero. */ 1825 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 1826 break; 1827 1828 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 1829 continue; 1830 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q)) 1831 || reg_set_p (src, q))) 1832 break; 1833 if (reg_set_p (inc_dest, q)) 1834 break; 1835 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q))) 1836 { 1837 try_auto_increment (q, post_inc, 1838 post_inc_set, inc_dest, newconst, 1); 1839 break; 1840 } 1841 } 1842 } 1843#endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */ 1844 /* Move the death note for DST to INSN if it is used 1845 there. */ 1846 if (reg_overlap_mentioned_p (dst, PATTERN (insn))) 1847 { 1848 XEXP (dst_note, 1) = REG_NOTES (insn); 1849 REG_NOTES (insn) = dst_note; 1850 } 1851 1852 if (src_note) 1853 { 1854 /* Move the death note for SRC from INSN to P. */ 1855 if (! overlap) 1856 remove_note (insn, src_note); 1857 XEXP (src_note, 1) = REG_NOTES (p); 1858 REG_NOTES (p) = src_note; 1859 1860 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls; 1861 } 1862 1863 REG_N_SETS (REGNO (src))++; 1864 REG_N_SETS (REGNO (dst))--; 1865 1866 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls; 1867 1868 REG_LIVE_LENGTH (REGNO (src)) += s_length; 1869 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0) 1870 { 1871 REG_LIVE_LENGTH (REGNO (dst)) -= length; 1872 /* REG_LIVE_LENGTH is only an approximation after 1873 combine if sched is not run, so make sure that we 1874 still have a reasonable value. */ 1875 if (REG_LIVE_LENGTH (REGNO (dst)) < 2) 1876 REG_LIVE_LENGTH (REGNO (dst)) = 2; 1877 } 1878 1879 /* We assume that a register is used exactly once per 1880 insn in the updates above. If this is not correct, 1881 no great harm is done. */ 1882 1883 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth; 1884 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth; 1885 1886 /* If that was the only time dst was set, 1887 and dst was not live at the start of the 1888 function, we know that we have no more 1889 references to dst; clear REG_N_REFS so it 1890 won't make reload do any work. */ 1891 if (REG_N_SETS (REGNO (dst)) == 0 1892 && ! regno_uninitialized (REGNO (dst))) 1893 REG_N_REFS (REGNO (dst)) = 0; 1894 1895 if (regmove_dump_file) 1896 fprintf (regmove_dump_file, 1897 "Fixed operand %d of insn %d matching operand %d.\n", 1898 operand_number, INSN_UID (insn), match_number); 1899 return 1; 1900} 1901 1902 1903/* return nonzero if X is stable but for mentioning SRC or mentioning / 1904 changing DST . If in doubt, presume it is unstable. */ 1905static int 1906stable_but_for_p (x, src, dst) 1907 rtx x, src, dst; 1908{ 1909 RTX_CODE code = GET_CODE (x); 1910 switch (GET_RTX_CLASS (code)) 1911 { 1912 case '<': case '1': case 'c': case '2': case 'b': case '3': 1913 { 1914 int i; 1915 char *fmt = GET_RTX_FORMAT (code); 1916 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1917 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst)) 1918 return 0; 1919 return 1; 1920 } 1921 case 'o': 1922 if (x == src || x == dst) 1923 return 1; 1924 /* fall through */ 1925 default: 1926 return ! rtx_unstable_p (x); 1927 } 1928} 1929 1930/* Test if regmove seems profitable for this target. Regmove is useful only 1931 if some common patterns are two address, i.e. require matching constraints, 1932 so we check that condition here. */ 1933 1934int 1935regmove_profitable_p () 1936{ 1937#ifdef REGISTER_CONSTRAINTS 1938 struct match match; 1939 enum machine_mode mode; 1940 optab tstoptab = add_optab; 1941 do /* check add_optab and ashl_optab */ 1942 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; 1943 mode = GET_MODE_WIDER_MODE (mode)) 1944 { 1945 int icode = (int) tstoptab->handlers[(int) mode].insn_code; 1946 rtx reg0, reg1, reg2, pat; 1947 int i; 1948 1949 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing) 1950 continue; 1951 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1952 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)) 1953 break; 1954 if (i + 2 >= FIRST_PSEUDO_REGISTER) 1955 break; 1956 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i); 1957 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1); 1958 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2); 1959 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode) 1960 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode) 1961 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode)) 1962 break; 1963 pat = GEN_FCN (icode) (reg0, reg1, reg2); 1964 if (! pat) 1965 continue; 1966 if (GET_CODE (pat) == SEQUENCE) 1967 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1); 1968 else 1969 pat = make_insn_raw (pat); 1970 if (! single_set (pat) 1971 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code) 1972 /* Unexpected complexity; don't need to handle this unless 1973 we find a machine where this occurs and regmove should 1974 be enabled. */ 1975 break; 1976 if (find_matches (pat, &match) >= 0) 1977 return 1; 1978 break; 1979 } 1980 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1)); 1981#endif /* REGISTER_CONSTRAINTS */ 1982 return 0; 1983} 1984