final.c revision 90087
1/* Convert RTL to assembler code and output it, for GNU compiler. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 2, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING. If not, write to the Free 19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2002111-1307, USA. */ 21 22/* $FreeBSD: head/contrib/gcc/final.c 90087 2002-02-01 19:19:08Z obrien $ */ 23 24 25/* This is the final pass of the compiler. 26 It looks at the rtl code for a function and outputs assembler code. 27 28 Call `final_start_function' to output the assembler code for function entry, 29 `final' to output assembler code for some RTL code, 30 `final_end_function' to output assembler code for function exit. 31 If a function is compiled in several pieces, each piece is 32 output separately with `final'. 33 34 Some optimizations are also done at this level. 35 Move instructions that were made unnecessary by good register allocation 36 are detected and omitted from the output. (Though most of these 37 are removed by the last jump pass.) 38 39 Instructions to set the condition codes are omitted when it can be 40 seen that the condition codes already had the desired values. 41 42 In some cases it is sufficient if the inherited condition codes 43 have related values, but this may require the following insn 44 (the one that tests the condition codes) to be modified. 45 46 The code for the function prologue and epilogue are generated 47 directly in assembler by the target functions function_prologue and 48 function_epilogue. Those instructions never exist as rtl. */ 49 50#include "config.h" 51#include "system.h" 52 53#include "tree.h" 54#include "rtl.h" 55#include "tm_p.h" 56#include "regs.h" 57#include "insn-config.h" 58#include "insn-attr.h" 59#include "recog.h" 60#include "conditions.h" 61#include "flags.h" 62#include "real.h" 63#include "hard-reg-set.h" 64#include "output.h" 65#include "except.h" 66#include "function.h" 67#include "toplev.h" 68#include "reload.h" 69#include "intl.h" 70#include "basic-block.h" 71#include "target.h" 72#include "debug.h" 73#include "expr.h" 74 75#ifdef XCOFF_DEBUGGING_INFO 76#include "xcoffout.h" /* Needed for external data 77 declarations for e.g. AIX 4.x. */ 78#endif 79 80#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) 81#include "dwarf2out.h" 82#endif 83 84/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a 85 null default for it to save conditionalization later. */ 86#ifndef CC_STATUS_INIT 87#define CC_STATUS_INIT 88#endif 89 90/* How to start an assembler comment. */ 91#ifndef ASM_COMMENT_START 92#define ASM_COMMENT_START ";#" 93#endif 94 95/* Is the given character a logical line separator for the assembler? */ 96#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR 97#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') 98#endif 99 100#ifndef JUMP_TABLES_IN_TEXT_SECTION 101#define JUMP_TABLES_IN_TEXT_SECTION 0 102#endif 103 104/* Last insn processed by final_scan_insn. */ 105static rtx debug_insn; 106rtx current_output_insn; 107 108/* Line number of last NOTE. */ 109static int last_linenum; 110 111/* Highest line number in current block. */ 112static int high_block_linenum; 113 114/* Likewise for function. */ 115static int high_function_linenum; 116 117/* Filename of last NOTE. */ 118static const char *last_filename; 119 120/* Number of instrumented arcs when profile_arc_flag is set. */ 121extern int count_instrumented_edges; 122 123extern int length_unit_log; /* This is defined in insn-attrtab.c. */ 124 125/* Nonzero while outputting an `asm' with operands. 126 This means that inconsistencies are the user's fault, so don't abort. 127 The precise value is the insn being output, to pass to error_for_asm. */ 128static rtx this_is_asm_operands; 129 130/* Number of operands of this insn, for an `asm' with operands. */ 131static unsigned int insn_noperands; 132 133/* Compare optimization flag. */ 134 135static rtx last_ignored_compare = 0; 136 137/* Flag indicating this insn is the start of a new basic block. */ 138 139static int new_block = 1; 140 141/* Assign a unique number to each insn that is output. 142 This can be used to generate unique local labels. */ 143 144static int insn_counter = 0; 145 146#ifdef HAVE_cc0 147/* This variable contains machine-dependent flags (defined in tm.h) 148 set and examined by output routines 149 that describe how to interpret the condition codes properly. */ 150 151CC_STATUS cc_status; 152 153/* During output of an insn, this contains a copy of cc_status 154 from before the insn. */ 155 156CC_STATUS cc_prev_status; 157#endif 158 159/* Indexed by hardware reg number, is 1 if that register is ever 160 used in the current function. 161 162 In life_analysis, or in stupid_life_analysis, this is set 163 up to record the hard regs used explicitly. Reload adds 164 in the hard regs used for holding pseudo regs. Final uses 165 it to generate the code in the function prologue and epilogue 166 to save and restore registers as needed. */ 167 168char regs_ever_live[FIRST_PSEUDO_REGISTER]; 169 170/* Nonzero means current function must be given a frame pointer. 171 Set in stmt.c if anything is allocated on the stack there. 172 Set in reload1.c if anything is allocated on the stack there. */ 173 174int frame_pointer_needed; 175 176/* Assign unique numbers to labels generated for profiling. */ 177 178int profile_label_no; 179 180/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ 181 182static int block_depth; 183 184/* Nonzero if have enabled APP processing of our assembler output. */ 185 186static int app_on; 187 188/* If we are outputting an insn sequence, this contains the sequence rtx. 189 Zero otherwise. */ 190 191rtx final_sequence; 192 193#ifdef ASSEMBLER_DIALECT 194 195/* Number of the assembler dialect to use, starting at 0. */ 196static int dialect_number; 197#endif 198 199/* Indexed by line number, nonzero if there is a note for that line. */ 200 201static char *line_note_exists; 202 203#ifdef HAVE_conditional_execution 204/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ 205rtx current_insn_predicate; 206#endif 207 208#ifdef HAVE_ATTR_length 209static int asm_insn_count PARAMS ((rtx)); 210#endif 211static void profile_function PARAMS ((FILE *)); 212static void profile_after_prologue PARAMS ((FILE *)); 213static void notice_source_line PARAMS ((rtx)); 214static rtx walk_alter_subreg PARAMS ((rtx *)); 215static void output_asm_name PARAMS ((void)); 216static tree get_mem_expr_from_op PARAMS ((rtx, int *)); 217static void output_asm_operand_names PARAMS ((rtx *, int *, int)); 218static void output_operand PARAMS ((rtx, int)); 219#ifdef LEAF_REGISTERS 220static void leaf_renumber_regs PARAMS ((rtx)); 221#endif 222#ifdef HAVE_cc0 223static int alter_cond PARAMS ((rtx)); 224#endif 225#ifndef ADDR_VEC_ALIGN 226static int final_addr_vec_align PARAMS ((rtx)); 227#endif 228#ifdef HAVE_ATTR_length 229static int align_fuzz PARAMS ((rtx, rtx, int, unsigned)); 230#endif 231 232/* Initialize data in final at the beginning of a compilation. */ 233 234void 235init_final (filename) 236 const char *filename ATTRIBUTE_UNUSED; 237{ 238 app_on = 0; 239 final_sequence = 0; 240 241#ifdef ASSEMBLER_DIALECT 242 dialect_number = ASSEMBLER_DIALECT; 243#endif 244} 245 246/* Called at end of source file, 247 to output the block-profiling table for this entire compilation. */ 248 249void 250end_final (filename) 251 const char *filename; 252{ 253 if (profile_arc_flag) 254 { 255 char name[20]; 256 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 257 int size, rounded; 258 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT; 259 int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT; 260 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT; 261 unsigned int align2 = LONG_TYPE_SIZE; 262 263 size = gcov_type_bytes * count_instrumented_edges; 264 rounded = size; 265 266 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; 267 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) 268 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); 269 270 /* ??? This _really_ ought to be done with a structure layout 271 and with assemble_constructor. If long_bytes != pointer_bytes 272 we'll be emitting unaligned data at some point. */ 273 if (long_bytes != pointer_bytes) 274 abort (); 275 276 data_section (); 277 278 /* Output the main header, of 11 words: 279 0: 1 if this file is initialized, else 0. 280 1: address of file name (LPBX1). 281 2: address of table of counts (LPBX2). 282 3: number of counts in the table. 283 4: always 0, for compatibility with Sun. 284 285 The following are GNU extensions: 286 287 5: address of table of start addrs of basic blocks (LPBX3). 288 6: Number of bytes in this header. 289 7: address of table of function names (LPBX4). 290 8: address of table of line numbers (LPBX5) or 0. 291 9: address of table of file names (LPBX6) or 0. 292 10: space reserved for basic block profiling. */ 293 294 ASM_OUTPUT_ALIGN (asm_out_file, align); 295 296 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0); 297 298 /* Zero word. */ 299 assemble_integer (const0_rtx, long_bytes, align2, 1); 300 301 fprintf(asm_out_file,".stabs \"bbset\", 25, 0, 0, LPBX0\n"); 302 303 /* Address of filename. */ 304 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1); 305 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 306 align2, 1); 307 308 /* Address of count table. */ 309 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); 310 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 311 align2, 1); 312 313 /* Count of the # of instrumented arcs. */ 314 assemble_integer (GEN_INT (count_instrumented_edges), 315 long_bytes, align2, 1); 316 317 /* Zero word (link field). */ 318 assemble_integer (const0_rtx, pointer_bytes, align2, 1); 319 320 assemble_integer (const0_rtx, pointer_bytes, align2, 1); 321 322 /* Byte count for extended structure. */ 323 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1); 324 325 /* Address of function name table. */ 326 assemble_integer (const0_rtx, pointer_bytes, align2, 1); 327 328 /* Address of line number and filename tables if debugging. */ 329 assemble_integer (const0_rtx, pointer_bytes, align2, 1); 330 assemble_integer (const0_rtx, pointer_bytes, align2, 1); 331 332 /* Space for extension ptr (link field). */ 333 assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1); 334 335 /* Output the file name changing the suffix to .d for 336 Sun tcov compatibility. */ 337 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1); 338 { 339 char *cwd = getpwd (); 340 int len = strlen (filename) + strlen (cwd) + 1; 341 char *data_file = (char *) alloca (len + 4); 342 343 strcpy (data_file, cwd); 344 strcat (data_file, "/"); 345 strcat (data_file, filename); 346 strip_off_ending (data_file, len); 347 strcat (data_file, ".da"); 348 assemble_string (data_file, strlen (data_file) + 1); 349 } 350 351 /* Make space for the table of counts. */ 352 if (size == 0) 353 { 354 /* Realign data section. */ 355 ASM_OUTPUT_ALIGN (asm_out_file, align); 356 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2); 357 if (size != 0) 358 assemble_zeros (size); 359 } 360 else 361 { 362 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2); 363#ifdef ASM_OUTPUT_SHARED_LOCAL 364 if (flag_shared_data) 365 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded); 366 else 367#endif 368#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL 369 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, 370 size, BIGGEST_ALIGNMENT); 371#else 372#ifdef ASM_OUTPUT_ALIGNED_LOCAL 373 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size, 374 BIGGEST_ALIGNMENT); 375#else 376 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded); 377#endif 378#endif 379 } 380 } 381} 382 383/* Default target function prologue and epilogue assembler output. 384 385 If not overridden for epilogue code, then the function body itself 386 contains return instructions wherever needed. */ 387void 388default_function_pro_epilogue (file, size) 389 FILE *file ATTRIBUTE_UNUSED; 390 HOST_WIDE_INT size ATTRIBUTE_UNUSED; 391{ 392} 393 394/* Default target hook that outputs nothing to a stream. */ 395void 396no_asm_to_stream (file) 397 FILE *file ATTRIBUTE_UNUSED; 398{ 399} 400 401/* Enable APP processing of subsequent output. 402 Used before the output from an `asm' statement. */ 403 404void 405app_enable () 406{ 407 if (! app_on) 408 { 409 fputs (ASM_APP_ON, asm_out_file); 410 app_on = 1; 411 } 412} 413 414/* Disable APP processing of subsequent output. 415 Called from varasm.c before most kinds of output. */ 416 417void 418app_disable () 419{ 420 if (app_on) 421 { 422 fputs (ASM_APP_OFF, asm_out_file); 423 app_on = 0; 424 } 425} 426 427/* Return the number of slots filled in the current 428 delayed branch sequence (we don't count the insn needing the 429 delay slot). Zero if not in a delayed branch sequence. */ 430 431#ifdef DELAY_SLOTS 432int 433dbr_sequence_length () 434{ 435 if (final_sequence != 0) 436 return XVECLEN (final_sequence, 0) - 1; 437 else 438 return 0; 439} 440#endif 441 442/* The next two pages contain routines used to compute the length of an insn 443 and to shorten branches. */ 444 445/* Arrays for insn lengths, and addresses. The latter is referenced by 446 `insn_current_length'. */ 447 448static int *insn_lengths; 449 450#ifdef HAVE_ATTR_length 451varray_type insn_addresses_; 452#endif 453 454/* Max uid for which the above arrays are valid. */ 455static int insn_lengths_max_uid; 456 457/* Address of insn being processed. Used by `insn_current_length'. */ 458int insn_current_address; 459 460/* Address of insn being processed in previous iteration. */ 461int insn_last_address; 462 463/* known invariant alignment of insn being processed. */ 464int insn_current_align; 465 466/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] 467 gives the next following alignment insn that increases the known 468 alignment, or NULL_RTX if there is no such insn. 469 For any alignment obtained this way, we can again index uid_align with 470 its uid to obtain the next following align that in turn increases the 471 alignment, till we reach NULL_RTX; the sequence obtained this way 472 for each insn we'll call the alignment chain of this insn in the following 473 comments. */ 474 475struct label_alignment 476{ 477 short alignment; 478 short max_skip; 479}; 480 481static rtx *uid_align; 482static int *uid_shuid; 483static struct label_alignment *label_align; 484 485/* Indicate that branch shortening hasn't yet been done. */ 486 487void 488init_insn_lengths () 489{ 490 if (uid_shuid) 491 { 492 free (uid_shuid); 493 uid_shuid = 0; 494 } 495 if (insn_lengths) 496 { 497 free (insn_lengths); 498 insn_lengths = 0; 499 insn_lengths_max_uid = 0; 500 } 501#ifdef HAVE_ATTR_length 502 INSN_ADDRESSES_FREE (); 503#endif 504 if (uid_align) 505 { 506 free (uid_align); 507 uid_align = 0; 508 } 509} 510 511/* Obtain the current length of an insn. If branch shortening has been done, 512 get its actual length. Otherwise, get its maximum length. */ 513 514int 515get_attr_length (insn) 516 rtx insn ATTRIBUTE_UNUSED; 517{ 518#ifdef HAVE_ATTR_length 519 rtx body; 520 int i; 521 int length = 0; 522 523 if (insn_lengths_max_uid > INSN_UID (insn)) 524 return insn_lengths[INSN_UID (insn)]; 525 else 526 switch (GET_CODE (insn)) 527 { 528 case NOTE: 529 case BARRIER: 530 case CODE_LABEL: 531 return 0; 532 533 case CALL_INSN: 534 length = insn_default_length (insn); 535 break; 536 537 case JUMP_INSN: 538 body = PATTERN (insn); 539 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 540 { 541 /* Alignment is machine-dependent and should be handled by 542 ADDR_VEC_ALIGN. */ 543 } 544 else 545 length = insn_default_length (insn); 546 break; 547 548 case INSN: 549 body = PATTERN (insn); 550 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) 551 return 0; 552 553 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 554 length = asm_insn_count (body) * insn_default_length (insn); 555 else if (GET_CODE (body) == SEQUENCE) 556 for (i = 0; i < XVECLEN (body, 0); i++) 557 length += get_attr_length (XVECEXP (body, 0, i)); 558 else 559 length = insn_default_length (insn); 560 break; 561 562 default: 563 break; 564 } 565 566#ifdef ADJUST_INSN_LENGTH 567 ADJUST_INSN_LENGTH (insn, length); 568#endif 569 return length; 570#else /* not HAVE_ATTR_length */ 571 return 0; 572#endif /* not HAVE_ATTR_length */ 573} 574 575/* Code to handle alignment inside shorten_branches. */ 576 577/* Here is an explanation how the algorithm in align_fuzz can give 578 proper results: 579 580 Call a sequence of instructions beginning with alignment point X 581 and continuing until the next alignment point `block X'. When `X' 582 is used in an expression, it means the alignment value of the 583 alignment point. 584 585 Call the distance between the start of the first insn of block X, and 586 the end of the last insn of block X `IX', for the `inner size of X'. 587 This is clearly the sum of the instruction lengths. 588 589 Likewise with the next alignment-delimited block following X, which we 590 shall call block Y. 591 592 Call the distance between the start of the first insn of block X, and 593 the start of the first insn of block Y `OX', for the `outer size of X'. 594 595 The estimated padding is then OX - IX. 596 597 OX can be safely estimated as 598 599 if (X >= Y) 600 OX = round_up(IX, Y) 601 else 602 OX = round_up(IX, X) + Y - X 603 604 Clearly est(IX) >= real(IX), because that only depends on the 605 instruction lengths, and those being overestimated is a given. 606 607 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so 608 we needn't worry about that when thinking about OX. 609 610 When X >= Y, the alignment provided by Y adds no uncertainty factor 611 for branch ranges starting before X, so we can just round what we have. 612 But when X < Y, we don't know anything about the, so to speak, 613 `middle bits', so we have to assume the worst when aligning up from an 614 address mod X to one mod Y, which is Y - X. */ 615 616#ifndef LABEL_ALIGN 617#define LABEL_ALIGN(LABEL) align_labels_log 618#endif 619 620#ifndef LABEL_ALIGN_MAX_SKIP 621#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip 622#endif 623 624#ifndef LOOP_ALIGN 625#define LOOP_ALIGN(LABEL) align_loops_log 626#endif 627 628#ifndef LOOP_ALIGN_MAX_SKIP 629#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip 630#endif 631 632#ifndef LABEL_ALIGN_AFTER_BARRIER 633#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 634#endif 635 636#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 637#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 638#endif 639 640#ifndef JUMP_ALIGN 641#define JUMP_ALIGN(LABEL) align_jumps_log 642#endif 643 644#ifndef JUMP_ALIGN_MAX_SKIP 645#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip 646#endif 647 648#ifndef ADDR_VEC_ALIGN 649static int 650final_addr_vec_align (addr_vec) 651 rtx addr_vec; 652{ 653 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); 654 655 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) 656 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; 657 return exact_log2 (align); 658 659} 660 661#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) 662#endif 663 664#ifndef INSN_LENGTH_ALIGNMENT 665#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log 666#endif 667 668#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) 669 670static int min_labelno, max_labelno; 671 672#define LABEL_TO_ALIGNMENT(LABEL) \ 673 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) 674 675#define LABEL_TO_MAX_SKIP(LABEL) \ 676 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) 677 678/* For the benefit of port specific code do this also as a function. */ 679 680int 681label_to_alignment (label) 682 rtx label; 683{ 684 return LABEL_TO_ALIGNMENT (label); 685} 686 687#ifdef HAVE_ATTR_length 688/* The differences in addresses 689 between a branch and its target might grow or shrink depending on 690 the alignment the start insn of the range (the branch for a forward 691 branch or the label for a backward branch) starts out on; if these 692 differences are used naively, they can even oscillate infinitely. 693 We therefore want to compute a 'worst case' address difference that 694 is independent of the alignment the start insn of the range end 695 up on, and that is at least as large as the actual difference. 696 The function align_fuzz calculates the amount we have to add to the 697 naively computed difference, by traversing the part of the alignment 698 chain of the start insn of the range that is in front of the end insn 699 of the range, and considering for each alignment the maximum amount 700 that it might contribute to a size increase. 701 702 For casesi tables, we also want to know worst case minimum amounts of 703 address difference, in case a machine description wants to introduce 704 some common offset that is added to all offsets in a table. 705 For this purpose, align_fuzz with a growth argument of 0 computes the 706 appropriate adjustment. */ 707 708/* Compute the maximum delta by which the difference of the addresses of 709 START and END might grow / shrink due to a different address for start 710 which changes the size of alignment insns between START and END. 711 KNOWN_ALIGN_LOG is the alignment known for START. 712 GROWTH should be ~0 if the objective is to compute potential code size 713 increase, and 0 if the objective is to compute potential shrink. 714 The return value is undefined for any other value of GROWTH. */ 715 716static int 717align_fuzz (start, end, known_align_log, growth) 718 rtx start, end; 719 int known_align_log; 720 unsigned growth; 721{ 722 int uid = INSN_UID (start); 723 rtx align_label; 724 int known_align = 1 << known_align_log; 725 int end_shuid = INSN_SHUID (end); 726 int fuzz = 0; 727 728 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) 729 { 730 int align_addr, new_align; 731 732 uid = INSN_UID (align_label); 733 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; 734 if (uid_shuid[uid] > end_shuid) 735 break; 736 known_align_log = LABEL_TO_ALIGNMENT (align_label); 737 new_align = 1 << known_align_log; 738 if (new_align < known_align) 739 continue; 740 fuzz += (-align_addr ^ growth) & (new_align - known_align); 741 known_align = new_align; 742 } 743 return fuzz; 744} 745 746/* Compute a worst-case reference address of a branch so that it 747 can be safely used in the presence of aligned labels. Since the 748 size of the branch itself is unknown, the size of the branch is 749 not included in the range. I.e. for a forward branch, the reference 750 address is the end address of the branch as known from the previous 751 branch shortening pass, minus a value to account for possible size 752 increase due to alignment. For a backward branch, it is the start 753 address of the branch as known from the current pass, plus a value 754 to account for possible size increase due to alignment. 755 NB.: Therefore, the maximum offset allowed for backward branches needs 756 to exclude the branch size. */ 757 758int 759insn_current_reference_address (branch) 760 rtx branch; 761{ 762 rtx dest, seq; 763 int seq_uid; 764 765 if (! INSN_ADDRESSES_SET_P ()) 766 return 0; 767 768 seq = NEXT_INSN (PREV_INSN (branch)); 769 seq_uid = INSN_UID (seq); 770 if (GET_CODE (branch) != JUMP_INSN) 771 /* This can happen for example on the PA; the objective is to know the 772 offset to address something in front of the start of the function. 773 Thus, we can treat it like a backward branch. 774 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than 775 any alignment we'd encounter, so we skip the call to align_fuzz. */ 776 return insn_current_address; 777 dest = JUMP_LABEL (branch); 778 779 /* BRANCH has no proper alignment chain set, so use SEQ. 780 BRANCH also has no INSN_SHUID. */ 781 if (INSN_SHUID (seq) < INSN_SHUID (dest)) 782 { 783 /* Forward branch. */ 784 return (insn_last_address + insn_lengths[seq_uid] 785 - align_fuzz (seq, dest, length_unit_log, ~0)); 786 } 787 else 788 { 789 /* Backward branch. */ 790 return (insn_current_address 791 + align_fuzz (dest, seq, length_unit_log, ~0)); 792 } 793} 794#endif /* HAVE_ATTR_length */ 795 796void 797compute_alignments () 798{ 799 int i; 800 int log, max_skip, max_log; 801 802 if (label_align) 803 { 804 free (label_align); 805 label_align = 0; 806 } 807 808 max_labelno = max_label_num (); 809 min_labelno = get_first_label_num (); 810 label_align = (struct label_alignment *) 811 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment)); 812 813 /* If not optimizing or optimizing for size, don't assign any alignments. */ 814 if (! optimize || optimize_size) 815 return; 816 817 for (i = 0; i < n_basic_blocks; i++) 818 { 819 basic_block bb = BASIC_BLOCK (i); 820 rtx label = bb->head; 821 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; 822 edge e; 823 824 if (GET_CODE (label) != CODE_LABEL) 825 continue; 826 max_log = LABEL_ALIGN (label); 827 max_skip = LABEL_ALIGN_MAX_SKIP; 828 829 for (e = bb->pred; e; e = e->pred_next) 830 { 831 if (e->flags & EDGE_FALLTHRU) 832 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); 833 else 834 branch_frequency += EDGE_FREQUENCY (e); 835 } 836 837 /* There are two purposes to align block with no fallthru incoming edge: 838 1) to avoid fetch stalls when branch destination is near cache boundary 839 2) to improve cache efficiency in case the previous block is not executed 840 (so it does not need to be in the cache). 841 842 We to catch first case, we align frequently executed blocks. 843 To catch the second, we align blocks that are executed more frequently 844 than the predecessor and the predecessor is likely to not be executed 845 when function is called. */ 846 847 if (!has_fallthru 848 && (branch_frequency > BB_FREQ_MAX / 10 849 || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10 850 && (BASIC_BLOCK (i - 1)->frequency 851 <= ENTRY_BLOCK_PTR->frequency / 2)))) 852 { 853 log = JUMP_ALIGN (label); 854 if (max_log < log) 855 { 856 max_log = log; 857 max_skip = JUMP_ALIGN_MAX_SKIP; 858 } 859 } 860 /* In case block is frequent and reached mostly by non-fallthru edge, 861 align it. It is most likely an first block of loop. */ 862 if (has_fallthru 863 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 864 && branch_frequency > fallthru_frequency * 5) 865 { 866 log = LOOP_ALIGN (label); 867 if (max_log < log) 868 { 869 max_log = log; 870 max_skip = LOOP_ALIGN_MAX_SKIP; 871 } 872 } 873 LABEL_TO_ALIGNMENT (label) = max_log; 874 LABEL_TO_MAX_SKIP (label) = max_skip; 875 } 876} 877 878/* Make a pass over all insns and compute their actual lengths by shortening 879 any branches of variable length if possible. */ 880 881/* Give a default value for the lowest address in a function. */ 882 883#ifndef FIRST_INSN_ADDRESS 884#define FIRST_INSN_ADDRESS 0 885#endif 886 887/* shorten_branches might be called multiple times: for example, the SH 888 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. 889 In order to do this, it needs proper length information, which it obtains 890 by calling shorten_branches. This cannot be collapsed with 891 shorten_branches itself into a single pass unless we also want to integrate 892 reorg.c, since the branch splitting exposes new instructions with delay 893 slots. */ 894 895void 896shorten_branches (first) 897 rtx first ATTRIBUTE_UNUSED; 898{ 899 rtx insn; 900 int max_uid; 901 int i; 902 int max_log; 903 int max_skip; 904#ifdef HAVE_ATTR_length 905#define MAX_CODE_ALIGN 16 906 rtx seq; 907 int something_changed = 1; 908 char *varying_length; 909 rtx body; 910 int uid; 911 rtx align_tab[MAX_CODE_ALIGN]; 912 913#endif 914 915 /* Compute maximum UID and allocate label_align / uid_shuid. */ 916 max_uid = get_max_uid (); 917 918 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid); 919 920 if (max_labelno != max_label_num ()) 921 { 922 int old = max_labelno; 923 int n_labels; 924 int n_old_labels; 925 926 max_labelno = max_label_num (); 927 928 n_labels = max_labelno - min_labelno + 1; 929 n_old_labels = old - min_labelno + 1; 930 931 label_align = (struct label_alignment *) xrealloc 932 (label_align, n_labels * sizeof (struct label_alignment)); 933 934 /* Range of labels grows monotonically in the function. Abort here 935 means that the initialization of array got lost. */ 936 if (n_old_labels > n_labels) 937 abort (); 938 939 memset (label_align + n_old_labels, 0, 940 (n_labels - n_old_labels) * sizeof (struct label_alignment)); 941 } 942 943 /* Initialize label_align and set up uid_shuid to be strictly 944 monotonically rising with insn order. */ 945 /* We use max_log here to keep track of the maximum alignment we want to 946 impose on the next CODE_LABEL (or the current one if we are processing 947 the CODE_LABEL itself). */ 948 949 max_log = 0; 950 max_skip = 0; 951 952 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) 953 { 954 int log; 955 956 INSN_SHUID (insn) = i++; 957 if (INSN_P (insn)) 958 { 959 /* reorg might make the first insn of a loop being run once only, 960 and delete the label in front of it. Then we want to apply 961 the loop alignment to the new label created by reorg, which 962 is separated by the former loop start insn from the 963 NOTE_INSN_LOOP_BEG. */ 964 } 965 else if (GET_CODE (insn) == CODE_LABEL) 966 { 967 rtx next; 968 969 /* Merge in alignments computed by compute_alignments. */ 970 log = LABEL_TO_ALIGNMENT (insn); 971 if (max_log < log) 972 { 973 max_log = log; 974 max_skip = LABEL_TO_MAX_SKIP (insn); 975 } 976 977 log = LABEL_ALIGN (insn); 978 if (max_log < log) 979 { 980 max_log = log; 981 max_skip = LABEL_ALIGN_MAX_SKIP; 982 } 983 next = NEXT_INSN (insn); 984 /* ADDR_VECs only take room if read-only data goes into the text 985 section. */ 986 if (JUMP_TABLES_IN_TEXT_SECTION 987#if !defined(READONLY_DATA_SECTION) 988 || 1 989#endif 990 ) 991 if (next && GET_CODE (next) == JUMP_INSN) 992 { 993 rtx nextbody = PATTERN (next); 994 if (GET_CODE (nextbody) == ADDR_VEC 995 || GET_CODE (nextbody) == ADDR_DIFF_VEC) 996 { 997 log = ADDR_VEC_ALIGN (next); 998 if (max_log < log) 999 { 1000 max_log = log; 1001 max_skip = LABEL_ALIGN_MAX_SKIP; 1002 } 1003 } 1004 } 1005 LABEL_TO_ALIGNMENT (insn) = max_log; 1006 LABEL_TO_MAX_SKIP (insn) = max_skip; 1007 max_log = 0; 1008 max_skip = 0; 1009 } 1010 else if (GET_CODE (insn) == BARRIER) 1011 { 1012 rtx label; 1013 1014 for (label = insn; label && ! INSN_P (label); 1015 label = NEXT_INSN (label)) 1016 if (GET_CODE (label) == CODE_LABEL) 1017 { 1018 log = LABEL_ALIGN_AFTER_BARRIER (insn); 1019 if (max_log < log) 1020 { 1021 max_log = log; 1022 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; 1023 } 1024 break; 1025 } 1026 } 1027 } 1028#ifdef HAVE_ATTR_length 1029 1030 /* Allocate the rest of the arrays. */ 1031 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths)); 1032 insn_lengths_max_uid = max_uid; 1033 /* Syntax errors can lead to labels being outside of the main insn stream. 1034 Initialize insn_addresses, so that we get reproducible results. */ 1035 INSN_ADDRESSES_ALLOC (max_uid); 1036 1037 varying_length = (char *) xcalloc (max_uid, sizeof (char)); 1038 1039 /* Initialize uid_align. We scan instructions 1040 from end to start, and keep in align_tab[n] the last seen insn 1041 that does an alignment of at least n+1, i.e. the successor 1042 in the alignment chain for an insn that does / has a known 1043 alignment of n. */ 1044 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align); 1045 1046 for (i = MAX_CODE_ALIGN; --i >= 0;) 1047 align_tab[i] = NULL_RTX; 1048 seq = get_last_insn (); 1049 for (; seq; seq = PREV_INSN (seq)) 1050 { 1051 int uid = INSN_UID (seq); 1052 int log; 1053 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0); 1054 uid_align[uid] = align_tab[0]; 1055 if (log) 1056 { 1057 /* Found an alignment label. */ 1058 uid_align[uid] = align_tab[log]; 1059 for (i = log - 1; i >= 0; i--) 1060 align_tab[i] = seq; 1061 } 1062 } 1063#ifdef CASE_VECTOR_SHORTEN_MODE 1064 if (optimize) 1065 { 1066 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum 1067 label fields. */ 1068 1069 int min_shuid = INSN_SHUID (get_insns ()) - 1; 1070 int max_shuid = INSN_SHUID (get_last_insn ()) + 1; 1071 int rel; 1072 1073 for (insn = first; insn != 0; insn = NEXT_INSN (insn)) 1074 { 1075 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; 1076 int len, i, min, max, insn_shuid; 1077 int min_align; 1078 addr_diff_vec_flags flags; 1079 1080 if (GET_CODE (insn) != JUMP_INSN 1081 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) 1082 continue; 1083 pat = PATTERN (insn); 1084 len = XVECLEN (pat, 1); 1085 if (len <= 0) 1086 abort (); 1087 min_align = MAX_CODE_ALIGN; 1088 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) 1089 { 1090 rtx lab = XEXP (XVECEXP (pat, 1, i), 0); 1091 int shuid = INSN_SHUID (lab); 1092 if (shuid < min) 1093 { 1094 min = shuid; 1095 min_lab = lab; 1096 } 1097 if (shuid > max) 1098 { 1099 max = shuid; 1100 max_lab = lab; 1101 } 1102 if (min_align > LABEL_TO_ALIGNMENT (lab)) 1103 min_align = LABEL_TO_ALIGNMENT (lab); 1104 } 1105 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); 1106 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); 1107 insn_shuid = INSN_SHUID (insn); 1108 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); 1109 flags.min_align = min_align; 1110 flags.base_after_vec = rel > insn_shuid; 1111 flags.min_after_vec = min > insn_shuid; 1112 flags.max_after_vec = max > insn_shuid; 1113 flags.min_after_base = min > rel; 1114 flags.max_after_base = max > rel; 1115 ADDR_DIFF_VEC_FLAGS (pat) = flags; 1116 } 1117 } 1118#endif /* CASE_VECTOR_SHORTEN_MODE */ 1119 1120 /* Compute initial lengths, addresses, and varying flags for each insn. */ 1121 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; 1122 insn != 0; 1123 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) 1124 { 1125 uid = INSN_UID (insn); 1126 1127 insn_lengths[uid] = 0; 1128 1129 if (GET_CODE (insn) == CODE_LABEL) 1130 { 1131 int log = LABEL_TO_ALIGNMENT (insn); 1132 if (log) 1133 { 1134 int align = 1 << log; 1135 int new_address = (insn_current_address + align - 1) & -align; 1136 insn_lengths[uid] = new_address - insn_current_address; 1137 } 1138 } 1139 1140 INSN_ADDRESSES (uid) = insn_current_address; 1141 1142 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER 1143 || GET_CODE (insn) == CODE_LABEL) 1144 continue; 1145 if (INSN_DELETED_P (insn)) 1146 continue; 1147 1148 body = PATTERN (insn); 1149 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 1150 { 1151 /* This only takes room if read-only data goes into the text 1152 section. */ 1153 if (JUMP_TABLES_IN_TEXT_SECTION 1154#if !defined(READONLY_DATA_SECTION) 1155 || 1 1156#endif 1157 ) 1158 insn_lengths[uid] = (XVECLEN (body, 1159 GET_CODE (body) == ADDR_DIFF_VEC) 1160 * GET_MODE_SIZE (GET_MODE (body))); 1161 /* Alignment is handled by ADDR_VEC_ALIGN. */ 1162 } 1163 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 1164 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); 1165 else if (GET_CODE (body) == SEQUENCE) 1166 { 1167 int i; 1168 int const_delay_slots; 1169#ifdef DELAY_SLOTS 1170 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); 1171#else 1172 const_delay_slots = 0; 1173#endif 1174 /* Inside a delay slot sequence, we do not do any branch shortening 1175 if the shortening could change the number of delay slots 1176 of the branch. */ 1177 for (i = 0; i < XVECLEN (body, 0); i++) 1178 { 1179 rtx inner_insn = XVECEXP (body, 0, i); 1180 int inner_uid = INSN_UID (inner_insn); 1181 int inner_length; 1182 1183 if (GET_CODE (body) == ASM_INPUT 1184 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) 1185 inner_length = (asm_insn_count (PATTERN (inner_insn)) 1186 * insn_default_length (inner_insn)); 1187 else 1188 inner_length = insn_default_length (inner_insn); 1189 1190 insn_lengths[inner_uid] = inner_length; 1191 if (const_delay_slots) 1192 { 1193 if ((varying_length[inner_uid] 1194 = insn_variable_length_p (inner_insn)) != 0) 1195 varying_length[uid] = 1; 1196 INSN_ADDRESSES (inner_uid) = (insn_current_address 1197 + insn_lengths[uid]); 1198 } 1199 else 1200 varying_length[inner_uid] = 0; 1201 insn_lengths[uid] += inner_length; 1202 } 1203 } 1204 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) 1205 { 1206 insn_lengths[uid] = insn_default_length (insn); 1207 varying_length[uid] = insn_variable_length_p (insn); 1208 } 1209 1210 /* If needed, do any adjustment. */ 1211#ifdef ADJUST_INSN_LENGTH 1212 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); 1213 if (insn_lengths[uid] < 0) 1214 fatal_insn ("negative insn length", insn); 1215#endif 1216 } 1217 1218 /* Now loop over all the insns finding varying length insns. For each, 1219 get the current insn length. If it has changed, reflect the change. 1220 When nothing changes for a full pass, we are done. */ 1221 1222 while (something_changed) 1223 { 1224 something_changed = 0; 1225 insn_current_align = MAX_CODE_ALIGN - 1; 1226 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; 1227 insn != 0; 1228 insn = NEXT_INSN (insn)) 1229 { 1230 int new_length; 1231#ifdef ADJUST_INSN_LENGTH 1232 int tmp_length; 1233#endif 1234 int length_align; 1235 1236 uid = INSN_UID (insn); 1237 1238 if (GET_CODE (insn) == CODE_LABEL) 1239 { 1240 int log = LABEL_TO_ALIGNMENT (insn); 1241 if (log > insn_current_align) 1242 { 1243 int align = 1 << log; 1244 int new_address= (insn_current_address + align - 1) & -align; 1245 insn_lengths[uid] = new_address - insn_current_address; 1246 insn_current_align = log; 1247 insn_current_address = new_address; 1248 } 1249 else 1250 insn_lengths[uid] = 0; 1251 INSN_ADDRESSES (uid) = insn_current_address; 1252 continue; 1253 } 1254 1255 length_align = INSN_LENGTH_ALIGNMENT (insn); 1256 if (length_align < insn_current_align) 1257 insn_current_align = length_align; 1258 1259 insn_last_address = INSN_ADDRESSES (uid); 1260 INSN_ADDRESSES (uid) = insn_current_address; 1261 1262#ifdef CASE_VECTOR_SHORTEN_MODE 1263 if (optimize && GET_CODE (insn) == JUMP_INSN 1264 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) 1265 { 1266 rtx body = PATTERN (insn); 1267 int old_length = insn_lengths[uid]; 1268 rtx rel_lab = XEXP (XEXP (body, 0), 0); 1269 rtx min_lab = XEXP (XEXP (body, 2), 0); 1270 rtx max_lab = XEXP (XEXP (body, 3), 0); 1271 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); 1272 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); 1273 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); 1274 rtx prev; 1275 int rel_align = 0; 1276 addr_diff_vec_flags flags; 1277 1278 /* Avoid automatic aggregate initialization. */ 1279 flags = ADDR_DIFF_VEC_FLAGS (body); 1280 1281 /* Try to find a known alignment for rel_lab. */ 1282 for (prev = rel_lab; 1283 prev 1284 && ! insn_lengths[INSN_UID (prev)] 1285 && ! (varying_length[INSN_UID (prev)] & 1); 1286 prev = PREV_INSN (prev)) 1287 if (varying_length[INSN_UID (prev)] & 2) 1288 { 1289 rel_align = LABEL_TO_ALIGNMENT (prev); 1290 break; 1291 } 1292 1293 /* See the comment on addr_diff_vec_flags in rtl.h for the 1294 meaning of the flags values. base: REL_LAB vec: INSN */ 1295 /* Anything after INSN has still addresses from the last 1296 pass; adjust these so that they reflect our current 1297 estimate for this pass. */ 1298 if (flags.base_after_vec) 1299 rel_addr += insn_current_address - insn_last_address; 1300 if (flags.min_after_vec) 1301 min_addr += insn_current_address - insn_last_address; 1302 if (flags.max_after_vec) 1303 max_addr += insn_current_address - insn_last_address; 1304 /* We want to know the worst case, i.e. lowest possible value 1305 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, 1306 its offset is positive, and we have to be wary of code shrink; 1307 otherwise, it is negative, and we have to be vary of code 1308 size increase. */ 1309 if (flags.min_after_base) 1310 { 1311 /* If INSN is between REL_LAB and MIN_LAB, the size 1312 changes we are about to make can change the alignment 1313 within the observed offset, therefore we have to break 1314 it up into two parts that are independent. */ 1315 if (! flags.base_after_vec && flags.min_after_vec) 1316 { 1317 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); 1318 min_addr -= align_fuzz (insn, min_lab, 0, 0); 1319 } 1320 else 1321 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); 1322 } 1323 else 1324 { 1325 if (flags.base_after_vec && ! flags.min_after_vec) 1326 { 1327 min_addr -= align_fuzz (min_lab, insn, 0, ~0); 1328 min_addr -= align_fuzz (insn, rel_lab, 0, ~0); 1329 } 1330 else 1331 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); 1332 } 1333 /* Likewise, determine the highest lowest possible value 1334 for the offset of MAX_LAB. */ 1335 if (flags.max_after_base) 1336 { 1337 if (! flags.base_after_vec && flags.max_after_vec) 1338 { 1339 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); 1340 max_addr += align_fuzz (insn, max_lab, 0, ~0); 1341 } 1342 else 1343 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); 1344 } 1345 else 1346 { 1347 if (flags.base_after_vec && ! flags.max_after_vec) 1348 { 1349 max_addr += align_fuzz (max_lab, insn, 0, 0); 1350 max_addr += align_fuzz (insn, rel_lab, 0, 0); 1351 } 1352 else 1353 max_addr += align_fuzz (max_lab, rel_lab, 0, 0); 1354 } 1355 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, 1356 max_addr - rel_addr, 1357 body)); 1358 if (JUMP_TABLES_IN_TEXT_SECTION 1359#if !defined(READONLY_DATA_SECTION) 1360 || 1 1361#endif 1362 ) 1363 { 1364 insn_lengths[uid] 1365 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); 1366 insn_current_address += insn_lengths[uid]; 1367 if (insn_lengths[uid] != old_length) 1368 something_changed = 1; 1369 } 1370 1371 continue; 1372 } 1373#endif /* CASE_VECTOR_SHORTEN_MODE */ 1374 1375 if (! (varying_length[uid])) 1376 { 1377 if (GET_CODE (insn) == INSN 1378 && GET_CODE (PATTERN (insn)) == SEQUENCE) 1379 { 1380 int i; 1381 1382 body = PATTERN (insn); 1383 for (i = 0; i < XVECLEN (body, 0); i++) 1384 { 1385 rtx inner_insn = XVECEXP (body, 0, i); 1386 int inner_uid = INSN_UID (inner_insn); 1387 1388 INSN_ADDRESSES (inner_uid) = insn_current_address; 1389 1390 insn_current_address += insn_lengths[inner_uid]; 1391 } 1392 } 1393 else 1394 insn_current_address += insn_lengths[uid]; 1395 1396 continue; 1397 } 1398 1399 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) 1400 { 1401 int i; 1402 1403 body = PATTERN (insn); 1404 new_length = 0; 1405 for (i = 0; i < XVECLEN (body, 0); i++) 1406 { 1407 rtx inner_insn = XVECEXP (body, 0, i); 1408 int inner_uid = INSN_UID (inner_insn); 1409 int inner_length; 1410 1411 INSN_ADDRESSES (inner_uid) = insn_current_address; 1412 1413 /* insn_current_length returns 0 for insns with a 1414 non-varying length. */ 1415 if (! varying_length[inner_uid]) 1416 inner_length = insn_lengths[inner_uid]; 1417 else 1418 inner_length = insn_current_length (inner_insn); 1419 1420 if (inner_length != insn_lengths[inner_uid]) 1421 { 1422 insn_lengths[inner_uid] = inner_length; 1423 something_changed = 1; 1424 } 1425 insn_current_address += insn_lengths[inner_uid]; 1426 new_length += inner_length; 1427 } 1428 } 1429 else 1430 { 1431 new_length = insn_current_length (insn); 1432 insn_current_address += new_length; 1433 } 1434 1435#ifdef ADJUST_INSN_LENGTH 1436 /* If needed, do any adjustment. */ 1437 tmp_length = new_length; 1438 ADJUST_INSN_LENGTH (insn, new_length); 1439 insn_current_address += (new_length - tmp_length); 1440#endif 1441 1442 if (new_length != insn_lengths[uid]) 1443 { 1444 insn_lengths[uid] = new_length; 1445 something_changed = 1; 1446 } 1447 } 1448 /* For a non-optimizing compile, do only a single pass. */ 1449 if (!optimize) 1450 break; 1451 } 1452 1453 free (varying_length); 1454 1455#endif /* HAVE_ATTR_length */ 1456} 1457 1458#ifdef HAVE_ATTR_length 1459/* Given the body of an INSN known to be generated by an ASM statement, return 1460 the number of machine instructions likely to be generated for this insn. 1461 This is used to compute its length. */ 1462 1463static int 1464asm_insn_count (body) 1465 rtx body; 1466{ 1467 const char *template; 1468 int count = 1; 1469 1470 if (GET_CODE (body) == ASM_INPUT) 1471 template = XSTR (body, 0); 1472 else 1473 template = decode_asm_operands (body, NULL, NULL, NULL, NULL); 1474 1475 for (; *template; template++) 1476 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') 1477 count++; 1478 1479 return count; 1480} 1481#endif 1482 1483/* Output assembler code for the start of a function, 1484 and initialize some of the variables in this file 1485 for the new function. The label for the function and associated 1486 assembler pseudo-ops have already been output in `assemble_start_function'. 1487 1488 FIRST is the first insn of the rtl for the function being compiled. 1489 FILE is the file to write assembler code to. 1490 OPTIMIZE is nonzero if we should eliminate redundant 1491 test and compare insns. */ 1492 1493void 1494final_start_function (first, file, optimize) 1495 rtx first; 1496 FILE *file; 1497 int optimize ATTRIBUTE_UNUSED; 1498{ 1499 block_depth = 0; 1500 1501 this_is_asm_operands = 0; 1502 1503#ifdef NON_SAVING_SETJMP 1504 /* A function that calls setjmp should save and restore all the 1505 call-saved registers on a system where longjmp clobbers them. */ 1506 if (NON_SAVING_SETJMP && current_function_calls_setjmp) 1507 { 1508 int i; 1509 1510 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1511 if (!call_used_regs[i]) 1512 regs_ever_live[i] = 1; 1513 } 1514#endif 1515 1516 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED) 1517 notice_source_line (first); 1518 high_block_linenum = high_function_linenum = last_linenum; 1519 1520 (*debug_hooks->begin_prologue) (last_linenum, last_filename); 1521 1522#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO) 1523 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) 1524 dwarf2out_begin_prologue (0, NULL); 1525#endif 1526 1527#ifdef LEAF_REG_REMAP 1528 if (current_function_uses_only_leaf_regs) 1529 leaf_renumber_regs (first); 1530#endif 1531 1532 if (profile_block_flag) 1533 add_bb (file); 1534 1535 /* The Sun386i and perhaps other machines don't work right 1536 if the profiling code comes after the prologue. */ 1537#ifdef PROFILE_BEFORE_PROLOGUE 1538 if (current_function_profile) 1539 profile_function (file); 1540#endif /* PROFILE_BEFORE_PROLOGUE */ 1541 1542#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) 1543 if (dwarf2out_do_frame ()) 1544 dwarf2out_frame_debug (NULL_RTX); 1545#endif 1546 1547 /* If debugging, assign block numbers to all of the blocks in this 1548 function. */ 1549 if (write_symbols) 1550 { 1551 remove_unnecessary_notes (); 1552 reorder_blocks (); 1553 number_blocks (current_function_decl); 1554 /* We never actually put out begin/end notes for the top-level 1555 block in the function. But, conceptually, that block is 1556 always needed. */ 1557 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; 1558 } 1559 1560 /* First output the function prologue: code to set up the stack frame. */ 1561 (*targetm.asm_out.function_prologue) (file, get_frame_size ()); 1562 1563#ifdef VMS_DEBUGGING_INFO 1564 /* Output label after the prologue of the function. */ 1565 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG) 1566 vmsdbgout_after_prologue (); 1567#endif 1568 1569 /* If the machine represents the prologue as RTL, the profiling code must 1570 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ 1571#ifdef HAVE_prologue 1572 if (! HAVE_prologue) 1573#endif 1574 profile_after_prologue (file); 1575 1576 profile_label_no++; 1577} 1578 1579static void 1580profile_after_prologue (file) 1581 FILE *file ATTRIBUTE_UNUSED; 1582{ 1583#ifndef PROFILE_BEFORE_PROLOGUE 1584 if (current_function_profile) 1585 profile_function (file); 1586#endif /* not PROFILE_BEFORE_PROLOGUE */ 1587} 1588 1589static void 1590profile_function (file) 1591 FILE *file ATTRIBUTE_UNUSED; 1592{ 1593#ifndef NO_PROFILE_COUNTERS 1594 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); 1595#endif 1596#if defined(ASM_OUTPUT_REG_PUSH) 1597#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM) 1598 int sval = current_function_returns_struct; 1599#endif 1600#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) 1601 int cxt = current_function_needs_context; 1602#endif 1603#endif /* ASM_OUTPUT_REG_PUSH */ 1604 1605#ifndef NO_PROFILE_COUNTERS 1606 data_section (); 1607 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); 1608 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no); 1609 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); 1610#endif 1611 1612 function_section (current_function_decl); 1613 1614#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1615 if (sval) 1616 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM); 1617#else 1618#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1619 if (sval) 1620 { 1621 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM); 1622 } 1623#endif 1624#endif 1625 1626#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1627 if (cxt) 1628 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); 1629#else 1630#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1631 if (cxt) 1632 { 1633 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); 1634 } 1635#endif 1636#endif 1637 1638 FUNCTION_PROFILER (file, profile_label_no); 1639 1640#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1641 if (cxt) 1642 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); 1643#else 1644#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1645 if (cxt) 1646 { 1647 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); 1648 } 1649#endif 1650#endif 1651 1652#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1653 if (sval) 1654 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM); 1655#else 1656#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) 1657 if (sval) 1658 { 1659 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM); 1660 } 1661#endif 1662#endif 1663} 1664 1665/* Output assembler code for the end of a function. 1666 For clarity, args are same as those of `final_start_function' 1667 even though not all of them are needed. */ 1668 1669void 1670final_end_function () 1671{ 1672 app_disable (); 1673 1674 (*debug_hooks->end_function) (high_function_linenum); 1675 1676 /* Finally, output the function epilogue: 1677 code to restore the stack frame and return to the caller. */ 1678 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ()); 1679 1680 /* And debug output. */ 1681 (*debug_hooks->end_epilogue) (); 1682 1683 if (profile_block_flag) 1684 add_bb (file); 1685 1686#if defined (DWARF2_UNWIND_INFO) 1687 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG 1688 && dwarf2out_do_frame ()) 1689 dwarf2out_end_epilogue (); 1690#endif 1691} 1692 1693/* Output assembler code for some insns: all or part of a function. 1694 For description of args, see `final_start_function', above. 1695 1696 PRESCAN is 1 if we are not really outputting, 1697 just scanning as if we were outputting. 1698 Prescanning deletes and rearranges insns just like ordinary output. 1699 PRESCAN is -2 if we are outputting after having prescanned. 1700 In this case, don't try to delete or rearrange insns 1701 because that has already been done. 1702 Prescanning is done only on certain machines. */ 1703 1704void 1705final (first, file, optimize, prescan) 1706 rtx first; 1707 FILE *file; 1708 int optimize; 1709 int prescan; 1710{ 1711 rtx insn; 1712 int max_line = 0; 1713 int max_uid = 0; 1714 1715 last_ignored_compare = 0; 1716 new_block = 1; 1717 1718 /* Make a map indicating which line numbers appear in this function. 1719 When producing SDB debugging info, delete troublesome line number 1720 notes from inlined functions in other files as well as duplicate 1721 line number notes. */ 1722#ifdef SDB_DEBUGGING_INFO 1723 if (write_symbols == SDB_DEBUG) 1724 { 1725 rtx last = 0; 1726 for (insn = first; insn; insn = NEXT_INSN (insn)) 1727 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) 1728 { 1729 if ((RTX_INTEGRATED_P (insn) 1730 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0) 1731 || (last != 0 1732 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) 1733 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last))) 1734 { 1735 delete_insn (insn); /* Use delete_note. */ 1736 continue; 1737 } 1738 last = insn; 1739 if (NOTE_LINE_NUMBER (insn) > max_line) 1740 max_line = NOTE_LINE_NUMBER (insn); 1741 } 1742 } 1743 else 1744#endif 1745 { 1746 for (insn = first; insn; insn = NEXT_INSN (insn)) 1747 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line) 1748 max_line = NOTE_LINE_NUMBER (insn); 1749 } 1750 1751 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char)); 1752 1753 for (insn = first; insn; insn = NEXT_INSN (insn)) 1754 { 1755 if (INSN_UID (insn) > max_uid) /* find largest UID */ 1756 max_uid = INSN_UID (insn); 1757 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) 1758 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; 1759#ifdef HAVE_cc0 1760 /* If CC tracking across branches is enabled, record the insn which 1761 jumps to each branch only reached from one place. */ 1762 if (optimize && GET_CODE (insn) == JUMP_INSN) 1763 { 1764 rtx lab = JUMP_LABEL (insn); 1765 if (lab && LABEL_NUSES (lab) == 1) 1766 { 1767 LABEL_REFS (lab) = insn; 1768 } 1769 } 1770#endif 1771 } 1772 1773 init_recog (); 1774 1775 CC_STATUS_INIT; 1776 1777 /* Output the insns. */ 1778 for (insn = NEXT_INSN (first); insn;) 1779 { 1780#ifdef HAVE_ATTR_length 1781 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) 1782 { 1783#ifdef STACK_REGS 1784 /* Irritatingly, the reg-stack pass is creating new instructions 1785 and because of REG_DEAD note abuse it has to run after 1786 shorten_branches. Fake address of -1 then. */ 1787 insn_current_address = -1; 1788#else 1789 /* This can be triggered by bugs elsewhere in the compiler if 1790 new insns are created after init_insn_lengths is called. */ 1791 abort (); 1792#endif 1793 } 1794 else 1795 insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); 1796#endif /* HAVE_ATTR_length */ 1797 1798 insn = final_scan_insn (insn, file, optimize, prescan, 0); 1799 } 1800 1801 free (line_note_exists); 1802 line_note_exists = NULL; 1803} 1804 1805const char * 1806get_insn_template (code, insn) 1807 int code; 1808 rtx insn; 1809{ 1810 const void *output = insn_data[code].output; 1811 switch (insn_data[code].output_format) 1812 { 1813 case INSN_OUTPUT_FORMAT_SINGLE: 1814 return (const char *) output; 1815 case INSN_OUTPUT_FORMAT_MULTI: 1816 return ((const char *const *) output)[which_alternative]; 1817 case INSN_OUTPUT_FORMAT_FUNCTION: 1818 if (insn == NULL) 1819 abort (); 1820 return (*(insn_output_fn) output) (recog_data.operand, insn); 1821 1822 default: 1823 abort (); 1824 } 1825} 1826 1827/* The final scan for one insn, INSN. 1828 Args are same as in `final', except that INSN 1829 is the insn being scanned. 1830 Value returned is the next insn to be scanned. 1831 1832 NOPEEPHOLES is the flag to disallow peephole processing (currently 1833 used for within delayed branch sequence output). */ 1834 1835rtx 1836final_scan_insn (insn, file, optimize, prescan, nopeepholes) 1837 rtx insn; 1838 FILE *file; 1839 int optimize ATTRIBUTE_UNUSED; 1840 int prescan; 1841 int nopeepholes ATTRIBUTE_UNUSED; 1842{ 1843#ifdef HAVE_cc0 1844 rtx set; 1845#endif 1846 1847 insn_counter++; 1848 1849 /* Ignore deleted insns. These can occur when we split insns (due to a 1850 template of "#") while not optimizing. */ 1851 if (INSN_DELETED_P (insn)) 1852 return NEXT_INSN (insn); 1853 1854 switch (GET_CODE (insn)) 1855 { 1856 case NOTE: 1857 if (prescan > 0) 1858 break; 1859 1860 switch (NOTE_LINE_NUMBER (insn)) 1861 { 1862 case NOTE_INSN_DELETED: 1863 case NOTE_INSN_LOOP_BEG: 1864 case NOTE_INSN_LOOP_END: 1865 case NOTE_INSN_LOOP_CONT: 1866 case NOTE_INSN_LOOP_VTOP: 1867 case NOTE_INSN_FUNCTION_END: 1868 case NOTE_INSN_REPEATED_LINE_NUMBER: 1869 case NOTE_INSN_RANGE_BEG: 1870 case NOTE_INSN_RANGE_END: 1871 case NOTE_INSN_LIVE: 1872 case NOTE_INSN_EXPECTED_VALUE: 1873 break; 1874 1875 case NOTE_INSN_BASIC_BLOCK: 1876#ifdef IA64_UNWIND_INFO 1877 IA64_UNWIND_EMIT (asm_out_file, insn); 1878#endif 1879 if (flag_debug_asm) 1880 fprintf (asm_out_file, "\t%s basic block %d\n", 1881 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); 1882 break; 1883 1884 case NOTE_INSN_EH_REGION_BEG: 1885 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", 1886 NOTE_EH_HANDLER (insn)); 1887 break; 1888 1889 case NOTE_INSN_EH_REGION_END: 1890 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", 1891 NOTE_EH_HANDLER (insn)); 1892 break; 1893 1894 case NOTE_INSN_PROLOGUE_END: 1895 (*targetm.asm_out.function_end_prologue) (file); 1896 profile_after_prologue (file); 1897 break; 1898 1899 case NOTE_INSN_EPILOGUE_BEG: 1900 (*targetm.asm_out.function_begin_epilogue) (file); 1901 break; 1902 1903 case NOTE_INSN_FUNCTION_BEG: 1904 app_disable (); 1905 (*debug_hooks->end_prologue) (last_linenum); 1906 break; 1907 1908 case NOTE_INSN_BLOCK_BEG: 1909 if (debug_info_level == DINFO_LEVEL_NORMAL 1910 || debug_info_level == DINFO_LEVEL_VERBOSE 1911 || write_symbols == DWARF_DEBUG 1912 || write_symbols == DWARF2_DEBUG 1913 || write_symbols == VMS_AND_DWARF2_DEBUG 1914 || write_symbols == VMS_DEBUG) 1915 { 1916 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1917 1918 app_disable (); 1919 ++block_depth; 1920 high_block_linenum = last_linenum; 1921 1922 /* Output debugging info about the symbol-block beginning. */ 1923 (*debug_hooks->begin_block) (last_linenum, n); 1924 1925 /* Mark this block as output. */ 1926 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; 1927 } 1928 break; 1929 1930 case NOTE_INSN_BLOCK_END: 1931 if (debug_info_level == DINFO_LEVEL_NORMAL 1932 || debug_info_level == DINFO_LEVEL_VERBOSE 1933 || write_symbols == DWARF_DEBUG 1934 || write_symbols == DWARF2_DEBUG 1935 || write_symbols == VMS_AND_DWARF2_DEBUG 1936 || write_symbols == VMS_DEBUG) 1937 { 1938 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1939 1940 app_disable (); 1941 1942 /* End of a symbol-block. */ 1943 --block_depth; 1944 if (block_depth < 0) 1945 abort (); 1946 1947 (*debug_hooks->end_block) (high_block_linenum, n); 1948 } 1949 break; 1950 1951 case NOTE_INSN_DELETED_LABEL: 1952 /* Emit the label. We may have deleted the CODE_LABEL because 1953 the label could be proved to be unreachable, though still 1954 referenced (in the form of having its address taken. */ 1955 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 1956 break; 1957 1958 case 0: 1959 break; 1960 1961 default: 1962 if (NOTE_LINE_NUMBER (insn) <= 0) 1963 abort (); 1964 1965 /* This note is a line-number. */ 1966 { 1967 rtx note; 1968 int note_after = 0; 1969 1970 /* If there is anything real after this note, output it. 1971 If another line note follows, omit this one. */ 1972 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note)) 1973 { 1974 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL) 1975 break; 1976 1977 /* These types of notes can be significant 1978 so make sure the preceding line number stays. */ 1979 else if (GET_CODE (note) == NOTE 1980 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG 1981 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END 1982 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG)) 1983 break; 1984 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0) 1985 { 1986 /* Another line note follows; we can delete this note 1987 if no intervening line numbers have notes elsewhere. */ 1988 int num; 1989 for (num = NOTE_LINE_NUMBER (insn) + 1; 1990 num < NOTE_LINE_NUMBER (note); 1991 num++) 1992 if (line_note_exists[num]) 1993 break; 1994 1995 if (num >= NOTE_LINE_NUMBER (note)) 1996 note_after = 1; 1997 break; 1998 } 1999 } 2000 2001 /* Output this line note if it is the first or the last line 2002 note in a row. */ 2003 if (!note_after) 2004 { 2005 notice_source_line (insn); 2006 (*debug_hooks->source_line) (last_linenum, last_filename); 2007 } 2008 } 2009 break; 2010 } 2011 break; 2012 2013 case BARRIER: 2014#if defined (DWARF2_UNWIND_INFO) 2015 if (dwarf2out_do_frame ()) 2016 dwarf2out_frame_debug (insn); 2017#endif 2018 break; 2019 2020 case CODE_LABEL: 2021 /* The target port might emit labels in the output function for 2022 some insn, e.g. sh.c output_branchy_insn. */ 2023 if (CODE_LABEL_NUMBER (insn) <= max_labelno) 2024 { 2025 int align = LABEL_TO_ALIGNMENT (insn); 2026#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2027 int max_skip = LABEL_TO_MAX_SKIP (insn); 2028#endif 2029 2030 if (align && NEXT_INSN (insn)) 2031 { 2032#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2033 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); 2034#else 2035 ASM_OUTPUT_ALIGN (file, align); 2036#endif 2037 } 2038 } 2039#ifdef HAVE_cc0 2040 CC_STATUS_INIT; 2041 /* If this label is reached from only one place, set the condition 2042 codes from the instruction just before the branch. */ 2043 2044 /* Disabled because some insns set cc_status in the C output code 2045 and NOTICE_UPDATE_CC alone can set incorrect status. */ 2046 if (0 /* optimize && LABEL_NUSES (insn) == 1*/) 2047 { 2048 rtx jump = LABEL_REFS (insn); 2049 rtx barrier = prev_nonnote_insn (insn); 2050 rtx prev; 2051 /* If the LABEL_REFS field of this label has been set to point 2052 at a branch, the predecessor of the branch is a regular 2053 insn, and that branch is the only way to reach this label, 2054 set the condition codes based on the branch and its 2055 predecessor. */ 2056 if (barrier && GET_CODE (barrier) == BARRIER 2057 && jump && GET_CODE (jump) == JUMP_INSN 2058 && (prev = prev_nonnote_insn (jump)) 2059 && GET_CODE (prev) == INSN) 2060 { 2061 NOTICE_UPDATE_CC (PATTERN (prev), prev); 2062 NOTICE_UPDATE_CC (PATTERN (jump), jump); 2063 } 2064 } 2065#endif 2066 if (prescan > 0) 2067 break; 2068 new_block = 1; 2069 2070#ifdef FINAL_PRESCAN_LABEL 2071 FINAL_PRESCAN_INSN (insn, NULL, 0); 2072#endif 2073 2074 if (LABEL_NAME (insn)) 2075 (*debug_hooks->label) (insn); 2076 2077 if (app_on) 2078 { 2079 fputs (ASM_APP_OFF, file); 2080 app_on = 0; 2081 } 2082 if (NEXT_INSN (insn) != 0 2083 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) 2084 { 2085 rtx nextbody = PATTERN (NEXT_INSN (insn)); 2086 2087 /* If this label is followed by a jump-table, 2088 make sure we put the label in the read-only section. Also 2089 possibly write the label and jump table together. */ 2090 2091 if (GET_CODE (nextbody) == ADDR_VEC 2092 || GET_CODE (nextbody) == ADDR_DIFF_VEC) 2093 { 2094#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2095 /* In this case, the case vector is being moved by the 2096 target, so don't output the label at all. Leave that 2097 to the back end macros. */ 2098#else 2099 if (! JUMP_TABLES_IN_TEXT_SECTION) 2100 { 2101 int log_align; 2102 2103 readonly_data_section (); 2104 2105#ifdef ADDR_VEC_ALIGN 2106 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn)); 2107#else 2108 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 2109#endif 2110 ASM_OUTPUT_ALIGN (file, log_align); 2111 } 2112 else 2113 function_section (current_function_decl); 2114 2115#ifdef ASM_OUTPUT_CASE_LABEL 2116 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), 2117 NEXT_INSN (insn)); 2118#else 2119 if (LABEL_ALTERNATE_NAME (insn)) 2120 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); 2121 else 2122 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 2123#endif 2124#endif 2125 break; 2126 } 2127 } 2128 if (LABEL_ALTERNATE_NAME (insn)) 2129 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn); 2130 else 2131 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 2132 break; 2133 2134 default: 2135 { 2136 rtx body = PATTERN (insn); 2137 int insn_code_number; 2138 const char *template; 2139 rtx note; 2140 2141 /* An INSN, JUMP_INSN or CALL_INSN. 2142 First check for special kinds that recog doesn't recognize. */ 2143 2144 if (GET_CODE (body) == USE /* These are just declarations */ 2145 || GET_CODE (body) == CLOBBER) 2146 break; 2147 2148#ifdef HAVE_cc0 2149 /* If there is a REG_CC_SETTER note on this insn, it means that 2150 the setting of the condition code was done in the delay slot 2151 of the insn that branched here. So recover the cc status 2152 from the insn that set it. */ 2153 2154 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 2155 if (note) 2156 { 2157 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); 2158 cc_prev_status = cc_status; 2159 } 2160#endif 2161 2162 /* Detect insns that are really jump-tables 2163 and output them as such. */ 2164 2165 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 2166 { 2167#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) 2168 int vlen, idx; 2169#endif 2170 2171 if (prescan > 0) 2172 break; 2173 2174 if (app_on) 2175 { 2176 fputs (ASM_APP_OFF, file); 2177 app_on = 0; 2178 } 2179 2180#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2181 if (GET_CODE (body) == ADDR_VEC) 2182 { 2183#ifdef ASM_OUTPUT_ADDR_VEC 2184 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); 2185#else 2186 abort (); 2187#endif 2188 } 2189 else 2190 { 2191#ifdef ASM_OUTPUT_ADDR_DIFF_VEC 2192 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); 2193#else 2194 abort (); 2195#endif 2196 } 2197#else 2198 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); 2199 for (idx = 0; idx < vlen; idx++) 2200 { 2201 if (GET_CODE (body) == ADDR_VEC) 2202 { 2203#ifdef ASM_OUTPUT_ADDR_VEC_ELT 2204 ASM_OUTPUT_ADDR_VEC_ELT 2205 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); 2206#else 2207 abort (); 2208#endif 2209 } 2210 else 2211 { 2212#ifdef ASM_OUTPUT_ADDR_DIFF_ELT 2213 ASM_OUTPUT_ADDR_DIFF_ELT 2214 (file, 2215 body, 2216 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), 2217 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); 2218#else 2219 abort (); 2220#endif 2221 } 2222 } 2223#ifdef ASM_OUTPUT_CASE_END 2224 ASM_OUTPUT_CASE_END (file, 2225 CODE_LABEL_NUMBER (PREV_INSN (insn)), 2226 insn); 2227#endif 2228#endif 2229 2230 function_section (current_function_decl); 2231 2232 break; 2233 } 2234 2235 if (GET_CODE (body) == ASM_INPUT) 2236 { 2237 const char *string = XSTR (body, 0); 2238 2239 /* There's no telling what that did to the condition codes. */ 2240 CC_STATUS_INIT; 2241 if (prescan > 0) 2242 break; 2243 2244 if (string[0]) 2245 { 2246 if (! app_on) 2247 { 2248 fputs (ASM_APP_ON, file); 2249 app_on = 1; 2250 } 2251 fprintf (asm_out_file, "\t%s\n", string); 2252 } 2253 break; 2254 } 2255 2256 /* Detect `asm' construct with operands. */ 2257 if (asm_noperands (body) >= 0) 2258 { 2259 unsigned int noperands = asm_noperands (body); 2260 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx)); 2261 const char *string; 2262 2263 /* There's no telling what that did to the condition codes. */ 2264 CC_STATUS_INIT; 2265 if (prescan > 0) 2266 break; 2267 2268 /* Get out the operand values. */ 2269 string = decode_asm_operands (body, ops, NULL, NULL, NULL); 2270 /* Inhibit aborts on what would otherwise be compiler bugs. */ 2271 insn_noperands = noperands; 2272 this_is_asm_operands = insn; 2273 2274 /* Output the insn using them. */ 2275 if (string[0]) 2276 { 2277 if (! app_on) 2278 { 2279 fputs (ASM_APP_ON, file); 2280 app_on = 1; 2281 } 2282 output_asm_insn (string, ops); 2283 } 2284 2285 this_is_asm_operands = 0; 2286 break; 2287 } 2288 2289 if (prescan <= 0 && app_on) 2290 { 2291 fputs (ASM_APP_OFF, file); 2292 app_on = 0; 2293 } 2294 2295 if (GET_CODE (body) == SEQUENCE) 2296 { 2297 /* A delayed-branch sequence */ 2298 int i; 2299 rtx next; 2300 2301 if (prescan > 0) 2302 break; 2303 final_sequence = body; 2304 2305 /* The first insn in this SEQUENCE might be a JUMP_INSN that will 2306 force the restoration of a comparison that was previously 2307 thought unnecessary. If that happens, cancel this sequence 2308 and cause that insn to be restored. */ 2309 2310 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1); 2311 if (next != XVECEXP (body, 0, 1)) 2312 { 2313 final_sequence = 0; 2314 return next; 2315 } 2316 2317 for (i = 1; i < XVECLEN (body, 0); i++) 2318 { 2319 rtx insn = XVECEXP (body, 0, i); 2320 rtx next = NEXT_INSN (insn); 2321 /* We loop in case any instruction in a delay slot gets 2322 split. */ 2323 do 2324 insn = final_scan_insn (insn, file, 0, prescan, 1); 2325 while (insn != next); 2326 } 2327#ifdef DBR_OUTPUT_SEQEND 2328 DBR_OUTPUT_SEQEND (file); 2329#endif 2330 final_sequence = 0; 2331 2332 /* If the insn requiring the delay slot was a CALL_INSN, the 2333 insns in the delay slot are actually executed before the 2334 called function. Hence we don't preserve any CC-setting 2335 actions in these insns and the CC must be marked as being 2336 clobbered by the function. */ 2337 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN) 2338 { 2339 CC_STATUS_INIT; 2340 } 2341 break; 2342 } 2343 2344 /* We have a real machine instruction as rtl. */ 2345 2346 body = PATTERN (insn); 2347 2348#ifdef HAVE_cc0 2349 set = single_set (insn); 2350 2351 /* Check for redundant test and compare instructions 2352 (when the condition codes are already set up as desired). 2353 This is done only when optimizing; if not optimizing, 2354 it should be possible for the user to alter a variable 2355 with the debugger in between statements 2356 and the next statement should reexamine the variable 2357 to compute the condition codes. */ 2358 2359 if (optimize) 2360 { 2361#if 0 2362 rtx set = single_set (insn); 2363#endif 2364 2365 if (set 2366 && GET_CODE (SET_DEST (set)) == CC0 2367 && insn != last_ignored_compare) 2368 { 2369 if (GET_CODE (SET_SRC (set)) == SUBREG) 2370 SET_SRC (set) = alter_subreg (&SET_SRC (set)); 2371 else if (GET_CODE (SET_SRC (set)) == COMPARE) 2372 { 2373 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) 2374 XEXP (SET_SRC (set), 0) 2375 = alter_subreg (&XEXP (SET_SRC (set), 0)); 2376 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) 2377 XEXP (SET_SRC (set), 1) 2378 = alter_subreg (&XEXP (SET_SRC (set), 1)); 2379 } 2380 if ((cc_status.value1 != 0 2381 && rtx_equal_p (SET_SRC (set), cc_status.value1)) 2382 || (cc_status.value2 != 0 2383 && rtx_equal_p (SET_SRC (set), cc_status.value2))) 2384 { 2385 /* Don't delete insn if it has an addressing side-effect. */ 2386 if (! FIND_REG_INC_NOTE (insn, NULL_RTX) 2387 /* or if anything in it is volatile. */ 2388 && ! volatile_refs_p (PATTERN (insn))) 2389 { 2390 /* We don't really delete the insn; just ignore it. */ 2391 last_ignored_compare = insn; 2392 break; 2393 } 2394 } 2395 } 2396 } 2397#endif 2398 2399#ifndef STACK_REGS 2400 /* Don't bother outputting obvious no-ops, even without -O. 2401 This optimization is fast and doesn't interfere with debugging. 2402 Don't do this if the insn is in a delay slot, since this 2403 will cause an improper number of delay insns to be written. */ 2404 if (final_sequence == 0 2405 && prescan >= 0 2406 && GET_CODE (insn) == INSN && GET_CODE (body) == SET 2407 && GET_CODE (SET_SRC (body)) == REG 2408 && GET_CODE (SET_DEST (body)) == REG 2409 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) 2410 break; 2411#endif 2412 2413#ifdef HAVE_cc0 2414 /* If this is a conditional branch, maybe modify it 2415 if the cc's are in a nonstandard state 2416 so that it accomplishes the same thing that it would 2417 do straightforwardly if the cc's were set up normally. */ 2418 2419 if (cc_status.flags != 0 2420 && GET_CODE (insn) == JUMP_INSN 2421 && GET_CODE (body) == SET 2422 && SET_DEST (body) == pc_rtx 2423 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE 2424 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<' 2425 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx 2426 /* This is done during prescan; it is not done again 2427 in final scan when prescan has been done. */ 2428 && prescan >= 0) 2429 { 2430 /* This function may alter the contents of its argument 2431 and clear some of the cc_status.flags bits. 2432 It may also return 1 meaning condition now always true 2433 or -1 meaning condition now always false 2434 or 2 meaning condition nontrivial but altered. */ 2435 int result = alter_cond (XEXP (SET_SRC (body), 0)); 2436 /* If condition now has fixed value, replace the IF_THEN_ELSE 2437 with its then-operand or its else-operand. */ 2438 if (result == 1) 2439 SET_SRC (body) = XEXP (SET_SRC (body), 1); 2440 if (result == -1) 2441 SET_SRC (body) = XEXP (SET_SRC (body), 2); 2442 2443 /* The jump is now either unconditional or a no-op. 2444 If it has become a no-op, don't try to output it. 2445 (It would not be recognized.) */ 2446 if (SET_SRC (body) == pc_rtx) 2447 { 2448 delete_insn (insn); 2449 break; 2450 } 2451 else if (GET_CODE (SET_SRC (body)) == RETURN) 2452 /* Replace (set (pc) (return)) with (return). */ 2453 PATTERN (insn) = body = SET_SRC (body); 2454 2455 /* Rerecognize the instruction if it has changed. */ 2456 if (result != 0) 2457 INSN_CODE (insn) = -1; 2458 } 2459 2460 /* Make same adjustments to instructions that examine the 2461 condition codes without jumping and instructions that 2462 handle conditional moves (if this machine has either one). */ 2463 2464 if (cc_status.flags != 0 2465 && set != 0) 2466 { 2467 rtx cond_rtx, then_rtx, else_rtx; 2468 2469 if (GET_CODE (insn) != JUMP_INSN 2470 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) 2471 { 2472 cond_rtx = XEXP (SET_SRC (set), 0); 2473 then_rtx = XEXP (SET_SRC (set), 1); 2474 else_rtx = XEXP (SET_SRC (set), 2); 2475 } 2476 else 2477 { 2478 cond_rtx = SET_SRC (set); 2479 then_rtx = const_true_rtx; 2480 else_rtx = const0_rtx; 2481 } 2482 2483 switch (GET_CODE (cond_rtx)) 2484 { 2485 case GTU: 2486 case GT: 2487 case LTU: 2488 case LT: 2489 case GEU: 2490 case GE: 2491 case LEU: 2492 case LE: 2493 case EQ: 2494 case NE: 2495 { 2496 int result; 2497 if (XEXP (cond_rtx, 0) != cc0_rtx) 2498 break; 2499 result = alter_cond (cond_rtx); 2500 if (result == 1) 2501 validate_change (insn, &SET_SRC (set), then_rtx, 0); 2502 else if (result == -1) 2503 validate_change (insn, &SET_SRC (set), else_rtx, 0); 2504 else if (result == 2) 2505 INSN_CODE (insn) = -1; 2506 if (SET_DEST (set) == SET_SRC (set)) 2507 delete_insn (insn); 2508 } 2509 break; 2510 2511 default: 2512 break; 2513 } 2514 } 2515 2516#endif 2517 2518#ifdef HAVE_peephole 2519 /* Do machine-specific peephole optimizations if desired. */ 2520 2521 if (optimize && !flag_no_peephole && !nopeepholes) 2522 { 2523 rtx next = peephole (insn); 2524 /* When peepholing, if there were notes within the peephole, 2525 emit them before the peephole. */ 2526 if (next != 0 && next != NEXT_INSN (insn)) 2527 { 2528 rtx prev = PREV_INSN (insn); 2529 2530 for (note = NEXT_INSN (insn); note != next; 2531 note = NEXT_INSN (note)) 2532 final_scan_insn (note, file, optimize, prescan, nopeepholes); 2533 2534 /* In case this is prescan, put the notes 2535 in proper position for later rescan. */ 2536 note = NEXT_INSN (insn); 2537 PREV_INSN (note) = prev; 2538 NEXT_INSN (prev) = note; 2539 NEXT_INSN (PREV_INSN (next)) = insn; 2540 PREV_INSN (insn) = PREV_INSN (next); 2541 NEXT_INSN (insn) = next; 2542 PREV_INSN (next) = insn; 2543 } 2544 2545 /* PEEPHOLE might have changed this. */ 2546 body = PATTERN (insn); 2547 } 2548#endif 2549 2550 /* Try to recognize the instruction. 2551 If successful, verify that the operands satisfy the 2552 constraints for the instruction. Crash if they don't, 2553 since `reload' should have changed them so that they do. */ 2554 2555 insn_code_number = recog_memoized (insn); 2556 cleanup_subreg_operands (insn); 2557 2558 /* Dump the insn in the assembly for debugging. */ 2559 if (flag_dump_rtl_in_asm) 2560 { 2561 print_rtx_head = ASM_COMMENT_START; 2562 print_rtl_single (asm_out_file, insn); 2563 print_rtx_head = ""; 2564 } 2565 2566 if (! constrain_operands_cached (1)) 2567 fatal_insn_not_found (insn); 2568 2569 /* Some target machines need to prescan each insn before 2570 it is output. */ 2571 2572#ifdef FINAL_PRESCAN_INSN 2573 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); 2574#endif 2575 2576#ifdef HAVE_conditional_execution 2577 if (GET_CODE (PATTERN (insn)) == COND_EXEC) 2578 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); 2579 else 2580 current_insn_predicate = NULL_RTX; 2581#endif 2582 2583#ifdef HAVE_cc0 2584 cc_prev_status = cc_status; 2585 2586 /* Update `cc_status' for this instruction. 2587 The instruction's output routine may change it further. 2588 If the output routine for a jump insn needs to depend 2589 on the cc status, it should look at cc_prev_status. */ 2590 2591 NOTICE_UPDATE_CC (body, insn); 2592#endif 2593 2594 current_output_insn = debug_insn = insn; 2595 2596#if defined (DWARF2_UNWIND_INFO) 2597 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ()) 2598 dwarf2out_frame_debug (insn); 2599#endif 2600 2601 /* Find the proper template for this insn. */ 2602 template = get_insn_template (insn_code_number, insn); 2603 2604 /* If the C code returns 0, it means that it is a jump insn 2605 which follows a deleted test insn, and that test insn 2606 needs to be reinserted. */ 2607 if (template == 0) 2608 { 2609 rtx prev; 2610 2611 if (prev_nonnote_insn (insn) != last_ignored_compare) 2612 abort (); 2613 new_block = 0; 2614 2615 /* We have already processed the notes between the setter and 2616 the user. Make sure we don't process them again, this is 2617 particularly important if one of the notes is a block 2618 scope note or an EH note. */ 2619 for (prev = insn; 2620 prev != last_ignored_compare; 2621 prev = PREV_INSN (prev)) 2622 { 2623 if (GET_CODE (prev) == NOTE) 2624 delete_insn (prev); /* Use delete_note. */ 2625 } 2626 2627 return prev; 2628 } 2629 2630 /* If the template is the string "#", it means that this insn must 2631 be split. */ 2632 if (template[0] == '#' && template[1] == '\0') 2633 { 2634 rtx new = try_split (body, insn, 0); 2635 2636 /* If we didn't split the insn, go away. */ 2637 if (new == insn && PATTERN (new) == body) 2638 fatal_insn ("could not split insn", insn); 2639 2640#ifdef HAVE_ATTR_length 2641 /* This instruction should have been split in shorten_branches, 2642 to ensure that we would have valid length info for the 2643 splitees. */ 2644 abort (); 2645#endif 2646 2647 new_block = 0; 2648 return new; 2649 } 2650 2651 if (prescan > 0) 2652 break; 2653 2654#ifdef IA64_UNWIND_INFO 2655 IA64_UNWIND_EMIT (asm_out_file, insn); 2656#endif 2657 /* Output assembler code from the template. */ 2658 2659 output_asm_insn (template, recog_data.operand); 2660 2661#if defined (DWARF2_UNWIND_INFO) 2662#if defined (HAVE_prologue) 2663 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ()) 2664 dwarf2out_frame_debug (insn); 2665#else 2666 if (!ACCUMULATE_OUTGOING_ARGS 2667 && GET_CODE (insn) == INSN 2668 && dwarf2out_do_frame ()) 2669 dwarf2out_frame_debug (insn); 2670#endif 2671#endif 2672 2673#if 0 2674 /* It's not at all clear why we did this and doing so interferes 2675 with tests we'd like to do to use REG_WAS_0 notes, so let's try 2676 with this out. */ 2677 2678 /* Mark this insn as having been output. */ 2679 INSN_DELETED_P (insn) = 1; 2680#endif 2681 2682 /* Emit information for vtable gc. */ 2683 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX); 2684 if (note) 2685 assemble_vtable_entry (XEXP (XEXP (note, 0), 0), 2686 INTVAL (XEXP (XEXP (note, 0), 1))); 2687 2688 current_output_insn = debug_insn = 0; 2689 } 2690 } 2691 return NEXT_INSN (insn); 2692} 2693 2694/* Output debugging info to the assembler file FILE 2695 based on the NOTE-insn INSN, assumed to be a line number. */ 2696 2697static void 2698notice_source_line (insn) 2699 rtx insn; 2700{ 2701 const char *filename = NOTE_SOURCE_FILE (insn); 2702 2703 last_filename = filename; 2704 last_linenum = NOTE_LINE_NUMBER (insn); 2705 high_block_linenum = MAX (last_linenum, high_block_linenum); 2706 high_function_linenum = MAX (last_linenum, high_function_linenum); 2707} 2708 2709/* For each operand in INSN, simplify (subreg (reg)) so that it refers 2710 directly to the desired hard register. */ 2711 2712void 2713cleanup_subreg_operands (insn) 2714 rtx insn; 2715{ 2716 int i; 2717 extract_insn_cached (insn); 2718 for (i = 0; i < recog_data.n_operands; i++) 2719 { 2720 /* The following test cannot use recog_data.operand when tesing 2721 for a SUBREG: the underlying object might have been changed 2722 already if we are inside a match_operator expression that 2723 matches the else clause. Instead we test the underlying 2724 expression directly. */ 2725 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2726 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); 2727 else if (GET_CODE (recog_data.operand[i]) == PLUS 2728 || GET_CODE (recog_data.operand[i]) == MULT 2729 || GET_CODE (recog_data.operand[i]) == MEM) 2730 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]); 2731 } 2732 2733 for (i = 0; i < recog_data.n_dups; i++) 2734 { 2735 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) 2736 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); 2737 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS 2738 || GET_CODE (*recog_data.dup_loc[i]) == MULT 2739 || GET_CODE (*recog_data.dup_loc[i]) == MEM) 2740 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]); 2741 } 2742} 2743 2744/* If X is a SUBREG, replace it with a REG or a MEM, 2745 based on the thing it is a subreg of. */ 2746 2747rtx 2748alter_subreg (xp) 2749 rtx *xp; 2750{ 2751 rtx x = *xp; 2752 rtx y = SUBREG_REG (x); 2753 2754 /* simplify_subreg does not remove subreg from volatile references. 2755 We are required to. */ 2756 if (GET_CODE (y) == MEM) 2757 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x)); 2758 else 2759 { 2760 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), 2761 SUBREG_BYTE (x)); 2762 2763 if (new != 0) 2764 *xp = new; 2765 /* Simplify_subreg can't handle some REG cases, but we have to. */ 2766 else if (GET_CODE (y) == REG) 2767 { 2768 unsigned int regno = subreg_hard_regno (x, 1); 2769 PUT_CODE (x, REG); 2770 REGNO (x) = regno; 2771 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y); 2772 /* This field has a different meaning for REGs and SUBREGs. Make 2773 sure to clear it! */ 2774 x->used = 0; 2775 } 2776 else 2777 abort (); 2778 } 2779 2780 return *xp; 2781} 2782 2783/* Do alter_subreg on all the SUBREGs contained in X. */ 2784 2785static rtx 2786walk_alter_subreg (xp) 2787 rtx *xp; 2788{ 2789 rtx x = *xp; 2790 switch (GET_CODE (x)) 2791 { 2792 case PLUS: 2793 case MULT: 2794 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); 2795 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1)); 2796 break; 2797 2798 case MEM: 2799 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); 2800 break; 2801 2802 case SUBREG: 2803 return alter_subreg (xp); 2804 2805 default: 2806 break; 2807 } 2808 2809 return *xp; 2810} 2811 2812#ifdef HAVE_cc0 2813 2814/* Given BODY, the body of a jump instruction, alter the jump condition 2815 as required by the bits that are set in cc_status.flags. 2816 Not all of the bits there can be handled at this level in all cases. 2817 2818 The value is normally 0. 2819 1 means that the condition has become always true. 2820 -1 means that the condition has become always false. 2821 2 means that COND has been altered. */ 2822 2823static int 2824alter_cond (cond) 2825 rtx cond; 2826{ 2827 int value = 0; 2828 2829 if (cc_status.flags & CC_REVERSED) 2830 { 2831 value = 2; 2832 PUT_CODE (cond, swap_condition (GET_CODE (cond))); 2833 } 2834 2835 if (cc_status.flags & CC_INVERTED) 2836 { 2837 value = 2; 2838 PUT_CODE (cond, reverse_condition (GET_CODE (cond))); 2839 } 2840 2841 if (cc_status.flags & CC_NOT_POSITIVE) 2842 switch (GET_CODE (cond)) 2843 { 2844 case LE: 2845 case LEU: 2846 case GEU: 2847 /* Jump becomes unconditional. */ 2848 return 1; 2849 2850 case GT: 2851 case GTU: 2852 case LTU: 2853 /* Jump becomes no-op. */ 2854 return -1; 2855 2856 case GE: 2857 PUT_CODE (cond, EQ); 2858 value = 2; 2859 break; 2860 2861 case LT: 2862 PUT_CODE (cond, NE); 2863 value = 2; 2864 break; 2865 2866 default: 2867 break; 2868 } 2869 2870 if (cc_status.flags & CC_NOT_NEGATIVE) 2871 switch (GET_CODE (cond)) 2872 { 2873 case GE: 2874 case GEU: 2875 /* Jump becomes unconditional. */ 2876 return 1; 2877 2878 case LT: 2879 case LTU: 2880 /* Jump becomes no-op. */ 2881 return -1; 2882 2883 case LE: 2884 case LEU: 2885 PUT_CODE (cond, EQ); 2886 value = 2; 2887 break; 2888 2889 case GT: 2890 case GTU: 2891 PUT_CODE (cond, NE); 2892 value = 2; 2893 break; 2894 2895 default: 2896 break; 2897 } 2898 2899 if (cc_status.flags & CC_NO_OVERFLOW) 2900 switch (GET_CODE (cond)) 2901 { 2902 case GEU: 2903 /* Jump becomes unconditional. */ 2904 return 1; 2905 2906 case LEU: 2907 PUT_CODE (cond, EQ); 2908 value = 2; 2909 break; 2910 2911 case GTU: 2912 PUT_CODE (cond, NE); 2913 value = 2; 2914 break; 2915 2916 case LTU: 2917 /* Jump becomes no-op. */ 2918 return -1; 2919 2920 default: 2921 break; 2922 } 2923 2924 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) 2925 switch (GET_CODE (cond)) 2926 { 2927 default: 2928 abort (); 2929 2930 case NE: 2931 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); 2932 value = 2; 2933 break; 2934 2935 case EQ: 2936 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); 2937 value = 2; 2938 break; 2939 } 2940 2941 if (cc_status.flags & CC_NOT_SIGNED) 2942 /* The flags are valid if signed condition operators are converted 2943 to unsigned. */ 2944 switch (GET_CODE (cond)) 2945 { 2946 case LE: 2947 PUT_CODE (cond, LEU); 2948 value = 2; 2949 break; 2950 2951 case LT: 2952 PUT_CODE (cond, LTU); 2953 value = 2; 2954 break; 2955 2956 case GT: 2957 PUT_CODE (cond, GTU); 2958 value = 2; 2959 break; 2960 2961 case GE: 2962 PUT_CODE (cond, GEU); 2963 value = 2; 2964 break; 2965 2966 default: 2967 break; 2968 } 2969 2970 return value; 2971} 2972#endif 2973 2974/* Report inconsistency between the assembler template and the operands. 2975 In an `asm', it's the user's fault; otherwise, the compiler's fault. */ 2976 2977void 2978output_operand_lossage (msgid) 2979 const char *msgid; 2980{ 2981 if (this_is_asm_operands) 2982 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid)); 2983 else 2984 internal_error ("output_operand: %s", _(msgid)); 2985} 2986 2987/* Output of assembler code from a template, and its subroutines. */ 2988 2989/* Annotate the assembly with a comment describing the pattern and 2990 alternative used. */ 2991 2992static void 2993output_asm_name () 2994{ 2995 if (debug_insn) 2996 { 2997 int num = INSN_CODE (debug_insn); 2998 fprintf (asm_out_file, "\t%s %d\t%s", 2999 ASM_COMMENT_START, INSN_UID (debug_insn), 3000 insn_data[num].name); 3001 if (insn_data[num].n_alternatives > 1) 3002 fprintf (asm_out_file, "/%d", which_alternative + 1); 3003#ifdef HAVE_ATTR_length 3004 fprintf (asm_out_file, "\t[length = %d]", 3005 get_attr_length (debug_insn)); 3006#endif 3007 /* Clear this so only the first assembler insn 3008 of any rtl insn will get the special comment for -dp. */ 3009 debug_insn = 0; 3010 } 3011} 3012 3013/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 3014 or its address, return that expr . Set *PADDRESSP to 1 if the expr 3015 corresponds to the address of the object and 0 if to the object. */ 3016 3017static tree 3018get_mem_expr_from_op (op, paddressp) 3019 rtx op; 3020 int *paddressp; 3021{ 3022 tree expr; 3023 int inner_addressp; 3024 3025 *paddressp = 0; 3026 3027 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER) 3028 return REGNO_DECL (ORIGINAL_REGNO (op)); 3029 else if (GET_CODE (op) != MEM) 3030 return 0; 3031 3032 if (MEM_EXPR (op) != 0) 3033 return MEM_EXPR (op); 3034 3035 /* Otherwise we have an address, so indicate it and look at the address. */ 3036 *paddressp = 1; 3037 op = XEXP (op, 0); 3038 3039 /* First check if we have a decl for the address, then look at the right side 3040 if it is a PLUS. Otherwise, strip off arithmetic and keep looking. 3041 But don't allow the address to itself be indirect. */ 3042 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) 3043 return expr; 3044 else if (GET_CODE (op) == PLUS 3045 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) 3046 return expr; 3047 3048 while (GET_RTX_CLASS (GET_CODE (op)) == '1' 3049 || GET_RTX_CLASS (GET_CODE (op)) == '2') 3050 op = XEXP (op, 0); 3051 3052 expr = get_mem_expr_from_op (op, &inner_addressp); 3053 return inner_addressp ? 0 : expr; 3054} 3055 3056/* Output operand names for assembler instructions. OPERANDS is the 3057 operand vector, OPORDER is the order to write the operands, and NOPS 3058 is the number of operands to write. */ 3059 3060static void 3061output_asm_operand_names (operands, oporder, nops) 3062 rtx *operands; 3063 int *oporder; 3064 int nops; 3065{ 3066 int wrote = 0; 3067 int i; 3068 3069 for (i = 0; i < nops; i++) 3070 { 3071 int addressp; 3072 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp); 3073 3074 if (expr) 3075 { 3076 fprintf (asm_out_file, "%c%s %s", 3077 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START, 3078 addressp ? "*" : ""); 3079 print_mem_expr (asm_out_file, expr); 3080 wrote = 1; 3081 } 3082 } 3083} 3084 3085/* Output text from TEMPLATE to the assembler output file, 3086 obeying %-directions to substitute operands taken from 3087 the vector OPERANDS. 3088 3089 %N (for N a digit) means print operand N in usual manner. 3090 %lN means require operand N to be a CODE_LABEL or LABEL_REF 3091 and print the label name with no punctuation. 3092 %cN means require operand N to be a constant 3093 and print the constant expression with no punctuation. 3094 %aN means expect operand N to be a memory address 3095 (not a memory reference!) and print a reference 3096 to that address. 3097 %nN means expect operand N to be a constant 3098 and print a constant expression for minus the value 3099 of the operand, with no other punctuation. */ 3100 3101void 3102output_asm_insn (template, operands) 3103 const char *template; 3104 rtx *operands; 3105{ 3106 const char *p; 3107 int c; 3108#ifdef ASSEMBLER_DIALECT 3109 int dialect = 0; 3110#endif 3111 int oporder[MAX_RECOG_OPERANDS]; 3112 char opoutput[MAX_RECOG_OPERANDS]; 3113 int ops = 0; 3114 3115 /* An insn may return a null string template 3116 in a case where no assembler code is needed. */ 3117 if (*template == 0) 3118 return; 3119 3120 memset (opoutput, 0, sizeof opoutput); 3121 p = template; 3122 putc ('\t', asm_out_file); 3123 3124#ifdef ASM_OUTPUT_OPCODE 3125 ASM_OUTPUT_OPCODE (asm_out_file, p); 3126#endif 3127 3128 while ((c = *p++)) 3129 switch (c) 3130 { 3131 case '\n': 3132 if (flag_verbose_asm) 3133 output_asm_operand_names (operands, oporder, ops); 3134 if (flag_print_asm_name) 3135 output_asm_name (); 3136 3137 ops = 0; 3138 memset (opoutput, 0, sizeof opoutput); 3139 3140 putc (c, asm_out_file); 3141#ifdef ASM_OUTPUT_OPCODE 3142 while ((c = *p) == '\t') 3143 { 3144 putc (c, asm_out_file); 3145 p++; 3146 } 3147 ASM_OUTPUT_OPCODE (asm_out_file, p); 3148#endif 3149 break; 3150 3151#ifdef ASSEMBLER_DIALECT 3152 case '{': 3153 { 3154 int i; 3155 3156 if (dialect) 3157 output_operand_lossage ("nested assembly dialect alternatives"); 3158 else 3159 dialect = 1; 3160 3161 /* If we want the first dialect, do nothing. Otherwise, skip 3162 DIALECT_NUMBER of strings ending with '|'. */ 3163 for (i = 0; i < dialect_number; i++) 3164 { 3165 while (*p && *p != '}' && *p++ != '|') 3166 ; 3167 if (*p == '}') 3168 break; 3169 if (*p == '|') 3170 p++; 3171 } 3172 3173 if (*p == '\0') 3174 output_operand_lossage ("unterminated assembly dialect alternative"); 3175 } 3176 break; 3177 3178 case '|': 3179 if (dialect) 3180 { 3181 /* Skip to close brace. */ 3182 do 3183 { 3184 if (*p == '\0') 3185 { 3186 output_operand_lossage ("unterminated assembly dialect alternative"); 3187 break; 3188 } 3189 } 3190 while (*p++ != '}'); 3191 dialect = 0; 3192 } 3193 else 3194 putc (c, asm_out_file); 3195 break; 3196 3197 case '}': 3198 if (! dialect) 3199 putc (c, asm_out_file); 3200 dialect = 0; 3201 break; 3202#endif 3203 3204 case '%': 3205 /* %% outputs a single %. */ 3206 if (*p == '%') 3207 { 3208 p++; 3209 putc (c, asm_out_file); 3210 } 3211 /* %= outputs a number which is unique to each insn in the entire 3212 compilation. This is useful for making local labels that are 3213 referred to more than once in a given insn. */ 3214 else if (*p == '=') 3215 { 3216 p++; 3217 fprintf (asm_out_file, "%d", insn_counter); 3218 } 3219 /* % followed by a letter and some digits 3220 outputs an operand in a special way depending on the letter. 3221 Letters `acln' are implemented directly. 3222 Other letters are passed to `output_operand' so that 3223 the PRINT_OPERAND macro can define them. */ 3224 else if (ISALPHA (*p)) 3225 { 3226 int letter = *p++; 3227 c = atoi (p); 3228 3229 if (! ISDIGIT (*p)) 3230 output_operand_lossage ("operand number missing after %-letter"); 3231 else if (this_is_asm_operands 3232 && (c < 0 || (unsigned int) c >= insn_noperands)) 3233 output_operand_lossage ("operand number out of range"); 3234 else if (letter == 'l') 3235 output_asm_label (operands[c]); 3236 else if (letter == 'a') 3237 output_address (operands[c]); 3238 else if (letter == 'c') 3239 { 3240 if (CONSTANT_ADDRESS_P (operands[c])) 3241 output_addr_const (asm_out_file, operands[c]); 3242 else 3243 output_operand (operands[c], 'c'); 3244 } 3245 else if (letter == 'n') 3246 { 3247 if (GET_CODE (operands[c]) == CONST_INT) 3248 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3249 - INTVAL (operands[c])); 3250 else 3251 { 3252 putc ('-', asm_out_file); 3253 output_addr_const (asm_out_file, operands[c]); 3254 } 3255 } 3256 else 3257 output_operand (operands[c], letter); 3258 3259 if (!opoutput[c]) 3260 oporder[ops++] = c; 3261 opoutput[c] = 1; 3262 3263 while (ISDIGIT (c = *p)) 3264 p++; 3265 } 3266 /* % followed by a digit outputs an operand the default way. */ 3267 else if (ISDIGIT (*p)) 3268 { 3269 c = atoi (p); 3270 if (this_is_asm_operands 3271 && (c < 0 || (unsigned int) c >= insn_noperands)) 3272 output_operand_lossage ("operand number out of range"); 3273 else 3274 output_operand (operands[c], 0); 3275 3276 if (!opoutput[c]) 3277 oporder[ops++] = c; 3278 opoutput[c] = 1; 3279 3280 while (ISDIGIT (c = *p)) 3281 p++; 3282 } 3283 /* % followed by punctuation: output something for that 3284 punctuation character alone, with no operand. 3285 The PRINT_OPERAND macro decides what is actually done. */ 3286#ifdef PRINT_OPERAND_PUNCT_VALID_P 3287 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) 3288 output_operand (NULL_RTX, *p++); 3289#endif 3290 else 3291 output_operand_lossage ("invalid %%-code"); 3292 break; 3293 3294 default: 3295 putc (c, asm_out_file); 3296 } 3297 3298 /* Write out the variable names for operands, if we know them. */ 3299 if (flag_verbose_asm) 3300 output_asm_operand_names (operands, oporder, ops); 3301 if (flag_print_asm_name) 3302 output_asm_name (); 3303 3304 putc ('\n', asm_out_file); 3305} 3306 3307/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ 3308 3309void 3310output_asm_label (x) 3311 rtx x; 3312{ 3313 char buf[256]; 3314 3315 if (GET_CODE (x) == LABEL_REF) 3316 x = XEXP (x, 0); 3317 if (GET_CODE (x) == CODE_LABEL 3318 || (GET_CODE (x) == NOTE 3319 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) 3320 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3321 else 3322 output_operand_lossage ("`%l' operand isn't a label"); 3323 3324 assemble_name (asm_out_file, buf); 3325} 3326 3327/* Print operand X using machine-dependent assembler syntax. 3328 The macro PRINT_OPERAND is defined just to control this function. 3329 CODE is a non-digit that preceded the operand-number in the % spec, 3330 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char 3331 between the % and the digits. 3332 When CODE is a non-letter, X is 0. 3333 3334 The meanings of the letters are machine-dependent and controlled 3335 by PRINT_OPERAND. */ 3336 3337static void 3338output_operand (x, code) 3339 rtx x; 3340 int code ATTRIBUTE_UNUSED; 3341{ 3342 if (x && GET_CODE (x) == SUBREG) 3343 x = alter_subreg (&x); 3344 3345 /* If X is a pseudo-register, abort now rather than writing trash to the 3346 assembler file. */ 3347 3348 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) 3349 abort (); 3350 3351 PRINT_OPERAND (asm_out_file, x, code); 3352} 3353 3354/* Print a memory reference operand for address X 3355 using machine-dependent assembler syntax. 3356 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ 3357 3358void 3359output_address (x) 3360 rtx x; 3361{ 3362 walk_alter_subreg (&x); 3363 PRINT_OPERAND_ADDRESS (asm_out_file, x); 3364} 3365 3366/* Print an integer constant expression in assembler syntax. 3367 Addition and subtraction are the only arithmetic 3368 that may appear in these expressions. */ 3369 3370void 3371output_addr_const (file, x) 3372 FILE *file; 3373 rtx x; 3374{ 3375 char buf[256]; 3376 3377 restart: 3378 switch (GET_CODE (x)) 3379 { 3380 case PC: 3381 putc ('.', file); 3382 break; 3383 3384 case SYMBOL_REF: 3385#ifdef ASM_OUTPUT_SYMBOL_REF 3386 ASM_OUTPUT_SYMBOL_REF (file, x); 3387#else 3388 assemble_name (file, XSTR (x, 0)); 3389#endif 3390 break; 3391 3392 case LABEL_REF: 3393 x = XEXP (x, 0); 3394 /* Fall through. */ 3395 case CODE_LABEL: 3396 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3397#ifdef ASM_OUTPUT_LABEL_REF 3398 ASM_OUTPUT_LABEL_REF (file, buf); 3399#else 3400 assemble_name (file, buf); 3401#endif 3402 break; 3403 3404 case CONST_INT: 3405 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); 3406 break; 3407 3408 case CONST: 3409 /* This used to output parentheses around the expression, 3410 but that does not work on the 386 (either ATT or BSD assembler). */ 3411 output_addr_const (file, XEXP (x, 0)); 3412 break; 3413 3414 case CONST_DOUBLE: 3415 if (GET_MODE (x) == VOIDmode) 3416 { 3417 /* We can use %d if the number is one word and positive. */ 3418 if (CONST_DOUBLE_HIGH (x)) 3419 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, 3420 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); 3421 else if (CONST_DOUBLE_LOW (x) < 0) 3422 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); 3423 else 3424 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); 3425 } 3426 else 3427 /* We can't handle floating point constants; 3428 PRINT_OPERAND must handle them. */ 3429 output_operand_lossage ("floating constant misused"); 3430 break; 3431 3432 case PLUS: 3433 /* Some assemblers need integer constants to appear last (eg masm). */ 3434 if (GET_CODE (XEXP (x, 0)) == CONST_INT) 3435 { 3436 output_addr_const (file, XEXP (x, 1)); 3437 if (INTVAL (XEXP (x, 0)) >= 0) 3438 fprintf (file, "+"); 3439 output_addr_const (file, XEXP (x, 0)); 3440 } 3441 else 3442 { 3443 output_addr_const (file, XEXP (x, 0)); 3444 if (GET_CODE (XEXP (x, 1)) != CONST_INT 3445 || INTVAL (XEXP (x, 1)) >= 0) 3446 fprintf (file, "+"); 3447 output_addr_const (file, XEXP (x, 1)); 3448 } 3449 break; 3450 3451 case MINUS: 3452 /* Avoid outputting things like x-x or x+5-x, 3453 since some assemblers can't handle that. */ 3454 x = simplify_subtraction (x); 3455 if (GET_CODE (x) != MINUS) 3456 goto restart; 3457 3458 output_addr_const (file, XEXP (x, 0)); 3459 fprintf (file, "-"); 3460 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) 3461 || GET_CODE (XEXP (x, 1)) == PC 3462 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) 3463 output_addr_const (file, XEXP (x, 1)); 3464 else 3465 { 3466 fputs (targetm.asm_out.open_paren, file); 3467 output_addr_const (file, XEXP (x, 1)); 3468 fputs (targetm.asm_out.close_paren, file); 3469 } 3470 break; 3471 3472 case ZERO_EXTEND: 3473 case SIGN_EXTEND: 3474 output_addr_const (file, XEXP (x, 0)); 3475 break; 3476 3477 default: 3478#ifdef OUTPUT_ADDR_CONST_EXTRA 3479 OUTPUT_ADDR_CONST_EXTRA (file, x, fail); 3480 break; 3481 3482 fail: 3483#endif 3484 output_operand_lossage ("invalid expression as operand"); 3485 } 3486} 3487 3488/* A poor man's fprintf, with the added features of %I, %R, %L, and %U. 3489 %R prints the value of REGISTER_PREFIX. 3490 %L prints the value of LOCAL_LABEL_PREFIX. 3491 %U prints the value of USER_LABEL_PREFIX. 3492 %I prints the value of IMMEDIATE_PREFIX. 3493 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. 3494 Also supported are %d, %x, %s, %e, %f, %g and %%. 3495 3496 We handle alternate assembler dialects here, just like output_asm_insn. */ 3497 3498void 3499asm_fprintf VPARAMS ((FILE *file, const char *p, ...)) 3500{ 3501 char buf[10]; 3502 char *q, c; 3503 3504 VA_OPEN (argptr, p); 3505 VA_FIXEDARG (argptr, FILE *, file); 3506 VA_FIXEDARG (argptr, const char *, p); 3507 3508 buf[0] = '%'; 3509 3510 while ((c = *p++)) 3511 switch (c) 3512 { 3513#ifdef ASSEMBLER_DIALECT 3514 case '{': 3515 { 3516 int i; 3517 3518 /* If we want the first dialect, do nothing. Otherwise, skip 3519 DIALECT_NUMBER of strings ending with '|'. */ 3520 for (i = 0; i < dialect_number; i++) 3521 { 3522 while (*p && *p++ != '|') 3523 ; 3524 3525 if (*p == '|') 3526 p++; 3527 } 3528 } 3529 break; 3530 3531 case '|': 3532 /* Skip to close brace. */ 3533 while (*p && *p++ != '}') 3534 ; 3535 break; 3536 3537 case '}': 3538 break; 3539#endif 3540 3541 case '%': 3542 c = *p++; 3543 q = &buf[1]; 3544 while (ISDIGIT (c) || c == '.') 3545 { 3546 *q++ = c; 3547 c = *p++; 3548 } 3549 switch (c) 3550 { 3551 case '%': 3552 fprintf (file, "%%"); 3553 break; 3554 3555 case 'd': case 'i': case 'u': 3556 case 'x': case 'p': case 'X': 3557 case 'o': 3558 *q++ = c; 3559 *q = 0; 3560 fprintf (file, buf, va_arg (argptr, int)); 3561 break; 3562 3563 case 'w': 3564 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases, 3565 but we do not check for those cases. It means that the value 3566 is a HOST_WIDE_INT, which may be either `int' or `long'. */ 3567 3568#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT 3569#else 3570#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG 3571 *q++ = 'l'; 3572#else 3573 *q++ = 'l'; 3574 *q++ = 'l'; 3575#endif 3576#endif 3577 3578 *q++ = *p++; 3579 *q = 0; 3580 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); 3581 break; 3582 3583 case 'l': 3584 *q++ = c; 3585 *q++ = *p++; 3586 *q = 0; 3587 fprintf (file, buf, va_arg (argptr, long)); 3588 break; 3589 3590 case 'e': 3591 case 'f': 3592 case 'g': 3593 *q++ = c; 3594 *q = 0; 3595 fprintf (file, buf, va_arg (argptr, double)); 3596 break; 3597 3598 case 's': 3599 *q++ = c; 3600 *q = 0; 3601 fprintf (file, buf, va_arg (argptr, char *)); 3602 break; 3603 3604 case 'O': 3605#ifdef ASM_OUTPUT_OPCODE 3606 ASM_OUTPUT_OPCODE (asm_out_file, p); 3607#endif 3608 break; 3609 3610 case 'R': 3611#ifdef REGISTER_PREFIX 3612 fprintf (file, "%s", REGISTER_PREFIX); 3613#endif 3614 break; 3615 3616 case 'I': 3617#ifdef IMMEDIATE_PREFIX 3618 fprintf (file, "%s", IMMEDIATE_PREFIX); 3619#endif 3620 break; 3621 3622 case 'L': 3623#ifdef LOCAL_LABEL_PREFIX 3624 fprintf (file, "%s", LOCAL_LABEL_PREFIX); 3625#endif 3626 break; 3627 3628 case 'U': 3629 fputs (user_label_prefix, file); 3630 break; 3631 3632#ifdef ASM_FPRINTF_EXTENSIONS 3633 /* Upper case letters are reserved for general use by asm_fprintf 3634 and so are not available to target specific code. In order to 3635 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, 3636 they are defined here. As they get turned into real extensions 3637 to asm_fprintf they should be removed from this list. */ 3638 case 'A': case 'B': case 'C': case 'D': case 'E': 3639 case 'F': case 'G': case 'H': case 'J': case 'K': 3640 case 'M': case 'N': case 'P': case 'Q': case 'S': 3641 case 'T': case 'V': case 'W': case 'Y': case 'Z': 3642 break; 3643 3644 ASM_FPRINTF_EXTENSIONS (file, argptr, p) 3645#endif 3646 default: 3647 abort (); 3648 } 3649 break; 3650 3651 default: 3652 fputc (c, file); 3653 } 3654 VA_CLOSE (argptr); 3655} 3656 3657/* Split up a CONST_DOUBLE or integer constant rtx 3658 into two rtx's for single words, 3659 storing in *FIRST the word that comes first in memory in the target 3660 and in *SECOND the other. */ 3661 3662void 3663split_double (value, first, second) 3664 rtx value; 3665 rtx *first, *second; 3666{ 3667 if (GET_CODE (value) == CONST_INT) 3668 { 3669 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) 3670 { 3671 /* In this case the CONST_INT holds both target words. 3672 Extract the bits from it into two word-sized pieces. 3673 Sign extend each half to HOST_WIDE_INT. */ 3674 unsigned HOST_WIDE_INT low, high; 3675 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; 3676 3677 /* Set sign_bit to the most significant bit of a word. */ 3678 sign_bit = 1; 3679 sign_bit <<= BITS_PER_WORD - 1; 3680 3681 /* Set mask so that all bits of the word are set. We could 3682 have used 1 << BITS_PER_WORD instead of basing the 3683 calculation on sign_bit. However, on machines where 3684 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a 3685 compiler warning, even though the code would never be 3686 executed. */ 3687 mask = sign_bit << 1; 3688 mask--; 3689 3690 /* Set sign_extend as any remaining bits. */ 3691 sign_extend = ~mask; 3692 3693 /* Pick the lower word and sign-extend it. */ 3694 low = INTVAL (value); 3695 low &= mask; 3696 if (low & sign_bit) 3697 low |= sign_extend; 3698 3699 /* Pick the higher word, shifted to the least significant 3700 bits, and sign-extend it. */ 3701 high = INTVAL (value); 3702 high >>= BITS_PER_WORD - 1; 3703 high >>= 1; 3704 high &= mask; 3705 if (high & sign_bit) 3706 high |= sign_extend; 3707 3708 /* Store the words in the target machine order. */ 3709 if (WORDS_BIG_ENDIAN) 3710 { 3711 *first = GEN_INT (high); 3712 *second = GEN_INT (low); 3713 } 3714 else 3715 { 3716 *first = GEN_INT (low); 3717 *second = GEN_INT (high); 3718 } 3719 } 3720 else 3721 { 3722 /* The rule for using CONST_INT for a wider mode 3723 is that we regard the value as signed. 3724 So sign-extend it. */ 3725 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); 3726 if (WORDS_BIG_ENDIAN) 3727 { 3728 *first = high; 3729 *second = value; 3730 } 3731 else 3732 { 3733 *first = value; 3734 *second = high; 3735 } 3736 } 3737 } 3738 else if (GET_CODE (value) != CONST_DOUBLE) 3739 { 3740 if (WORDS_BIG_ENDIAN) 3741 { 3742 *first = const0_rtx; 3743 *second = value; 3744 } 3745 else 3746 { 3747 *first = value; 3748 *second = const0_rtx; 3749 } 3750 } 3751 else if (GET_MODE (value) == VOIDmode 3752 /* This is the old way we did CONST_DOUBLE integers. */ 3753 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) 3754 { 3755 /* In an integer, the words are defined as most and least significant. 3756 So order them by the target's convention. */ 3757 if (WORDS_BIG_ENDIAN) 3758 { 3759 *first = GEN_INT (CONST_DOUBLE_HIGH (value)); 3760 *second = GEN_INT (CONST_DOUBLE_LOW (value)); 3761 } 3762 else 3763 { 3764 *first = GEN_INT (CONST_DOUBLE_LOW (value)); 3765 *second = GEN_INT (CONST_DOUBLE_HIGH (value)); 3766 } 3767 } 3768 else 3769 { 3770#ifdef REAL_ARITHMETIC 3771 REAL_VALUE_TYPE r; 3772 long l[2]; 3773 REAL_VALUE_FROM_CONST_DOUBLE (r, value); 3774 3775 /* Note, this converts the REAL_VALUE_TYPE to the target's 3776 format, splits up the floating point double and outputs 3777 exactly 32 bits of it into each of l[0] and l[1] -- 3778 not necessarily BITS_PER_WORD bits. */ 3779 REAL_VALUE_TO_TARGET_DOUBLE (r, l); 3780 3781 /* If 32 bits is an entire word for the target, but not for the host, 3782 then sign-extend on the host so that the number will look the same 3783 way on the host that it would on the target. See for instance 3784 simplify_unary_operation. The #if is needed to avoid compiler 3785 warnings. */ 3786 3787#if HOST_BITS_PER_LONG > 32 3788 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) 3789 { 3790 if (l[0] & ((long) 1 << 31)) 3791 l[0] |= ((long) (-1) << 32); 3792 if (l[1] & ((long) 1 << 31)) 3793 l[1] |= ((long) (-1) << 32); 3794 } 3795#endif 3796 3797 *first = GEN_INT ((HOST_WIDE_INT) l[0]); 3798 *second = GEN_INT ((HOST_WIDE_INT) l[1]); 3799#else 3800 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3801 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3802 && ! flag_pretend_float) 3803 abort (); 3804 3805 if ( 3806#ifdef HOST_WORDS_BIG_ENDIAN 3807 WORDS_BIG_ENDIAN 3808#else 3809 ! WORDS_BIG_ENDIAN 3810#endif 3811 ) 3812 { 3813 /* Host and target agree => no need to swap. */ 3814 *first = GEN_INT (CONST_DOUBLE_LOW (value)); 3815 *second = GEN_INT (CONST_DOUBLE_HIGH (value)); 3816 } 3817 else 3818 { 3819 *second = GEN_INT (CONST_DOUBLE_LOW (value)); 3820 *first = GEN_INT (CONST_DOUBLE_HIGH (value)); 3821 } 3822#endif /* no REAL_ARITHMETIC */ 3823 } 3824} 3825 3826/* Return nonzero if this function has no function calls. */ 3827 3828int 3829leaf_function_p () 3830{ 3831 rtx insn; 3832 rtx link; 3833 3834 if (current_function_profile || profile_arc_flag) 3835 return 0; 3836 3837 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 3838 { 3839 if (GET_CODE (insn) == CALL_INSN 3840 && ! SIBLING_CALL_P (insn)) 3841 return 0; 3842 if (GET_CODE (insn) == INSN 3843 && GET_CODE (PATTERN (insn)) == SEQUENCE 3844 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN 3845 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 3846 return 0; 3847 } 3848 for (link = current_function_epilogue_delay_list; 3849 link; 3850 link = XEXP (link, 1)) 3851 { 3852 insn = XEXP (link, 0); 3853 3854 if (GET_CODE (insn) == CALL_INSN 3855 && ! SIBLING_CALL_P (insn)) 3856 return 0; 3857 if (GET_CODE (insn) == INSN 3858 && GET_CODE (PATTERN (insn)) == SEQUENCE 3859 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN 3860 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 3861 return 0; 3862 } 3863 3864 return 1; 3865} 3866 3867/* Return 1 if branch is an forward branch. 3868 Uses insn_shuid array, so it works only in the final pass. May be used by 3869 output templates to customary add branch prediction hints. 3870 */ 3871int 3872final_forward_branch_p (insn) 3873 rtx insn; 3874{ 3875 int insn_id, label_id; 3876 if (!uid_shuid) 3877 abort (); 3878 insn_id = INSN_SHUID (insn); 3879 label_id = INSN_SHUID (JUMP_LABEL (insn)); 3880 /* We've hit some insns that does not have id information available. */ 3881 if (!insn_id || !label_id) 3882 abort (); 3883 return insn_id < label_id; 3884} 3885 3886/* On some machines, a function with no call insns 3887 can run faster if it doesn't create its own register window. 3888 When output, the leaf function should use only the "output" 3889 registers. Ordinarily, the function would be compiled to use 3890 the "input" registers to find its arguments; it is a candidate 3891 for leaf treatment if it uses only the "input" registers. 3892 Leaf function treatment means renumbering so the function 3893 uses the "output" registers instead. */ 3894 3895#ifdef LEAF_REGISTERS 3896 3897/* Return 1 if this function uses only the registers that can be 3898 safely renumbered. */ 3899 3900int 3901only_leaf_regs_used () 3902{ 3903 int i; 3904 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS; 3905 3906 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 3907 if ((regs_ever_live[i] || global_regs[i]) 3908 && ! permitted_reg_in_leaf_functions[i]) 3909 return 0; 3910 3911 if (current_function_uses_pic_offset_table 3912 && pic_offset_table_rtx != 0 3913 && GET_CODE (pic_offset_table_rtx) == REG 3914 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) 3915 return 0; 3916 3917 return 1; 3918} 3919 3920/* Scan all instructions and renumber all registers into those 3921 available in leaf functions. */ 3922 3923static void 3924leaf_renumber_regs (first) 3925 rtx first; 3926{ 3927 rtx insn; 3928 3929 /* Renumber only the actual patterns. 3930 The reg-notes can contain frame pointer refs, 3931 and renumbering them could crash, and should not be needed. */ 3932 for (insn = first; insn; insn = NEXT_INSN (insn)) 3933 if (INSN_P (insn)) 3934 leaf_renumber_regs_insn (PATTERN (insn)); 3935 for (insn = current_function_epilogue_delay_list; 3936 insn; 3937 insn = XEXP (insn, 1)) 3938 if (INSN_P (XEXP (insn, 0))) 3939 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); 3940} 3941 3942/* Scan IN_RTX and its subexpressions, and renumber all regs into those 3943 available in leaf functions. */ 3944 3945void 3946leaf_renumber_regs_insn (in_rtx) 3947 rtx in_rtx; 3948{ 3949 int i, j; 3950 const char *format_ptr; 3951 3952 if (in_rtx == 0) 3953 return; 3954 3955 /* Renumber all input-registers into output-registers. 3956 renumbered_regs would be 1 for an output-register; 3957 they */ 3958 3959 if (GET_CODE (in_rtx) == REG) 3960 { 3961 int newreg; 3962 3963 /* Don't renumber the same reg twice. */ 3964 if (in_rtx->used) 3965 return; 3966 3967 newreg = REGNO (in_rtx); 3968 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg 3969 to reach here as part of a REG_NOTE. */ 3970 if (newreg >= FIRST_PSEUDO_REGISTER) 3971 { 3972 in_rtx->used = 1; 3973 return; 3974 } 3975 newreg = LEAF_REG_REMAP (newreg); 3976 if (newreg < 0) 3977 abort (); 3978 regs_ever_live[REGNO (in_rtx)] = 0; 3979 regs_ever_live[newreg] = 1; 3980 REGNO (in_rtx) = newreg; 3981 in_rtx->used = 1; 3982 } 3983 3984 if (INSN_P (in_rtx)) 3985 { 3986 /* Inside a SEQUENCE, we find insns. 3987 Renumber just the patterns of these insns, 3988 just as we do for the top-level insns. */ 3989 leaf_renumber_regs_insn (PATTERN (in_rtx)); 3990 return; 3991 } 3992 3993 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); 3994 3995 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) 3996 switch (*format_ptr++) 3997 { 3998 case 'e': 3999 leaf_renumber_regs_insn (XEXP (in_rtx, i)); 4000 break; 4001 4002 case 'E': 4003 if (NULL != XVEC (in_rtx, i)) 4004 { 4005 for (j = 0; j < XVECLEN (in_rtx, i); j++) 4006 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); 4007 } 4008 break; 4009 4010 case 'S': 4011 case 's': 4012 case '0': 4013 case 'i': 4014 case 'w': 4015 case 'n': 4016 case 'u': 4017 break; 4018 4019 default: 4020 abort (); 4021 } 4022} 4023#endif 4024