1117395Skan/* Definitions of target machine GNU compiler. IA-64 version. 2169689Skan Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. 3117395Skan Contributed by James E. Wilson <wilson@cygnus.com> and 4117395Skan David Mosberger <davidm@hpl.hp.com>. 5117395Skan 6132718SkanThis file is part of GCC. 7117395Skan 8132718SkanGCC is free software; you can redistribute it and/or modify 9117395Skanit under the terms of the GNU General Public License as published by 10117395Skanthe Free Software Foundation; either version 2, or (at your option) 11117395Skanany later version. 12117395Skan 13132718SkanGCC is distributed in the hope that it will be useful, 14117395Skanbut WITHOUT ANY WARRANTY; without even the implied warranty of 15117395SkanMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16117395SkanGNU General Public License for more details. 17117395Skan 18117395SkanYou should have received a copy of the GNU General Public License 19132718Skanalong with GCC; see the file COPYING. If not, write to 20169689Skanthe Free Software Foundation, 51 Franklin Street, Fifth Floor, 21169689SkanBoston, MA 02110-1301, USA. */ 22117395Skan 23132718Skan/* IA64 requires both XF and TF modes. 24132718Skan XFmode is __float80 is IEEE extended; TFmode is __float128 25169689Skan is IEEE quad. Both these modes occupy 16 bytes, but XFmode 26169689Skan only has 80 significant bits. RFmode is __fpreg is IA64 internal 27169689Skan register format with 82 significant bits but otherwise handled like 28169689Skan XFmode. */ 29132718Skan 30169689SkanFRACTIONAL_FLOAT_MODE (XF, 80, 16, ieee_extended_intel_128_format); 31169689SkanFRACTIONAL_FLOAT_MODE (RF, 82, 16, ieee_extended_intel_128_format); 32132718SkanFLOAT_MODE (TF, 16, ieee_quad_format); 33132718Skan 34132718Skan/* The above produces: 35132718Skan 36132718Skan mode ILP32 size/align LP64 size/align 37169689Skan XF 16/16 16/16 38132718Skan TF 16/16 16/16 39132718Skan 40132718Skan psABI expectations: 41132718Skan 42132718Skan mode ILP32 size/align LP64 size/align 43169689Skan XF 12/4 - 44132718Skan TF - - 45132718Skan 46132718Skan HPUX expectations: 47132718Skan 48132718Skan mode ILP32 size/align LP64 size/align 49169689Skan XF - - 50132718Skan TF 16/8 - 51132718Skan 52132718Skan We fix this up here. */ 53132718Skan 54169689SkanADJUST_FLOAT_FORMAT (XF, (TARGET_ILP32 && !TARGET_HPUX) 55169689Skan ? &ieee_extended_intel_96_format 56169689Skan : &ieee_extended_intel_128_format); 57132718SkanADJUST_BYTESIZE (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16); 58132718SkanADJUST_ALIGNMENT (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16); 59132718Skan 60169689SkanADJUST_FLOAT_FORMAT (RF, (TARGET_ILP32 && !TARGET_HPUX) 61169689Skan ? &ieee_extended_intel_96_format 62169689Skan : &ieee_extended_intel_128_format); 63169689SkanADJUST_BYTESIZE (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16); 64169689SkanADJUST_ALIGNMENT (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16); 65169689Skan 66132718SkanADJUST_ALIGNMENT (TF, (TARGET_ILP32 && TARGET_HPUX) ? 8 : 16); 67132718Skan 68132718Skan/* 256-bit integer mode is needed for STACK_SAVEAREA_MODE. */ 69132718SkanINT_MODE (OI, 32); 70132718Skan 71117395Skan/* Add any extra modes needed to represent the condition code. 72117395Skan 73117395Skan CCImode is used to mark a single predicate register instead 74117395Skan of a register pair. This is currently only used in reg_raw_mode 75117395Skan so that flow doesn't do something stupid. */ 76117395Skan 77132718SkanCC_MODE (CCI); 78169689Skan 79169689Skan/* Vector modes. */ 80169689SkanVECTOR_MODES (INT, 4); /* V4QI V2HI */ 81169689SkanVECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ 82169689SkanVECTOR_MODE (INT, QI, 16); 83169689SkanVECTOR_MODE (INT, HI, 8); 84169689SkanVECTOR_MODE (INT, SI, 4); 85169689SkanVECTOR_MODE (FLOAT, SF, 2); 86169689SkanVECTOR_MODE (FLOAT, SF, 4); 87169689Skan 88