ChangeLog.gcc43 revision 260456
12007-08-08  Andrew Haley  <aph@redhat.com> (r128087)
2
3	* config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New.
4	* config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New.
5	* config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New.
6
72007-07-12  Geoffrey Keating  <geoffk@apple.com> (r126588)
8
9	* builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a
10	FUNCTION_DECL.
11	* tree.c (build_decl_stat): Move code from here...
12	(make_node_stat): ... to here.  Don't uselessly clear DECL_USER_ALIGN.
13	(expr_align): Honor DECL_ALIGN on a FUNCTION_DECL.  Add comment
14	about using DECL_ALIGN of LABEL_DECL and CONST_DECL.
15	* tree.h (DECL_USER_ALIGN): Fix misplaced comment.
16	* varasm.c (assemble_start_function): Use DECL_ALIGN instead of
17	FUNCTION_BOUNDARY.
18
192007-07-09  Geoffrey Keating  <geoffk@apple.com> (r126529)
20
21	PR 32617
22	* c-common.c (c_alignof_expr): Look at DECL_ALIGN of
23	FUNCTION_DECLs.
24	(handle_aligned_attribute): Allow use on FUNCTION_DECLs.
25	* varasm.c (assemble_start_function): Honor DECL_ALIGN
26	for FUNCTION_DECLs.  Don't use align_functions_log if
27	DECL_USER_ALIGN.
28	* print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN
29	even for FUNCTION_DECLs.
30	* c-decl.c (merge_decls): Propagate DECL_ALIGN even for
31	FUNCTION_DECLs.
32	* tree.h (DECL_ALIGN): Update for new location of 'align'.
33	(DECL_FUNCTION_CODE): Update for new location and name of
34	'function_code'.
35	(DECL_OFFSET_ALIGN): Update for new location of 'off_align'.
36	(struct tree_decl_common): Move 'align' and 'off_align' out
37	of union, ensure they're still on a 32-bit boundary.  Remove
38	other fields in union 'u1'.
39	(struct tree_function_decl): Add field 'function_code' replacing
40	'u1.f' in tree_decl_common.
41	* tree.c (build_decl_stat): Set initial value of DECL_ALIGN.
42	* doc/extend.texi (Function Attributes): Add 'aligned' attribute.
43	(Variable Attributes): Cross-reference 'aligned' attribute
44	to Function Attributes.
45	* flags.h (force_align_functions_log): Delete.
46	* toplev.c (force_align_functions_log): Delete.
47
482007-07-06  Josh Conner  <jconner@apple.com> (r126422)
49
50	PR middle-end/32602
51	PR middle-end/32603
52	* calls.c (store_one_arg): Handle arguments which are partially
53	on the stack when detecting argument overlap.
54
552007-07-03  Eric Christopher  <echristo@apple.com> (r126278)
56
57	* doc/cppopts.texi: Add conflicting option note to -dM.
58	* doc/invoke.texi: Add note about possible conflicts with
59	-E for -dCHARS and note that -dM will not produce
60	any results if there is no machine dependent reorg.
61	
622007-06-28  Geoffrey Keating  <geoffk@apple.com> (r126088)
63
64	* doc/invoke.texi (C++ Dialect Options): Document
65	fvisibility-ms-compat.
66	* c.opt (fvisibility-ms-compat): New.
67
682007-06-23  Richard Earnshaw  <rearnsha@arm.com> (r125973)
69
70	PR target/31152
71	* arm.md (negscc): Match the correct operand for optimized LT0 test.
72	Remove optimization for GT.
73
742007-06-05  Joerg Wunsch  <j.gnu@uriah.heep.sax.de> (r125346)
75
76	PR preprocessor/23479
77	* doc/extend.texi: Document the 0b-prefixed binary integer
78	constant extension.
79	
802007-05-31  Daniel Berlin  <dberlin@dberlin.org> (r125239)
81
82	* c-typeck.c (build_indirect_ref): Include type in error message.
83	(build_binary_op): Pass types to binary_op_error.
84	* c-common.c (binary_op_error): Take two type arguments, print out
85	types with error.
86	* c-common.h (binary_op_error): Update prototype.
87
882007-05-27  Eric Christopher  <echristo@apple.com> (r125116)
89
90	* config/rs6000/rs6000.c (rs6000_emit_prologue): Update
91	sp_offset depending on stack size. Save r12 depending
92	on registers we're saving later.
93	(rs6000_emit_epilogue): Update sp_offset depending only
94	on stack size.
95
962007-05-24  Richard Sandiford  <rsandifo@nildram.co.uk> (r125037)
97
98	* postreload-gcse.c (reg_changed_after_insn_p): New function.
99	(oprs_unchanged_p): Use it to check all registers in a REG.
100	(record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE.
101	(reg_set_between_after_reload_p): Delete.
102	(reg_used_between_after_reload_p): Likewise.
103	(reg_set_or_used_since_bb_start): Likewise.
104	(eliminate_partially_redundant_load): Use reg_changed_after_insn_p
105	and reg_used_between_p instead of reg_set_or_used_since_bb_start.
106	Use reg_set_between_p instead of reg_set_between_after_reload_p.
107	* rtlanal.c (reg_set_p): Check whether REG overlaps
108	regs_invalidated_by_call, rather than just checking the
109	membership of REGNO (REG).
110
1112007-05-18  Geoffrey Keating  <geoffk@apple.com> (r124839)
112 
113	* dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'.
114	(output_die): Use 'unsigned long' with %x.
115	* sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and
116	HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT.
117	* tree-dump.c (dump_pointer): Use 'unsigned long' for %lx.
118
1192007-05-16  Eric Christopher  <echristo@apple.com> (r124763)
120
121       * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register
122        saving after stack push. Set sp_offset whenever we push.
123        (rs6000_emit_epilogue): Move altivec register restore before stack push.
124
1252007-05-03  Ian Lance Taylor  <iant@google.com> (r124381)
126
127	* config/rs6000/rs6000.c (rs6000_override_options): Don't set
128	MASK_PPC_GFXOPT for 8540 or 8548.
129
1302007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341)
131
132	* doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 
133	'AMD Family 10 core'.
134
1352007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
136 
137	* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 
138	and athlon64-sse3 as improved versions of k8, opteron and athlon64 
139	with SSE3 instruction set support.
140	* doc/invoke.texi: Likewise.
141
1422007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330)
143
144	* config/i386/i386.c (override_options): Tuning 32-byte loop
145	alignment for amdfam10 architecture. Increasing the max loop
146	alignment to 24 bytes.
147
1482007-04-24  Hui-May Chang <hm.chang@apple.com> (r124115)
149
150	* reload1.c (merge_assigned_reloads) : Do not merge a RELOAD_OTHER
151	instruction with a RELOAD_FOR_OPERAND_ADDRESS instruction.
152
1532007-04-16  Lawrence Crowl  <crowl@google.com> (r123909)
154
155	* doc/invoke.texi (Debugging Options): Add documentation for the
156	-femit-struct-debug options -femit-struct-debug-baseonly,
157	-femit-struct-debug-reduced, and
158	-femit-struct-debug-detailed[=...].
159
160	* c-opts.c (c_common_handle_option): Add
161	OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced,
162	and OPT_femit_struct_debug_detailed_.
163	* c.opt: Add specifications for
164	-femit-struct-debug-baseonly, -femit-struct-debug-reduced,
165	and -femit-struct-debug-detailed[=...].
166	* opts.c (set_struct_debug_option): Parse the
167	-femit-struct-debug-... options.
168	* opts.c (matches_main_base, main_input_basename,
169	main_input_baselength, base_of_path, matches_main_base): Add
170	variables and functions to compare header base name to compilation
171	unit base name.
172	* opts.c (should_emit_struct_debug): Add to determine to emit a
173	structure based on the option.
174	(dump_struct_debug) Also disabled function to debug this
175	function.
176	* opts.c (handle_options): Save the base name of the
177	compilation unit.
178
179	* langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define.
180        (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add.
181	This hook indicates if a type is generic.  Set it by default
182	to "never generic".
183	* langhooks.h (struct lang_hooks_for_types): Add a new hook
184	to determine if a struct type is generic or not.
185	* cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook.
186	* cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook.
187	* cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook
188	with live C++ hook.
189
190	* flags.h (enum debug_info_usage): Add an enumeration to describe
191	a program's use of a structure type.
192	* dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter
193	to indicate the program's usage of the type.  Filter structs based
194	on the -femit-struct-debug-... specification.
195	(gen_type_die): Split into two routines, gen_type_die and
196	gen_type_die_with_usage.  gen_type_die is now a wrapper
197	that assumes direct usage.
198	(gen_type_die_with_usage): Replace calls to gen_type_die
199	with gen_type_die_with_usage adding the program usage of
200	the referenced type.
201	(dwarf2out_imported_module_or_decl): Suppress struct debug
202	information using should_emit_struct_debug when appropriate.
203
2042007-04-12  Richard Guenther  <rguenther@suse.de> (r123736)
205
206	PR tree-optimization/24689
207	PR tree-optimization/31307
208	* fold-const.c (operand_equal_p): Compare INTEGER_CST array
209	indices by value.
210	* gimplify.c (canonicalize_addr_expr): To be consistent with
211	gimplify_compound_lval only set operands two and three of
212	ARRAY_REFs if they are not gimple_min_invariant.  This makes
213	it never at this place.
214	* tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
215
2162007-04-07  H.J. Lu  <hongjiu.lu@intel.com> (r123639)
217
218	* config/i386/i386.c (ix86_handle_option): Handle SSSE3.
219
2202007-03-28  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com> (r123313)
221
222	* config.gcc: Accept barcelona as a variant of amdfam10.
223	* config/i386/i386.c (override_options): Likewise.
224	* doc/invoke.texi: Likewise.
225
2262007-03-12  Seongbae Park <seongbae.park@gmail.com> (r122851)
227
228	* c-decl.c (warn_variable_length_array): New function.
229	Refactored from grokdeclarator to handle warn_vla
230	and handle unnamed array case.
231	(grokdeclarator): Refactored VLA warning case.
232	* c.opt (Wvla): New flag.
233
2342007-03-11  Ian Lance Taylor  <iant@google.com> (r122831 - partial)
235
236	* tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and
237	the *_DIV_EXPR codes correctly with overflow infinities.
238
2392007-02-09  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763)
240
241	* config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10.
242	(bit_SSE4a): New.
243
2442007-02-08  Harsha Jagasia  <harsha.jagasia@amd.com> (r121726)
245
246	* config/i386/xmmintrin.h: Make inclusion of emmintrin.h
247	conditional to __SSE2__.
248	(Entries below should have been added to first ChangeLog
249	entry for amdfam10 dated 2007-02-05)
250	* config/i386/emmintrin.h: Generate #error if __SSE2__ is not
251	defined.
252	* config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
253	defined.
254	* config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
255	defined.
256
2572007-02-07  Jakub Jelinek  <jakub@redhat.com> (r121687)
258
259	* config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
260
2612007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
262
263	* config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8,
264	athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov,
265	athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul,
266	athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn,
267	athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8,
268	athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load,
269	athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8,
270	athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10.
271
2722007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
273
274	* config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse,
275	cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387,
276	swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse,
277	fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse,
278	x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed,
279	floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse,
280	floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1,
281	mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn,
282	umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn,
283	umuldi3_highpart_rex64, umulsi3_highpart_insn,
284	umulsi3_highpart_zext, smuldi3_highpart_rex64,
285	smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld,
286	x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse,
287	sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387,
288	sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387,
289	sqrtextenddfxf2_i387): Added amdfam10_decode.
290	
291	* config/i386/athlon.md (athlon_idirect_amdfam10,
292	athlon_ivector_amdfam10, athlon_idirect_load_amdfam10,
293	athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10,
294	athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10,
295	athlon_ivector_store_amdfam10): New define_insn_reservation.
296	(athlon_idirect_loadmov, athlon_idirect_movstore): Added
297	amdfam10.
298
2992007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
300
301	* config/i386/athlon.md (athlon_call_amdfam10,
302	athlon_pop_amdfam10, athlon_lea_amdfam10): New
303	define_insn_reservation.
304	(athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8,
305	athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI,
306	athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10.
307
3082007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
309
310	* config/i386/athlon.md (athlon_sseld_amdfam10,
311	athlon_mmxld_amdfam10, athlon_ssest_amdfam10,
312	athlon_mmxssest_short_amdfam10): New define_insn_reservation.
313
3142007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
315
316	* config/i386/athlon.md (athlon_sseins_amdfam10): New
317	define_insn_reservation.
318	* config/i386/i386.md (sseins): Added sseins to define_attr type
319	and define_attr unit.
320	* config/i386/sse.md: Set type attribute to sseins for insertq
321	and insertqi.
322
3232007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
324
325	* config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10,
326	ssecmpvector_load_amdfam10, ssecmpvector_amdfam10,
327	ssecomi_load_amdfam10, ssecomi_amdfam10,
328	sseaddvector_load_amdfam10, sseaddvector_amdfam10): New
329	define_insn_reservation.
330	(ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10.
331
3322007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
333
334	* config/i386/athlon.md (cvtss2sd_load_amdfam10,
335	cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10,
336	cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10,
337	cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10,
338	cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10,
339	cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 
340	define_insn_reservation.
341
342	* config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si,
343	cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq,
344	cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq,
345	cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd,
346	cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute.
347
3482007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
349
350	* config/i386/athlon.md (athlon_ssedivvector_amdfam10,
351	athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10,
352	athlon_ssemulvector_load_amdfam10): New define_insn_reservation.
353	(athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul,
354	athlon_ssemul_load_k8): Added amdfam10.
355
3562007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
357
358	* config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro.
359	(x86_sse_unaligned_move_optimal): New variable.
360	
361	* config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for  
362	m_AMDFAM10.
363	(ix86_expand_vector_move_misalign): Add code to generate movupd/movups
364	for unaligned vector SSE double/single precision loads for AMDFAM10.
365
3662007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
367
368	* config/i386/i386.h (TARGET_AMDFAM10): New macro.
369	(TARGET_CPU_CPP_BUILTINS): Add code for amdfam10.
370	Define TARGET_CPU_DEFAULT_amdfam10.
371	(TARGET_CPU_DEFAULT_NAMES): Add amdfam10.
372	(processor_type): Add PROCESSOR_AMDFAM10.	
373	
374	* config/i386/i386.md: Add amdfam10 as a new cpu attribute to match
375	processor_type in config/i386/i386.h.
376	Enable imul peepholes for TARGET_AMDFAM10.
377	
378	* config.gcc: Add support for --with-cpu option for amdfam10.
379	
380	* config/i386/i386.c (amdfam10_cost): New variable.
381	(m_AMDFAM10): New macro.
382	(m_ATHLON_K8_AMDFAM10): New macro.
383	(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
384	x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop,
385	x86_promote_QImode, x86_integer_DFmode_moves,
386	x86_partial_reg_dependency, x86_memory_mismatch_stall, 
387	x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387,
388	x86_sse_partial_reg_dependency, x86_sse_typeless_stores,
389	x86_use_ffreep, x86_use_incdec, x86_four_jump_limit,
390	x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns):
391	Enable/disable for amdfam10.
392	(override_options): Add amdfam10_cost to processor_target_table.
393	Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 
394	processor_alias_table.
395	(ix86_issue_rate): Add PROCESSOR_AMDFAM10.
396	(ix86_adjust_cost): Add code for amdfam10.
397
3982007-02-05  Harsha Jagasia  <harsha.jagasia@amd.com> (r121625)
399	
400	* config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm)
401	instruction set feature flag. Add new (-mpopcnt) flag for popcnt 
402	instruction. Add new SSE4A (-msse4a) instruction set feature flag.
403	* config/i386/i386.h: Add builtin definition for SSE4A.
404	* config/i386/i386.md: Add support for ABM instructions 
405	(popcnt and lzcnt).
406	* config/i386/sse.md: Add support for SSE4A instructions
407	(movntss, movntsd, extrq, insertq).
408	* config/i386/i386.c: Add support for ABM and SSE4A builtins.
409	Add -march=amdfam10 flag.
410	* config/i386/ammintrin.h: Add support for SSE4A intrinsics.
411	* doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt
412	and amdfam10.
413	* doc/extend.texi: Add documentation for SSE4A builtins.
414
4152007-01-24  Jakub Jelinek  <jakub@redhat.com> (r121140)
416
417	* config/i386/i386.h (x86_cmpxchg16b): Remove const.
418	(TARGET_CMPXCHG16B): Define to x86_cmpxchg16b.
419	* config/i386/i386.c (x86_cmpxchg16b): Remove const.
420	(override_options): Add PTA_CX16 flag.  Set x86_cmpxchg16b
421	for CPUs that have PTA_CX16 set.
422
4232007-01-18  Josh Conner  <jconner@apple.com> (r120902)
424
425	PR target/30485
426	* config/rs6000/rs6000.c (rs6000_emit_vector_compare): Add
427	support for UNLE, UNLT, UNGE, and UNGT.
428
4292007-01-17  Eric Christopher  <echristo@apple.com> (r120846)
430
431	* config.gcc: Support core2 processor.
432
4332007-01-11  Joseph Myers  <joseph@codesourcery.com> (r120688)
434
435	* c-common.c (vector_types_convertible_p): Treat opaque types as
436	always convertible if they have the same size, but not otherwise.
437
4382007-01-11  Joseph Myers  <joseph@codesourcery.com> (r120688)
439
440	* c-common.c (vector_types_convertible_p): Treat opaque types as
441	always convertible if they have the same size, but not otherwise.
442
4432007-01-08  Geoffrey Keating  <geoffk@apple.com> (r120611)
444 
445	* target.h (struct gcc_target): New field library_rtti_comdat.
446	* target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New.
447	(TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT.
448	* doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT.
449	* config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define.
450
4512007-01-08  Mark Shinwell  <shinwell@codesourcery.com> (r120572)
452
453	* c.opt: Add -flax-vector-conversions.
454	* c-typeck.c (convert_for_assignment): Pass flag to
455	vector_types_convertible_p to allow emission of note.
456	(digest_init): Likewise.
457	* c-opts.c: Handle -flax-vector-conversions.
458	* c-common.c (flag_lax_vector_conversions): New.
459	(vector_types_convertible_p): Unless -flax-vector conversions
460	has been passed, disallow conversions between vectors with
461	differing numbers of subparts and/or element types.  If such
462	a conversion is disallowed, possibly emit a note on the first
463	occasion only to inform the user of -flax-vector-conversions.
464	The new last argument specifies this.
465	* c-common.h (flag_lax_vector_conversions): New.
466	(vector_types_convertible_p): Add extra argument.
467	* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
468	char_type_node for V*QI type vectors.
469	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins):
470	Update to satisfy new typechecking rules.
471	* config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both
472	C and C++ variants.
473	* doc/invoke.texi (C Dialect Options): Document
474	-flax-vector-conversions.
475
4762007-01-05  Manuel Lopez-Ibanez  <manu@gcc.gnu.org> (r120505)
477
478	PR c/19978
479	* tree.h (TREE_OVERFLOW_P): New.
480	* c-typeck.c (parser_build_unary_op): Warn only if result
481	overflowed and operands did not.
482	(parser_build_binary_op): Likewise.
483	(convert_for_assignment): Remove redundant overflow_warning.
484	* c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW.
485
4862006-12-13  Ian Lance Taylor  <iant@google.com> (r119855)
487
488	PR c++/19564
489	PR c++/19756
490	* c-typeck.c (parser_build_binary_op): Move parentheses warnings
491	to warn_about_parentheses in c-common.c.
492	* c-common.c (warn_about_parentheses): New function.
493	* c-common.h (warn_about_parentheses): Declare.
494	* doc/invoke.texi (Warning Options): Update -Wparentheses
495	description.
496
4972006-12-02  H.J. Lu  <hongjiu.lu@intel.com> (r119454 - partial)
498
499	PR target/30040
500	* config/i386/driver-i386.c (bit_SSSE3): New.
501
5022006-11-27  Uros Bizjak  <ubizjak@gmail.com> (r119260)
503
504	* config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2
505	and m_GENERIC64.
506
5072006-11-18  Vladimir Makarov  <vmakarov@redhat.com> (r118973)
508
509	* doc/invoke.texi (core2): Add item.
510
511	* config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
512	macros.
513	(TARGET_CPU_CPP_BUILTINS): Add code for core2.
514	(TARGET_CPU_DEFAULT_generic): Change value.
515	(TARGET_CPU_DEFAULT_NAMES): Add core2.
516	(processor_type): Add new constant PROCESSOR_CORE2.
517
518	* config/i386/i386.md (cpu): Add core2.
519
520	* config/i386/i386.c (core2_cost): New initialized variable.
521	(m_CORE2): New macro.
522	(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
523	x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop,
524	x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8,
525	x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves,
526	x86_partial_reg_dependency, x86_memory_mismatch_stall,
527	x86_accumulate_outgoing_args, x86_prologue_using_move,
528	x86_epilogue_using_move, x86_arch_always_fancy_math_387,
529	x86_sse_partial_reg_dependency, x86_rep_movl_optimal,
530	x86_use_incdec, x86_four_jump_limit, x86_schedule,
531	x86_pad_returns): Add m_CORE2.
532	(override_options): Add entries for Core2.
533	(ix86_issue_rate): Add case for Core2.
534	
5352006-11-14  Caroline Tice  <ctice@apple.com> (r118826)
536		
537	* dwarf2out.c (debug_pubtypes_section): New static global variable.
538	(pubname_entry):  Add DEF_VEC_O and DEF_VEC_ALLOC_O statements for
539	this type.
540	(pubname_table):  Redefine as a vector.
541	(pubtype_table):  New static global variable, defined as a vector.
542	(pubname_table_allocated): Remove static global variable.
543	(pubname_table_in_use): Remove static global variable.
544	(PUBNAME_TABLE_INCREMENT): Remove constant.
545	(size_of_pubnames): Add parameter to deal with either pubnames or 
546	pubtypes, and change code to deal with table being a vector.
547	(add_pubname):  Change to deal with table being a vector.
548	(add_pubtype):  New function.
549	(output_pubnames): Add parameter to deal with either pubnames or 
550	pubtypes, and change code to deal with table being a vector.
551	(gen_array_type_die):  Add call to add_pubtype.
552	(gen_enumeration_type_die): Add call to add_pubtype.
553	(gen_struct_or_union_type_die): Add call to add_pubtype.
554	(gen_subroutine_type_die): Add call to add_pubtype.
555	(gen_typedef_die):  Add call to add_pubtype.
556	(dwarf2out_init): Add code to initialize pubname_table and 
557	pubtype_table vectors; also initialize debug_pubtypes_section.
558	(prune_unused_types):  Change to deal with pubnames being a vector.
559	(dwarf2out_finish): Change to deal with pubnames being a vector; add 
560	pubnames table to call to output_pubnames;  Add code to output pubtypes 
561	table if DEBUG_PUBTYPES_SECTION is defined.
562	* config/darwin.c (darwin_file_start):  Add DEBUG_PUBTYPES_SECTION to 
563	debugnames.
564	* config/darwin.h (DEBUG_PUBTYPES_SECTION): Define new global variable.
565
5662006-11-03  Paul Brook  <paul@codesourcery.com> (r118461)
567
568	gcc/
569	* config/arm/arm.c (arm_file_start): New function.
570	(TARGET_ASM_FILE_START): Define.
571	(arm_default_cpu): New variable.
572	(arm_override_options): Set arm_default_cpu.
573
5742006-10-31  Geoffrey Keating  <geoffk@apple.com> (r118356)
575
576	* c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on
577	inline static functions in c99 mode.
578
579	PR 16622
580	* doc/extend.texi (Inline): Update.
581	* c-tree.h (struct language_function): Remove field 'extern_inline'.
582	* c-decl.c (current_extern_inline): Delete.
583	(pop_scope): Adjust test for an undefined nested function.
584	Add warning about undeclared inline function.
585	(diagnose_mismatched_decls): Update comments.  Disallow overriding
586	of inline functions in a translation unit in C99.  Allow inline
587	declarations in C99 at any time.
588	(merge_decls): Boolize variables.  Handle C99 'extern inline'
589	semantics.
590	(grokdeclarator): Set DECL_EXTERNAL here for functions.  Handle
591	C99 inline semantics.
592	(start_function): Don't clear current_extern_inline.  Don't set
593	DECL_EXTERNAL.
594	(c_push_function_context): Don't push current_extern_inline.
595	(c_pop_function_context): Don't restore current_extern_inline.
596
597	PR 11377
598	* c-typeck.c (build_external_ref): Warn about static variables
599	used in extern inline functions.
600	* c-decl.c (start_decl): Warn about static variables declared
601	in extern inline functions.
602
6032006-10-27  Vladimir Makarov  <vmakarov@redhat.com> (r118090)
604
605	* config/i386/i386.h (TARGET_GEODE):
606	(TARGET_CPU_CPP_BUILTINS): Add code for geode.
607	(TARGET_CPU_DEFAULT_geode): New macro.
608	(TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2,
609	TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon,
610	TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8,
611	TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott,
612	TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase
613	the macro values.
614	(TARGET_CPU_DEFAULT_NAMES): Add geode.
615	(processor_type): Add PROCESSOR_GEODE.
616
617	* config/i386/i386.md: Include geode.md.
618	(cpu): Add geode.
619
620	* config/i386/i386.c (geode_cost): New initialized global
621	variable.
622	(m_GEODE, m_K6_GEODE): New macros.
623	(x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf,
624	x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4,
625	x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants,
626	x86_schedule): Use m_K6_GEODE instead of m_K6.
627	(x86_movx, x86_cmove): Set up m_GEODE.
628	(x86_integer_DFmode_moves): Clear m_GEODE.
629	(processor_target_table): Add entry for geode.
630	(processor_alias_table): Ditto.
631
632	* config/i386/geode.md: New file.
633
634	* doc/invoke.texi: Add entry about geode processor.
635    
6362006-10-24  Richard Guenther  <rguenther@suse.de> (r118001)
637
638	PR middle-end/28796
639	* builtins.c (fold_builtin_classify): Use HONOR_INFINITIES
640	and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS
641	for deciding optimizations in consistency with fold-const.c
642	(fold_builtin_unordered_cmp): Likewise.
643
6442006-10-22  H.J. Lu  <hongjiu.lu@intel.com> (r117958)
645
646	* config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers.
647	(x86_64-*-*): Likewise.
648
649	* config/i386/i386.c (pta_flags): Add PTA_SSSE3.
650	(override_options): Check SSSE3.
651	(ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD,
652	IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD,
653	IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW,
654	IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB,
655	IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND,
656	IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW,
657	IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128,
658	IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128,
659	IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128,
660	IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128,
661	IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128,
662	IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128,
663	IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128,
664	IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and
665	IX86_BUILTIN_PABSD128.
666	(bdesc_2arg): Add SSSE3.
667	(bdesc_1arg): Likewise.
668	(ix86_init_mmx_sse_builtins): Support SSSE3.
669	(ix86_expand_builtin): Likewise.
670	* config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise.
671
672	* config/i386/i386.md (UNSPEC_PSHUFB): New.
673	(UNSPEC_PSIGN): Likewise.
674	(UNSPEC_PALIGNR): Likewise.
675	Include mmx.md before sse.md.
676
677	* config/i386/i386.opt: Add -mssse3.
678
679	* config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3.
680	(ssse3_phaddwv4hi3): Likewise.
681	(ssse3_phadddv4si3): Likewise.
682	(ssse3_phadddv2si3): Likewise.
683	(ssse3_phaddswv8hi3): Likewise.
684	(ssse3_phaddswv4hi3): Likewise.
685	(ssse3_phsubwv8hi3): Likewise.
686	(ssse3_phsubwv4hi3): Likewise.
687	(ssse3_phsubdv4si3): Likewise.
688	(ssse3_phsubdv2si3): Likewise.
689	(ssse3_phsubswv8hi3): Likewise.
690	(ssse3_phsubswv4hi3): Likewise.
691	(ssse3_pmaddubswv8hi3): Likewise.
692	(ssse3_pmaddubswv4hi3): Likewise.
693	(ssse3_pmulhrswv8hi3): Likewise.
694	(ssse3_pmulhrswv4hi3): Likewise.
695	(ssse3_pshufbv16qi3): Likewise.
696	(ssse3_pshufbv8qi3): Likewise.
697	(ssse3_psign<mode>3): Likewise.
698	(ssse3_psign<mode>3): Likewise.
699	(ssse3_palignrti): Likewise.
700	(ssse3_palignrdi): Likewise.
701	(abs<mode>2): Likewise.
702	(abs<mode>2): Likewise.
703
704	* config/i386/tmmintrin.h: New file.
705
706	* doc/extend.texi: Document SSSE3 built-in functions.
707
708	* doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
709
7102006-10-22  H.J. Lu  <hongjiu.lu@intel.com> (r117959)
711  	 
712	* config/i386/tmmintrin.h: Remove the duplicated content.
713
7142006-10-21  Richard Guenther  <rguenther@suse.de> (r117932)
715
716	PR tree-optimization/3511
717	* tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that
718	got new invariant arguments during PHI translation.
719
7202006-10-21  Richard Guenther  <rguenther@suse.de> (r117929)
721
722	* builtins.c (fold_builtin_classify): Fix typo.
723
724