ChangeLog.gcc43 revision 260231
1259269Spfg2007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2255252Spfg 3259269Spfg * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4259269Spfg * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5259269Spfg * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6259269Spfg 7259705Spfg2007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8259705Spfg 9259705Spfg * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10259705Spfg FUNCTION_DECL. 11259705Spfg * tree.c (build_decl_stat): Move code from here... 12259705Spfg (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13259705Spfg (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14259705Spfg about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15259705Spfg * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16259705Spfg * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17259705Spfg FUNCTION_BOUNDARY. 18259705Spfg 19259705Spfg2007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20259705Spfg 21259705Spfg PR 32617 22259705Spfg * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23259705Spfg FUNCTION_DECLs. 24259705Spfg (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25259705Spfg * varasm.c (assemble_start_function): Honor DECL_ALIGN 26259705Spfg for FUNCTION_DECLs. Don't use align_functions_log if 27259705Spfg DECL_USER_ALIGN. 28259705Spfg * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29259705Spfg even for FUNCTION_DECLs. 30259705Spfg * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31259705Spfg FUNCTION_DECLs. 32259705Spfg * tree.h (DECL_ALIGN): Update for new location of 'align'. 33259705Spfg (DECL_FUNCTION_CODE): Update for new location and name of 34259705Spfg 'function_code'. 35259705Spfg (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36259705Spfg (struct tree_decl_common): Move 'align' and 'off_align' out 37259705Spfg of union, ensure they're still on a 32-bit boundary. Remove 38259705Spfg other fields in union 'u1'. 39259705Spfg (struct tree_function_decl): Add field 'function_code' replacing 40259705Spfg 'u1.f' in tree_decl_common. 41259705Spfg * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42259705Spfg * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43259705Spfg (Variable Attributes): Cross-reference 'aligned' attribute 44259705Spfg to Function Attributes. 45259705Spfg * flags.h (force_align_functions_log): Delete. 46259705Spfg * toplev.c (force_align_functions_log): Delete. 47259705Spfg 48260140Spfg2007-07-06 Josh Conner <jconner@apple.com> (r126422) 49260140Spfg 50260140Spfg PR middle-end/32602 51260140Spfg PR middle-end/32603 52260140Spfg * calls.c (store_one_arg): Handle arguments which are partially 53260140Spfg on the stack when detecting argument overlap. 54260140Spfg 55260140Spfg2007-07-03 Eric Christopher <echristo@apple.com> (r126278) 56260140Spfg 57260140Spfg * doc/cppopts.texi: Add conflicting option note to -dM. 58260140Spfg * doc/invoke.texi: Add note about possible conflicts with 59260140Spfg -E for -dCHARS and note that -dM will not produce 60260140Spfg any results if there is no machine dependent reorg. 61260140Spfg 62260075Spfg2007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088) 63260075Spfg 64260075Spfg * doc/invoke.texi (C++ Dialect Options): Document 65260075Spfg fvisibility-ms-compat. 66260075Spfg * c.opt (fvisibility-ms-compat): New. 67260075Spfg 68259269Spfg2007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 69259269Spfg 70255252Spfg PR preprocessor/23479 71255252Spfg * doc/extend.texi: Document the 0b-prefixed binary integer 72255252Spfg constant extension. 73255252Spfg 74259948Spfg2007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239) 75259948Spfg 76259948Spfg * c-typeck.c (build_indirect_ref): Include type in error message. 77259948Spfg (build_binary_op): Pass types to binary_op_error. 78259948Spfg * c-common.c (binary_op_error): Take two type arguments, print out 79259948Spfg types with error. 80259948Spfg * c-common.h (binary_op_error): Update prototype. 81259948Spfg 82259707Spfg2007-05-27 Eric Christopher <echristo@apple.com> (r125116) 83259707Spfg 84259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 85259707Spfg sp_offset depending on stack size. Save r12 depending 86259707Spfg on registers we're saving later. 87259707Spfg (rs6000_emit_epilogue): Update sp_offset depending only 88259707Spfg on stack size. 89259707Spfg 90259269Spfg2007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 91259269Spfg 92259269Spfg * postreload-gcse.c (reg_changed_after_insn_p): New function. 93259269Spfg (oprs_unchanged_p): Use it to check all registers in a REG. 94259269Spfg (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 95259269Spfg (reg_set_between_after_reload_p): Delete. 96259269Spfg (reg_used_between_after_reload_p): Likewise. 97259269Spfg (reg_set_or_used_since_bb_start): Likewise. 98259269Spfg (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 99259269Spfg and reg_used_between_p instead of reg_set_or_used_since_bb_start. 100259269Spfg Use reg_set_between_p instead of reg_set_between_after_reload_p. 101259269Spfg * rtlanal.c (reg_set_p): Check whether REG overlaps 102259269Spfg regs_invalidated_by_call, rather than just checking the 103259269Spfg membership of REGNO (REG). 104259269Spfg 105259948Spfg2007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839) 106259948Spfg 107259948Spfg * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'. 108259948Spfg (output_die): Use 'unsigned long' with %x. 109259948Spfg * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and 110259948Spfg HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT. 111259948Spfg * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx. 112259948Spfg 113259707Spfg2007-05-16 Eric Christopher <echristo@apple.com> (r124763) 114259707Spfg 115259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 116259707Spfg saving after stack push. Set sp_offset whenever we push. 117259707Spfg (rs6000_emit_epilogue): Move altivec register restore before stack push. 118259707Spfg 119259269Spfg2007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 120259269Spfg 121259269Spfg * config/rs6000/rs6000.c (rs6000_override_options): Don't set 122259269Spfg MASK_PPC_GFXOPT for 8540 or 8548. 123259269Spfg 124252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 125252080Spfg 126252080Spfg * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 127252080Spfg 'AMD Family 10 core'. 128252080Spfg 129221282Smm2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 130221282Smm 131221282Smm * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 132221282Smm and athlon64-sse3 as improved versions of k8, opteron and athlon64 133221282Smm with SSE3 instruction set support. 134221282Smm * doc/invoke.texi: Likewise. 135221282Smm 136252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 137252080Spfg 138252080Spfg * config/i386/i386.c (override_options): Tuning 32-byte loop 139252080Spfg alignment for amdfam10 architecture. Increasing the max loop 140252080Spfg alignment to 24 bytes. 141252080Spfg 142260231Spfg2007-04-24 Hui-May Chang <hm.chang@apple.com> (r124115) 143260231Spfg 144260231Spfg * reload1.c (merge_assigned_reloads) : Do not merge a RELOAD_OTHER 145260231Spfg instruction with a RELOAD_FOR_OPERAND_ADDRESS instruction. 146260231Spfg 147259705Spfg2007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 148259269Spfg 149259269Spfg * doc/invoke.texi (Debugging Options): Add documentation for the 150259269Spfg -femit-struct-debug options -femit-struct-debug-baseonly, 151259269Spfg -femit-struct-debug-reduced, and 152259269Spfg -femit-struct-debug-detailed[=...]. 153259269Spfg 154259269Spfg * c-opts.c (c_common_handle_option): Add 155259269Spfg OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 156259269Spfg and OPT_femit_struct_debug_detailed_. 157259269Spfg * c.opt: Add specifications for 158259269Spfg -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 159259269Spfg and -femit-struct-debug-detailed[=...]. 160259269Spfg * opts.c (set_struct_debug_option): Parse the 161259269Spfg -femit-struct-debug-... options. 162259269Spfg * opts.c (matches_main_base, main_input_basename, 163259269Spfg main_input_baselength, base_of_path, matches_main_base): Add 164259269Spfg variables and functions to compare header base name to compilation 165259269Spfg unit base name. 166259269Spfg * opts.c (should_emit_struct_debug): Add to determine to emit a 167259269Spfg structure based on the option. 168259269Spfg (dump_struct_debug) Also disabled function to debug this 169259269Spfg function. 170259269Spfg * opts.c (handle_options): Save the base name of the 171259269Spfg compilation unit. 172259269Spfg 173259269Spfg * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 174259269Spfg (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 175259269Spfg This hook indicates if a type is generic. Set it by default 176259269Spfg to "never generic". 177259269Spfg * langhooks.h (struct lang_hooks_for_types): Add a new hook 178259269Spfg to determine if a struct type is generic or not. 179259269Spfg * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 180259269Spfg * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 181259269Spfg * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 182259269Spfg with live C++ hook. 183259269Spfg 184259269Spfg * flags.h (enum debug_info_usage): Add an enumeration to describe 185259269Spfg a program's use of a structure type. 186259269Spfg * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 187259269Spfg to indicate the program's usage of the type. Filter structs based 188259269Spfg on the -femit-struct-debug-... specification. 189259269Spfg (gen_type_die): Split into two routines, gen_type_die and 190259269Spfg gen_type_die_with_usage. gen_type_die is now a wrapper 191259269Spfg that assumes direct usage. 192259269Spfg (gen_type_die_with_usage): Replace calls to gen_type_die 193259269Spfg with gen_type_die_with_usage adding the program usage of 194259269Spfg the referenced type. 195259269Spfg (dwarf2out_imported_module_or_decl): Suppress struct debug 196259269Spfg information using should_emit_struct_debug when appropriate. 197259269Spfg 198237678Spfg2007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 199237678Spfg 200237678Spfg PR tree-optimization/24689 201237678Spfg PR tree-optimization/31307 202237678Spfg * fold-const.c (operand_equal_p): Compare INTEGER_CST array 203237678Spfg indices by value. 204237678Spfg * gimplify.c (canonicalize_addr_expr): To be consistent with 205237678Spfg gimplify_compound_lval only set operands two and three of 206237678Spfg ARRAY_REFs if they are not gimple_min_invariant. This makes 207237678Spfg it never at this place. 208237678Spfg * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 209237678Spfg 210221282Smm2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 211221282Smm 212221282Smm * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 213221282Smm 214252080Spfg2007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 215252080Spfg 216252080Spfg * config.gcc: Accept barcelona as a variant of amdfam10. 217252080Spfg * config/i386/i386.c (override_options): Likewise. 218252080Spfg * doc/invoke.texi: Likewise. 219252080Spfg 220259705Spfg2007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 221259269Spfg 222259269Spfg * c-decl.c (warn_variable_length_array): New function. 223259269Spfg Refactored from grokdeclarator to handle warn_vla 224259269Spfg and handle unnamed array case. 225259269Spfg (grokdeclarator): Refactored VLA warning case. 226259269Spfg * c.opt (Wvla): New flag. 227259269Spfg 228259269Spfg2007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 229259269Spfg 230259269Spfg * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 231259269Spfg the *_DIV_EXPR codes correctly with overflow infinities. 232259269Spfg 233252080Spfg2007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 234252080Spfg 235252080Spfg * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 236252080Spfg (bit_SSE4a): New. 237252080Spfg 238221282Smm2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 239221282Smm 240221282Smm * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 241221282Smm conditional to __SSE2__. 242221282Smm (Entries below should have been added to first ChangeLog 243221282Smm entry for amdfam10 dated 2007-02-05) 244221282Smm * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 245221282Smm defined. 246221282Smm * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 247221282Smm defined. 248221282Smm * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 249221282Smm defined. 250221282Smm 251221282Smm2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 252221282Smm 253221282Smm * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 254221282Smm 255252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 256252080Spfg 257252080Spfg * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 258252080Spfg athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 259252080Spfg athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 260252080Spfg athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 261252080Spfg athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 262252080Spfg athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 263252080Spfg athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 264252080Spfg athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 265252080Spfg 266252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 267252080Spfg 268252080Spfg * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 269252080Spfg cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 270252080Spfg swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 271252080Spfg fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 272252080Spfg x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 273252080Spfg floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 274252080Spfg floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 275252080Spfg mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 276252080Spfg umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 277252080Spfg umuldi3_highpart_rex64, umulsi3_highpart_insn, 278252080Spfg umulsi3_highpart_zext, smuldi3_highpart_rex64, 279252080Spfg smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 280252080Spfg x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 281252080Spfg sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 282252080Spfg sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 283252080Spfg sqrtextenddfxf2_i387): Added amdfam10_decode. 284252080Spfg 285252080Spfg * config/i386/athlon.md (athlon_idirect_amdfam10, 286252080Spfg athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 287252080Spfg athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 288252080Spfg athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 289252080Spfg athlon_ivector_store_amdfam10): New define_insn_reservation. 290252080Spfg (athlon_idirect_loadmov, athlon_idirect_movstore): Added 291252080Spfg amdfam10. 292252080Spfg 293252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 294252080Spfg 295252080Spfg * config/i386/athlon.md (athlon_call_amdfam10, 296252080Spfg athlon_pop_amdfam10, athlon_lea_amdfam10): New 297252080Spfg define_insn_reservation. 298252080Spfg (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 299252080Spfg athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 300252080Spfg athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 301252080Spfg 302252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 303252080Spfg 304252080Spfg * config/i386/athlon.md (athlon_sseld_amdfam10, 305252080Spfg athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 306252080Spfg athlon_mmxssest_short_amdfam10): New define_insn_reservation. 307252080Spfg 308252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 309252080Spfg 310252080Spfg * config/i386/athlon.md (athlon_sseins_amdfam10): New 311252080Spfg define_insn_reservation. 312252080Spfg * config/i386/i386.md (sseins): Added sseins to define_attr type 313252080Spfg and define_attr unit. 314252080Spfg * config/i386/sse.md: Set type attribute to sseins for insertq 315252080Spfg and insertqi. 316252080Spfg 317252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 318252080Spfg 319252080Spfg * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 320252080Spfg ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 321252080Spfg ssecomi_load_amdfam10, ssecomi_amdfam10, 322252080Spfg sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 323252080Spfg define_insn_reservation. 324252080Spfg (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 325252080Spfg 326252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 327252080Spfg 328252080Spfg * config/i386/athlon.md (cvtss2sd_load_amdfam10, 329252080Spfg cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 330252080Spfg cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 331252080Spfg cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 332252080Spfg cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 333252080Spfg cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 334252080Spfg define_insn_reservation. 335252080Spfg 336252080Spfg * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 337252080Spfg cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 338252080Spfg cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 339252080Spfg cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 340252080Spfg cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 341252080Spfg 342252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 343252080Spfg 344252080Spfg * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 345252080Spfg athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 346252080Spfg athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 347252080Spfg (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 348252080Spfg athlon_ssemul_load_k8): Added amdfam10. 349252080Spfg 350252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 351252080Spfg 352252080Spfg * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 353252080Spfg (x86_sse_unaligned_move_optimal): New variable. 354252080Spfg 355252080Spfg * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 356252080Spfg m_AMDFAM10. 357252080Spfg (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 358252080Spfg for unaligned vector SSE double/single precision loads for AMDFAM10. 359252080Spfg 360252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 361252080Spfg 362252080Spfg * config/i386/i386.h (TARGET_AMDFAM10): New macro. 363252080Spfg (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 364252080Spfg Define TARGET_CPU_DEFAULT_amdfam10. 365252080Spfg (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 366252080Spfg (processor_type): Add PROCESSOR_AMDFAM10. 367252080Spfg 368252080Spfg * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 369252080Spfg processor_type in config/i386/i386.h. 370252080Spfg Enable imul peepholes for TARGET_AMDFAM10. 371252080Spfg 372252080Spfg * config.gcc: Add support for --with-cpu option for amdfam10. 373252080Spfg 374252080Spfg * config/i386/i386.c (amdfam10_cost): New variable. 375252080Spfg (m_AMDFAM10): New macro. 376252080Spfg (m_ATHLON_K8_AMDFAM10): New macro. 377252080Spfg (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 378252080Spfg x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 379252080Spfg x86_promote_QImode, x86_integer_DFmode_moves, 380252080Spfg x86_partial_reg_dependency, x86_memory_mismatch_stall, 381252080Spfg x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 382252080Spfg x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 383252080Spfg x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 384252080Spfg x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 385252080Spfg Enable/disable for amdfam10. 386252080Spfg (override_options): Add amdfam10_cost to processor_target_table. 387252080Spfg Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 388252080Spfg processor_alias_table. 389252080Spfg (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 390252080Spfg (ix86_adjust_cost): Add code for amdfam10. 391252080Spfg 392252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 393252080Spfg 394252080Spfg * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 395252080Spfg instruction set feature flag. Add new (-mpopcnt) flag for popcnt 396252080Spfg instruction. Add new SSE4A (-msse4a) instruction set feature flag. 397252080Spfg * config/i386/i386.h: Add builtin definition for SSE4A. 398252080Spfg * config/i386/i386.md: Add support for ABM instructions 399252080Spfg (popcnt and lzcnt). 400252080Spfg * config/i386/sse.md: Add support for SSE4A instructions 401252080Spfg (movntss, movntsd, extrq, insertq). 402252080Spfg * config/i386/i386.c: Add support for ABM and SSE4A builtins. 403252080Spfg Add -march=amdfam10 flag. 404252080Spfg * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 405252080Spfg * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 406252080Spfg and amdfam10. 407252080Spfg * doc/extend.texi: Add documentation for SSE4A builtins. 408252080Spfg 409252080Spfg2007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 410252080Spfg 411252080Spfg * config/i386/i386.h (x86_cmpxchg16b): Remove const. 412252080Spfg (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 413252080Spfg * config/i386/i386.c (x86_cmpxchg16b): Remove const. 414252080Spfg (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 415252080Spfg for CPUs that have PTA_CX16 set. 416252080Spfg 417260140Spfg2007-01-18 Josh Conner <jconner@apple.com> (r120902) 418260140Spfg 419260140Spfg PR target/30485 420260140Spfg * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Add 421260140Spfg support for UNLE, UNLT, UNGE, and UNGT. 422260140Spfg 423221282Smm2007-01-17 Eric Christopher <echristo@apple.com> (r120846) 424221282Smm 425221282Smm * config.gcc: Support core2 processor. 426221282Smm 427259948Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 428259948Spfg 429259948Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 430259948Spfg always convertible if they have the same size, but not otherwise. 431259948Spfg 432260075Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 433260075Spfg 434260075Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 435260075Spfg always convertible if they have the same size, but not otherwise. 436260075Spfg 437259948Spfg2007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611) 438259948Spfg 439259948Spfg * target.h (struct gcc_target): New field library_rtti_comdat. 440259948Spfg * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New. 441259948Spfg (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT. 442259948Spfg * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT. 443259948Spfg * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define. 444259948Spfg 445260075Spfg2007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572) 446260075Spfg 447260075Spfg * c.opt: Add -flax-vector-conversions. 448260075Spfg * c-typeck.c (convert_for_assignment): Pass flag to 449260075Spfg vector_types_convertible_p to allow emission of note. 450260075Spfg (digest_init): Likewise. 451260075Spfg * c-opts.c: Handle -flax-vector-conversions. 452260075Spfg * c-common.c (flag_lax_vector_conversions): New. 453260075Spfg (vector_types_convertible_p): Unless -flax-vector conversions 454260075Spfg has been passed, disallow conversions between vectors with 455260075Spfg differing numbers of subparts and/or element types. If such 456260075Spfg a conversion is disallowed, possibly emit a note on the first 457260075Spfg occasion only to inform the user of -flax-vector-conversions. 458260075Spfg The new last argument specifies this. 459260075Spfg * c-common.h (flag_lax_vector_conversions): New. 460260075Spfg (vector_types_convertible_p): Add extra argument. 461260075Spfg * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use 462260075Spfg char_type_node for V*QI type vectors. 463260075Spfg * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): 464260075Spfg Update to satisfy new typechecking rules. 465260075Spfg * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both 466260075Spfg C and C++ variants. 467260075Spfg * doc/invoke.texi (C Dialect Options): Document 468260075Spfg -flax-vector-conversions. 469260075Spfg 470259705Spfg2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 471259585Spfg 472259585Spfg PR c/19978 473259585Spfg * tree.h (TREE_OVERFLOW_P): New. 474259585Spfg * c-typeck.c (parser_build_unary_op): Warn only if result 475259585Spfg overflowed and operands did not. 476259585Spfg (parser_build_binary_op): Likewise. 477259585Spfg (convert_for_assignment): Remove redundant overflow_warning. 478259585Spfg * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 479259585Spfg 480259269Spfg2006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 481259269Spfg 482259269Spfg PR c++/19564 483259269Spfg PR c++/19756 484259269Spfg * c-typeck.c (parser_build_binary_op): Move parentheses warnings 485259269Spfg to warn_about_parentheses in c-common.c. 486259269Spfg * c-common.c (warn_about_parentheses): New function. 487259269Spfg * c-common.h (warn_about_parentheses): Declare. 488259269Spfg * doc/invoke.texi (Warning Options): Update -Wparentheses 489259269Spfg description. 490259269Spfg 491221282Smm2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 492221282Smm 493221282Smm PR target/30040 494221282Smm * config/i386/driver-i386.c (bit_SSSE3): New. 495221282Smm 496252080Spfg2006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 497252080Spfg 498252080Spfg * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 499252080Spfg and m_GENERIC64. 500252080Spfg 501221282Smm2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 502221282Smm 503221282Smm * doc/invoke.texi (core2): Add item. 504221282Smm 505221282Smm * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 506221282Smm macros. 507221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for core2. 508221282Smm (TARGET_CPU_DEFAULT_generic): Change value. 509221282Smm (TARGET_CPU_DEFAULT_NAMES): Add core2. 510221282Smm (processor_type): Add new constant PROCESSOR_CORE2. 511221282Smm 512221282Smm * config/i386/i386.md (cpu): Add core2. 513221282Smm 514221282Smm * config/i386/i386.c (core2_cost): New initialized variable. 515221282Smm (m_CORE2): New macro. 516221282Smm (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 517221282Smm x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 518221282Smm x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 519221282Smm x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 520221282Smm x86_partial_reg_dependency, x86_memory_mismatch_stall, 521221282Smm x86_accumulate_outgoing_args, x86_prologue_using_move, 522221282Smm x86_epilogue_using_move, x86_arch_always_fancy_math_387, 523221282Smm x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 524221282Smm x86_use_incdec, x86_four_jump_limit, x86_schedule, 525221282Smm x86_pad_returns): Add m_CORE2. 526221282Smm (override_options): Add entries for Core2. 527221282Smm (ix86_issue_rate): Add case for Core2. 528221282Smm 529259269Spfg2006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 530259269Spfg 531259269Spfg * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 532259269Spfg inline static functions in c99 mode. 533259269Spfg 534259269Spfg PR 16622 535259269Spfg * doc/extend.texi (Inline): Update. 536259269Spfg * c-tree.h (struct language_function): Remove field 'extern_inline'. 537259269Spfg * c-decl.c (current_extern_inline): Delete. 538259269Spfg (pop_scope): Adjust test for an undefined nested function. 539259269Spfg Add warning about undeclared inline function. 540259269Spfg (diagnose_mismatched_decls): Update comments. Disallow overriding 541259269Spfg of inline functions in a translation unit in C99. Allow inline 542259269Spfg declarations in C99 at any time. 543259269Spfg (merge_decls): Boolize variables. Handle C99 'extern inline' 544259269Spfg semantics. 545259269Spfg (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 546259269Spfg C99 inline semantics. 547259269Spfg (start_function): Don't clear current_extern_inline. Don't set 548259269Spfg DECL_EXTERNAL. 549259269Spfg (c_push_function_context): Don't push current_extern_inline. 550259269Spfg (c_pop_function_context): Don't restore current_extern_inline. 551259269Spfg 552259269Spfg PR 11377 553259269Spfg * c-typeck.c (build_external_ref): Warn about static variables 554259269Spfg used in extern inline functions. 555259269Spfg * c-decl.c (start_decl): Warn about static variables declared 556259269Spfg in extern inline functions. 557259269Spfg 558221282Smm2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 559221282Smm 560221282Smm * config/i386/i386.h (TARGET_GEODE): 561221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for geode. 562221282Smm (TARGET_CPU_DEFAULT_geode): New macro. 563221282Smm (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 564221282Smm TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 565221282Smm TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 566221282Smm TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 567221282Smm TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 568221282Smm the macro values. 569221282Smm (TARGET_CPU_DEFAULT_NAMES): Add geode. 570221282Smm (processor_type): Add PROCESSOR_GEODE. 571221282Smm 572221282Smm * config/i386/i386.md: Include geode.md. 573221282Smm (cpu): Add geode. 574221282Smm 575221282Smm * config/i386/i386.c (geode_cost): New initialized global 576221282Smm variable. 577221282Smm (m_GEODE, m_K6_GEODE): New macros. 578221282Smm (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 579221282Smm x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 580221282Smm x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 581221282Smm x86_schedule): Use m_K6_GEODE instead of m_K6. 582221282Smm (x86_movx, x86_cmove): Set up m_GEODE. 583221282Smm (x86_integer_DFmode_moves): Clear m_GEODE. 584221282Smm (processor_target_table): Add entry for geode. 585221282Smm (processor_alias_table): Ditto. 586221282Smm 587221282Smm * config/i386/geode.md: New file. 588221282Smm 589221282Smm * doc/invoke.texi: Add entry about geode processor. 590221282Smm 591237678Spfg2006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 592229554Spfg 593229554Spfg PR middle-end/28796 594229554Spfg * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 595229554Spfg and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 596229554Spfg for deciding optimizations in consistency with fold-const.c 597229554Spfg (fold_builtin_unordered_cmp): Likewise. 598229554Spfg 599221282Smm2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 600221282Smm 601221282Smm * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 602221282Smm (x86_64-*-*): Likewise. 603221282Smm 604221282Smm * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 605221282Smm (override_options): Check SSSE3. 606221282Smm (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 607221282Smm IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 608221282Smm IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 609221282Smm IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 610221282Smm IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 611221282Smm IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 612221282Smm IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 613221282Smm IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 614221282Smm IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 615221282Smm IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 616221282Smm IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 617221282Smm IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 618221282Smm IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 619221282Smm IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 620221282Smm IX86_BUILTIN_PABSD128. 621221282Smm (bdesc_2arg): Add SSSE3. 622221282Smm (bdesc_1arg): Likewise. 623221282Smm (ix86_init_mmx_sse_builtins): Support SSSE3. 624221282Smm (ix86_expand_builtin): Likewise. 625221282Smm * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 626221282Smm 627221282Smm * config/i386/i386.md (UNSPEC_PSHUFB): New. 628221282Smm (UNSPEC_PSIGN): Likewise. 629221282Smm (UNSPEC_PALIGNR): Likewise. 630221282Smm Include mmx.md before sse.md. 631221282Smm 632221282Smm * config/i386/i386.opt: Add -mssse3. 633221282Smm 634221282Smm * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 635221282Smm (ssse3_phaddwv4hi3): Likewise. 636221282Smm (ssse3_phadddv4si3): Likewise. 637221282Smm (ssse3_phadddv2si3): Likewise. 638221282Smm (ssse3_phaddswv8hi3): Likewise. 639221282Smm (ssse3_phaddswv4hi3): Likewise. 640221282Smm (ssse3_phsubwv8hi3): Likewise. 641221282Smm (ssse3_phsubwv4hi3): Likewise. 642221282Smm (ssse3_phsubdv4si3): Likewise. 643221282Smm (ssse3_phsubdv2si3): Likewise. 644221282Smm (ssse3_phsubswv8hi3): Likewise. 645221282Smm (ssse3_phsubswv4hi3): Likewise. 646221282Smm (ssse3_pmaddubswv8hi3): Likewise. 647221282Smm (ssse3_pmaddubswv4hi3): Likewise. 648221282Smm (ssse3_pmulhrswv8hi3): Likewise. 649221282Smm (ssse3_pmulhrswv4hi3): Likewise. 650221282Smm (ssse3_pshufbv16qi3): Likewise. 651221282Smm (ssse3_pshufbv8qi3): Likewise. 652221282Smm (ssse3_psign<mode>3): Likewise. 653221282Smm (ssse3_psign<mode>3): Likewise. 654221282Smm (ssse3_palignrti): Likewise. 655221282Smm (ssse3_palignrdi): Likewise. 656221282Smm (abs<mode>2): Likewise. 657221282Smm (abs<mode>2): Likewise. 658221282Smm 659221282Smm * config/i386/tmmintrin.h: New file. 660221282Smm 661221282Smm * doc/extend.texi: Document SSSE3 built-in functions. 662221282Smm 663221282Smm * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 664234023Spfg 665252080Spfg2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 666250676Spfg 667250676Spfg * config/i386/tmmintrin.h: Remove the duplicated content. 668250676Spfg 669237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 670234023Spfg 671237678Spfg PR tree-optimization/3511 672237678Spfg * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 673237678Spfg got new invariant arguments during PHI translation. 674237678Spfg 675237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 676237678Spfg 677234023Spfg * builtins.c (fold_builtin_classify): Fix typo. 678234023Spfg 679