ChangeLog.gcc43 revision 260075
12007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2 3 * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4 * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5 * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6 72007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8 9 * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10 FUNCTION_DECL. 11 * tree.c (build_decl_stat): Move code from here... 12 (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13 (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14 about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15 * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16 * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17 FUNCTION_BOUNDARY. 18 192007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20 21 PR 32617 22 * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23 FUNCTION_DECLs. 24 (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25 * varasm.c (assemble_start_function): Honor DECL_ALIGN 26 for FUNCTION_DECLs. Don't use align_functions_log if 27 DECL_USER_ALIGN. 28 * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29 even for FUNCTION_DECLs. 30 * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31 FUNCTION_DECLs. 32 * tree.h (DECL_ALIGN): Update for new location of 'align'. 33 (DECL_FUNCTION_CODE): Update for new location and name of 34 'function_code'. 35 (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36 (struct tree_decl_common): Move 'align' and 'off_align' out 37 of union, ensure they're still on a 32-bit boundary. Remove 38 other fields in union 'u1'. 39 (struct tree_function_decl): Add field 'function_code' replacing 40 'u1.f' in tree_decl_common. 41 * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42 * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43 (Variable Attributes): Cross-reference 'aligned' attribute 44 to Function Attributes. 45 * flags.h (force_align_functions_log): Delete. 46 * toplev.c (force_align_functions_log): Delete. 47 482007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088) 49 50 * doc/invoke.texi (C++ Dialect Options): Document 51 fvisibility-ms-compat. 52 * c.opt (fvisibility-ms-compat): New. 53 542007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 55 56 PR preprocessor/23479 57 * doc/extend.texi: Document the 0b-prefixed binary integer 58 constant extension. 59 602007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239) 61 62 * c-typeck.c (build_indirect_ref): Include type in error message. 63 (build_binary_op): Pass types to binary_op_error. 64 * c-common.c (binary_op_error): Take two type arguments, print out 65 types with error. 66 * c-common.h (binary_op_error): Update prototype. 67 682007-05-27 Eric Christopher <echristo@apple.com> (r125116) 69 70 * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 71 sp_offset depending on stack size. Save r12 depending 72 on registers we're saving later. 73 (rs6000_emit_epilogue): Update sp_offset depending only 74 on stack size. 75 762007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 77 78 * postreload-gcse.c (reg_changed_after_insn_p): New function. 79 (oprs_unchanged_p): Use it to check all registers in a REG. 80 (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 81 (reg_set_between_after_reload_p): Delete. 82 (reg_used_between_after_reload_p): Likewise. 83 (reg_set_or_used_since_bb_start): Likewise. 84 (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 85 and reg_used_between_p instead of reg_set_or_used_since_bb_start. 86 Use reg_set_between_p instead of reg_set_between_after_reload_p. 87 * rtlanal.c (reg_set_p): Check whether REG overlaps 88 regs_invalidated_by_call, rather than just checking the 89 membership of REGNO (REG). 90 912007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839) 92 93 * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'. 94 (output_die): Use 'unsigned long' with %x. 95 * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and 96 HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT. 97 * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx. 98 992007-05-16 Eric Christopher <echristo@apple.com> (r124763) 100 101 * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 102 saving after stack push. Set sp_offset whenever we push. 103 (rs6000_emit_epilogue): Move altivec register restore before stack push. 104 1052007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 106 107 * config/rs6000/rs6000.c (rs6000_override_options): Don't set 108 MASK_PPC_GFXOPT for 8540 or 8548. 109 1102007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 111 112 * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 113 'AMD Family 10 core'. 114 1152007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 116 117 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 118 and athlon64-sse3 as improved versions of k8, opteron and athlon64 119 with SSE3 instruction set support. 120 * doc/invoke.texi: Likewise. 121 1222007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 123 124 * config/i386/i386.c (override_options): Tuning 32-byte loop 125 alignment for amdfam10 architecture. Increasing the max loop 126 alignment to 24 bytes. 127 1282007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 129 130 * doc/invoke.texi (Debugging Options): Add documentation for the 131 -femit-struct-debug options -femit-struct-debug-baseonly, 132 -femit-struct-debug-reduced, and 133 -femit-struct-debug-detailed[=...]. 134 135 * c-opts.c (c_common_handle_option): Add 136 OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 137 and OPT_femit_struct_debug_detailed_. 138 * c.opt: Add specifications for 139 -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 140 and -femit-struct-debug-detailed[=...]. 141 * opts.c (set_struct_debug_option): Parse the 142 -femit-struct-debug-... options. 143 * opts.c (matches_main_base, main_input_basename, 144 main_input_baselength, base_of_path, matches_main_base): Add 145 variables and functions to compare header base name to compilation 146 unit base name. 147 * opts.c (should_emit_struct_debug): Add to determine to emit a 148 structure based on the option. 149 (dump_struct_debug) Also disabled function to debug this 150 function. 151 * opts.c (handle_options): Save the base name of the 152 compilation unit. 153 154 * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 155 (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 156 This hook indicates if a type is generic. Set it by default 157 to "never generic". 158 * langhooks.h (struct lang_hooks_for_types): Add a new hook 159 to determine if a struct type is generic or not. 160 * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 161 * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 162 * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 163 with live C++ hook. 164 165 * flags.h (enum debug_info_usage): Add an enumeration to describe 166 a program's use of a structure type. 167 * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 168 to indicate the program's usage of the type. Filter structs based 169 on the -femit-struct-debug-... specification. 170 (gen_type_die): Split into two routines, gen_type_die and 171 gen_type_die_with_usage. gen_type_die is now a wrapper 172 that assumes direct usage. 173 (gen_type_die_with_usage): Replace calls to gen_type_die 174 with gen_type_die_with_usage adding the program usage of 175 the referenced type. 176 (dwarf2out_imported_module_or_decl): Suppress struct debug 177 information using should_emit_struct_debug when appropriate. 178 1792007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 180 181 PR tree-optimization/24689 182 PR tree-optimization/31307 183 * fold-const.c (operand_equal_p): Compare INTEGER_CST array 184 indices by value. 185 * gimplify.c (canonicalize_addr_expr): To be consistent with 186 gimplify_compound_lval only set operands two and three of 187 ARRAY_REFs if they are not gimple_min_invariant. This makes 188 it never at this place. 189 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 190 1912007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 192 193 * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 194 1952007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 196 197 * config.gcc: Accept barcelona as a variant of amdfam10. 198 * config/i386/i386.c (override_options): Likewise. 199 * doc/invoke.texi: Likewise. 200 2012007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 202 203 * c-decl.c (warn_variable_length_array): New function. 204 Refactored from grokdeclarator to handle warn_vla 205 and handle unnamed array case. 206 (grokdeclarator): Refactored VLA warning case. 207 * c.opt (Wvla): New flag. 208 2092007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 210 211 * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 212 the *_DIV_EXPR codes correctly with overflow infinities. 213 2142007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 215 216 * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 217 (bit_SSE4a): New. 218 2192007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 220 221 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 222 conditional to __SSE2__. 223 (Entries below should have been added to first ChangeLog 224 entry for amdfam10 dated 2007-02-05) 225 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 226 defined. 227 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 228 defined. 229 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 230 defined. 231 2322007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 233 234 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 235 2362007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 237 238 * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 239 athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 240 athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 241 athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 242 athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 243 athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 244 athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 245 athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 246 2472007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 248 249 * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 250 cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 251 swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 252 fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 253 x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 254 floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 255 floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 256 mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 257 umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 258 umuldi3_highpart_rex64, umulsi3_highpart_insn, 259 umulsi3_highpart_zext, smuldi3_highpart_rex64, 260 smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 261 x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 262 sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 263 sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 264 sqrtextenddfxf2_i387): Added amdfam10_decode. 265 266 * config/i386/athlon.md (athlon_idirect_amdfam10, 267 athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 268 athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 269 athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 270 athlon_ivector_store_amdfam10): New define_insn_reservation. 271 (athlon_idirect_loadmov, athlon_idirect_movstore): Added 272 amdfam10. 273 2742007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 275 276 * config/i386/athlon.md (athlon_call_amdfam10, 277 athlon_pop_amdfam10, athlon_lea_amdfam10): New 278 define_insn_reservation. 279 (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 280 athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 281 athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 282 2832007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 284 285 * config/i386/athlon.md (athlon_sseld_amdfam10, 286 athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 287 athlon_mmxssest_short_amdfam10): New define_insn_reservation. 288 2892007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 290 291 * config/i386/athlon.md (athlon_sseins_amdfam10): New 292 define_insn_reservation. 293 * config/i386/i386.md (sseins): Added sseins to define_attr type 294 and define_attr unit. 295 * config/i386/sse.md: Set type attribute to sseins for insertq 296 and insertqi. 297 2982007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 299 300 * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 301 ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 302 ssecomi_load_amdfam10, ssecomi_amdfam10, 303 sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 304 define_insn_reservation. 305 (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 306 3072007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 308 309 * config/i386/athlon.md (cvtss2sd_load_amdfam10, 310 cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 311 cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 312 cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 313 cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 314 cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 315 define_insn_reservation. 316 317 * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 318 cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 319 cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 320 cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 321 cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 322 3232007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 324 325 * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 326 athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 327 athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 328 (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 329 athlon_ssemul_load_k8): Added amdfam10. 330 3312007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 332 333 * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 334 (x86_sse_unaligned_move_optimal): New variable. 335 336 * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 337 m_AMDFAM10. 338 (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 339 for unaligned vector SSE double/single precision loads for AMDFAM10. 340 3412007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 342 343 * config/i386/i386.h (TARGET_AMDFAM10): New macro. 344 (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 345 Define TARGET_CPU_DEFAULT_amdfam10. 346 (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 347 (processor_type): Add PROCESSOR_AMDFAM10. 348 349 * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 350 processor_type in config/i386/i386.h. 351 Enable imul peepholes for TARGET_AMDFAM10. 352 353 * config.gcc: Add support for --with-cpu option for amdfam10. 354 355 * config/i386/i386.c (amdfam10_cost): New variable. 356 (m_AMDFAM10): New macro. 357 (m_ATHLON_K8_AMDFAM10): New macro. 358 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 359 x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 360 x86_promote_QImode, x86_integer_DFmode_moves, 361 x86_partial_reg_dependency, x86_memory_mismatch_stall, 362 x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 363 x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 364 x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 365 x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 366 Enable/disable for amdfam10. 367 (override_options): Add amdfam10_cost to processor_target_table. 368 Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 369 processor_alias_table. 370 (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 371 (ix86_adjust_cost): Add code for amdfam10. 372 3732007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 374 375 * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 376 instruction set feature flag. Add new (-mpopcnt) flag for popcnt 377 instruction. Add new SSE4A (-msse4a) instruction set feature flag. 378 * config/i386/i386.h: Add builtin definition for SSE4A. 379 * config/i386/i386.md: Add support for ABM instructions 380 (popcnt and lzcnt). 381 * config/i386/sse.md: Add support for SSE4A instructions 382 (movntss, movntsd, extrq, insertq). 383 * config/i386/i386.c: Add support for ABM and SSE4A builtins. 384 Add -march=amdfam10 flag. 385 * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 386 * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 387 and amdfam10. 388 * doc/extend.texi: Add documentation for SSE4A builtins. 389 3902007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 391 392 * config/i386/i386.h (x86_cmpxchg16b): Remove const. 393 (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 394 * config/i386/i386.c (x86_cmpxchg16b): Remove const. 395 (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 396 for CPUs that have PTA_CX16 set. 397 3982007-01-17 Eric Christopher <echristo@apple.com> (r120846) 399 400 * config.gcc: Support core2 processor. 401 4022007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 403 404 * c-common.c (vector_types_convertible_p): Treat opaque types as 405 always convertible if they have the same size, but not otherwise. 406 4072007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 408 409 * c-common.c (vector_types_convertible_p): Treat opaque types as 410 always convertible if they have the same size, but not otherwise. 411 4122007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611) 413 414 * target.h (struct gcc_target): New field library_rtti_comdat. 415 * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New. 416 (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT. 417 * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT. 418 * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define. 419 4202007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572) 421 422 * c.opt: Add -flax-vector-conversions. 423 * c-typeck.c (convert_for_assignment): Pass flag to 424 vector_types_convertible_p to allow emission of note. 425 (digest_init): Likewise. 426 * c-opts.c: Handle -flax-vector-conversions. 427 * c-common.c (flag_lax_vector_conversions): New. 428 (vector_types_convertible_p): Unless -flax-vector conversions 429 has been passed, disallow conversions between vectors with 430 differing numbers of subparts and/or element types. If such 431 a conversion is disallowed, possibly emit a note on the first 432 occasion only to inform the user of -flax-vector-conversions. 433 The new last argument specifies this. 434 * c-common.h (flag_lax_vector_conversions): New. 435 (vector_types_convertible_p): Add extra argument. 436 * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use 437 char_type_node for V*QI type vectors. 438 * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): 439 Update to satisfy new typechecking rules. 440 * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both 441 C and C++ variants. 442 * doc/invoke.texi (C Dialect Options): Document 443 -flax-vector-conversions. 444 4452007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 446 447 PR c/19978 448 * tree.h (TREE_OVERFLOW_P): New. 449 * c-typeck.c (parser_build_unary_op): Warn only if result 450 overflowed and operands did not. 451 (parser_build_binary_op): Likewise. 452 (convert_for_assignment): Remove redundant overflow_warning. 453 * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 454 4552006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 456 457 PR c++/19564 458 PR c++/19756 459 * c-typeck.c (parser_build_binary_op): Move parentheses warnings 460 to warn_about_parentheses in c-common.c. 461 * c-common.c (warn_about_parentheses): New function. 462 * c-common.h (warn_about_parentheses): Declare. 463 * doc/invoke.texi (Warning Options): Update -Wparentheses 464 description. 465 4662006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 467 468 PR target/30040 469 * config/i386/driver-i386.c (bit_SSSE3): New. 470 4712006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 472 473 * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 474 and m_GENERIC64. 475 4762006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 477 478 * doc/invoke.texi (core2): Add item. 479 480 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 481 macros. 482 (TARGET_CPU_CPP_BUILTINS): Add code for core2. 483 (TARGET_CPU_DEFAULT_generic): Change value. 484 (TARGET_CPU_DEFAULT_NAMES): Add core2. 485 (processor_type): Add new constant PROCESSOR_CORE2. 486 487 * config/i386/i386.md (cpu): Add core2. 488 489 * config/i386/i386.c (core2_cost): New initialized variable. 490 (m_CORE2): New macro. 491 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 492 x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 493 x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 494 x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 495 x86_partial_reg_dependency, x86_memory_mismatch_stall, 496 x86_accumulate_outgoing_args, x86_prologue_using_move, 497 x86_epilogue_using_move, x86_arch_always_fancy_math_387, 498 x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 499 x86_use_incdec, x86_four_jump_limit, x86_schedule, 500 x86_pad_returns): Add m_CORE2. 501 (override_options): Add entries for Core2. 502 (ix86_issue_rate): Add case for Core2. 503 5042006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 505 506 * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 507 inline static functions in c99 mode. 508 509 PR 16622 510 * doc/extend.texi (Inline): Update. 511 * c-tree.h (struct language_function): Remove field 'extern_inline'. 512 * c-decl.c (current_extern_inline): Delete. 513 (pop_scope): Adjust test for an undefined nested function. 514 Add warning about undeclared inline function. 515 (diagnose_mismatched_decls): Update comments. Disallow overriding 516 of inline functions in a translation unit in C99. Allow inline 517 declarations in C99 at any time. 518 (merge_decls): Boolize variables. Handle C99 'extern inline' 519 semantics. 520 (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 521 C99 inline semantics. 522 (start_function): Don't clear current_extern_inline. Don't set 523 DECL_EXTERNAL. 524 (c_push_function_context): Don't push current_extern_inline. 525 (c_pop_function_context): Don't restore current_extern_inline. 526 527 PR 11377 528 * c-typeck.c (build_external_ref): Warn about static variables 529 used in extern inline functions. 530 * c-decl.c (start_decl): Warn about static variables declared 531 in extern inline functions. 532 5332006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 534 535 * config/i386/i386.h (TARGET_GEODE): 536 (TARGET_CPU_CPP_BUILTINS): Add code for geode. 537 (TARGET_CPU_DEFAULT_geode): New macro. 538 (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 539 TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 540 TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 541 TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 542 TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 543 the macro values. 544 (TARGET_CPU_DEFAULT_NAMES): Add geode. 545 (processor_type): Add PROCESSOR_GEODE. 546 547 * config/i386/i386.md: Include geode.md. 548 (cpu): Add geode. 549 550 * config/i386/i386.c (geode_cost): New initialized global 551 variable. 552 (m_GEODE, m_K6_GEODE): New macros. 553 (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 554 x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 555 x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 556 x86_schedule): Use m_K6_GEODE instead of m_K6. 557 (x86_movx, x86_cmove): Set up m_GEODE. 558 (x86_integer_DFmode_moves): Clear m_GEODE. 559 (processor_target_table): Add entry for geode. 560 (processor_alias_table): Ditto. 561 562 * config/i386/geode.md: New file. 563 564 * doc/invoke.texi: Add entry about geode processor. 565 5662006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 567 568 PR middle-end/28796 569 * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 570 and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 571 for deciding optimizations in consistency with fold-const.c 572 (fold_builtin_unordered_cmp): Likewise. 573 5742006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 575 576 * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 577 (x86_64-*-*): Likewise. 578 579 * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 580 (override_options): Check SSSE3. 581 (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 582 IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 583 IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 584 IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 585 IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 586 IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 587 IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 588 IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 589 IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 590 IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 591 IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 592 IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 593 IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 594 IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 595 IX86_BUILTIN_PABSD128. 596 (bdesc_2arg): Add SSSE3. 597 (bdesc_1arg): Likewise. 598 (ix86_init_mmx_sse_builtins): Support SSSE3. 599 (ix86_expand_builtin): Likewise. 600 * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 601 602 * config/i386/i386.md (UNSPEC_PSHUFB): New. 603 (UNSPEC_PSIGN): Likewise. 604 (UNSPEC_PALIGNR): Likewise. 605 Include mmx.md before sse.md. 606 607 * config/i386/i386.opt: Add -mssse3. 608 609 * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 610 (ssse3_phaddwv4hi3): Likewise. 611 (ssse3_phadddv4si3): Likewise. 612 (ssse3_phadddv2si3): Likewise. 613 (ssse3_phaddswv8hi3): Likewise. 614 (ssse3_phaddswv4hi3): Likewise. 615 (ssse3_phsubwv8hi3): Likewise. 616 (ssse3_phsubwv4hi3): Likewise. 617 (ssse3_phsubdv4si3): Likewise. 618 (ssse3_phsubdv2si3): Likewise. 619 (ssse3_phsubswv8hi3): Likewise. 620 (ssse3_phsubswv4hi3): Likewise. 621 (ssse3_pmaddubswv8hi3): Likewise. 622 (ssse3_pmaddubswv4hi3): Likewise. 623 (ssse3_pmulhrswv8hi3): Likewise. 624 (ssse3_pmulhrswv4hi3): Likewise. 625 (ssse3_pshufbv16qi3): Likewise. 626 (ssse3_pshufbv8qi3): Likewise. 627 (ssse3_psign<mode>3): Likewise. 628 (ssse3_psign<mode>3): Likewise. 629 (ssse3_palignrti): Likewise. 630 (ssse3_palignrdi): Likewise. 631 (abs<mode>2): Likewise. 632 (abs<mode>2): Likewise. 633 634 * config/i386/tmmintrin.h: New file. 635 636 * doc/extend.texi: Document SSSE3 built-in functions. 637 638 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 639 6402006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 641 642 * config/i386/tmmintrin.h: Remove the duplicated content. 643 6442006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 645 646 PR tree-optimization/3511 647 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 648 got new invariant arguments during PHI translation. 649 6502006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 651 652 * builtins.c (fold_builtin_classify): Fix typo. 653 654