ChangeLog.gcc43 revision 237678
1221282Smm2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 2221282Smm 3221282Smm * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 4221282Smm and athlon64-sse3 as improved versions of k8, opteron and athlon64 5221282Smm with SSE3 instruction set support. 6221282Smm * doc/invoke.texi: Likewise. 7221282Smm 8237678Spfg2007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 9237678Spfg 10237678Spfg PR tree-optimization/24689 11237678Spfg PR tree-optimization/31307 12237678Spfg * fold-const.c (operand_equal_p): Compare INTEGER_CST array 13237678Spfg indices by value. 14237678Spfg * gimplify.c (canonicalize_addr_expr): To be consistent with 15237678Spfg gimplify_compound_lval only set operands two and three of 16237678Spfg ARRAY_REFs if they are not gimple_min_invariant. This makes 17237678Spfg it never at this place. 18237678Spfg * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 19237678Spfg 20221282Smm2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 21221282Smm 22221282Smm * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 23221282Smm 24221282Smm2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 25221282Smm 26221282Smm * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 27221282Smm conditional to __SSE2__. 28221282Smm (Entries below should have been added to first ChangeLog 29221282Smm entry for amdfam10 dated 2007-02-05) 30221282Smm * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 31221282Smm defined. 32221282Smm * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 33221282Smm defined. 34221282Smm * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 35221282Smm defined. 36221282Smm 37221282Smm2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 38221282Smm 39221282Smm * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 40221282Smm 41221282Smm2007-01-17 Eric Christopher <echristo@apple.com> (r120846) 42221282Smm 43221282Smm * config.gcc: Support core2 processor. 44221282Smm 45221282Smm2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 46221282Smm 47221282Smm PR target/30040 48221282Smm * config/i386/driver-i386.c (bit_SSSE3): New. 49221282Smm 50221282Smm2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 51221282Smm 52221282Smm * doc/invoke.texi (core2): Add item. 53221282Smm 54221282Smm * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 55221282Smm macros. 56221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for core2. 57221282Smm (TARGET_CPU_DEFAULT_generic): Change value. 58221282Smm (TARGET_CPU_DEFAULT_NAMES): Add core2. 59221282Smm (processor_type): Add new constant PROCESSOR_CORE2. 60221282Smm 61221282Smm * config/i386/i386.md (cpu): Add core2. 62221282Smm 63221282Smm * config/i386/i386.c (core2_cost): New initialized variable. 64221282Smm (m_CORE2): New macro. 65221282Smm (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 66221282Smm x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 67221282Smm x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 68221282Smm x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 69221282Smm x86_partial_reg_dependency, x86_memory_mismatch_stall, 70221282Smm x86_accumulate_outgoing_args, x86_prologue_using_move, 71221282Smm x86_epilogue_using_move, x86_arch_always_fancy_math_387, 72221282Smm x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 73221282Smm x86_use_incdec, x86_four_jump_limit, x86_schedule, 74221282Smm x86_pad_returns): Add m_CORE2. 75221282Smm (override_options): Add entries for Core2. 76221282Smm (ix86_issue_rate): Add case for Core2. 77221282Smm 78221282Smm2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 79221282Smm 80221282Smm * config/i386/i386.h (TARGET_GEODE): 81221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for geode. 82221282Smm (TARGET_CPU_DEFAULT_geode): New macro. 83221282Smm (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 84221282Smm TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 85221282Smm TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 86221282Smm TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 87221282Smm TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 88221282Smm the macro values. 89221282Smm (TARGET_CPU_DEFAULT_NAMES): Add geode. 90221282Smm (processor_type): Add PROCESSOR_GEODE. 91221282Smm 92221282Smm * config/i386/i386.md: Include geode.md. 93221282Smm (cpu): Add geode. 94221282Smm 95221282Smm * config/i386/i386.c (geode_cost): New initialized global 96221282Smm variable. 97221282Smm (m_GEODE, m_K6_GEODE): New macros. 98221282Smm (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 99221282Smm x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 100221282Smm x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 101221282Smm x86_schedule): Use m_K6_GEODE instead of m_K6. 102221282Smm (x86_movx, x86_cmove): Set up m_GEODE. 103221282Smm (x86_integer_DFmode_moves): Clear m_GEODE. 104221282Smm (processor_target_table): Add entry for geode. 105221282Smm (processor_alias_table): Ditto. 106221282Smm 107221282Smm * config/i386/geode.md: New file. 108221282Smm 109221282Smm * doc/invoke.texi: Add entry about geode processor. 110221282Smm 111237678Spfg2006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 112229554Spfg 113229554Spfg PR middle-end/28796 114229554Spfg * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 115229554Spfg and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 116229554Spfg for deciding optimizations in consistency with fold-const.c 117229554Spfg (fold_builtin_unordered_cmp): Likewise. 118229554Spfg 119221282Smm2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 120221282Smm 121221282Smm * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 122221282Smm (x86_64-*-*): Likewise. 123221282Smm 124221282Smm * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 125221282Smm (override_options): Check SSSE3. 126221282Smm (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 127221282Smm IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 128221282Smm IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 129221282Smm IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 130221282Smm IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 131221282Smm IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 132221282Smm IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 133221282Smm IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 134221282Smm IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 135221282Smm IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 136221282Smm IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 137221282Smm IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 138221282Smm IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 139221282Smm IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 140221282Smm IX86_BUILTIN_PABSD128. 141221282Smm (bdesc_2arg): Add SSSE3. 142221282Smm (bdesc_1arg): Likewise. 143221282Smm (ix86_init_mmx_sse_builtins): Support SSSE3. 144221282Smm (ix86_expand_builtin): Likewise. 145221282Smm * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 146221282Smm 147221282Smm * config/i386/i386.md (UNSPEC_PSHUFB): New. 148221282Smm (UNSPEC_PSIGN): Likewise. 149221282Smm (UNSPEC_PALIGNR): Likewise. 150221282Smm Include mmx.md before sse.md. 151221282Smm 152221282Smm * config/i386/i386.opt: Add -mssse3. 153221282Smm 154221282Smm * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 155221282Smm (ssse3_phaddwv4hi3): Likewise. 156221282Smm (ssse3_phadddv4si3): Likewise. 157221282Smm (ssse3_phadddv2si3): Likewise. 158221282Smm (ssse3_phaddswv8hi3): Likewise. 159221282Smm (ssse3_phaddswv4hi3): Likewise. 160221282Smm (ssse3_phsubwv8hi3): Likewise. 161221282Smm (ssse3_phsubwv4hi3): Likewise. 162221282Smm (ssse3_phsubdv4si3): Likewise. 163221282Smm (ssse3_phsubdv2si3): Likewise. 164221282Smm (ssse3_phsubswv8hi3): Likewise. 165221282Smm (ssse3_phsubswv4hi3): Likewise. 166221282Smm (ssse3_pmaddubswv8hi3): Likewise. 167221282Smm (ssse3_pmaddubswv4hi3): Likewise. 168221282Smm (ssse3_pmulhrswv8hi3): Likewise. 169221282Smm (ssse3_pmulhrswv4hi3): Likewise. 170221282Smm (ssse3_pshufbv16qi3): Likewise. 171221282Smm (ssse3_pshufbv8qi3): Likewise. 172221282Smm (ssse3_psign<mode>3): Likewise. 173221282Smm (ssse3_psign<mode>3): Likewise. 174221282Smm (ssse3_palignrti): Likewise. 175221282Smm (ssse3_palignrdi): Likewise. 176221282Smm (abs<mode>2): Likewise. 177221282Smm (abs<mode>2): Likewise. 178221282Smm 179221282Smm * config/i386/tmmintrin.h: New file. 180221282Smm 181221282Smm * doc/extend.texi: Document SSSE3 built-in functions. 182221282Smm 183221282Smm * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 184234023Spfg 185237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 186234023Spfg 187237678Spfg PR tree-optimization/3511 188237678Spfg * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 189237678Spfg got new invariant arguments during PHI translation. 190237678Spfg 191237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 192237678Spfg 193234023Spfg * builtins.c (fold_builtin_classify): Fix typo. 194234023Spfg 195