ChangeLog.gcc43 revision 234023 
12007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339)
2 
3	* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 
4	and athlon64-sse3 as improved versions of k8, opteron and athlon64 
5	with SSE3 instruction set support.
6	* doc/invoke.texi: Likewise.
7
82007-04-07  H.J. Lu  <hongjiu.lu@intel.com> (r123639)
9
10	* config/i386/i386.c (ix86_handle_option): Handle SSSE3.
11
122007-02-08  Harsha Jagasia  <harsha.jagasia@amd.com> (r121726)
13
14	* config/i386/xmmintrin.h: Make inclusion of emmintrin.h
15	conditional to __SSE2__.
16	(Entries below should have been added to first ChangeLog
17	entry for amdfam10 dated 2007-02-05)
18	* config/i386/emmintrin.h: Generate #error if __SSE2__ is not
19	defined.
20	* config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
21	defined.
22	* config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
23	defined.
24
252007-02-07  Jakub Jelinek  <jakub@redhat.com> (r121687)
26
27	* config/i386/i386.c (override_options): Set PTA_SSSE3 for core2.
28
292007-01-17  Eric Christopher  <echristo@apple.com> (r120846)
30
31	* config.gcc: Support core2 processor.
32
332006-12-02  H.J. Lu  <hongjiu.lu@intel.com> (r119454 - partial)
34
35	PR target/30040
36	* config/i386/driver-i386.c (bit_SSSE3): New.
37
382006-11-18  Vladimir Makarov  <vmakarov@redhat.com> (r118973)
39
40	* doc/invoke.texi (core2): Add item.
41
42	* config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New
43	macros.
44	(TARGET_CPU_CPP_BUILTINS): Add code for core2.
45	(TARGET_CPU_DEFAULT_generic): Change value.
46	(TARGET_CPU_DEFAULT_NAMES): Add core2.
47	(processor_type): Add new constant PROCESSOR_CORE2.
48
49	* config/i386/i386.md (cpu): Add core2.
50
51	* config/i386/i386.c (core2_cost): New initialized variable.
52	(m_CORE2): New macro.
53	(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
54	x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop,
55	x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8,
56	x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves,
57	x86_partial_reg_dependency, x86_memory_mismatch_stall,
58	x86_accumulate_outgoing_args, x86_prologue_using_move,
59	x86_epilogue_using_move, x86_arch_always_fancy_math_387,
60	x86_sse_partial_reg_dependency, x86_rep_movl_optimal,
61	x86_use_incdec, x86_four_jump_limit, x86_schedule,
62	x86_pad_returns): Add m_CORE2.
63	(override_options): Add entries for Core2.
64	(ix86_issue_rate): Add case for Core2.
65	
662006-10-27  Vladimir Makarov  <vmakarov@redhat.com> (r118090)
67
68	* config/i386/i386.h (TARGET_GEODE):
69	(TARGET_CPU_CPP_BUILTINS): Add code for geode.
70	(TARGET_CPU_DEFAULT_geode): New macro.
71	(TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2,
72	TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon,
73	TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8,
74	TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott,
75	TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase
76	the macro values.
77	(TARGET_CPU_DEFAULT_NAMES): Add geode.
78	(processor_type): Add PROCESSOR_GEODE.
79
80	* config/i386/i386.md: Include geode.md.
81	(cpu): Add geode.
82
83	* config/i386/i386.c (geode_cost): New initialized global
84	variable.
85	(m_GEODE, m_K6_GEODE): New macros.
86	(x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf,
87	x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4,
88	x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants,
89	x86_schedule): Use m_K6_GEODE instead of m_K6.
90	(x86_movx, x86_cmove): Set up m_GEODE.
91	(x86_integer_DFmode_moves): Clear m_GEODE.
92	(processor_target_table): Add entry for geode.
93	(processor_alias_table): Ditto.
94
95	* config/i386/geode.md: New file.
96
97	* doc/invoke.texi: Add entry about geode processor.
98    
992006-10-24  Richard Guenther  <rguenther@suse.de>
100
101	PR middle-end/28796
102	* builtins.c (fold_builtin_classify): Use HONOR_INFINITIES
103	and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS
104	for deciding optimizations in consistency with fold-const.c
105	(fold_builtin_unordered_cmp): Likewise.
106
1072006-10-22  H.J. Lu  <hongjiu.lu@intel.com> (r117958)
108
109	* config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers.
110	(x86_64-*-*): Likewise.
111
112	* config/i386/i386.c (pta_flags): Add PTA_SSSE3.
113	(override_options): Check SSSE3.
114	(ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD,
115	IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD,
116	IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW,
117	IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB,
118	IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND,
119	IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW,
120	IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128,
121	IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128,
122	IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128,
123	IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128,
124	IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128,
125	IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128,
126	IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128,
127	IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and
128	IX86_BUILTIN_PABSD128.
129	(bdesc_2arg): Add SSSE3.
130	(bdesc_1arg): Likewise.
131	(ix86_init_mmx_sse_builtins): Support SSSE3.
132	(ix86_expand_builtin): Likewise.
133	* config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise.
134
135	* config/i386/i386.md (UNSPEC_PSHUFB): New.
136	(UNSPEC_PSIGN): Likewise.
137	(UNSPEC_PALIGNR): Likewise.
138	Include mmx.md before sse.md.
139
140	* config/i386/i386.opt: Add -mssse3.
141
142	* config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3.
143	(ssse3_phaddwv4hi3): Likewise.
144	(ssse3_phadddv4si3): Likewise.
145	(ssse3_phadddv2si3): Likewise.
146	(ssse3_phaddswv8hi3): Likewise.
147	(ssse3_phaddswv4hi3): Likewise.
148	(ssse3_phsubwv8hi3): Likewise.
149	(ssse3_phsubwv4hi3): Likewise.
150	(ssse3_phsubdv4si3): Likewise.
151	(ssse3_phsubdv2si3): Likewise.
152	(ssse3_phsubswv8hi3): Likewise.
153	(ssse3_phsubswv4hi3): Likewise.
154	(ssse3_pmaddubswv8hi3): Likewise.
155	(ssse3_pmaddubswv4hi3): Likewise.
156	(ssse3_pmulhrswv8hi3): Likewise.
157	(ssse3_pmulhrswv4hi3): Likewise.
158	(ssse3_pshufbv16qi3): Likewise.
159	(ssse3_pshufbv8qi3): Likewise.
160	(ssse3_psign<mode>3): Likewise.
161	(ssse3_psign<mode>3): Likewise.
162	(ssse3_palignrti): Likewise.
163	(ssse3_palignrdi): Likewise.
164	(abs<mode>2): Likewise.
165	(abs<mode>2): Likewise.
166
167	* config/i386/tmmintrin.h: New file.
168
169	* doc/extend.texi: Document SSSE3 built-in functions.
170
171	* doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
172
1732006-10-21  Richard Guenther  <rguenther@suse.de>
174
175	* builtins.c (fold_builtin_classify): Fix typo.
176
177