ChangeLog.gcc43 revision 221282
1221282Smm2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 2221282Smm 3221282Smm * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 4221282Smm and athlon64-sse3 as improved versions of k8, opteron and athlon64 5221282Smm with SSE3 instruction set support. 6221282Smm * doc/invoke.texi: Likewise. 7221282Smm 8221282Smm2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 9221282Smm 10221282Smm * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 11221282Smm 12221282Smm2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 13221282Smm 14221282Smm * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 15221282Smm conditional to __SSE2__. 16221282Smm (Entries below should have been added to first ChangeLog 17221282Smm entry for amdfam10 dated 2007-02-05) 18221282Smm * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 19221282Smm defined. 20221282Smm * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 21221282Smm defined. 22221282Smm * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 23221282Smm defined. 24221282Smm 25221282Smm2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 26221282Smm 27221282Smm * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 28221282Smm 29221282Smm2007-01-17 Eric Christopher <echristo@apple.com> (r120846) 30221282Smm 31221282Smm * config.gcc: Support core2 processor. 32221282Smm 33221282Smm2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 34221282Smm 35221282Smm PR target/30040 36221282Smm * config/i386/driver-i386.c (bit_SSSE3): New. 37221282Smm 38221282Smm2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 39221282Smm 40221282Smm * doc/invoke.texi (core2): Add item. 41221282Smm 42221282Smm * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 43221282Smm macros. 44221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for core2. 45221282Smm (TARGET_CPU_DEFAULT_generic): Change value. 46221282Smm (TARGET_CPU_DEFAULT_NAMES): Add core2. 47221282Smm (processor_type): Add new constant PROCESSOR_CORE2. 48221282Smm 49221282Smm * config/i386/i386.md (cpu): Add core2. 50221282Smm 51221282Smm * config/i386/i386.c (core2_cost): New initialized variable. 52221282Smm (m_CORE2): New macro. 53221282Smm (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 54221282Smm x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 55221282Smm x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 56221282Smm x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 57221282Smm x86_partial_reg_dependency, x86_memory_mismatch_stall, 58221282Smm x86_accumulate_outgoing_args, x86_prologue_using_move, 59221282Smm x86_epilogue_using_move, x86_arch_always_fancy_math_387, 60221282Smm x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 61221282Smm x86_use_incdec, x86_four_jump_limit, x86_schedule, 62221282Smm x86_pad_returns): Add m_CORE2. 63221282Smm (override_options): Add entries for Core2. 64221282Smm (ix86_issue_rate): Add case for Core2. 65221282Smm 66221282Smm2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 67221282Smm 68221282Smm * config/i386/i386.h (TARGET_GEODE): 69221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for geode. 70221282Smm (TARGET_CPU_DEFAULT_geode): New macro. 71221282Smm (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 72221282Smm TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 73221282Smm TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 74221282Smm TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 75221282Smm TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 76221282Smm the macro values. 77221282Smm (TARGET_CPU_DEFAULT_NAMES): Add geode. 78221282Smm (processor_type): Add PROCESSOR_GEODE. 79221282Smm 80221282Smm * config/i386/i386.md: Include geode.md. 81221282Smm (cpu): Add geode. 82221282Smm 83221282Smm * config/i386/i386.c (geode_cost): New initialized global 84221282Smm variable. 85221282Smm (m_GEODE, m_K6_GEODE): New macros. 86221282Smm (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 87221282Smm x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 88221282Smm x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 89221282Smm x86_schedule): Use m_K6_GEODE instead of m_K6. 90221282Smm (x86_movx, x86_cmove): Set up m_GEODE. 91221282Smm (x86_integer_DFmode_moves): Clear m_GEODE. 92221282Smm (processor_target_table): Add entry for geode. 93221282Smm (processor_alias_table): Ditto. 94221282Smm 95221282Smm * config/i386/geode.md: New file. 96221282Smm 97221282Smm * doc/invoke.texi: Add entry about geode processor. 98221282Smm 99221282Smm2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 100221282Smm 101221282Smm * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 102221282Smm (x86_64-*-*): Likewise. 103221282Smm 104221282Smm * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 105221282Smm (override_options): Check SSSE3. 106221282Smm (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 107221282Smm IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 108221282Smm IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 109221282Smm IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 110221282Smm IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 111221282Smm IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 112221282Smm IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 113221282Smm IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 114221282Smm IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 115221282Smm IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 116221282Smm IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 117221282Smm IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 118221282Smm IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 119221282Smm IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 120221282Smm IX86_BUILTIN_PABSD128. 121221282Smm (bdesc_2arg): Add SSSE3. 122221282Smm (bdesc_1arg): Likewise. 123221282Smm (ix86_init_mmx_sse_builtins): Support SSSE3. 124221282Smm (ix86_expand_builtin): Likewise. 125221282Smm * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 126221282Smm 127221282Smm * config/i386/i386.md (UNSPEC_PSHUFB): New. 128221282Smm (UNSPEC_PSIGN): Likewise. 129221282Smm (UNSPEC_PALIGNR): Likewise. 130221282Smm Include mmx.md before sse.md. 131221282Smm 132221282Smm * config/i386/i386.opt: Add -mssse3. 133221282Smm 134221282Smm * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 135221282Smm (ssse3_phaddwv4hi3): Likewise. 136221282Smm (ssse3_phadddv4si3): Likewise. 137221282Smm (ssse3_phadddv2si3): Likewise. 138221282Smm (ssse3_phaddswv8hi3): Likewise. 139221282Smm (ssse3_phaddswv4hi3): Likewise. 140221282Smm (ssse3_phsubwv8hi3): Likewise. 141221282Smm (ssse3_phsubwv4hi3): Likewise. 142221282Smm (ssse3_phsubdv4si3): Likewise. 143221282Smm (ssse3_phsubdv2si3): Likewise. 144221282Smm (ssse3_phsubswv8hi3): Likewise. 145221282Smm (ssse3_phsubswv4hi3): Likewise. 146221282Smm (ssse3_pmaddubswv8hi3): Likewise. 147221282Smm (ssse3_pmaddubswv4hi3): Likewise. 148221282Smm (ssse3_pmulhrswv8hi3): Likewise. 149221282Smm (ssse3_pmulhrswv4hi3): Likewise. 150221282Smm (ssse3_pshufbv16qi3): Likewise. 151221282Smm (ssse3_pshufbv8qi3): Likewise. 152221282Smm (ssse3_psign<mode>3): Likewise. 153221282Smm (ssse3_psign<mode>3): Likewise. 154221282Smm (ssse3_palignrti): Likewise. 155221282Smm (ssse3_palignrdi): Likewise. 156221282Smm (abs<mode>2): Likewise. 157221282Smm (abs<mode>2): Likewise. 158221282Smm 159221282Smm * config/i386/tmmintrin.h: New file. 160221282Smm 161221282Smm * doc/extend.texi: Document SSSE3 built-in functions. 162221282Smm 163221282Smm * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 164