1259269Spfg2007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2255252Spfg 3259269Spfg * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4259269Spfg * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5259269Spfg * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6259269Spfg 7259705Spfg2007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8259705Spfg 9259705Spfg * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10259705Spfg FUNCTION_DECL. 11259705Spfg * tree.c (build_decl_stat): Move code from here... 12259705Spfg (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13259705Spfg (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14259705Spfg about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15259705Spfg * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16259705Spfg * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17259705Spfg FUNCTION_BOUNDARY. 18259705Spfg 19259705Spfg2007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20259705Spfg 21259705Spfg PR 32617 22259705Spfg * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23259705Spfg FUNCTION_DECLs. 24259705Spfg (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25259705Spfg * varasm.c (assemble_start_function): Honor DECL_ALIGN 26259705Spfg for FUNCTION_DECLs. Don't use align_functions_log if 27259705Spfg DECL_USER_ALIGN. 28259705Spfg * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29259705Spfg even for FUNCTION_DECLs. 30259705Spfg * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31259705Spfg FUNCTION_DECLs. 32259705Spfg * tree.h (DECL_ALIGN): Update for new location of 'align'. 33259705Spfg (DECL_FUNCTION_CODE): Update for new location and name of 34259705Spfg 'function_code'. 35259705Spfg (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36259705Spfg (struct tree_decl_common): Move 'align' and 'off_align' out 37259705Spfg of union, ensure they're still on a 32-bit boundary. Remove 38259705Spfg other fields in union 'u1'. 39259705Spfg (struct tree_function_decl): Add field 'function_code' replacing 40259705Spfg 'u1.f' in tree_decl_common. 41259705Spfg * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42259705Spfg * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43259705Spfg (Variable Attributes): Cross-reference 'aligned' attribute 44259705Spfg to Function Attributes. 45259705Spfg * flags.h (force_align_functions_log): Delete. 46259705Spfg * toplev.c (force_align_functions_log): Delete. 47259705Spfg 48260140Spfg2007-07-06 Josh Conner <jconner@apple.com> (r126422) 49260140Spfg 50260140Spfg PR middle-end/32602 51260140Spfg PR middle-end/32603 52260140Spfg * calls.c (store_one_arg): Handle arguments which are partially 53260140Spfg on the stack when detecting argument overlap. 54260140Spfg 55260140Spfg2007-07-03 Eric Christopher <echristo@apple.com> (r126278) 56260140Spfg 57260140Spfg * doc/cppopts.texi: Add conflicting option note to -dM. 58260140Spfg * doc/invoke.texi: Add note about possible conflicts with 59260140Spfg -E for -dCHARS and note that -dM will not produce 60260140Spfg any results if there is no machine dependent reorg. 61260140Spfg 62260075Spfg2007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088) 63260075Spfg 64260075Spfg * doc/invoke.texi (C++ Dialect Options): Document 65260075Spfg fvisibility-ms-compat. 66260075Spfg * c.opt (fvisibility-ms-compat): New. 67260075Spfg 68260456Spfg2007-06-23 Richard Earnshaw <rearnsha@arm.com> (r125973) 69260456Spfg 70260456Spfg PR target/31152 71260456Spfg * arm.md (negscc): Match the correct operand for optimized LT0 test. 72260456Spfg Remove optimization for GT. 73260456Spfg 74259269Spfg2007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 75259269Spfg 76255252Spfg PR preprocessor/23479 77255252Spfg * doc/extend.texi: Document the 0b-prefixed binary integer 78255252Spfg constant extension. 79255252Spfg 80259948Spfg2007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239) 81259948Spfg 82259948Spfg * c-typeck.c (build_indirect_ref): Include type in error message. 83259948Spfg (build_binary_op): Pass types to binary_op_error. 84259948Spfg * c-common.c (binary_op_error): Take two type arguments, print out 85259948Spfg types with error. 86259948Spfg * c-common.h (binary_op_error): Update prototype. 87259948Spfg 88259707Spfg2007-05-27 Eric Christopher <echristo@apple.com> (r125116) 89259707Spfg 90259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 91259707Spfg sp_offset depending on stack size. Save r12 depending 92259707Spfg on registers we're saving later. 93259707Spfg (rs6000_emit_epilogue): Update sp_offset depending only 94259707Spfg on stack size. 95259707Spfg 96259269Spfg2007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 97259269Spfg 98259269Spfg * postreload-gcse.c (reg_changed_after_insn_p): New function. 99259269Spfg (oprs_unchanged_p): Use it to check all registers in a REG. 100259269Spfg (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 101259269Spfg (reg_set_between_after_reload_p): Delete. 102259269Spfg (reg_used_between_after_reload_p): Likewise. 103259269Spfg (reg_set_or_used_since_bb_start): Likewise. 104259269Spfg (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 105259269Spfg and reg_used_between_p instead of reg_set_or_used_since_bb_start. 106259269Spfg Use reg_set_between_p instead of reg_set_between_after_reload_p. 107259269Spfg * rtlanal.c (reg_set_p): Check whether REG overlaps 108259269Spfg regs_invalidated_by_call, rather than just checking the 109259269Spfg membership of REGNO (REG). 110259269Spfg 111259948Spfg2007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839) 112259948Spfg 113259948Spfg * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'. 114259948Spfg (output_die): Use 'unsigned long' with %x. 115259948Spfg * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and 116259948Spfg HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT. 117259948Spfg * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx. 118259948Spfg 119259707Spfg2007-05-16 Eric Christopher <echristo@apple.com> (r124763) 120259707Spfg 121259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 122259707Spfg saving after stack push. Set sp_offset whenever we push. 123259707Spfg (rs6000_emit_epilogue): Move altivec register restore before stack push. 124259707Spfg 125259269Spfg2007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 126259269Spfg 127259269Spfg * config/rs6000/rs6000.c (rs6000_override_options): Don't set 128259269Spfg MASK_PPC_GFXOPT for 8540 or 8548. 129259269Spfg 130252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 131252080Spfg 132252080Spfg * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 133252080Spfg 'AMD Family 10 core'. 134252080Spfg 135221282Smm2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 136221282Smm 137221282Smm * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 138221282Smm and athlon64-sse3 as improved versions of k8, opteron and athlon64 139221282Smm with SSE3 instruction set support. 140221282Smm * doc/invoke.texi: Likewise. 141221282Smm 142252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 143252080Spfg 144252080Spfg * config/i386/i386.c (override_options): Tuning 32-byte loop 145252080Spfg alignment for amdfam10 architecture. Increasing the max loop 146252080Spfg alignment to 24 bytes. 147252080Spfg 148260231Spfg2007-04-24 Hui-May Chang <hm.chang@apple.com> (r124115) 149260231Spfg 150260231Spfg * reload1.c (merge_assigned_reloads) : Do not merge a RELOAD_OTHER 151260231Spfg instruction with a RELOAD_FOR_OPERAND_ADDRESS instruction. 152260231Spfg 153259705Spfg2007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 154259269Spfg 155259269Spfg * doc/invoke.texi (Debugging Options): Add documentation for the 156259269Spfg -femit-struct-debug options -femit-struct-debug-baseonly, 157259269Spfg -femit-struct-debug-reduced, and 158259269Spfg -femit-struct-debug-detailed[=...]. 159259269Spfg 160259269Spfg * c-opts.c (c_common_handle_option): Add 161259269Spfg OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 162259269Spfg and OPT_femit_struct_debug_detailed_. 163259269Spfg * c.opt: Add specifications for 164259269Spfg -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 165259269Spfg and -femit-struct-debug-detailed[=...]. 166259269Spfg * opts.c (set_struct_debug_option): Parse the 167259269Spfg -femit-struct-debug-... options. 168259269Spfg * opts.c (matches_main_base, main_input_basename, 169259269Spfg main_input_baselength, base_of_path, matches_main_base): Add 170259269Spfg variables and functions to compare header base name to compilation 171259269Spfg unit base name. 172259269Spfg * opts.c (should_emit_struct_debug): Add to determine to emit a 173259269Spfg structure based on the option. 174259269Spfg (dump_struct_debug) Also disabled function to debug this 175259269Spfg function. 176259269Spfg * opts.c (handle_options): Save the base name of the 177259269Spfg compilation unit. 178259269Spfg 179259269Spfg * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 180259269Spfg (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 181259269Spfg This hook indicates if a type is generic. Set it by default 182259269Spfg to "never generic". 183259269Spfg * langhooks.h (struct lang_hooks_for_types): Add a new hook 184259269Spfg to determine if a struct type is generic or not. 185259269Spfg * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 186259269Spfg * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 187259269Spfg * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 188259269Spfg with live C++ hook. 189259269Spfg 190259269Spfg * flags.h (enum debug_info_usage): Add an enumeration to describe 191259269Spfg a program's use of a structure type. 192259269Spfg * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 193259269Spfg to indicate the program's usage of the type. Filter structs based 194259269Spfg on the -femit-struct-debug-... specification. 195259269Spfg (gen_type_die): Split into two routines, gen_type_die and 196259269Spfg gen_type_die_with_usage. gen_type_die is now a wrapper 197259269Spfg that assumes direct usage. 198259269Spfg (gen_type_die_with_usage): Replace calls to gen_type_die 199259269Spfg with gen_type_die_with_usage adding the program usage of 200259269Spfg the referenced type. 201259269Spfg (dwarf2out_imported_module_or_decl): Suppress struct debug 202259269Spfg information using should_emit_struct_debug when appropriate. 203259269Spfg 204237678Spfg2007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 205237678Spfg 206237678Spfg PR tree-optimization/24689 207237678Spfg PR tree-optimization/31307 208237678Spfg * fold-const.c (operand_equal_p): Compare INTEGER_CST array 209237678Spfg indices by value. 210237678Spfg * gimplify.c (canonicalize_addr_expr): To be consistent with 211237678Spfg gimplify_compound_lval only set operands two and three of 212237678Spfg ARRAY_REFs if they are not gimple_min_invariant. This makes 213237678Spfg it never at this place. 214237678Spfg * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 215237678Spfg 216221282Smm2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 217221282Smm 218221282Smm * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 219221282Smm 220252080Spfg2007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 221252080Spfg 222252080Spfg * config.gcc: Accept barcelona as a variant of amdfam10. 223252080Spfg * config/i386/i386.c (override_options): Likewise. 224252080Spfg * doc/invoke.texi: Likewise. 225252080Spfg 226259705Spfg2007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 227259269Spfg 228259269Spfg * c-decl.c (warn_variable_length_array): New function. 229259269Spfg Refactored from grokdeclarator to handle warn_vla 230259269Spfg and handle unnamed array case. 231259269Spfg (grokdeclarator): Refactored VLA warning case. 232259269Spfg * c.opt (Wvla): New flag. 233259269Spfg 234259269Spfg2007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 235259269Spfg 236259269Spfg * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 237259269Spfg the *_DIV_EXPR codes correctly with overflow infinities. 238259269Spfg 239252080Spfg2007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 240252080Spfg 241252080Spfg * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 242252080Spfg (bit_SSE4a): New. 243252080Spfg 244221282Smm2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 245221282Smm 246221282Smm * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 247221282Smm conditional to __SSE2__. 248221282Smm (Entries below should have been added to first ChangeLog 249221282Smm entry for amdfam10 dated 2007-02-05) 250221282Smm * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 251221282Smm defined. 252221282Smm * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 253221282Smm defined. 254221282Smm * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 255221282Smm defined. 256221282Smm 257221282Smm2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 258221282Smm 259221282Smm * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 260221282Smm 261252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 262252080Spfg 263252080Spfg * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 264252080Spfg athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 265252080Spfg athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 266252080Spfg athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 267252080Spfg athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 268252080Spfg athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 269252080Spfg athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 270252080Spfg athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 271252080Spfg 272252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 273252080Spfg 274252080Spfg * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 275252080Spfg cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 276252080Spfg swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 277252080Spfg fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 278252080Spfg x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 279252080Spfg floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 280252080Spfg floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 281252080Spfg mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 282252080Spfg umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 283252080Spfg umuldi3_highpart_rex64, umulsi3_highpart_insn, 284252080Spfg umulsi3_highpart_zext, smuldi3_highpart_rex64, 285252080Spfg smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 286252080Spfg x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 287252080Spfg sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 288252080Spfg sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 289252080Spfg sqrtextenddfxf2_i387): Added amdfam10_decode. 290252080Spfg 291252080Spfg * config/i386/athlon.md (athlon_idirect_amdfam10, 292252080Spfg athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 293252080Spfg athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 294252080Spfg athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 295252080Spfg athlon_ivector_store_amdfam10): New define_insn_reservation. 296252080Spfg (athlon_idirect_loadmov, athlon_idirect_movstore): Added 297252080Spfg amdfam10. 298252080Spfg 299252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 300252080Spfg 301252080Spfg * config/i386/athlon.md (athlon_call_amdfam10, 302252080Spfg athlon_pop_amdfam10, athlon_lea_amdfam10): New 303252080Spfg define_insn_reservation. 304252080Spfg (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 305252080Spfg athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 306252080Spfg athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 307252080Spfg 308252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 309252080Spfg 310252080Spfg * config/i386/athlon.md (athlon_sseld_amdfam10, 311252080Spfg athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 312252080Spfg athlon_mmxssest_short_amdfam10): New define_insn_reservation. 313252080Spfg 314252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 315252080Spfg 316252080Spfg * config/i386/athlon.md (athlon_sseins_amdfam10): New 317252080Spfg define_insn_reservation. 318252080Spfg * config/i386/i386.md (sseins): Added sseins to define_attr type 319252080Spfg and define_attr unit. 320252080Spfg * config/i386/sse.md: Set type attribute to sseins for insertq 321252080Spfg and insertqi. 322252080Spfg 323252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 324252080Spfg 325252080Spfg * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 326252080Spfg ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 327252080Spfg ssecomi_load_amdfam10, ssecomi_amdfam10, 328252080Spfg sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 329252080Spfg define_insn_reservation. 330252080Spfg (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 331252080Spfg 332252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 333252080Spfg 334252080Spfg * config/i386/athlon.md (cvtss2sd_load_amdfam10, 335252080Spfg cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 336252080Spfg cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 337252080Spfg cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 338252080Spfg cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 339252080Spfg cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 340252080Spfg define_insn_reservation. 341252080Spfg 342252080Spfg * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 343252080Spfg cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 344252080Spfg cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 345252080Spfg cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 346252080Spfg cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 347252080Spfg 348252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 349252080Spfg 350252080Spfg * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 351252080Spfg athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 352252080Spfg athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 353252080Spfg (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 354252080Spfg athlon_ssemul_load_k8): Added amdfam10. 355252080Spfg 356252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 357252080Spfg 358252080Spfg * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 359252080Spfg (x86_sse_unaligned_move_optimal): New variable. 360252080Spfg 361252080Spfg * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 362252080Spfg m_AMDFAM10. 363252080Spfg (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 364252080Spfg for unaligned vector SSE double/single precision loads for AMDFAM10. 365252080Spfg 366252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 367252080Spfg 368252080Spfg * config/i386/i386.h (TARGET_AMDFAM10): New macro. 369252080Spfg (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 370252080Spfg Define TARGET_CPU_DEFAULT_amdfam10. 371252080Spfg (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 372252080Spfg (processor_type): Add PROCESSOR_AMDFAM10. 373252080Spfg 374252080Spfg * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 375252080Spfg processor_type in config/i386/i386.h. 376252080Spfg Enable imul peepholes for TARGET_AMDFAM10. 377252080Spfg 378252080Spfg * config.gcc: Add support for --with-cpu option for amdfam10. 379252080Spfg 380252080Spfg * config/i386/i386.c (amdfam10_cost): New variable. 381252080Spfg (m_AMDFAM10): New macro. 382252080Spfg (m_ATHLON_K8_AMDFAM10): New macro. 383252080Spfg (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 384252080Spfg x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 385252080Spfg x86_promote_QImode, x86_integer_DFmode_moves, 386252080Spfg x86_partial_reg_dependency, x86_memory_mismatch_stall, 387252080Spfg x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 388252080Spfg x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 389252080Spfg x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 390252080Spfg x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 391252080Spfg Enable/disable for amdfam10. 392252080Spfg (override_options): Add amdfam10_cost to processor_target_table. 393252080Spfg Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 394252080Spfg processor_alias_table. 395252080Spfg (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 396252080Spfg (ix86_adjust_cost): Add code for amdfam10. 397252080Spfg 398252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 399252080Spfg 400252080Spfg * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 401252080Spfg instruction set feature flag. Add new (-mpopcnt) flag for popcnt 402252080Spfg instruction. Add new SSE4A (-msse4a) instruction set feature flag. 403252080Spfg * config/i386/i386.h: Add builtin definition for SSE4A. 404252080Spfg * config/i386/i386.md: Add support for ABM instructions 405252080Spfg (popcnt and lzcnt). 406252080Spfg * config/i386/sse.md: Add support for SSE4A instructions 407252080Spfg (movntss, movntsd, extrq, insertq). 408252080Spfg * config/i386/i386.c: Add support for ABM and SSE4A builtins. 409252080Spfg Add -march=amdfam10 flag. 410252080Spfg * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 411252080Spfg * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 412252080Spfg and amdfam10. 413252080Spfg * doc/extend.texi: Add documentation for SSE4A builtins. 414252080Spfg 415252080Spfg2007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 416252080Spfg 417252080Spfg * config/i386/i386.h (x86_cmpxchg16b): Remove const. 418252080Spfg (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 419252080Spfg * config/i386/i386.c (x86_cmpxchg16b): Remove const. 420252080Spfg (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 421252080Spfg for CPUs that have PTA_CX16 set. 422252080Spfg 423260140Spfg2007-01-18 Josh Conner <jconner@apple.com> (r120902) 424260140Spfg 425260140Spfg PR target/30485 426260140Spfg * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Add 427260140Spfg support for UNLE, UNLT, UNGE, and UNGT. 428260140Spfg 429221282Smm2007-01-17 Eric Christopher <echristo@apple.com> (r120846) 430221282Smm 431221282Smm * config.gcc: Support core2 processor. 432221282Smm 433259948Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 434259948Spfg 435259948Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 436259948Spfg always convertible if they have the same size, but not otherwise. 437259948Spfg 438260075Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 439260075Spfg 440260075Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 441260075Spfg always convertible if they have the same size, but not otherwise. 442260075Spfg 443259948Spfg2007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611) 444259948Spfg 445259948Spfg * target.h (struct gcc_target): New field library_rtti_comdat. 446259948Spfg * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New. 447259948Spfg (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT. 448259948Spfg * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT. 449259948Spfg * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define. 450259948Spfg 451260075Spfg2007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572) 452260075Spfg 453260075Spfg * c.opt: Add -flax-vector-conversions. 454260075Spfg * c-typeck.c (convert_for_assignment): Pass flag to 455260075Spfg vector_types_convertible_p to allow emission of note. 456260075Spfg (digest_init): Likewise. 457260075Spfg * c-opts.c: Handle -flax-vector-conversions. 458260075Spfg * c-common.c (flag_lax_vector_conversions): New. 459260075Spfg (vector_types_convertible_p): Unless -flax-vector conversions 460260075Spfg has been passed, disallow conversions between vectors with 461260075Spfg differing numbers of subparts and/or element types. If such 462260075Spfg a conversion is disallowed, possibly emit a note on the first 463260075Spfg occasion only to inform the user of -flax-vector-conversions. 464260075Spfg The new last argument specifies this. 465260075Spfg * c-common.h (flag_lax_vector_conversions): New. 466260075Spfg (vector_types_convertible_p): Add extra argument. 467260075Spfg * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use 468260075Spfg char_type_node for V*QI type vectors. 469260075Spfg * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): 470260075Spfg Update to satisfy new typechecking rules. 471260075Spfg * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both 472260075Spfg C and C++ variants. 473260075Spfg * doc/invoke.texi (C Dialect Options): Document 474260075Spfg -flax-vector-conversions. 475260075Spfg 476259705Spfg2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 477259585Spfg 478259585Spfg PR c/19978 479259585Spfg * tree.h (TREE_OVERFLOW_P): New. 480259585Spfg * c-typeck.c (parser_build_unary_op): Warn only if result 481259585Spfg overflowed and operands did not. 482259585Spfg (parser_build_binary_op): Likewise. 483259585Spfg (convert_for_assignment): Remove redundant overflow_warning. 484259585Spfg * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 485259585Spfg 486259269Spfg2006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 487259269Spfg 488259269Spfg PR c++/19564 489259269Spfg PR c++/19756 490259269Spfg * c-typeck.c (parser_build_binary_op): Move parentheses warnings 491259269Spfg to warn_about_parentheses in c-common.c. 492259269Spfg * c-common.c (warn_about_parentheses): New function. 493259269Spfg * c-common.h (warn_about_parentheses): Declare. 494259269Spfg * doc/invoke.texi (Warning Options): Update -Wparentheses 495259269Spfg description. 496259269Spfg 497221282Smm2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 498221282Smm 499221282Smm PR target/30040 500221282Smm * config/i386/driver-i386.c (bit_SSSE3): New. 501221282Smm 502252080Spfg2006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 503252080Spfg 504252080Spfg * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 505252080Spfg and m_GENERIC64. 506252080Spfg 507221282Smm2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 508221282Smm 509221282Smm * doc/invoke.texi (core2): Add item. 510221282Smm 511221282Smm * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 512221282Smm macros. 513221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for core2. 514221282Smm (TARGET_CPU_DEFAULT_generic): Change value. 515221282Smm (TARGET_CPU_DEFAULT_NAMES): Add core2. 516221282Smm (processor_type): Add new constant PROCESSOR_CORE2. 517221282Smm 518221282Smm * config/i386/i386.md (cpu): Add core2. 519221282Smm 520221282Smm * config/i386/i386.c (core2_cost): New initialized variable. 521221282Smm (m_CORE2): New macro. 522221282Smm (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 523221282Smm x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 524221282Smm x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 525221282Smm x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 526221282Smm x86_partial_reg_dependency, x86_memory_mismatch_stall, 527221282Smm x86_accumulate_outgoing_args, x86_prologue_using_move, 528221282Smm x86_epilogue_using_move, x86_arch_always_fancy_math_387, 529221282Smm x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 530221282Smm x86_use_incdec, x86_four_jump_limit, x86_schedule, 531221282Smm x86_pad_returns): Add m_CORE2. 532221282Smm (override_options): Add entries for Core2. 533221282Smm (ix86_issue_rate): Add case for Core2. 534221282Smm 535260396Spfg2006-11-14 Caroline Tice <ctice@apple.com> (r118826) 536260396Spfg 537260396Spfg * dwarf2out.c (debug_pubtypes_section): New static global variable. 538260396Spfg (pubname_entry): Add DEF_VEC_O and DEF_VEC_ALLOC_O statements for 539260396Spfg this type. 540260396Spfg (pubname_table): Redefine as a vector. 541260396Spfg (pubtype_table): New static global variable, defined as a vector. 542260396Spfg (pubname_table_allocated): Remove static global variable. 543260396Spfg (pubname_table_in_use): Remove static global variable. 544260396Spfg (PUBNAME_TABLE_INCREMENT): Remove constant. 545260396Spfg (size_of_pubnames): Add parameter to deal with either pubnames or 546260396Spfg pubtypes, and change code to deal with table being a vector. 547260396Spfg (add_pubname): Change to deal with table being a vector. 548260396Spfg (add_pubtype): New function. 549260396Spfg (output_pubnames): Add parameter to deal with either pubnames or 550260396Spfg pubtypes, and change code to deal with table being a vector. 551260396Spfg (gen_array_type_die): Add call to add_pubtype. 552260396Spfg (gen_enumeration_type_die): Add call to add_pubtype. 553260396Spfg (gen_struct_or_union_type_die): Add call to add_pubtype. 554260396Spfg (gen_subroutine_type_die): Add call to add_pubtype. 555260396Spfg (gen_typedef_die): Add call to add_pubtype. 556260396Spfg (dwarf2out_init): Add code to initialize pubname_table and 557260396Spfg pubtype_table vectors; also initialize debug_pubtypes_section. 558260396Spfg (prune_unused_types): Change to deal with pubnames being a vector. 559260396Spfg (dwarf2out_finish): Change to deal with pubnames being a vector; add 560260396Spfg pubnames table to call to output_pubnames; Add code to output pubtypes 561260396Spfg table if DEBUG_PUBTYPES_SECTION is defined. 562260396Spfg * config/darwin.c (darwin_file_start): Add DEBUG_PUBTYPES_SECTION to 563260396Spfg debugnames. 564260396Spfg * config/darwin.h (DEBUG_PUBTYPES_SECTION): Define new global variable. 565260396Spfg 566260456Spfg2006-11-03 Paul Brook <paul@codesourcery.com> (r118461) 567260456Spfg 568260456Spfg gcc/ 569260456Spfg * config/arm/arm.c (arm_file_start): New function. 570260456Spfg (TARGET_ASM_FILE_START): Define. 571260456Spfg (arm_default_cpu): New variable. 572260456Spfg (arm_override_options): Set arm_default_cpu. 573260456Spfg 574259269Spfg2006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 575259269Spfg 576259269Spfg * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 577259269Spfg inline static functions in c99 mode. 578259269Spfg 579259269Spfg PR 16622 580259269Spfg * doc/extend.texi (Inline): Update. 581259269Spfg * c-tree.h (struct language_function): Remove field 'extern_inline'. 582259269Spfg * c-decl.c (current_extern_inline): Delete. 583259269Spfg (pop_scope): Adjust test for an undefined nested function. 584259269Spfg Add warning about undeclared inline function. 585259269Spfg (diagnose_mismatched_decls): Update comments. Disallow overriding 586259269Spfg of inline functions in a translation unit in C99. Allow inline 587259269Spfg declarations in C99 at any time. 588259269Spfg (merge_decls): Boolize variables. Handle C99 'extern inline' 589259269Spfg semantics. 590259269Spfg (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 591259269Spfg C99 inline semantics. 592259269Spfg (start_function): Don't clear current_extern_inline. Don't set 593259269Spfg DECL_EXTERNAL. 594259269Spfg (c_push_function_context): Don't push current_extern_inline. 595259269Spfg (c_pop_function_context): Don't restore current_extern_inline. 596259269Spfg 597259269Spfg PR 11377 598259269Spfg * c-typeck.c (build_external_ref): Warn about static variables 599259269Spfg used in extern inline functions. 600259269Spfg * c-decl.c (start_decl): Warn about static variables declared 601259269Spfg in extern inline functions. 602259269Spfg 603221282Smm2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 604221282Smm 605221282Smm * config/i386/i386.h (TARGET_GEODE): 606221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for geode. 607221282Smm (TARGET_CPU_DEFAULT_geode): New macro. 608221282Smm (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 609221282Smm TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 610221282Smm TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 611221282Smm TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 612221282Smm TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 613221282Smm the macro values. 614221282Smm (TARGET_CPU_DEFAULT_NAMES): Add geode. 615221282Smm (processor_type): Add PROCESSOR_GEODE. 616221282Smm 617221282Smm * config/i386/i386.md: Include geode.md. 618221282Smm (cpu): Add geode. 619221282Smm 620221282Smm * config/i386/i386.c (geode_cost): New initialized global 621221282Smm variable. 622221282Smm (m_GEODE, m_K6_GEODE): New macros. 623221282Smm (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 624221282Smm x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 625221282Smm x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 626221282Smm x86_schedule): Use m_K6_GEODE instead of m_K6. 627221282Smm (x86_movx, x86_cmove): Set up m_GEODE. 628221282Smm (x86_integer_DFmode_moves): Clear m_GEODE. 629221282Smm (processor_target_table): Add entry for geode. 630221282Smm (processor_alias_table): Ditto. 631221282Smm 632221282Smm * config/i386/geode.md: New file. 633221282Smm 634221282Smm * doc/invoke.texi: Add entry about geode processor. 635221282Smm 636237678Spfg2006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 637229554Spfg 638229554Spfg PR middle-end/28796 639229554Spfg * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 640229554Spfg and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 641229554Spfg for deciding optimizations in consistency with fold-const.c 642229554Spfg (fold_builtin_unordered_cmp): Likewise. 643229554Spfg 644221282Smm2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 645221282Smm 646221282Smm * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 647221282Smm (x86_64-*-*): Likewise. 648221282Smm 649221282Smm * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 650221282Smm (override_options): Check SSSE3. 651221282Smm (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 652221282Smm IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 653221282Smm IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 654221282Smm IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 655221282Smm IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 656221282Smm IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 657221282Smm IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 658221282Smm IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 659221282Smm IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 660221282Smm IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 661221282Smm IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 662221282Smm IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 663221282Smm IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 664221282Smm IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 665221282Smm IX86_BUILTIN_PABSD128. 666221282Smm (bdesc_2arg): Add SSSE3. 667221282Smm (bdesc_1arg): Likewise. 668221282Smm (ix86_init_mmx_sse_builtins): Support SSSE3. 669221282Smm (ix86_expand_builtin): Likewise. 670221282Smm * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 671221282Smm 672221282Smm * config/i386/i386.md (UNSPEC_PSHUFB): New. 673221282Smm (UNSPEC_PSIGN): Likewise. 674221282Smm (UNSPEC_PALIGNR): Likewise. 675221282Smm Include mmx.md before sse.md. 676221282Smm 677221282Smm * config/i386/i386.opt: Add -mssse3. 678221282Smm 679221282Smm * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 680221282Smm (ssse3_phaddwv4hi3): Likewise. 681221282Smm (ssse3_phadddv4si3): Likewise. 682221282Smm (ssse3_phadddv2si3): Likewise. 683221282Smm (ssse3_phaddswv8hi3): Likewise. 684221282Smm (ssse3_phaddswv4hi3): Likewise. 685221282Smm (ssse3_phsubwv8hi3): Likewise. 686221282Smm (ssse3_phsubwv4hi3): Likewise. 687221282Smm (ssse3_phsubdv4si3): Likewise. 688221282Smm (ssse3_phsubdv2si3): Likewise. 689221282Smm (ssse3_phsubswv8hi3): Likewise. 690221282Smm (ssse3_phsubswv4hi3): Likewise. 691221282Smm (ssse3_pmaddubswv8hi3): Likewise. 692221282Smm (ssse3_pmaddubswv4hi3): Likewise. 693221282Smm (ssse3_pmulhrswv8hi3): Likewise. 694221282Smm (ssse3_pmulhrswv4hi3): Likewise. 695221282Smm (ssse3_pshufbv16qi3): Likewise. 696221282Smm (ssse3_pshufbv8qi3): Likewise. 697221282Smm (ssse3_psign<mode>3): Likewise. 698221282Smm (ssse3_psign<mode>3): Likewise. 699221282Smm (ssse3_palignrti): Likewise. 700221282Smm (ssse3_palignrdi): Likewise. 701221282Smm (abs<mode>2): Likewise. 702221282Smm (abs<mode>2): Likewise. 703221282Smm 704221282Smm * config/i386/tmmintrin.h: New file. 705221282Smm 706221282Smm * doc/extend.texi: Document SSSE3 built-in functions. 707221282Smm 708221282Smm * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 709234023Spfg 710252080Spfg2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 711250676Spfg 712250676Spfg * config/i386/tmmintrin.h: Remove the duplicated content. 713250676Spfg 714237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 715234023Spfg 716237678Spfg PR tree-optimization/3511 717237678Spfg * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 718237678Spfg got new invariant arguments during PHI translation. 719237678Spfg 720237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 721237678Spfg 722234023Spfg * builtins.c (fold_builtin_classify): Fix typo. 723234023Spfg 724