1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2003-2012 Broadcom Corporation 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD$"); 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/endian.h> 36 37#include <mips/nlm/hal/mips-extns.h> 38#include <mips/nlm/hal/haldefs.h> 39#include <mips/nlm/hal/iomap.h> 40#include <mips/nlm/hal/gbu.h> 41 42#include <mips/nlm/board.h> 43 44#define CPLD_REVISION 0x0 45#define CPLD_RESET 0x1 46#define CPLD_CTRL 0x2 47#define CPLD_RSVD 0x3 48#define CPLD_PWR_CTRL 0x4 49#define CPLD_MISC 0x5 50#define CPLD_CTRL_STATUS 0x6 51#define CPLD_PWR_INTR_STATUS 0x7 52#define CPLD_DATA 0x8 53 54static __inline 55int nlm_cpld_read(uint64_t base, int reg) 56{ 57 uint16_t val; 58 59 val = *(volatile uint16_t *)(long)(base + reg * 2); 60 return le16toh(val); 61} 62 63static __inline void 64nlm_cpld_write(uint64_t base, int reg, uint16_t data) 65{ 66 data = htole16(data); 67 *(volatile uint16_t *)(long)(base + reg * 2) = data; 68} 69 70int 71nlm_board_cpld_majorversion(uint64_t base) 72{ 73 return (nlm_cpld_read(base, CPLD_REVISION) >> 8); 74} 75 76int 77nlm_board_cpld_minorversion(uint64_t base) 78{ 79 return (nlm_cpld_read(base, CPLD_REVISION) & 0xff); 80} 81 82uint64_t nlm_board_cpld_base(int node, int chipselect) 83{ 84 uint64_t gbubase, cpld_phys; 85 86 gbubase = nlm_get_gbu_regbase(node); 87 cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect)); 88 return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8)); 89} 90 91void 92nlm_board_cpld_reset(uint64_t base) 93{ 94 95 nlm_cpld_write(base, CPLD_RESET, 1 << 15); 96 for(;;) 97 __asm __volatile("wait"); 98} 99 100/* get daughter board type */ 101int 102nlm_board_cpld_dboard_type(uint64_t base, int slot) 103{ 104 uint16_t val; 105 int shift = 0; 106 107 switch (slot) { 108 case 0: shift = 0; break; 109 case 1: shift = 4; break; 110 case 2: shift = 2; break; 111 case 3: shift = 6; break; 112 } 113 val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift; 114 return (val & 0x3); 115} 116