1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2010-2016 Solarflare Communications Inc.
5 * All rights reserved.
6 *
7 * This software was developed in part by Philip Paeps under contract for
8 * Solarflare Communications, Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright notice,
14 *    this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 *    this list of conditions and the following disclaimer in the documentation
17 *    and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * The views and conclusions contained in the software and documentation are
32 * those of the authors and should not be interpreted as representing official
33 * policies, either expressed or implied, of the FreeBSD Project.
34 *
35 * $FreeBSD$
36 */
37
38#ifndef _SFXGE_H
39#define	_SFXGE_H
40
41#include <sys/param.h>
42#include <sys/kernel.h>
43#include <sys/socket.h>
44#include <sys/sysctl.h>
45#include <sys/sx.h>
46#include <vm/uma.h>
47
48#include <net/ethernet.h>
49#include <net/if.h>
50#include <net/if_var.h>
51#include <net/if_media.h>
52#include <net/if_types.h>
53
54#include "sfxge_ioc.h"
55
56/*
57 * Debugging
58 */
59#if 0
60#define	DBGPRINT(dev, fmt, args...) \
61	device_printf(dev, "%s: " fmt "\n", __func__, ## args)
62#else
63#define	DBGPRINT(dev, fmt, args...)
64#endif
65
66/*
67 * Backward-compatibility
68 */
69#ifndef CACHE_LINE_SIZE
70/* This should be right on most machines the driver will be used on, and
71 * we needn't care too much about wasting a few KB per interface.
72 */
73#define	CACHE_LINE_SIZE 128
74#endif
75
76#ifndef IFCAP_LINKSTATE
77#define	IFCAP_LINKSTATE 0
78#endif
79
80#ifndef IFCAP_VLAN_HWTSO
81#define	IFCAP_VLAN_HWTSO 0
82#endif
83
84#ifndef IFM_10G_T
85#define	IFM_10G_T IFM_UNKNOWN
86#endif
87
88#ifndef IFM_10G_KX4
89#define	IFM_10G_KX4 IFM_10G_CX4
90#endif
91
92#ifndef IFM_40G_CR4
93#define	IFM_40G_CR4 IFM_UNKNOWN
94#endif
95
96#ifdef IFM_ETH_RXPAUSE
97#define	SFXGE_HAVE_PAUSE_MEDIAOPTS
98#endif
99
100#ifndef CTLTYPE_U64
101#define	CTLTYPE_U64 CTLTYPE_QUAD
102#endif
103
104#include "sfxge_rx.h"
105#include "sfxge_tx.h"
106
107#define	ROUNDUP_POW_OF_TWO(_n)	(1ULL << flsl((_n) - 1))
108
109#define	SFXGE_IP_ALIGN	2
110
111#define	SFXGE_ETHERTYPE_LOOPBACK	0x9000	/* Xerox loopback */
112
113#define	SFXGE_MAGIC_RESERVED		0x8000
114
115#define	SFXGE_MAGIC_DMAQ_LABEL_WIDTH	6
116#define	SFXGE_MAGIC_DMAQ_LABEL_MASK \
117	((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1)
118
119enum sfxge_sw_ev {
120	SFXGE_SW_EV_RX_QFLUSH_DONE = 1,
121	SFXGE_SW_EV_RX_QFLUSH_FAILED,
122	SFXGE_SW_EV_RX_QREFILL,
123	SFXGE_SW_EV_TX_QFLUSH_DONE,
124};
125
126#define	SFXGE_SW_EV_MAGIC(_sw_ev) \
127	(SFXGE_MAGIC_RESERVED | ((_sw_ev) << SFXGE_MAGIC_DMAQ_LABEL_WIDTH))
128
129static inline uint16_t
130sfxge_sw_ev_mk_magic(enum sfxge_sw_ev sw_ev, unsigned int label)
131{
132	KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label,
133	    ("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != label"));
134	return SFXGE_SW_EV_MAGIC(sw_ev) | label;
135}
136
137static inline uint16_t
138sfxge_sw_ev_rxq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_rxq *rxq)
139{
140	return sfxge_sw_ev_mk_magic(sw_ev, 0);
141}
142
143static inline uint16_t
144sfxge_sw_ev_txq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_txq *txq)
145{
146	return sfxge_sw_ev_mk_magic(sw_ev, txq->type);
147}
148
149enum sfxge_evq_state {
150	SFXGE_EVQ_UNINITIALIZED = 0,
151	SFXGE_EVQ_INITIALIZED,
152	SFXGE_EVQ_STARTING,
153	SFXGE_EVQ_STARTED
154};
155
156#define	SFXGE_EV_BATCH	16384
157
158#define	SFXGE_STATS_UPDATE_PERIOD_MS	1000
159
160struct sfxge_evq {
161	/* Structure members below are sorted by usage order */
162	struct sfxge_softc	*sc;
163	struct mtx		lock;
164	unsigned int		index;
165	enum sfxge_evq_state	init_state;
166	efsys_mem_t		mem;
167	efx_evq_t		*common;
168	unsigned int		read_ptr;
169	boolean_t		exception;
170	unsigned int		rx_done;
171	unsigned int		tx_done;
172
173	/* Linked list of TX queues with completions to process */
174	struct sfxge_txq	*txq;
175	struct sfxge_txq	**txqs;
176
177	/* Structure members not used on event processing path */
178	unsigned int		buf_base_id;
179	unsigned int		entries;
180	char			lock_name[SFXGE_LOCK_NAME_MAX];
181#if EFSYS_OPT_QSTATS
182	clock_t			stats_update_time;
183	uint64_t		stats[EV_NQSTATS];
184#endif
185} __aligned(CACHE_LINE_SIZE);
186
187#define	SFXGE_NDESCS	1024
188#define	SFXGE_MODERATION	30
189
190enum sfxge_intr_state {
191	SFXGE_INTR_UNINITIALIZED = 0,
192	SFXGE_INTR_INITIALIZED,
193	SFXGE_INTR_TESTING,
194	SFXGE_INTR_STARTED
195};
196
197struct sfxge_intr_hdl {
198	int			eih_rid;
199	void			*eih_tag;
200	struct resource		*eih_res;
201};
202
203struct sfxge_intr {
204	enum sfxge_intr_state	state;
205	struct resource		*msix_res;
206	struct sfxge_intr_hdl	*table;
207	int			n_alloc;
208	int			type;
209	efsys_mem_t		status;
210	uint32_t		zero_count;
211};
212
213enum sfxge_mcdi_state {
214	SFXGE_MCDI_UNINITIALIZED = 0,
215	SFXGE_MCDI_INITIALIZED,
216	SFXGE_MCDI_BUSY,
217	SFXGE_MCDI_COMPLETED
218};
219
220struct sfxge_mcdi {
221	struct mtx		lock;
222	efsys_mem_t		mem;
223	enum sfxge_mcdi_state	state;
224	efx_mcdi_transport_t	transport;
225
226	/* Only used in debugging output */
227	char			lock_name[SFXGE_LOCK_NAME_MAX];
228};
229
230struct sfxge_hw_stats {
231	clock_t			update_time;
232	efsys_mem_t		dma_buf;
233	void			*decode_buf;
234};
235
236enum sfxge_port_state {
237	SFXGE_PORT_UNINITIALIZED = 0,
238	SFXGE_PORT_INITIALIZED,
239	SFXGE_PORT_STARTED
240};
241
242struct sfxge_port {
243	struct sfxge_softc	*sc;
244	struct mtx		lock;
245	enum sfxge_port_state	init_state;
246#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
247	unsigned int		wanted_fc;
248#endif
249	struct sfxge_hw_stats	phy_stats;
250	struct sfxge_hw_stats	mac_stats;
251	uint16_t		stats_update_period_ms;
252	efx_link_mode_t		link_mode;
253	uint8_t			mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX *
254					    EFX_MAC_ADDR_LEN];
255	unsigned int		mcast_count;
256
257	/* Only used in debugging output */
258	char			lock_name[SFXGE_LOCK_NAME_MAX];
259};
260
261enum sfxge_softc_state {
262	SFXGE_UNINITIALIZED = 0,
263	SFXGE_INITIALIZED,
264	SFXGE_REGISTERED,
265	SFXGE_STARTED
266};
267
268struct sfxge_softc {
269	device_t			dev;
270	struct sx			softc_lock;
271	char				softc_lock_name[SFXGE_LOCK_NAME_MAX];
272	enum sfxge_softc_state		init_state;
273	struct ifnet			*ifnet;
274	unsigned int			if_flags;
275	struct sysctl_oid		*stats_node;
276#if EFSYS_OPT_QSTATS
277	struct sysctl_oid		*evqs_stats_node;
278#endif
279	struct sysctl_oid		*txqs_node;
280
281	struct task			task_reset;
282
283	efx_family_t			family;
284	unsigned int			mem_bar;
285
286	caddr_t				vpd_data;
287	size_t				vpd_size;
288	efx_nic_t			*enp;
289	efsys_lock_t			enp_lock;
290
291	boolean_t			txq_dynamic_cksum_toggle_supported;
292
293	unsigned int			rxq_entries;
294	unsigned int			txq_entries;
295
296	bus_dma_tag_t			parent_dma_tag;
297	efsys_bar_t			bar;
298
299	struct sfxge_intr		intr;
300	struct sfxge_mcdi		mcdi;
301	struct sfxge_port		port;
302	uint32_t			buffer_table_next;
303
304	struct sfxge_evq		*evq[SFXGE_RX_SCALE_MAX];
305	unsigned int			ev_moderation;
306#if EFSYS_OPT_QSTATS
307	clock_t				ev_stats_update_time;
308	uint64_t			ev_stats[EV_NQSTATS];
309#endif
310
311	unsigned int			max_rss_channels;
312	struct sfxge_rxq		*rxq[SFXGE_RX_SCALE_MAX];
313	unsigned int			rx_indir_table[EFX_RSS_TBL_SIZE];
314
315	struct sfxge_txq		*txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX];
316
317	struct ifmedia			media;
318
319	size_t				rx_prefix_size;
320	size_t				rx_buffer_size;
321	size_t				rx_buffer_align;
322	int				rx_cluster_size;
323
324	unsigned int			evq_max;
325	unsigned int			evq_count;
326	unsigned int			rxq_count;
327	unsigned int			txq_count;
328
329	unsigned int			tso_fw_assisted;
330#define	SFXGE_FATSOV1	(1 << 0)
331#define	SFXGE_FATSOV2	(1 << 1)
332
333#if EFSYS_OPT_MCDI_LOGGING
334	int				mcdi_logging;
335#endif
336};
337
338#define	SFXGE_LINK_UP(sc) \
339	((sc)->port.link_mode != EFX_LINK_DOWN && \
340	 (sc)->port.link_mode != EFX_LINK_UNKNOWN)
341#define	SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING)
342
343#define	SFXGE_PARAM(_name)	"hw.sfxge." #_name
344
345SYSCTL_DECL(_hw_sfxge);
346
347/*
348 * From sfxge.c.
349 */
350extern void sfxge_schedule_reset(struct sfxge_softc *sc);
351extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n,
352				     uint32_t *idp);
353
354/*
355 * From sfxge_dma.c.
356 */
357extern int sfxge_dma_init(struct sfxge_softc *sc);
358extern void sfxge_dma_fini(struct sfxge_softc *sc);
359extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len,
360			   efsys_mem_t *esmp);
361extern void sfxge_dma_free(efsys_mem_t *esmp);
362extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map,
363				     struct mbuf **mp,
364				     bus_dma_segment_t *segs,
365				     int *nsegs, int maxsegs);
366
367/*
368 * From sfxge_ev.c.
369 */
370extern int sfxge_ev_init(struct sfxge_softc *sc);
371extern void sfxge_ev_fini(struct sfxge_softc *sc);
372extern int sfxge_ev_start(struct sfxge_softc *sc);
373extern void sfxge_ev_stop(struct sfxge_softc *sc);
374extern int sfxge_ev_qpoll(struct sfxge_evq *evq);
375
376/*
377 * From sfxge_intr.c.
378 */
379extern int sfxge_intr_init(struct sfxge_softc *sc);
380extern void sfxge_intr_fini(struct sfxge_softc *sc);
381extern int sfxge_intr_start(struct sfxge_softc *sc);
382extern void sfxge_intr_stop(struct sfxge_softc *sc);
383
384/*
385 * From sfxge_mcdi.c.
386 */
387extern int sfxge_mcdi_init(struct sfxge_softc *sc);
388extern void sfxge_mcdi_fini(struct sfxge_softc *sc);
389extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
390
391/*
392 * From sfxge_nvram.c.
393 */
394extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
395
396/*
397 * From sfxge_port.c.
398 */
399extern int sfxge_port_init(struct sfxge_softc *sc);
400extern void sfxge_port_fini(struct sfxge_softc *sc);
401extern int sfxge_port_start(struct sfxge_softc *sc);
402extern void sfxge_port_stop(struct sfxge_softc *sc);
403extern void sfxge_mac_link_update(struct sfxge_softc *sc,
404				  efx_link_mode_t mode);
405extern int sfxge_mac_filter_set(struct sfxge_softc *sc);
406extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc);
407extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c);
408
409#define	SFXGE_MAX_MTU (9 * 1024)
410
411#define	SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname)				\
412	do {								\
413		struct sfxge_softc *__sc = (_sc);			\
414									\
415		snprintf((__sc)->softc_lock_name,			\
416			 sizeof((__sc)->softc_lock_name),		\
417			 "%s:softc", (_ifname));			\
418		sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name);	\
419	} while (B_FALSE)
420#define	SFXGE_ADAPTER_LOCK_DESTROY(_sc)					\
421	sx_destroy(&(_sc)->softc_lock)
422#define	SFXGE_ADAPTER_LOCK(_sc)						\
423	sx_xlock(&(_sc)->softc_lock)
424#define	SFXGE_ADAPTER_UNLOCK(_sc)					\
425	sx_xunlock(&(_sc)->softc_lock)
426#define	SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc)				\
427	sx_assert(&(_sc)->softc_lock, LA_XLOCKED)
428
429#define	SFXGE_PORT_LOCK_INIT(_port, _ifname)				\
430	do {								\
431		struct sfxge_port *__port = (_port);			\
432									\
433		snprintf((__port)->lock_name,				\
434			 sizeof((__port)->lock_name),			\
435			 "%s:port", (_ifname));				\
436		mtx_init(&(__port)->lock, (__port)->lock_name,		\
437			 NULL, MTX_DEF);				\
438	} while (B_FALSE)
439#define	SFXGE_PORT_LOCK_DESTROY(_port)					\
440	mtx_destroy(&(_port)->lock)
441#define	SFXGE_PORT_LOCK(_port)						\
442	mtx_lock(&(_port)->lock)
443#define	SFXGE_PORT_UNLOCK(_port)					\
444	mtx_unlock(&(_port)->lock)
445#define	SFXGE_PORT_LOCK_ASSERT_OWNED(_port)				\
446	mtx_assert(&(_port)->lock, MA_OWNED)
447
448#define	SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname)				\
449	do {								\
450		struct sfxge_mcdi  *__mcdi = (_mcdi);			\
451									\
452		snprintf((__mcdi)->lock_name,				\
453			 sizeof((__mcdi)->lock_name),			\
454			 "%s:mcdi", (_ifname));				\
455		mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name,		\
456			 NULL, MTX_DEF);				\
457	} while (B_FALSE)
458#define	SFXGE_MCDI_LOCK_DESTROY(_mcdi)					\
459	mtx_destroy(&(_mcdi)->lock)
460#define	SFXGE_MCDI_LOCK(_mcdi)						\
461	mtx_lock(&(_mcdi)->lock)
462#define	SFXGE_MCDI_UNLOCK(_mcdi)					\
463	mtx_unlock(&(_mcdi)->lock)
464#define	SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi)				\
465	mtx_assert(&(_mcdi)->lock, MA_OWNED)
466
467#define	SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index)			\
468	do {								\
469		struct sfxge_evq  *__evq = (_evq);			\
470									\
471		snprintf((__evq)->lock_name,				\
472			 sizeof((__evq)->lock_name),			\
473			 "%s:evq%u", (_ifname), (_evq_index));		\
474		mtx_init(&(__evq)->lock, (__evq)->lock_name,		\
475			 NULL, MTX_DEF);				\
476	} while (B_FALSE)
477#define	SFXGE_EVQ_LOCK_DESTROY(_evq)					\
478	mtx_destroy(&(_evq)->lock)
479#define	SFXGE_EVQ_LOCK(_evq)						\
480	mtx_lock(&(_evq)->lock)
481#define	SFXGE_EVQ_UNLOCK(_evq)						\
482	mtx_unlock(&(_evq)->lock)
483#define	SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq)				\
484	mtx_assert(&(_evq)->lock, MA_OWNED)
485
486#endif /* _SFXGE_H */
487