1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32/* 33 * File: qla_def.h 34 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 35 */ 36 37#ifndef _QLA_DEF_H_ 38#define _QLA_DEF_H_ 39 40#define BIT_0 (0x1 << 0) 41#define BIT_1 (0x1 << 1) 42#define BIT_2 (0x1 << 2) 43#define BIT_3 (0x1 << 3) 44#define BIT_4 (0x1 << 4) 45#define BIT_5 (0x1 << 5) 46#define BIT_6 (0x1 << 6) 47#define BIT_7 (0x1 << 7) 48#define BIT_8 (0x1 << 8) 49#define BIT_9 (0x1 << 9) 50#define BIT_10 (0x1 << 10) 51#define BIT_11 (0x1 << 11) 52#define BIT_12 (0x1 << 12) 53#define BIT_13 (0x1 << 13) 54#define BIT_14 (0x1 << 14) 55#define BIT_15 (0x1 << 15) 56#define BIT_16 (0x1 << 16) 57#define BIT_17 (0x1 << 17) 58#define BIT_18 (0x1 << 18) 59#define BIT_19 (0x1 << 19) 60#define BIT_20 (0x1 << 20) 61#define BIT_21 (0x1 << 21) 62#define BIT_22 (0x1 << 22) 63#define BIT_23 (0x1 << 23) 64#define BIT_24 (0x1 << 24) 65#define BIT_25 (0x1 << 25) 66#define BIT_26 (0x1 << 26) 67#define BIT_27 (0x1 << 27) 68#define BIT_28 (0x1 << 28) 69#define BIT_29 (0x1 << 29) 70#define BIT_30 (0x1 << 30) 71#define BIT_31 (0x1 << 31) 72 73struct qla_rx_buf { 74 struct mbuf *m_head; 75 bus_dmamap_t map; 76 bus_addr_t paddr; 77 uint32_t handle; 78 void *next; 79}; 80typedef struct qla_rx_buf qla_rx_buf_t; 81 82struct qla_tx_buf { 83 struct mbuf *m_head; 84 bus_dmamap_t map; 85}; 86typedef struct qla_tx_buf qla_tx_buf_t; 87 88#define QLA_MAX_SEGMENTS 63 /* maximum # of segs in a sg list */ 89#define QLA_MAX_FRAME_SIZE MJUM9BYTES 90#define QLA_STD_FRAME_SIZE 1514 91#define QLA_MAX_TSO_FRAME_SIZE ((64 * 1024 - 1) + 22) 92 93/* Number of MSIX/MSI Vectors required */ 94#define Q8_MSI_COUNT 4 95 96struct qla_ivec { 97 struct resource *irq; 98 void *handle; 99 int irq_rid; 100 void *ha; 101 struct task rcv_task; 102 struct taskqueue *rcv_tq; 103}; 104 105typedef struct qla_ivec qla_ivec_t; 106 107#define QLA_WATCHDOG_CALLOUT_TICKS 1 108 109/* 110 * Adapter structure contains the hardware independent information of the 111 * pci function. 112 */ 113struct qla_host { 114 volatile struct { 115 volatile uint32_t 116 qla_watchdog_active :1, 117 qla_watchdog_exit :1, 118 qla_watchdog_pause :1, 119 lro_init :1, 120 stop_rcv :1, 121 link_up :1, 122 parent_tag :1, 123 lock_init :1; 124 } flags; 125 126 device_t pci_dev; 127 128 uint8_t pci_func; 129 uint16_t watchdog_ticks; 130 uint8_t resvd; 131 132 /* ioctl related */ 133 struct cdev *ioctl_dev; 134 135 /* register mapping */ 136 struct resource *pci_reg; 137 int reg_rid; 138 139 /* interrupts */ 140 struct resource *irq; 141 int msix_count; 142 void *intr_handle; 143 qla_ivec_t irq_vec[Q8_MSI_COUNT]; 144 145 /* parent dma tag */ 146 bus_dma_tag_t parent_tag; 147 148 /* interface to o.s */ 149 struct ifnet *ifp; 150 151 struct ifmedia media; 152 uint16_t max_frame_size; 153 uint16_t rsrvd0; 154 int if_flags; 155 156 /* hardware access lock */ 157 struct mtx hw_lock; 158 volatile uint32_t hw_lock_held; 159 160 /* transmit and receive buffers */ 161 qla_tx_buf_t tx_buf[NUM_TX_DESCRIPTORS]; 162 bus_dma_tag_t tx_tag; 163 struct mtx tx_lock; 164 struct task tx_task; 165 struct taskqueue *tx_tq; 166 struct callout tx_callout; 167 168 qla_rx_buf_t rx_buf[NUM_RX_DESCRIPTORS]; 169 qla_rx_buf_t rx_jbuf[NUM_RX_JUMBO_DESCRIPTORS]; 170 bus_dma_tag_t rx_tag; 171 172 struct mtx rx_lock; 173 struct mtx rxj_lock; 174 175 /* stats */ 176 uint32_t err_m_getcl; 177 uint32_t err_m_getjcl; 178 uint32_t err_tx_dmamap_create; 179 uint32_t err_tx_dmamap_load; 180 uint32_t err_tx_defrag; 181 182 uint64_t rx_frames; 183 uint64_t rx_bytes; 184 185 uint64_t tx_frames; 186 uint64_t tx_bytes; 187 188 uint32_t fw_ver_major; 189 uint32_t fw_ver_minor; 190 uint32_t fw_ver_sub; 191 uint32_t fw_ver_build; 192 193 /* hardware specific */ 194 qla_hw_t hw; 195 196 /* debug stuff */ 197 volatile const char *qla_lock; 198 volatile const char *qla_unlock; 199 200 uint8_t fw_ver_str[32]; 201}; 202typedef struct qla_host qla_host_t; 203 204/* note that align has to be a power of 2 */ 205#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1))) 206#define QL_MIN(x, y) ((x < y) ? x : y) 207 208#define QL_RUNNING(ifp) \ 209 ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == \ 210 IFF_DRV_RUNNING) 211 212#endif /* #ifndef _QLA_DEF_H_ */ 213