1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 2001,2002,2003 S��ren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33/* misc defines */ 34MALLOC_DECLARE(M_PSTIOP); 35#define I2O_IOP_OUTBOUND_FRAME_COUNT 32 36#define I2O_IOP_OUTBOUND_FRAME_SIZE 0x20 37 38/* structure defs */ 39struct out_mfa_buf { 40 u_int32_t buf[I2O_IOP_OUTBOUND_FRAME_SIZE]; 41}; 42 43struct iop_softc { 44 struct resource *r_mem; 45 struct resource *r_irq; 46 caddr_t ibase; 47 caddr_t obase; 48 u_int32_t phys_obase; 49 struct i2o_registers *reg; 50 struct i2o_status_get_reply *status; 51 int lct_count; 52 struct i2o_lct_entry *lct; 53 int ism; 54 device_t dev; 55 struct mtx mtx; 56 int outstanding; 57 void *handle; 58 struct intr_config_hook *iop_delayed_attach; 59}; 60 61/* structure at start of IOP shared mem */ 62struct i2o_registers { 63 volatile u_int32_t apic_select; 64 volatile u_int32_t reserved0; 65 volatile u_int32_t apic_winreg; 66 volatile u_int32_t reserved1; 67 volatile u_int32_t iqueue_reg0; 68 volatile u_int32_t iqueue_reg1; 69 volatile u_int32_t oqueue_reg0; 70 volatile u_int32_t oqueue_reg1; 71 volatile u_int32_t iqueue_event; 72 volatile u_int32_t iqueue_intr_status; 73 volatile u_int32_t iqueue_intr_mask; 74 volatile u_int32_t oqueue_event; 75 volatile u_int32_t oqueue_intr_status; 76 volatile u_int32_t oqueue_intr_mask; 77#define I2O_OUT_INTR_QUEUE 0x08 78#define I2O_OUT_INTR_BELL 0x04 79#define I2O_OUT_INTR_MSG1 0x02 80#define I2O_OUT_INTR_MSG0 0x01 81 82 volatile u_int64_t reserved2; 83 volatile u_int32_t iqueue; 84 volatile u_int32_t oqueue; 85 volatile u_int64_t reserved3; 86 volatile u_int64_t mac_addr; 87 volatile u_int32_t ip_addr; 88 volatile u_int32_t ip_mask; 89}; 90 91/* Scatter/Gather List management */ 92struct i2o_sgl { 93 u_int32_t count:24; 94#define I2O_SGL_CNT_MASK 0xffffff 95 96 u_int32_t flags:8; 97#define I2O_SGL_SIMPLE 0x10 98#define I2O_SGL_PAGELIST 0x20 99#define I2O_SGL_CHAIN 0x30 100#define I2O_SGL_ATTRIBUTE 0x7c 101#define I2O_SGL_BC0 0x01 102#define I2O_SGL_BC1 0x02 103#define I2O_SGL_DIR 0x04 104#define I2O_SGL_LA 0x08 105#define I2O_SGL_EOB 0x40 106#define I2O_SGL_END 0x80 107 108 u_int32_t phys_addr[1]; 109} __packed; 110 111#define I2O_SGL_MAX_SEGS ((I2O_IOP_OUTBOUND_FRAME_SIZE - (8 + 2)) + 1) 112 113/* i2o command codes */ 114#define I2O_UTIL_NOP 0x00 115#define I2O_UTIL_PARAMS_GET 0x06 116#define I2O_UTIL_CLAIM 0x09 117#define I2O_UTIL_CONFIG_DIALOG 0x10 118#define I2O_UTIL_EVENT_REGISTER 0x13 119#define I2O_BSA_BLOCK_READ 0x30 120#define I2O_BSA_BLOCK_WRITE 0x31 121#define I2O_BSA_CACHE_FLUSH 0x37 122#define I2O_EXEC_STATUS_GET 0xa0 123#define I2O_EXEC_OUTBOUND_INIT 0xa1 124#define I2O_EXEC_LCT_NOTIFY 0xa2 125#define I2O_EXEC_SYSTAB_SET 0xa3 126#define I2O_EXEC_IOP_RESET 0xbd 127#define I2O_EXEC_SYS_ENABLE 0xd1 128#define I2O_PRIVATE_MESSAGE 0xff 129 130/* basic message layout */ 131struct i2o_basic_message { 132 u_int8_t version:4; 133 u_int8_t offset:4; 134 u_int8_t message_flags; 135 u_int16_t message_size; 136 u_int32_t target_address:12; 137 u_int32_t initiator_address:12; 138 u_int32_t function:8; 139 u_int32_t initiator_context; 140 u_int32_t transaction_context; 141} __packed; 142 143/* basic reply layout */ 144struct i2o_single_reply { 145 u_int8_t version_offset; 146 u_int8_t message_flags; 147#define I2O_MESSAGE_FLAGS_STATIC 0x01 148#define I2O_MESSAGE_FLAGS_64BIT 0x02 149#define I2O_MESSAGE_FLAGS_MULTIPLE 0x10 150#define I2O_MESSAGE_FLAGS_FAIL 0x20 151#define I2O_MESSAGE_FLAGS_LAST 0x40 152#define I2O_MESSAGE_FLAGS_REPLY 0x80 153 154 u_int16_t message_size; 155 u_int32_t target_address:12; 156 u_int32_t initiator_address:12; 157 u_int32_t function:8; 158 u_int32_t initiator_context; 159 u_int32_t transaction_context; 160 u_int16_t detailed_status; 161#define I2O_DETAIL_STATUS_SUCCESS 0x0000 162#define I2O_DETAIL_STATUS_BAD_KEY 0x0002 163#define I2O_DETAIL_STATUS_TCL_ERROR 0x0003 164#define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0004 165#define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0005 166#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0006 167#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0007 168#define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0009 169#define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x000a 170#define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x000b 171#define I2O_DETAIL_STATUS_DEVICE_RESET 0x000c 172#define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x000d 173#define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000e 174#define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000f 175#define I2O_DETAIL_STATUS_INVALID_OFFSET 0x0010 176#define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x0011 177#define I2O_DETAIL_STATUS_INVALID_REQUEST 0x0012 178#define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x0013 179#define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0014 180#define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0015 181#define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0016 182#define I2O_DETAIL_STATUS_TIMEOUT 0x0017 183#define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0018 184#define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0019 185#define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001a 186#define I2O_DETAIL_STATUS_DEVICE_BUSY 0x001b 187#define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x001c 188 189 u_int8_t retry_count; 190 u_int8_t status; 191#define I2O_REPLY_STATUS_SUCCESS 0x00 192#define I2O_REPLY_STATUS_ABORT_DIRTY 0x01 193#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02 194#define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03 195#define I2O_REPLY_STATUS_ERROR_DIRTY 0x04 196#define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05 197#define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06 198#define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08 199#define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09 200#define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0a 201#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0b 202#define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80 203 204 u_int32_t donecount; 205} __packed; 206 207struct i2o_fault_reply { 208 u_int8_t version_offset; 209 u_int8_t message_flags; 210 u_int16_t message_size; 211 u_int32_t target_address:12; 212 u_int32_t initiator_address:12; 213 u_int32_t function:8; 214 u_int32_t initiator_context; 215 u_int32_t transaction_context; 216 u_int8_t lowest_version; 217 u_int8_t highest_version; 218 u_int8_t severity; 219#define I2O_SEVERITY_FORMAT_ERROR 0x01 220#define I2O_SEVERITY_PATH_ERROR 0x02 221#define I2O_SEVERITY_PATH_STATE 0x04 222#define I2O_SEVERITY_CONGESTION 0x08 223 224 u_int8_t failure_code; 225#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_SUSPENDED 0x81 226#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_TERMINATED 0x82 227#define I2O_FAILURE_CODE_TRANSPORT_CONGESTION 0x83 228#define I2O_FAILURE_CODE_TRANSPORT_FAIL 0x84 229#define I2O_FAILURE_CODE_TRANSPORT_STATE_ERROR 0x85 230#define I2O_FAILURE_CODE_TRANSPORT_TIME_OUT 0x86 231#define I2O_FAILURE_CODE_TRANSPORT_ROUTING_FAILURE 0x87 232#define I2O_FAILURE_CODE_TRANSPORT_INVALID_VERSION 0x88 233#define I2O_FAILURE_CODE_TRANSPORT_INVALID_OFFSET 0x89 234#define I2O_FAILURE_CODE_TRANSPORT_INVALID_MSG_FLAGS 0x8A 235#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_SMALL 0x8B 236#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_LARGE 0x8C 237#define I2O_FAILURE_CODE_TRANSPORT_INVALID_TARGET_ID 0x8D 238#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_ID 0x8E 239#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F 240#define I2O_FAILURE_CODE_TRANSPORT_UNKNOWN_FAILURE 0xFF 241 242 u_int32_t failing_iop_id:12; 243 u_int32_t reserved:4; 244 u_int32_t failing_host_unit_id:16; 245 u_int32_t age_limit; 246 u_int64_t preserved_mfa; 247} __packed; 248 249struct i2o_exec_iop_reset_message { 250 u_int8_t version_offset; 251 u_int8_t message_flags; 252 u_int16_t message_size; 253 u_int32_t target_address:12; 254 u_int32_t initiator_address:12; 255 u_int32_t function:8; 256 u_int8_t reserved[16]; 257 u_int32_t status_word_low_addr; 258 u_int32_t status_word_high_addr; 259} __packed; 260 261struct i2o_exec_status_get_message { 262 u_int8_t version_offset; 263 u_int8_t message_flags; 264 u_int16_t message_size; 265 u_int32_t target_address:12; 266 u_int32_t initiator_address:12; 267 u_int32_t function:8; 268 u_int8_t reserved[16]; 269 u_int32_t reply_buf_low_addr; 270 u_int32_t reply_buf_high_addr; 271 u_int32_t reply_buf_length; 272} __packed; 273 274struct i2o_status_get_reply { 275 u_int16_t organization_id; 276 u_int16_t reserved; 277 u_int32_t iop_id:12; 278 u_int32_t reserved1:4; 279 u_int32_t host_unit_id:16; 280 u_int32_t segment_number:12; 281 u_int32_t i2o_version:4; 282 u_int32_t iop_state:8; 283#define I2O_IOP_STATE_INITIALIZING 0x01 284#define I2O_IOP_STATE_RESET 0x02 285#define I2O_IOP_STATE_HOLD 0x04 286#define I2O_IOP_STATE_READY 0x05 287#define I2O_IOP_STATE_OPERATIONAL 0x08 288#define I2O_IOP_STATE_FAILED 0x10 289#define I2O_IOP_STATE_FAULTED 0x11 290 291 u_int32_t messenger_type:8; 292 u_int16_t inbound_mframe_size; 293 u_int8_t init_code; 294 u_int8_t reserved2; 295 u_int32_t max_inbound_mframes; 296 u_int32_t current_ibound_mframes; 297 u_int32_t max_outbound_mframes; 298 u_int8_t product_idstring[24]; 299 u_int32_t expected_lct_size; 300 u_int32_t iop_capabilities; 301 u_int32_t desired_private_memsize; 302 u_int32_t current_private_memsize; 303 u_int32_t current_private_membase; 304 u_int32_t desired_private_iosize; 305 u_int32_t current_private_iosize; 306 u_int32_t current_private_iobase; 307 u_int8_t reserved3[3]; 308 u_int8_t sync_byte; 309} __packed; 310 311struct i2o_exec_init_outqueue_message { 312 u_int8_t version_offset; 313 u_int8_t message_flags; 314 u_int16_t message_size; 315 u_int32_t target_address:12; 316 u_int32_t initiator_address:12; 317 u_int32_t function:8; 318 u_int32_t initiator_context; 319 u_int32_t transaction_context; 320 u_int32_t host_pagesize; 321 u_int8_t init_code; 322 u_int8_t reserved; 323 u_int16_t queue_framesize; 324 struct i2o_sgl sgl[2]; 325} __packed; 326 327#define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01 328#define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02 329#define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03 330#define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04 331 332struct i2o_exec_systab_set_message { 333 u_int8_t version_offset; 334 u_int8_t message_flags; 335 u_int16_t message_size; 336 u_int32_t target_address:12; 337 u_int32_t initiator_address:12; 338 u_int32_t function:8; 339 u_int32_t initiator_context; 340 u_int32_t transaction_context; 341 u_int32_t iop_id:12; 342#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_IOP 0x000 343#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_HOST 0x001 344#define I2O_EXEC_SYS_TAB_IOP_ID_UNKNOWN_IOP 0xfff 345 346 u_int32_t reserved1:4; 347 u_int32_t host_unit_id:16; 348#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_LOCAL_UNIT 0x0000 349#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_UNKNOWN_UNIT 0xffff 350 351 u_int32_t segment_number:12; 352#define I2O_EXEC_SYS_TAB_SEG_NUMBER_LOCAL_SEGMENT 0x000 353#define I2O_EXEC_SYS_TAB_SEG_NUMBER_UNKNOWN_SEGMENT 0xfff 354 355 u_int32_t reserved2:4; 356 u_int32_t reserved3:8; 357 struct i2o_sgl sgl[3]; 358} __packed; 359 360struct i2o_exec_systab { 361 u_int8_t entries; 362 u_int8_t version; 363#define I2O_RESOURCE_MANAGER_VERSION 0 364 365 u_int16_t reserved1; 366 u_int32_t change_id; 367 u_int64_t reserved2; 368 u_int16_t organization_id; 369 u_int16_t reserved3; 370 u_int32_t iop_id:12; 371 u_int32_t reserved4:20; 372 u_int32_t segment_number:12; 373 u_int32_t i2o_version:4; 374 u_int32_t iop_state:8; 375 u_int32_t messenger_type:8; 376 u_int16_t inbound_mframe_size; 377 u_int16_t reserved5; 378 u_int32_t last_changed; 379 u_int32_t iop_capabilities; 380 u_int64_t messenger_info; 381} __packed; 382 383struct i2o_exec_get_lct_message { 384 u_int8_t version_offset; 385 u_int8_t message_flags; 386 u_int16_t message_size; 387 u_int32_t target_address:12; 388 u_int32_t initiator_address:12; 389 u_int32_t function:8; 390 u_int32_t initiator_context; 391 u_int32_t transaction_context; 392 u_int32_t class; 393 u_int32_t last_change_id; 394 struct i2o_sgl sgl; 395} __packed; 396 397#define I2O_TID_IOP 0x000 398#define I2O_TID_HOST 0x001 399#define I2O_TID_NONE 0xfff 400 401struct i2o_lct_entry { 402 u_int32_t entry_size:16; 403 u_int32_t local_tid:12; 404 u_int32_t reserved:4; 405 u_int32_t change_id; 406 u_int32_t device_flags; 407 u_int32_t class:12; 408#define I2O_CLASS_EXECUTIVE 0x000 409#define I2O_CLASS_DDM 0x001 410#define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010 411#define I2O_CLASS_SEQUENTIAL_STORAGE 0x011 412#define I2O_CLASS_LAN 0x020 413#define I2O_CLASS_WAN 0x030 414#define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040 415#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041 416#define I2O_CLASS_SCSI_PERIPHERAL 0x051 417#define I2O_CLASS_ATE_PORT 0x060 418#define I2O_CLASS_ATE_PERIPHERAL 0x061 419#define I2O_CLASS_FLOPPY_CONTROLLER 0x070 420#define I2O_CLASS_FLOPPY_DEVICE 0x071 421#define I2O_CLASS_BUS_ADAPTER_PORT 0x080 422#define I2O_CLASS_MATCH_ANYCLASS 0xffffffff 423 424 u_int32_t class_version:4; 425 u_int32_t class_org:16; 426 u_int32_t sub_class; 427#define I2O_SUBCLASS_i960 0x001 428#define I2O_SUBCLASS_HDM 0x020 429#define I2O_SUBCLASS_ISM 0x021 430 431 u_int32_t user_tid:12; 432 u_int32_t parent_tid:12; 433 u_int32_t bios_info:8; 434 u_int8_t identity_tag[8]; 435 u_int32_t event_capabilities; 436} __packed; 437 438#define I2O_LCT_ENTRYSIZE (sizeof(struct i2o_lct_entry)/sizeof(u_int32_t)) 439 440struct i2o_get_lct_reply { 441 u_int32_t table_size:16; 442 u_int32_t boot_device:12; 443 u_int32_t lct_version:4; 444 u_int32_t iop_flags; 445 u_int32_t current_change_id; 446 struct i2o_lct_entry entry[1]; 447} __packed; 448 449struct i2o_util_get_param_message { 450 u_int8_t version_offset; 451 u_int8_t message_flags; 452 u_int16_t message_size; 453 u_int32_t target_address:12; 454 u_int32_t initiator_address:12; 455 u_int32_t function:8; 456 u_int32_t initiator_context; 457 u_int32_t transaction_context; 458 u_int32_t operation_flags; 459 struct i2o_sgl sgl[2]; 460} __packed; 461 462struct i2o_get_param_template { 463 u_int16_t operation; 464#define I2O_PARAMS_OPERATION_FIELD_GET 0x0001 465#define I2O_PARAMS_OPERATION_LIST_GET 0x0002 466#define I2O_PARAMS_OPERATION_MORE_GET 0x0003 467#define I2O_PARAMS_OPERATION_SIZE_GET 0x0004 468#define I2O_PARAMS_OPERATION_TABLE_GET 0x0005 469#define I2O_PARAMS_OPERATION_FIELD_SET 0x0006 470#define I2O_PARAMS_OPERATION_LIST_SET 0x0007 471#define I2O_PARAMS_OPERATION_ROW_ADD 0x0008 472#define I2O_PARAMS_OPERATION_ROW_DELETE 0x0009 473#define I2O_PARAMS_OPERATION_TABLE_CLEAR 0x000A 474 475 u_int16_t group; 476#define I2O_BSA_DEVICE_INFO_GROUP_NO 0x0000 477#define I2O_BSA_OPERATIONAL_CONTROL_GROUP_NO 0x0001 478#define I2O_BSA_POWER_CONTROL_GROUP_NO 0x0002 479#define I2O_BSA_CACHE_CONTROL_GROUP_NO 0x0003 480#define I2O_BSA_MEDIA_INFO_GROUP_NO 0x0004 481#define I2O_BSA_ERROR_LOG_GROUP_NO 0x0005 482 483#define I2O_UTIL_PARAMS_DESCRIPTOR_GROUP_NO 0xF000 484#define I2O_UTIL_PHYSICAL_DEVICE_TABLE_GROUP_NO 0xF001 485#define I2O_UTIL_CLAIMED_TABLE_GROUP_NO 0xF002 486#define I2O_UTIL_USER_TABLE_GROUP_NO 0xF003 487#define I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_GROUP_NO 0xF005 488#define I2O_UTIL_AUTHORIZED_USER_TABLE_GROUP_NO 0xF006 489#define I2O_UTIL_DEVICE_IDENTITY_GROUP_NO 0xF100 490#define I2O_UTIL_DDM_IDENTITY_GROUP_NO 0xF101 491#define I2O_UTIL_USER_INFORMATION_GROUP_NO 0xF102 492#define I2O_UTIL_SGL_OPERATING_LIMITS_GROUP_NO 0xF103 493#define I2O_UTIL_SENSORS_GROUP_NO 0xF200 494 495 u_int16_t field_count; 496 u_int16_t pad; 497} __packed; 498 499struct i2o_get_param_operation { 500 u_int16_t operation_count; 501 u_int16_t reserved; 502 struct i2o_get_param_template operation[1]; 503} __packed; 504 505struct i2o_get_param_reply { 506 u_int16_t result_count; 507 u_int16_t reserved; 508 u_int16_t block_size; 509 u_int8_t block_status; 510 u_int8_t error_info_size; 511 u_int32_t result[1]; 512} __packed; 513 514struct i2o_device_identity { 515 u_int32_t class; 516 u_int16_t owner; 517 u_int16_t parent; 518 u_int8_t vendor[16]; 519 u_int8_t product[16]; 520 u_int8_t description[16]; 521 u_int8_t revision[8]; 522 u_int8_t sn_format; 523 u_int8_t serial[256]; 524} __packed; 525 526struct i2o_bsa_device { 527 u_int8_t device_type; 528 u_int8_t path_count; 529 u_int16_t power_state; 530 u_int32_t block_size; 531 u_int64_t capacity; 532 u_int32_t capabilities; 533 u_int32_t state; 534} __packed; 535 536struct i2o_util_claim_message { 537 u_int8_t version_offset; 538 u_int8_t message_flags; 539 u_int16_t message_size; 540 u_int32_t target_address:12; 541 u_int32_t initiator_address:12; 542 u_int32_t function:8; 543 u_int32_t initiator_context; 544 u_int32_t transaction_context; 545 u_int16_t claim_flags; 546 u_int8_t reserved; 547 u_int8_t claim_type; 548} __packed; 549 550struct i2o_util_event_register_message { 551 u_int8_t version_offset; 552 u_int8_t message_flags; 553 u_int16_t message_size; 554 u_int32_t target_address:12; 555 u_int32_t initiator_address:12; 556 u_int32_t function:8; 557 u_int32_t initiator_context; 558 u_int32_t transaction_context; 559 u_int32_t event_mask; 560} __packed; 561 562struct i2o_util_event_reply_message { 563 u_int8_t version_offset; 564 u_int8_t message_flags; 565 u_int16_t message_size; 566 u_int32_t target_address:12; 567 u_int32_t initiator_address:12; 568 u_int32_t function:8; 569 u_int32_t initiator_context; 570 u_int32_t transaction_context; 571 u_int32_t event_mask; 572 u_int32_t event_data[1]; 573} __packed; 574 575struct i2o_util_config_dialog_message { 576 u_int8_t version_offset; 577 u_int8_t message_flags; 578 u_int16_t message_size; 579 u_int32_t target_address:12; 580 u_int32_t initiator_address:12; 581 u_int32_t function:8; 582 u_int32_t initiator_context; 583 u_int32_t transaction_context; 584 u_int32_t page_number; 585 struct i2o_sgl sgl[2]; 586} __packed; 587 588struct i2o_private_message { 589 u_int8_t version_offset; 590 u_int8_t message_flags; 591 u_int16_t message_size; 592 u_int32_t target_address:12; 593 u_int32_t initiator_address:12; 594 u_int32_t function:8; 595 u_int32_t initiator_context; 596 u_int32_t transaction_context; 597 u_int16_t function_code; 598 u_int16_t organization_id; 599 struct i2o_sgl in_sgl; 600 struct i2o_sgl out_sgl; 601} __packed; 602 603struct i2o_bsa_rw_block_message { 604 u_int8_t version_offset; 605 u_int8_t message_flags; 606 u_int16_t message_size; 607 u_int32_t target_address:12; 608 u_int32_t initiator_address:12; 609 u_int32_t function:8; 610 u_int32_t initiator_context; 611 u_int32_t transaction_context; 612 u_int16_t control_flags; 613 u_int8_t time_multiplier; 614 u_int8_t fetch_ahead; 615 u_int32_t bytecount; 616 u_int64_t lba; 617 struct i2o_sgl sgl; 618} __packed; 619 620struct i2o_bsa_cache_flush_message { 621 u_int8_t version_offset; 622 u_int8_t message_flags; 623 u_int16_t message_size; 624 u_int32_t target_address:12; 625 u_int32_t initiator_address:12; 626 u_int32_t function:8; 627 u_int32_t initiator_context; 628 u_int32_t transaction_context; 629 u_int16_t control_flags; 630 u_int8_t time_multiplier; 631 u_int8_t reserved; 632} __packed; 633 634/* prototypes */ 635int iop_init(struct iop_softc *); 636void iop_attach(void *); 637void iop_intr(void *); 638int iop_reset(struct iop_softc *); 639int iop_init_outqueue(struct iop_softc *); 640int iop_get_lct(struct iop_softc *); 641struct i2o_get_param_reply *iop_get_util_params(struct iop_softc *,int,int,int); 642u_int32_t iop_get_mfa(struct iop_softc *); 643void iop_free_mfa(struct iop_softc *, int); 644int iop_queue_wait_msg(struct iop_softc *, int, struct i2o_basic_message *); 645int iop_create_sgl(struct i2o_basic_message *, caddr_t, int, int); 646 647/* global prototypes */ 648int pst_add_raid(struct iop_softc *, struct i2o_lct_entry *); 649