1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
5 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
6 * Copyright (c) 2000 BSDi
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD$");
35
36#include <sys/param.h>
37#include <sys/kernel.h>
38#include <sys/malloc.h>
39#include <sys/module.h>
40#include <sys/systm.h>
41#include <sys/bus.h>
42
43#include <dev/pci/pcivar.h>
44#include <dev/pci/pcireg.h>
45
46/*
47 * Chipset fixups.
48 *
49 * These routines are invoked during the probe phase for devices which
50 * typically don't have specific device drivers, but which require
51 * some cleaning up.
52 */
53
54static int	fixup_pci_probe(device_t dev);
55static void	fixwsc_natoma(device_t dev);
56static void	fixc1_nforce2(device_t dev);
57
58static device_method_t fixup_pci_methods[] = {
59    /* Device interface */
60    DEVMETHOD(device_probe,		fixup_pci_probe),
61    DEVMETHOD(device_attach,		bus_generic_attach),
62    { 0, 0 }
63};
64
65static driver_t fixup_pci_driver = {
66    "fixup_pci",
67    fixup_pci_methods,
68    0,
69};
70
71static devclass_t fixup_pci_devclass;
72
73DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, 0, 0);
74
75static int
76fixup_pci_probe(device_t dev)
77{
78    switch (pci_get_devid(dev)) {
79    case 0x12378086:		/* Intel 82440FX (Natoma) */
80	fixwsc_natoma(dev);
81	break;
82    case 0x01e010de:		/* nVidia nForce2 */
83	fixc1_nforce2(dev);
84	break;
85    }
86    return(ENXIO);
87}
88
89static void
90fixwsc_natoma(device_t dev)
91{
92    int		pmccfg;
93
94    pmccfg = pci_read_config(dev, 0x50, 2);
95#if defined(SMP)
96    if (pmccfg & 0x8000) {
97	device_printf(dev, "correcting Natoma config for SMP\n");
98	pmccfg &= ~0x8000;
99	pci_write_config(dev, 0x50, pmccfg, 2);
100    }
101#else
102    if ((pmccfg & 0x8000) == 0) {
103	device_printf(dev, "correcting Natoma config for non-SMP\n");
104	pmccfg |= 0x8000;
105	pci_write_config(dev, 0x50, pmccfg, 2);
106    }
107#endif
108}
109
110/*
111 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work
112 * around a hang that is triggered when the CPU generates a very fast
113 * CONNECT/HALT cycle sequence.  Specifically, the hang can result in
114 * the lapic timer being stopped.
115 *
116 * This requires changing the value for config register at offset 0x6c
117 * for the Host-PCI bridge at bus/dev/function 0/0/0:
118 *
119 * Chip	Current Value	New Value
120 * ----	----------	----------
121 * C17	0x1F0FFF01	0x1F01FF01
122 * C18D	0x9F0FFF01	0x9F01FF01
123 *
124 * We do this by always clearing the bits in 0x000e0000.
125 *
126 * See also: http://lkml.org/lkml/2004/5/3/157
127 */
128static void
129fixc1_nforce2(device_t dev)
130{
131	uint32_t val;
132
133	if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 &&
134	    pci_get_function(dev) == 0) {
135		val = pci_read_config(dev, 0x6c, 4);
136		if (val & 0x000e0000) {
137			device_printf(dev,
138			    "correcting nForce2 C1 CPU disconnect hangs\n");
139			val &= ~0x000e0000;
140			pci_write_config(dev, 0x6c, val, 4);
141		}
142	}
143}
144