1/*-
2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $FreeBSD$
33 */
34
35#ifndef MLX5_FPGA_SDK_H
36#define MLX5_FPGA_SDK_H
37
38#include <dev/mlx5/driver.h>
39#include <linux/types.h>
40#include <linux/list.h>
41/* #include <linux/dma-direction.h> */
42
43#include <dev/mlx5/mlx5_fpga/cmd.h>
44#include <dev/mlx5/mlx5io.h>
45
46/**
47 * DOC: Innova SDK
48 * This header defines the in-kernel API for Innova FPGA client drivers.
49 */
50
51#define MLX5_FPGA_CLIENT_NAME_MAX 64
52
53struct mlx5_fpga_conn;
54struct mlx5_fpga_device;
55
56/**
57 * struct mlx5_fpga_client - Describes an Innova client driver
58 */
59struct mlx5_fpga_client {
60	/**
61	 * @create: Informs the client that an Innova device was created.
62	 * The device is not yet operational at this stage
63	 * This callback is optional
64	 * @fdev: The FPGA device
65	 */
66	void (*create)(struct mlx5_fpga_device *fdev);
67	/**
68	 * @add: Informs the client that a core device is ready and operational.
69	 * @fdev: The FPGA device
70	 * @param vid SBU Vendor ID
71	 * @param pid SBU Product ID
72	 * Any SBU-specific initialization should happen at this stage
73	 * Return: 0 on success, nonzero error value otherwise
74	 */
75	int  (*add)(struct mlx5_fpga_device *fdev, u32 vid, u16 pid);
76	/**
77	 * @remove: Informs the client that a core device is not operational
78	 *          anymore.
79	 * @fdev: The FPGA device
80	 * SBU-specific cleanup should happen at this stage
81	 * This callback is called once for every successful call to add()
82	 */
83	void (*remove)(struct mlx5_fpga_device *fdev);
84	/**
85	 * @destroy: Informs the client that a core device is being destroyed.
86	 * @fdev: The FPGA device
87	 * The device is not operational at this stage
88	 */
89	void (*destroy)(struct mlx5_fpga_device *fdev);
90	/** The name of this client driver */
91	char name[MLX5_FPGA_CLIENT_NAME_MAX];
92	/** For use by core. A link in the list of client drivers */
93	struct list_head list;
94};
95
96/**
97 * struct mlx5_fpga_dma_entry - A scatter-gather DMA entry
98 */
99struct mlx5_fpga_dma_entry {
100	/** @data: Virtual address pointer to the data */
101	void *data;
102	/** @size: Size in bytes of the data */
103	unsigned int size;
104	/** @dma_addr: Private member. Physical DMA-mapped address of the data */
105	dma_addr_t dma_addr;
106};
107
108/**
109 * struct mlx5_fpga_dma_buf - A packet buffer
110 * May contain up to 2 scatter-gather data entries
111 */
112struct mlx5_fpga_dma_buf {
113	/** @dma_dir: DMA direction */
114	enum dma_data_direction dma_dir;
115	/** @sg: Scatter-gather entries pointing to the data in memory */
116	struct mlx5_fpga_dma_entry sg[2];
117	/** @list: Item in SQ backlog, for TX packets */
118	struct list_head list;
119	/**
120	 * @complete: Completion routine, for TX packets
121	 * @conn: FPGA Connection this packet was sent to
122	 * @fdev: FPGA device this packet was sent to
123	 * @buf: The packet buffer
124	 * @status: 0 if successful, or an error code otherwise
125	 */
126	void (*complete)(struct mlx5_fpga_conn *conn,
127			 struct mlx5_fpga_device *fdev,
128			 struct mlx5_fpga_dma_buf *buf, u8 status);
129};
130
131/**
132 * struct mlx5_fpga_conn_attr - FPGA connection attributes
133 * Describes the attributes of a connection
134 */
135struct mlx5_fpga_conn_attr {
136	/** @tx_size: Size of connection TX queue, in packets */
137	unsigned int tx_size;
138	/** @rx_size: Size of connection RX queue, in packets */
139	unsigned int rx_size;
140	/**
141	 * @recv_cb: Callback function which is called for received packets
142	 * @cb_arg: The value provided in mlx5_fpga_conn_attr.cb_arg
143	 * @buf: A buffer containing a received packet
144	 *
145	 * buf is guaranteed to only contain a single scatter-gather entry.
146	 * The size of the actual packet received is specified in buf.sg[0].size
147	 * When this callback returns, the packet buffer may be re-used for
148	 * subsequent receives.
149	 */
150	void (*recv_cb)(void *cb_arg, struct mlx5_fpga_dma_buf *buf);
151	void *cb_arg;
152};
153
154/**
155 * mlx5_fpga_client_register() - Register a client driver
156 * @client: The properties of the client driver
157 *
158 * Should be called from a client driver's module init routine.
159 * Note: The core will immediately callback create() and add() for any existing
160 * devices in the system, as well as new ones added later on.
161 */
162void mlx5_fpga_client_register(struct mlx5_fpga_client *client);
163/**
164 * mlx5_fpga_client_unregister() - Unregister a client driver
165 * @client: The client driver to unregister
166 *
167 * Should be called from a client driver's module exit routine.
168 * Note: The core will immediately callback delete() and destroy() for any
169 * created/added devices in the system, to clean up their state.
170 */
171void mlx5_fpga_client_unregister(struct mlx5_fpga_client *client);
172
173/**
174 * mlx5_fpga_device_reload() - Force the FPGA to reload its synthesis from flash
175 * @fdev: The FPGA device
176 * @image: Which flash image to load
177 *
178 * This routine attempts graceful teardown of all device resources before
179 * loading. This includes a callback to client driver delete().
180 * Calls client driver add() once device is operational again.
181 * Blocks until the new synthesis is loaded, and the device is fully
182 * initialized.
183 *
184 * Return: 0 if successful, or a negative error value otherwise
185 */
186int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
187			    enum mlx5_fpga_image image);
188
189/**
190 * mlx5_fpga_flash_select() - Select the current active flash
191 * @fdev: The FPGA device
192 * @image: Which flash image will be active
193 *
194 * This routine selects the active flash by programming the relevant MUX.
195 * Useful prior to burning a new image on flash.
196 * This setting is volatile and is reset upon reboot or power-cycle
197 *
198 * Return: 0 if successful, or a negative error value otherwise
199 */
200int mlx5_fpga_flash_select(struct mlx5_fpga_device *fdev,
201			   enum mlx5_fpga_image image);
202
203/**
204 * mlx5_fpga_sbu_conn_create() - Initialize a new FPGA SBU connection
205 * @fdev: The FPGA device
206 * @attr: Attributes of the new connection
207 *
208 * Sets up a new FPGA SBU connection with the specified attributes.
209 * The receive callback function may be called for incoming messages even
210 * before this function returns.
211 *
212 * The caller must eventually destroy the connection by calling
213 * mlx5_fpga_sbu_conn_destroy.
214 *
215 * Return: A new connection, or ERR_PTR() error value otherwise.
216 */
217struct mlx5_fpga_conn *
218mlx5_fpga_sbu_conn_create(struct mlx5_fpga_device *fdev,
219			  struct mlx5_fpga_conn_attr *attr);
220
221/**
222 * mlx5_fpga_sbu_conn_destroy() - Destroy an FPGA SBU connection
223 * @conn: The FPGA SBU connection to destroy
224 *
225 * Cleans up an FPGA SBU connection which was previously created with
226 * mlx5_fpga_sbu_conn_create.
227 */
228void mlx5_fpga_sbu_conn_destroy(struct mlx5_fpga_conn *conn);
229
230/**
231 * mlx5_fpga_sbu_conn_sendmsg() - Queue the transmission of a packet
232 * @fdev: An FPGA SBU connection
233 * @buf: The packet buffer
234 *
235 * Queues a packet for transmission over an FPGA SBU connection.
236 * The buffer should not be modified or freed until completion.
237 * Upon completion, the buf's complete() callback is invoked, indicating the
238 * success or error status of the transmission.
239 *
240 * Return: 0 if successful, or an error value otherwise.
241 */
242int mlx5_fpga_sbu_conn_sendmsg(struct mlx5_fpga_conn *conn,
243			       struct mlx5_fpga_dma_buf *buf);
244
245/**
246 * mlx5_fpga_mem_read() - Read from FPGA memory address space
247 * @fdev: The FPGA device
248 * @size: Size of chunk to read, in bytes
249 * @addr: Starting address to read from, in FPGA address space
250 * @buf: Buffer to read into
251 * @access_type: Method for reading
252 *
253 * Reads from the specified address into the specified buffer.
254 * The address may point to configuration space or to DDR.
255 * Large reads may be performed internally as several non-atomic operations.
256 * This function may sleep, so should not be called from atomic contexts.
257 *
258 * Return: 0 if successful, or an error value otherwise.
259 */
260int mlx5_fpga_mem_read(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
261		       void *buf, enum mlx5_fpga_access_type access_type);
262
263/**
264 * mlx5_fpga_mem_write() - Write to FPGA memory address space
265 * @fdev: The FPGA device
266 * @size: Size of chunk to write, in bytes
267 * @addr: Starting address to write to, in FPGA address space
268 * @buf: Buffer which contains data to write
269 * @access_type: Method for writing
270 *
271 * Writes the specified buffer data to FPGA memory at the specified address.
272 * The address may point to configuration space or to DDR.
273 * Large writes may be performed internally as several non-atomic operations.
274 * This function may sleep, so should not be called from atomic contexts.
275 *
276 * Return: 0 if successful, or an error value otherwise.
277 */
278int mlx5_fpga_mem_write(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
279			void *buf, enum mlx5_fpga_access_type access_type);
280
281/**
282 * mlx5_fpga_get_sbu_caps() - Read the SBU capabilities
283 * @fdev: The FPGA device
284 * @size: Size of the buffer to read into
285 * @buf: Buffer to read the capabilities into
286 *
287 * Reads the FPGA SBU capabilities into the specified buffer.
288 * The format of the capabilities buffer is SBU-dependent.
289 *
290 * Return: 0 if successful
291 *         -EINVAL if the buffer is not large enough to contain SBU caps
292 *         or any other error value otherwise.
293 */
294int mlx5_fpga_get_sbu_caps(struct mlx5_fpga_device *fdev, int size, void *buf);
295
296/**
297 * mlx5_fpga_ddr_size_get() - Retrieve the size of FPGA DDR
298 * @fdev: The FPGA device
299 *
300 * Return: Size of DDR avaailable for FPGA, in bytes
301 */
302u64 mlx5_fpga_ddr_size_get(struct mlx5_fpga_device *fdev);
303
304/**
305 * mlx5_fpga_ddr_base_get() - Retrieve the base address of FPGA DDR
306 * @fdev: The FPGA device
307 *
308 * Return: Base address of DDR in FPGA address space
309 */
310u64 mlx5_fpga_ddr_base_get(struct mlx5_fpga_device *fdev);
311
312/**
313 * mlx5_fpga_client_data_set() - Attach client-defined private value to a device
314 * @fdev: The FPGA device
315 * @client: The client driver
316 * @data: Opaque private value
317 *
318 * Client driver may use the private value for storing device-specific
319 * state and configuration information, and may retrieve it with a call to
320 * mlx5_fpga_client_data_get().
321 */
322void mlx5_fpga_client_data_set(struct mlx5_fpga_device *fdev,
323			       struct mlx5_fpga_client *client,
324			       void *data);
325
326/**
327 * mlx5_fpga_client_data_get() - Retrieve client-defined private value
328 * @fdev: The FPGA device
329 * @client: The client driver
330 *
331 * Client driver may use the private value for storing device-specific
332 * state and configuration information by calling mlx5_fpga_client_data_set()
333 *
334 * Return: The private value
335 */
336void *mlx5_fpga_client_data_get(struct mlx5_fpga_device *fdev,
337				struct mlx5_fpga_client *client);
338
339/**
340 * mlx5_fpga_device_query() - Query FPGA device state information
341 * @fdev: The FPGA device
342 * @query: Returns the device state
343 *
344 * Queries the device state and returns it in *query
345 */
346void mlx5_fpga_device_query(struct mlx5_fpga_device *fdev,
347			    struct mlx5_fpga_query *query);
348
349/**
350 * mlx5_fpga_dev() - Retrieve FPGA device structure
351 * @fdev: The FPGA device
352
353 * Return: A pointer to a struct device, which may be used with dev_* logging,
354 *         sysfs extensions, etc.
355 */
356struct device *mlx5_fpga_dev(struct mlx5_fpga_device *fdev);
357
358/**
359 * mlx5_fpga_temperature() - Retrieve FPGA sensor of temperature
360 * @fdev: The FPGA device
361
362 * Return: 0 if successful
363 *         or any other error value otherwise.
364 */
365int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,
366			  struct mlx5_fpga_temperature *temp);
367
368/**
369 * mlx5_fpga_connectdisconnect() - Connect/disconnect ConnectX to FPGA
370 * @fdev: The FPGA device
371
372 * Return: 0 if successful
373 *         or any other error value otherwise.
374 */
375int mlx5_fpga_connectdisconnect(struct mlx5_fpga_device *fdev,
376				enum mlx5_fpga_connect *connect);
377
378/**
379 * mlx5_fpga_get_cap() - Returns the FPGA cap mailbox from FW without parsing.
380 * @fdev: The FPGA device
381 * @fpga_caps: Is an array with a length of according to the size of
382 *           mlx5_ifc_fpga_cap_bits/32
383 *
384 * Returns a copy of the FPGA caps mailbox and returns it in fpga_caps
385 */
386void mlx5_fpga_get_cap(struct mlx5_fpga_device *fdev, u32 *fpga_caps);
387
388#endif /* MLX5_FPGA_SDK_H */
389