1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
3 *
4 * Copyright (C) 2001 Eduardo Horvath.
5 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
6 * All rights reserved.
7 *
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *	from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD$");
35
36/*
37 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/bus.h>
43#include <sys/kernel.h>
44#include <sys/lock.h>
45#include <sys/malloc.h>
46#include <sys/module.h>
47#include <sys/mutex.h>
48#include <sys/resource.h>
49#include <sys/rman.h>
50#include <sys/socket.h>
51
52#include <net/ethernet.h>
53#include <net/if.h>
54
55#include <machine/bus.h>
56#if defined(__powerpc__)
57#include <dev/ofw/ofw_bus.h>
58#include <dev/ofw/openfirm.h>
59#include <machine/ofw_machdep.h>
60#endif
61#include <machine/resource.h>
62
63#include <dev/gem/if_gemreg.h>
64#include <dev/gem/if_gemvar.h>
65
66#include <dev/pci/pcireg.h>
67#include <dev/pci/pcivar.h>
68
69#include "miibus_if.h"
70
71static int	gem_pci_attach(device_t dev);
72static int	gem_pci_detach(device_t dev);
73static int	gem_pci_probe(device_t dev);
74static int	gem_pci_resume(device_t dev);
75static int	gem_pci_suspend(device_t dev);
76
77static const struct gem_pci_dev {
78	uint32_t	gpd_devid;
79	int		gpd_variant;
80	const char	*gpd_desc;
81} gem_pci_devlist[] = {
82	{ 0x1101108e, GEM_SUN_ERI,	"Sun ERI 10/100 Ethernet" },
83	{ 0x2bad108e, GEM_SUN_GEM,	"Sun GEM Gigabit Ethernet" },
84	{ 0x0021106b, GEM_APPLE_GMAC,	"Apple UniNorth GMAC Ethernet" },
85	{ 0x0024106b, GEM_APPLE_GMAC,	"Apple Pangea GMAC Ethernet" },
86	{ 0x0032106b, GEM_APPLE_GMAC,	"Apple UniNorth2 GMAC Ethernet" },
87	{ 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
88	{ 0x0051106b, GEM_APPLE_GMAC,	"Apple Shasta GMAC Ethernet" },
89	{ 0x006b106b, GEM_APPLE_GMAC,	"Apple Intrepid 2 GMAC Ethernet" },
90	{ 0, 0, NULL }
91};
92
93static device_method_t gem_pci_methods[] = {
94	/* Device interface */
95	DEVMETHOD(device_probe,		gem_pci_probe),
96	DEVMETHOD(device_attach,	gem_pci_attach),
97	DEVMETHOD(device_detach,	gem_pci_detach),
98	DEVMETHOD(device_suspend,	gem_pci_suspend),
99	DEVMETHOD(device_resume,	gem_pci_resume),
100	/* Use the suspend handler here, it is all that is required. */
101	DEVMETHOD(device_shutdown,	gem_pci_suspend),
102
103	/* MII interface */
104	DEVMETHOD(miibus_readreg,	gem_mii_readreg),
105	DEVMETHOD(miibus_writereg,	gem_mii_writereg),
106	DEVMETHOD(miibus_statchg,	gem_mii_statchg),
107
108	DEVMETHOD_END
109};
110
111static driver_t gem_pci_driver = {
112	"gem",
113	gem_pci_methods,
114	sizeof(struct gem_softc)
115};
116
117DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
118MODULE_PNP_INFO("W32:vendor/device", pci, gem, gem_pci_devlist,
119    nitems(gem_pci_devlist) - 1);
120MODULE_DEPEND(gem, pci, 1, 1, 1);
121MODULE_DEPEND(gem, ether, 1, 1, 1);
122
123static int
124gem_pci_probe(device_t dev)
125{
126	int i;
127
128	for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
129		if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
130			device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
131			return (BUS_PROBE_DEFAULT);
132		}
133	}
134
135	return (ENXIO);
136}
137
138static struct resource_spec gem_pci_res_spec[] = {
139	{ SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE },	/* GEM_RES_INTR */
140	{ SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },	/* GEM_RES_BANK1 */
141	{ -1, 0 }
142};
143
144#define	GEM_SHARED_PINS		"shared-pins"
145#define	GEM_SHARED_PINS_SERDES	"serdes"
146
147static int
148gem_pci_attach(device_t dev)
149{
150	struct gem_softc *sc;
151	int i;
152#if defined(__powerpc__)
153	char buf[sizeof(GEM_SHARED_PINS)];
154#else
155	int j;
156#endif
157
158	sc = device_get_softc(dev);
159	sc->sc_variant = GEM_UNKNOWN;
160	for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
161		if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
162			sc->sc_variant = gem_pci_devlist[i].gpd_variant;
163			break;
164		}
165	}
166	if (sc->sc_variant == GEM_UNKNOWN) {
167		device_printf(dev, "unknown adaptor\n");
168		return (ENXIO);
169	}
170
171	pci_enable_busmaster(dev);
172
173	/*
174	 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
175	 * although it should be 1.  Correct that.
176	 */
177	if (pci_get_intpin(dev) == 0)
178		pci_set_intpin(dev, 1);
179
180	/* Set the PCI latency timer for Sun ERIs. */
181	if (sc->sc_variant == GEM_SUN_ERI)
182		pci_write_config(dev, PCIR_LATTIMER, GEM_ERI_LATENCY_TIMER, 1);
183
184	sc->sc_dev = dev;
185	sc->sc_flags |= GEM_PCI;
186
187	if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) {
188		device_printf(dev, "failed to allocate resources\n");
189		bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
190		return (ENXIO);
191	}
192
193	GEM_LOCK_INIT(sc, device_get_nameunit(dev));
194
195	/*
196	 * Derive GEM_RES_BANK2 from GEM_RES_BANK1.  This seemed cleaner
197	 * with the old way of using copies of the bus tag and handle in
198	 * the softc along with bus_space_*()...
199	 */
200	sc->sc_res[GEM_RES_BANK2] = malloc(sizeof(*sc->sc_res[GEM_RES_BANK2]),
201	    M_DEVBUF, M_NOWAIT | M_ZERO);
202	if (sc->sc_res[GEM_RES_BANK2] == NULL) {
203		device_printf(dev, "failed to allocate bank2 resource\n");
204		goto fail;
205	}
206	rman_set_bustag(sc->sc_res[GEM_RES_BANK2],
207	    rman_get_bustag(sc->sc_res[GEM_RES_BANK1]));
208	bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]),
209	    rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]),
210	    GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE,
211	    &sc->sc_res[GEM_RES_BANK2]->r_bushandle);
212
213	/* Determine whether we're running at 66MHz. */
214	if ((GEM_BANK2_READ_4(sc, GEM_PCI_BIF_CONFIG) &
215	   GEM_PCI_BIF_CNF_M66EN) != 0)
216		sc->sc_flags |= GEM_PCI66;
217
218#if defined(__powerpc__)
219	OF_getetheraddr(dev, sc->sc_enaddr);
220	if (OF_getprop(ofw_bus_get_node(dev), GEM_SHARED_PINS, buf,
221	    sizeof(buf)) > 0) {
222		buf[sizeof(buf) - 1] = '\0';
223		if (strcmp(buf, GEM_SHARED_PINS_SERDES) == 0)
224			sc->sc_flags |= GEM_SERDES;
225	}
226#else
227	/*
228	 * Dig out VPD (vital product data) and read NA (network address).
229	 * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't
230	 * be accessed via the PCI capability pointer.
231	 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
232	 * chapter 2 describes the data structure.
233	 */
234
235#define	PCI_ROMHDR_SIZE			0x1c
236#define	PCI_ROMHDR_SIG			0x00
237#define	PCI_ROMHDR_SIG_MAGIC		0xaa55		/* little endian */
238#define	PCI_ROMHDR_PTR_DATA		0x18
239#define	PCI_ROM_SIZE			0x18
240#define	PCI_ROM_SIG			0x00
241#define	PCI_ROM_SIG_MAGIC		0x52494350	/* "PCIR", endian */
242							/* reversed */
243#define	PCI_ROM_VENDOR			0x04
244#define	PCI_ROM_DEVICE			0x06
245#define	PCI_ROM_PTR_VPD			0x08
246#define	PCI_VPDRES_BYTE0		0x00
247#define	PCI_VPDRES_ISLARGE(x)		((x) & 0x80)
248#define	PCI_VPDRES_LARGE_NAME(x)	((x) & 0x7f)
249#define	PCI_VPDRES_LARGE_LEN_LSB	0x01
250#define	PCI_VPDRES_LARGE_LEN_MSB	0x02
251#define	PCI_VPDRES_LARGE_SIZE		0x03
252#define	PCI_VPDRES_TYPE_VPD		0x10		/* large */
253#define	PCI_VPD_KEY0			0x00
254#define	PCI_VPD_KEY1			0x01
255#define	PCI_VPD_LEN			0x02
256#define	PCI_VPD_SIZE			0x03
257
258#define	GEM_ROM_READ_1(sc, offs)					\
259	GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs))
260#define	GEM_ROM_READ_2(sc, offs)					\
261	GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs))
262#define	GEM_ROM_READ_4(sc, offs)					\
263	GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs))
264
265	/* Read PCI Expansion ROM header. */
266	if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
267	    (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) <
268	    PCI_ROMHDR_SIZE) {
269		device_printf(dev, "unexpected PCI Expansion ROM header\n");
270		goto fail;
271	}
272
273	/* Read PCI Expansion ROM data. */
274	if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC ||
275	    GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) ||
276	    GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) ||
277	    (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) <
278	    i + PCI_ROM_SIZE) {
279		device_printf(dev, "unexpected PCI Expansion ROM data\n");
280		goto fail;
281	}
282
283	/*
284	 * Read PCI VPD.
285	 * SUNW,pci-gem cards have a single large resource VPD-R tag
286	 * containing one NA.  The VPD used is not in PCI 2.2 standard
287	 * format however.  The length in the resource header is in big
288	 * endian and the end tag is non-standard (0x79) and followed
289	 * by an all-zero "checksum" byte.  Sun calls this a "Fresh
290	 * Choice Ethernet" VPD...
291	 */
292	if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc,
293	    j + PCI_VPDRES_BYTE0)) == 0 ||
294	    PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc,
295	    j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD ||
296	    ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) |
297	    GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
298	    PCI_VPD_SIZE + ETHER_ADDR_LEN ||
299	    GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) !=
300	    0x4e /* N */ ||
301	    GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) !=
302	    0x41 /* A */ ||
303	    GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) !=
304	    ETHER_ADDR_LEN ||
305	    GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE +
306	    ETHER_ADDR_LEN) != 0x79) {
307		device_printf(dev, "unexpected PCI VPD\n");
308		goto fail;
309	}
310	bus_read_region_1(sc->sc_res[GEM_RES_BANK1],
311	    GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE,
312	    sc->sc_enaddr, ETHER_ADDR_LEN);
313#endif
314	/*
315	 * The Xserve G5 has a fake GMAC with an all-zero MAC address.
316	 * Check for this, and don't attach in this case.
317	 */
318
319	for (i = 0; i < ETHER_ADDR_LEN && sc->sc_enaddr[i] == 0; i++) {}
320	if (i == ETHER_ADDR_LEN) {
321		device_printf(dev, "invalid MAC address\n");
322		goto fail;
323	}
324
325	if (gem_attach(sc) != 0) {
326		device_printf(dev, "could not be attached\n");
327		goto fail;
328	}
329
330	if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET |
331	    INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) {
332		device_printf(dev, "failed to set up interrupt\n");
333		gem_detach(sc);
334		goto fail;
335	}
336	return (0);
337
338 fail:
339	if (sc->sc_res[GEM_RES_BANK2] != NULL)
340		free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
341	GEM_LOCK_DESTROY(sc);
342	bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
343	return (ENXIO);
344}
345
346static int
347gem_pci_detach(device_t dev)
348{
349	struct gem_softc *sc;
350
351	sc = device_get_softc(dev);
352	bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih);
353	gem_detach(sc);
354	free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
355	GEM_LOCK_DESTROY(sc);
356	bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
357	return (0);
358}
359
360static int
361gem_pci_suspend(device_t dev)
362{
363
364	gem_suspend(device_get_softc(dev));
365	return (0);
366}
367
368static int
369gem_pci_resume(device_t dev)
370{
371
372	gem_resume(device_get_softc(dev));
373	return (0);
374}
375