1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer,
12 *    without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 *    redistribution must be conditioned upon including a substantially
16 *    similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD$");
34
35/*
36 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
37 */
38#include "opt_ath.h"
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/malloc.h>
43#include <sys/module.h>
44#include <sys/kernel.h>
45#include <sys/lock.h>
46#include <sys/mutex.h>
47#include <sys/errno.h>
48
49#include <machine/bus.h>
50#include <machine/resource.h>
51#include <sys/bus.h>
52#include <sys/rman.h>
53
54#include <sys/socket.h>
55
56#include <net/if.h>
57#include <net/if_media.h>
58#include <net/if_arp.h>
59#include <net/ethernet.h>
60
61#include <net80211/ieee80211_var.h>
62
63#include <dev/ath/if_athvar.h>
64
65#include <dev/pci/pcivar.h>
66#include <dev/pci/pcireg.h>
67
68/* For EEPROM firmware */
69#ifdef	ATH_EEPROM_FIRMWARE
70#include <sys/linker.h>
71#include <sys/firmware.h>
72#endif	/* ATH_EEPROM_FIRMWARE */
73
74/*
75 * PCI glue.
76 */
77
78struct ath_pci_softc {
79	struct ath_softc	sc_sc;
80	struct resource		*sc_sr;		/* memory resource */
81	struct resource		*sc_irq;	/* irq resource */
82	void			*sc_ih;		/* interrupt handler */
83};
84
85#define	PCI_VDEVICE(v, d)			\
86	PCI_DEV(v,d)
87
88#define	PCI_DEVICE_SUB(v, d, sv, sd)		\
89	PCI_DEV(v, d), PCI_SUBDEV(sv, sd)
90
91#define	PCI_VENDOR_ID_ATHEROS		0x168c
92#define	PCI_VENDOR_ID_SAMSUNG		0x144d
93#define	PCI_VENDOR_ID_AZWAVE		0x1a3b
94#define	PCI_VENDOR_ID_FOXCONN		0x105b
95#define	PCI_VENDOR_ID_ATTANSIC		0x1969
96#define	PCI_VENDOR_ID_ASUSTEK		0x1043
97#define	PCI_VENDOR_ID_DELL		0x1028
98#define	PCI_VENDOR_ID_QMI		0x1a32
99#define	PCI_VENDOR_ID_LENOVO		0x17aa
100#define	PCI_VENDOR_ID_HP		0x103c
101
102#include "if_ath_pci_devlist.h"
103
104#define	BS_BAR	0x10
105#define	PCIR_RETRY_TIMEOUT	0x41
106#define	PCIR_CFG_PMCSR		0x48
107
108#define	DEFAULT_CACHESIZE	32
109
110static void
111ath_pci_setup(device_t dev)
112{
113	uint8_t cz;
114
115	/* XXX TODO: need to override the _system_ saved copies of this */
116
117	/*
118	 * If the cache line size is 0, force it to a reasonable
119	 * value.
120	 */
121	cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
122	if (cz == 0) {
123		pci_write_config(dev, PCIR_CACHELNSZ,
124		    DEFAULT_CACHESIZE / 4, 1);
125	}
126
127	/* Override the system latency timer */
128	pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
129
130	/* If a PCI NIC, force wakeup */
131#ifdef	ATH_PCI_WAKEUP_WAR
132	/* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
133	if (1) {
134		uint16_t pmcsr;
135		pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
136		pmcsr |= 3;
137		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
138		pmcsr &= ~3;
139		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
140	}
141#endif
142
143	/*
144	 * Disable retry timeout to keep PCI Tx retries from
145	 * interfering with C3 CPU state.
146	 */
147	pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
148}
149
150static int
151ath_pci_probe(device_t dev)
152{
153	const char* devname;
154
155	devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
156	if (devname != NULL) {
157		device_set_desc(dev, devname);
158		return BUS_PROBE_DEFAULT;
159	}
160	return ENXIO;
161}
162
163static int
164ath_pci_attach(device_t dev)
165{
166	struct ath_pci_softc *psc = device_get_softc(dev);
167	struct ath_softc *sc = &psc->sc_sc;
168	int error = ENXIO;
169	int rid;
170#ifdef	ATH_EEPROM_FIRMWARE
171	const struct firmware *fw = NULL;
172	const char *buf;
173#endif
174	const struct pci_device_table *pd;
175
176	sc->sc_dev = dev;
177
178	/* Do this lookup anyway; figure out what to do with it later */
179	pd = PCI_MATCH(dev, ath_pci_id_table);
180	if (pd)
181		sc->sc_pci_devinfo = pd->driver_data;
182
183	/*
184	 * Enable bus mastering.
185	 */
186	pci_enable_busmaster(dev);
187
188	/*
189	 * Setup other PCI bus configuration parameters.
190	 */
191	ath_pci_setup(dev);
192
193	/*
194	 * Setup memory-mapping of PCI registers.
195	 */
196	rid = BS_BAR;
197	psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
198					    RF_ACTIVE);
199	if (psc->sc_sr == NULL) {
200		device_printf(dev, "cannot map register space\n");
201		goto bad;
202	}
203	sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr);
204	sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
205	/*
206	 * Mark device invalid so any interrupts (shared or otherwise)
207	 * that arrive before the HAL is setup are discarded.
208	 */
209	sc->sc_invalid = 1;
210
211	ATH_LOCK_INIT(sc);
212	ATH_PCU_LOCK_INIT(sc);
213	ATH_RX_LOCK_INIT(sc);
214	ATH_TX_LOCK_INIT(sc);
215	ATH_TXSTATUS_LOCK_INIT(sc);
216
217	/*
218	 * Arrange interrupt line.
219	 */
220	rid = 0;
221	psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
222					     RF_SHAREABLE|RF_ACTIVE);
223	if (psc->sc_irq == NULL) {
224		device_printf(dev, "could not map interrupt\n");
225		goto bad1;
226	}
227	if (bus_setup_intr(dev, psc->sc_irq,
228			   INTR_TYPE_NET | INTR_MPSAFE,
229			   NULL, ath_intr, sc, &psc->sc_ih)) {
230		device_printf(dev, "could not establish interrupt\n");
231		goto bad2;
232	}
233
234	/*
235	 * Setup DMA descriptor area.
236	 */
237	if (bus_dma_tag_create(bus_get_dma_tag(dev),	/* parent */
238			       1, 0,			/* alignment, bounds */
239			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
240			       BUS_SPACE_MAXADDR,	/* highaddr */
241			       NULL, NULL,		/* filter, filterarg */
242			       0x3ffff,			/* maxsize XXX */
243			       ATH_MAX_SCATTER,		/* nsegments */
244			       0x3ffff,			/* maxsegsize XXX */
245			       BUS_DMA_ALLOCNOW,	/* flags */
246			       NULL,			/* lockfunc */
247			       NULL,			/* lockarg */
248			       &sc->sc_dmat)) {
249		device_printf(dev, "cannot allocate DMA tag\n");
250		goto bad3;
251	}
252
253#ifdef	ATH_EEPROM_FIRMWARE
254	/*
255	 * If there's an EEPROM firmware image, load that in.
256	 */
257	if (resource_string_value(device_get_name(dev), device_get_unit(dev),
258	    "eeprom_firmware", &buf) == 0) {
259		if (bootverbose)
260			device_printf(dev, "%s: looking up firmware @ '%s'\n",
261			    __func__, buf);
262
263		fw = firmware_get(buf);
264		if (fw == NULL) {
265			device_printf(dev, "%s: couldn't find firmware\n",
266			    __func__);
267			goto bad4;
268		}
269
270		device_printf(dev, "%s: EEPROM firmware @ %p\n",
271		    __func__, fw->data);
272		sc->sc_eepromdata =
273		    malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
274		if (! sc->sc_eepromdata) {
275			device_printf(dev, "%s: can't malloc eepromdata\n",
276			    __func__);
277			goto bad4;
278		}
279		memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
280		firmware_put(fw, 0);
281	}
282#endif /* ATH_EEPROM_FIRMWARE */
283
284	error = ath_attach(pci_get_device(dev), sc);
285	if (error == 0)					/* success */
286		return 0;
287
288#ifdef	ATH_EEPROM_FIRMWARE
289bad4:
290#endif
291	bus_dma_tag_destroy(sc->sc_dmat);
292bad3:
293	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
294bad2:
295	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
296bad1:
297	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
298
299	ATH_TXSTATUS_LOCK_DESTROY(sc);
300	ATH_PCU_LOCK_DESTROY(sc);
301	ATH_RX_LOCK_DESTROY(sc);
302	ATH_TX_LOCK_DESTROY(sc);
303	ATH_LOCK_DESTROY(sc);
304
305bad:
306	return (error);
307}
308
309static int
310ath_pci_detach(device_t dev)
311{
312	struct ath_pci_softc *psc = device_get_softc(dev);
313	struct ath_softc *sc = &psc->sc_sc;
314
315	/* check if device was removed */
316	sc->sc_invalid = !bus_child_present(dev);
317
318	/*
319	 * Do a config read to clear pre-existing pci error status.
320	 */
321	(void) pci_read_config(dev, PCIR_COMMAND, 4);
322
323	ath_detach(sc);
324
325	bus_generic_detach(dev);
326	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
327	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
328
329	bus_dma_tag_destroy(sc->sc_dmat);
330	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
331
332	if (sc->sc_eepromdata)
333		free(sc->sc_eepromdata, M_TEMP);
334
335	ATH_TXSTATUS_LOCK_DESTROY(sc);
336	ATH_PCU_LOCK_DESTROY(sc);
337	ATH_RX_LOCK_DESTROY(sc);
338	ATH_TX_LOCK_DESTROY(sc);
339	ATH_LOCK_DESTROY(sc);
340
341	return (0);
342}
343
344static int
345ath_pci_shutdown(device_t dev)
346{
347	struct ath_pci_softc *psc = device_get_softc(dev);
348
349	ath_shutdown(&psc->sc_sc);
350	return (0);
351}
352
353static int
354ath_pci_suspend(device_t dev)
355{
356	struct ath_pci_softc *psc = device_get_softc(dev);
357
358	ath_suspend(&psc->sc_sc);
359
360	return (0);
361}
362
363static int
364ath_pci_resume(device_t dev)
365{
366	struct ath_pci_softc *psc = device_get_softc(dev);
367
368	/*
369	 * Suspend/resume resets the PCI configuration space.
370	 */
371	ath_pci_setup(dev);
372
373	ath_resume(&psc->sc_sc);
374
375	return (0);
376}
377
378static device_method_t ath_pci_methods[] = {
379	/* Device interface */
380	DEVMETHOD(device_probe,		ath_pci_probe),
381	DEVMETHOD(device_attach,	ath_pci_attach),
382	DEVMETHOD(device_detach,	ath_pci_detach),
383	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
384	DEVMETHOD(device_suspend,	ath_pci_suspend),
385	DEVMETHOD(device_resume,	ath_pci_resume),
386	{ 0,0 }
387};
388static driver_t ath_pci_driver = {
389	"ath",
390	ath_pci_methods,
391	sizeof (struct ath_pci_softc)
392};
393static	devclass_t ath_devclass;
394DRIVER_MODULE(if_ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0);
395MODULE_VERSION(if_ath_pci, 1);
396MODULE_DEPEND(if_ath_pci, wlan, 1, 1, 1);		/* 802.11 media layer */
397MODULE_DEPEND(if_ath_pci, ath_main, 1, 1, 1);	/* if_ath driver */
398MODULE_DEPEND(if_ath_pci, ath_hal, 1, 1, 1);	/* ath HAL */
399