1// SPDX-License-Identifier: GPL-2.0 2// 3//Copyright (C) 2013 Freescale Semiconductor, Inc. 4 5/dts-v1/; 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include "imx6sl.dtsi" 10 11/ { 12 model = "Freescale i.MX6 SoloLite EVK Board"; 13 compatible = "fsl,imx6sl-evk", "fsl,imx6sl"; 14 15 chosen { 16 stdout-path = &uart1; 17 }; 18 19 memory@80000000 { 20 device_type = "memory"; 21 reg = <0x80000000 0x40000000>; 22 }; 23 24 backlight_display: backlight_display { 25 compatible = "pwm-backlight"; 26 pwms = <&pwm1 0 5000000>; 27 brightness-levels = <0 4 8 16 32 64 128 255>; 28 default-brightness-level = <6>; 29 }; 30 31 leds { 32 compatible = "gpio-leds"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_led>; 35 36 user { 37 label = "debug"; 38 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 39 linux,default-trigger = "heartbeat"; 40 }; 41 }; 42 43 reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 44 compatible = "regulator-fixed"; 45 regulator-name = "usb_otg1_vbus"; 46 regulator-min-microvolt = <5000000>; 47 regulator-max-microvolt = <5000000>; 48 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; 49 enable-active-high; 50 vin-supply = <&swbst_reg>; 51 }; 52 53 reg_usb_otg2_vbus: regulator-usb-otg2-vbus { 54 compatible = "regulator-fixed"; 55 regulator-name = "usb_otg2_vbus"; 56 regulator-min-microvolt = <5000000>; 57 regulator-max-microvolt = <5000000>; 58 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; 59 enable-active-high; 60 vin-supply = <&swbst_reg>; 61 }; 62 63 reg_aud3v: regulator-aud3v { 64 compatible = "regulator-fixed"; 65 regulator-name = "wm8962-supply-3v15"; 66 regulator-min-microvolt = <3150000>; 67 regulator-max-microvolt = <3150000>; 68 regulator-boot-on; 69 }; 70 71 reg_aud4v: regulator-aud4v { 72 compatible = "regulator-fixed"; 73 regulator-name = "wm8962-supply-4v2"; 74 regulator-min-microvolt = <4325000>; 75 regulator-max-microvolt = <4325000>; 76 regulator-boot-on; 77 }; 78 79 reg_lcd_3v3: regulator-lcd-3v3 { 80 compatible = "regulator-fixed"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_reg_lcd_3v3>; 83 regulator-name = "lcd-3v3"; 84 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; 85 enable-active-high; 86 }; 87 88 reg_lcd_5v: regulator-lcd-5v { 89 compatible = "regulator-fixed"; 90 regulator-name = "lcd-5v0"; 91 regulator-min-microvolt = <5000000>; 92 regulator-max-microvolt = <5000000>; 93 }; 94 95 sound { 96 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; 97 model = "wm8962-audio"; 98 ssi-controller = <&ssi2>; 99 audio-codec = <&codec>; 100 audio-routing = 101 "Headphone Jack", "HPOUTL", 102 "Headphone Jack", "HPOUTR", 103 "Ext Spk", "SPKOUTL", 104 "Ext Spk", "SPKOUTR", 105 "AMIC", "MICBIAS", 106 "IN3R", "AMIC"; 107 mux-int-port = <2>; 108 mux-ext-port = <3>; 109 }; 110 111 panel { 112 compatible = "sii,43wvf1g"; 113 backlight = <&backlight_display>; 114 dvdd-supply = <®_lcd_3v3>; 115 avdd-supply = <®_lcd_5v>; 116 117 port { 118 panel_in: endpoint { 119 remote-endpoint = <&display_out>; 120 }; 121 }; 122 }; 123}; 124 125&audmux { 126 pinctrl-names = "default"; 127 pinctrl-0 = <&pinctrl_audmux3>; 128 status = "okay"; 129}; 130 131&ecspi1 { 132 cs-gpios = <&gpio4 11 0>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&pinctrl_ecspi1>; 135 status = "okay"; 136 137 flash: m25p80@0 { 138 #address-cells = <1>; 139 #size-cells = <1>; 140 compatible = "st,m25p32", "jedec,spi-nor"; 141 spi-max-frequency = <20000000>; 142 reg = <0>; 143 }; 144}; 145 146&fec { 147 pinctrl-names = "default", "sleep"; 148 pinctrl-0 = <&pinctrl_fec>; 149 pinctrl-1 = <&pinctrl_fec_sleep>; 150 phy-mode = "rmii"; 151 status = "okay"; 152}; 153 154&i2c1 { 155 clock-frequency = <100000>; 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pinctrl_i2c1>; 158 status = "okay"; 159 160 pmic: pfuze100@8 { 161 compatible = "fsl,pfuze100"; 162 reg = <0x08>; 163 164 regulators { 165 sw1a_reg: sw1ab { 166 regulator-min-microvolt = <300000>; 167 regulator-max-microvolt = <1875000>; 168 regulator-boot-on; 169 regulator-always-on; 170 regulator-ramp-delay = <6250>; 171 }; 172 173 sw1c_reg: sw1c { 174 regulator-min-microvolt = <300000>; 175 regulator-max-microvolt = <1875000>; 176 regulator-boot-on; 177 regulator-always-on; 178 regulator-ramp-delay = <6250>; 179 }; 180 181 sw2_reg: sw2 { 182 regulator-min-microvolt = <800000>; 183 regulator-max-microvolt = <3300000>; 184 regulator-boot-on; 185 regulator-always-on; 186 }; 187 188 sw3a_reg: sw3a { 189 regulator-min-microvolt = <400000>; 190 regulator-max-microvolt = <1975000>; 191 regulator-boot-on; 192 regulator-always-on; 193 }; 194 195 sw3b_reg: sw3b { 196 regulator-min-microvolt = <400000>; 197 regulator-max-microvolt = <1975000>; 198 regulator-boot-on; 199 regulator-always-on; 200 }; 201 202 sw4_reg: sw4 { 203 regulator-min-microvolt = <800000>; 204 regulator-max-microvolt = <3300000>; 205 regulator-always-on; 206 }; 207 208 swbst_reg: swbst { 209 regulator-min-microvolt = <5000000>; 210 regulator-max-microvolt = <5150000>; 211 }; 212 213 snvs_reg: vsnvs { 214 regulator-min-microvolt = <1000000>; 215 regulator-max-microvolt = <3000000>; 216 regulator-boot-on; 217 regulator-always-on; 218 }; 219 220 vref_reg: vrefddr { 221 regulator-boot-on; 222 regulator-always-on; 223 }; 224 225 vgen1_reg: vgen1 { 226 regulator-min-microvolt = <800000>; 227 regulator-max-microvolt = <1550000>; 228 regulator-always-on; 229 }; 230 231 vgen2_reg: vgen2 { 232 regulator-min-microvolt = <800000>; 233 regulator-max-microvolt = <1550000>; 234 }; 235 236 vgen3_reg: vgen3 { 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <3300000>; 239 }; 240 241 vgen4_reg: vgen4 { 242 regulator-min-microvolt = <1800000>; 243 regulator-max-microvolt = <3300000>; 244 regulator-always-on; 245 }; 246 247 vgen5_reg: vgen5 { 248 regulator-min-microvolt = <1800000>; 249 regulator-max-microvolt = <3300000>; 250 regulator-always-on; 251 }; 252 253 vgen6_reg: vgen6 { 254 regulator-min-microvolt = <1800000>; 255 regulator-max-microvolt = <3300000>; 256 regulator-always-on; 257 }; 258 }; 259 }; 260}; 261 262&i2c2 { 263 clock-frequency = <100000>; 264 pinctrl-names = "default"; 265 pinctrl-0 = <&pinctrl_i2c2>; 266 status = "okay"; 267 268 codec: wm8962@1a { 269 compatible = "wlf,wm8962"; 270 reg = <0x1a>; 271 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>; 272 DCVDD-supply = <&vgen3_reg>; 273 DBVDD-supply = <®_aud3v>; 274 AVDD-supply = <&vgen3_reg>; 275 CPVDD-supply = <&vgen3_reg>; 276 MICVDD-supply = <®_aud3v>; 277 PLLVDD-supply = <&vgen3_reg>; 278 SPKVDD1-supply = <®_aud4v>; 279 SPKVDD2-supply = <®_aud4v>; 280 }; 281}; 282 283&iomuxc { 284 pinctrl-names = "default"; 285 pinctrl-0 = <&pinctrl_hog>; 286 287 imx6sl-evk { 288 pinctrl_hog: hoggrp { 289 fsl,pins = < 290 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059 291 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059 292 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 293 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 294 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 295 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 296 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 297 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 298 >; 299 }; 300 301 pinctrl_audmux3: audmux3grp { 302 fsl,pins = < 303 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 304 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 305 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 306 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 307 >; 308 }; 309 310 pinctrl_ecspi1: ecspi1grp { 311 fsl,pins = < 312 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 313 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 314 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 315 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000 316 >; 317 }; 318 319 pinctrl_fec: fecgrp { 320 fsl,pins = < 321 MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 322 MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 323 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0 324 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0 325 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0 326 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0 327 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0 328 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0 329 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8 330 >; 331 }; 332 333 pinctrl_fec_sleep: fecgrp-sleep { 334 fsl,pins = < 335 MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080 336 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080 337 MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080 338 MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080 339 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080 340 MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080 341 MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080 342 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080 343 >; 344 }; 345 346 pinctrl_i2c1: i2c1grp { 347 fsl,pins = < 348 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 349 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 350 >; 351 }; 352 353 354 pinctrl_i2c2: i2c2grp { 355 fsl,pins = < 356 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 357 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1 358 >; 359 }; 360 361 pinctrl_kpp: kppgrp { 362 fsl,pins = < 363 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 364 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010 365 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0 366 MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0 367 MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0 368 MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0 369 >; 370 }; 371 372 pinctrl_lcd: lcdgrp { 373 fsl,pins = < 374 MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0 375 MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0 376 MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0 377 MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0 378 MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0 379 MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0 380 MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0 381 MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0 382 MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0 383 MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0 384 MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0 385 MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0 386 MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0 387 MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0 388 MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0 389 MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0 390 MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0 391 MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0 392 MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0 393 MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0 394 MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0 395 MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0 396 MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0 397 MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0 398 MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0 399 MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0 400 MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0 401 MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0 402 >; 403 }; 404 405 pinctrl_led: ledgrp { 406 fsl,pins = < 407 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059 408 >; 409 }; 410 411 pinctrl_pwm1: pwmgrp { 412 fsl,pins = < 413 MX6SL_PAD_PWM1__PWM1_OUT 0x110b0 414 >; 415 }; 416 417 pinctrl_reg_lcd_3v3: reglcd3v3grp { 418 fsl,pins = < 419 MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x17059 420 >; 421 }; 422 423 pinctrl_uart1: uart1grp { 424 fsl,pins = < 425 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 426 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 427 >; 428 }; 429 430 pinctrl_usbotg1: usbotg1grp { 431 fsl,pins = < 432 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 433 >; 434 }; 435 436 pinctrl_usdhc1: usdhc1grp { 437 fsl,pins = < 438 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059 439 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059 440 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059 441 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059 442 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059 443 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059 444 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059 445 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059 446 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059 447 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 448 >; 449 }; 450 451 pinctrl_usdhc1_100mhz: usdhc1grp100mhz { 452 fsl,pins = < 453 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 454 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9 455 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 456 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 457 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 458 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 459 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 460 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 461 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 462 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 463 >; 464 }; 465 466 pinctrl_usdhc1_200mhz: usdhc1grp200mhz { 467 fsl,pins = < 468 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 469 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9 470 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 471 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 472 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 473 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 474 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9 475 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9 476 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9 477 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9 478 >; 479 }; 480 481 pinctrl_usdhc2: usdhc2grp { 482 fsl,pins = < 483 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 484 MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059 485 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 486 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 487 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 488 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 489 >; 490 }; 491 492 pinctrl_usdhc2_100mhz: usdhc2grp100mhz { 493 fsl,pins = < 494 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 495 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9 496 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 497 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 498 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 499 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 500 >; 501 }; 502 503 pinctrl_usdhc2_200mhz: usdhc2grp200mhz { 504 fsl,pins = < 505 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 506 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9 507 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 508 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 509 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 510 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 511 >; 512 }; 513 514 pinctrl_usdhc3: usdhc3grp { 515 fsl,pins = < 516 MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059 517 MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059 518 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059 519 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059 520 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059 521 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 522 >; 523 }; 524 525 pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 526 fsl,pins = < 527 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 528 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9 529 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 530 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 531 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 532 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 533 >; 534 }; 535 536 pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 537 fsl,pins = < 538 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 539 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9 540 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 541 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 542 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 543 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 544 >; 545 }; 546 }; 547}; 548 549&kpp { 550 pinctrl-names = "default"; 551 pinctrl-0 = <&pinctrl_kpp>; 552 linux,keymap = < 553 MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */ 554 MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */ 555 MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */ 556 MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */ 557 MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */ 558 MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */ 559 MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */ 560 MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */ 561 >; 562 status = "okay"; 563}; 564 565&lcdif { 566 pinctrl-names = "default"; 567 pinctrl-0 = <&pinctrl_lcd>; 568 status = "okay"; 569 570 port { 571 display_out: endpoint { 572 remote-endpoint = <&panel_in>; 573 }; 574 }; 575}; 576 577&pwm1 { 578 #pwm-cells = <2>; 579 pinctrl-names = "default"; 580 pinctrl-0 = <&pinctrl_pwm1>; 581 status = "okay"; 582}; 583 584®_vdd1p1 { 585 vin-supply = <&sw2_reg>; 586}; 587 588®_vdd2p5 { 589 vin-supply = <&sw2_reg>; 590}; 591 592&snvs_poweroff { 593 status = "okay"; 594}; 595 596&ssi2 { 597 status = "okay"; 598}; 599 600&uart1 { 601 pinctrl-names = "default"; 602 pinctrl-0 = <&pinctrl_uart1>; 603 status = "okay"; 604}; 605 606&usbotg1 { 607 vbus-supply = <®_usb_otg1_vbus>; 608 pinctrl-names = "default"; 609 pinctrl-0 = <&pinctrl_usbotg1>; 610 disable-over-current; 611 status = "okay"; 612}; 613 614&usbotg2 { 615 vbus-supply = <®_usb_otg2_vbus>; 616 dr_mode = "host"; 617 disable-over-current; 618 status = "okay"; 619}; 620 621&usdhc1 { 622 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 623 pinctrl-0 = <&pinctrl_usdhc1>; 624 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 625 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 626 bus-width = <8>; 627 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 628 wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; 629 status = "okay"; 630}; 631 632&usdhc2 { 633 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 634 pinctrl-0 = <&pinctrl_usdhc2>; 635 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 636 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 637 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 638 wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 639 status = "okay"; 640}; 641 642&usdhc3 { 643 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 644 pinctrl-0 = <&pinctrl_usdhc3>; 645 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 646 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 647 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 648 status = "okay"; 649}; 650