1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __DT_BINDINGS_Q6_AFE_H__
3#define __DT_BINDINGS_Q6_AFE_H__
4
5/* Audio Front End (AFE) virtual ports IDs */
6#define HDMI_RX		1
7#define SLIMBUS_0_RX    2
8#define SLIMBUS_0_TX    3
9#define SLIMBUS_1_RX    4
10#define SLIMBUS_1_TX    5
11#define SLIMBUS_2_RX    6
12#define SLIMBUS_2_TX    7
13#define SLIMBUS_3_RX    8
14#define SLIMBUS_3_TX    9
15#define SLIMBUS_4_RX    10
16#define SLIMBUS_4_TX    11
17#define SLIMBUS_5_RX    12
18#define SLIMBUS_5_TX    13
19#define SLIMBUS_6_RX    14
20#define SLIMBUS_6_TX    15
21#define PRIMARY_MI2S_RX		16
22#define PRIMARY_MI2S_TX		17
23#define SECONDARY_MI2S_RX	18
24#define SECONDARY_MI2S_TX	19
25#define TERTIARY_MI2S_RX	20
26#define TERTIARY_MI2S_TX	21
27#define QUATERNARY_MI2S_RX	22
28#define QUATERNARY_MI2S_TX	23
29#define PRIMARY_TDM_RX_0	24
30#define PRIMARY_TDM_TX_0	25
31#define PRIMARY_TDM_RX_1	26
32#define PRIMARY_TDM_TX_1	27
33#define PRIMARY_TDM_RX_2	28
34#define PRIMARY_TDM_TX_2	29
35#define PRIMARY_TDM_RX_3	30
36#define PRIMARY_TDM_TX_3	31
37#define PRIMARY_TDM_RX_4	32
38#define PRIMARY_TDM_TX_4	33
39#define PRIMARY_TDM_RX_5	34
40#define PRIMARY_TDM_TX_5	35
41#define PRIMARY_TDM_RX_6	36
42#define PRIMARY_TDM_TX_6	37
43#define PRIMARY_TDM_RX_7	38
44#define PRIMARY_TDM_TX_7	39
45#define SECONDARY_TDM_RX_0	40
46#define SECONDARY_TDM_TX_0	41
47#define SECONDARY_TDM_RX_1	42
48#define SECONDARY_TDM_TX_1	43
49#define SECONDARY_TDM_RX_2	44
50#define SECONDARY_TDM_TX_2	45
51#define SECONDARY_TDM_RX_3	46
52#define SECONDARY_TDM_TX_3	47
53#define SECONDARY_TDM_RX_4	48
54#define SECONDARY_TDM_TX_4	49
55#define SECONDARY_TDM_RX_5	50
56#define SECONDARY_TDM_TX_5	51
57#define SECONDARY_TDM_RX_6	52
58#define SECONDARY_TDM_TX_6	53
59#define SECONDARY_TDM_RX_7	54
60#define SECONDARY_TDM_TX_7	55
61#define TERTIARY_TDM_RX_0	56
62#define TERTIARY_TDM_TX_0	57
63#define TERTIARY_TDM_RX_1	58
64#define TERTIARY_TDM_TX_1	59
65#define TERTIARY_TDM_RX_2	60
66#define TERTIARY_TDM_TX_2	61
67#define TERTIARY_TDM_RX_3	62
68#define TERTIARY_TDM_TX_3	63
69#define TERTIARY_TDM_RX_4	64
70#define TERTIARY_TDM_TX_4	65
71#define TERTIARY_TDM_RX_5	66
72#define TERTIARY_TDM_TX_5	67
73#define TERTIARY_TDM_RX_6	68
74#define TERTIARY_TDM_TX_6	69
75#define TERTIARY_TDM_RX_7	70
76#define TERTIARY_TDM_TX_7	71
77#define QUATERNARY_TDM_RX_0	72
78#define QUATERNARY_TDM_TX_0	73
79#define QUATERNARY_TDM_RX_1	74
80#define QUATERNARY_TDM_TX_1	75
81#define QUATERNARY_TDM_RX_2	76
82#define QUATERNARY_TDM_TX_2	77
83#define QUATERNARY_TDM_RX_3	78
84#define QUATERNARY_TDM_TX_3	79
85#define QUATERNARY_TDM_RX_4	80
86#define QUATERNARY_TDM_TX_4	81
87#define QUATERNARY_TDM_RX_5	82
88#define QUATERNARY_TDM_TX_5	83
89#define QUATERNARY_TDM_RX_6	84
90#define QUATERNARY_TDM_TX_6	85
91#define QUATERNARY_TDM_RX_7	86
92#define QUATERNARY_TDM_TX_7	87
93#define QUINARY_TDM_RX_0	88
94#define QUINARY_TDM_TX_0	89
95#define QUINARY_TDM_RX_1	90
96#define QUINARY_TDM_TX_1	91
97#define QUINARY_TDM_RX_2	92
98#define QUINARY_TDM_TX_2	93
99#define QUINARY_TDM_RX_3	94
100#define QUINARY_TDM_TX_3	95
101#define QUINARY_TDM_RX_4	96
102#define QUINARY_TDM_TX_4	97
103#define QUINARY_TDM_RX_5	98
104#define QUINARY_TDM_TX_5	99
105#define QUINARY_TDM_RX_6	100
106#define QUINARY_TDM_TX_6	101
107#define QUINARY_TDM_RX_7	102
108#define QUINARY_TDM_TX_7	103
109#define DISPLAY_PORT_RX		104
110
111#endif /* __DT_BINDINGS_Q6_AFE_H__ */
112
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